2 * (C) Copyright 2000-2002 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
3 * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
26 * Discription: Contains interrupt routines needed by U-Boot
32 #include <asm/processor.h>
34 struct interrupt_action {
35 interrupt_handler_t *handler;
39 static struct interrupt_action irq_vecs[NR_IRQS];
42 * Initialise interrupts
45 int interrupt_init_cpu (ulong *decrementer_count)
47 volatile immap_t *immr = (immap_t *) CFG_IMMR;
49 /* Decrementer used here for status led */
50 *decrementer_count = get_tbclk () / CFG_HZ;
52 /* Disable all interrupts */
53 immr->im_siu_conf.sc_simask = 0;
59 * Handle external interrupts
61 void external_interrupt (struct pt_regs *regs)
63 volatile immap_t *immr = (immap_t *) CFG_IMMR;
65 ulong simask, newmask;
69 * read the SIVEC register and shift the bits down
70 * to get the irq number
72 vec = immr->im_siu_conf.sc_sivec;
74 v_bit = 0x80000000UL >> irq;
77 * Read Interrupt Mask Register and Mask Interrupts
79 simask = immr->im_siu_conf.sc_simask;
80 newmask = simask & (~(0xFFFF0000 >> irq));
81 immr->im_siu_conf.sc_simask = newmask;
83 if (!(irq & 0x1)) { /* External Interrupt ? */
87 * Read Interrupt Edge/Level Register
89 siel = immr->im_siu_conf.sc_siel;
91 if (siel & v_bit) { /* edge triggered interrupt ? */
93 * Rewrite SIPEND Register to clear interrupt
95 immr->im_siu_conf.sc_sipend = v_bit;
99 if (irq_vecs[irq].handler != NULL) {
100 irq_vecs[irq].handler (irq_vecs[irq].arg);
102 printf ("\nBogus External Interrupt IRQ %d Vector %ld\n",
104 /* turn off the bogus interrupt to avoid it from now */
108 * Re-Enable old Interrupt Mask
110 immr->im_siu_conf.sc_simask = simask;
114 * Install and free an interrupt handler
116 void irq_install_handler (int vec, interrupt_handler_t * handler,
119 volatile immap_t *immr = (immap_t *) CFG_IMMR;
121 if (irq_vecs[vec].handler != NULL) {
122 printf ("SIU interrupt %d 0x%x\n",
126 irq_vecs[vec].handler = handler;
127 irq_vecs[vec].arg = arg;
128 immr->im_siu_conf.sc_simask |= 1 << (31 - vec);
130 printf ("Install SIU interrupt for vector %d ==> %p\n",
135 void irq_free_handler (int vec)
137 volatile immap_t *immr = (immap_t *) CFG_IMMR;
140 printf ("Free CPM interrupt for vector %d\n",
143 immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec));
144 irq_vecs[vec].handler = NULL;
145 irq_vecs[vec].arg = NULL;
149 * Timer interrupt - gets called when bit 0 of DEC changes from
150 * 0. Decrementer is enabled with bit TBE in TBSCR.
152 void timer_interrupt_cpu (struct pt_regs *regs)
154 volatile immap_t *immr = (immap_t *) CFG_IMMR;
157 printf ("*** Timer Interrupt *** ");
159 /* Reset Timer Status Bit and Timers Interrupt Status */
160 immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
162 immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;