5 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
7 #include <ppc_asm.tmpl>
10 #include <asm/cache.h>
13 /* To boot secondary cpus, we need a place for them to start up.
14 * Normally, they start at 0xfffffffc, but that's usually the
15 * firmware, and we don't want to have to run the firmware again.
16 * Instead, the primary cpu will set the BPTR to point here to
17 * this page. We then set up the core, and head to
18 * start_secondary. Note that this means that the code below
19 * must never exceed 1023 instructions (the branch at the end
20 * would then be the 1024th).
22 .globl __secondary_start_page
24 __secondary_start_page:
25 /* First do some preliminary setup */
26 lis r3, HID0_EMCP@h /* enable machine check */
27 ori r3,r3,HID0_TBEN@l /* enable Timebase */
28 #ifdef CONFIG_PHYS_64BIT
29 ori r3,r3,HID0_ENMAS7@l /* enable MAS7 updates */
33 li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
36 /* Enable branch prediction */
40 /* Enable/invalidate the I-Cache */
42 ori r0,r0,(L1CSR1_ICFI|L1CSR1_ICE)
46 /* Enable/invalidate the D-Cache */
48 ori r0,r0,(L1CSR0_DCFI|L1CSR0_DCE)
54 #define toreset(x) (x - __secondary_start_page + 0xfffff000)
56 /* get our PIR to figure out our table entry */
57 lis r3,toreset(__spin_table)@h
58 ori r3,r3,toreset(__spin_table)@l
60 /* r9 has the base address for the entry */
68 #define EPAPR_MAGIC (0x65504150)
80 ori r6,r6,EPAPR_MAGIC@l
88 /* spin waiting for addr */
89 1: lwz r4,ENTRY_ADDR(r9)
93 /* setup branch addr */
96 /* mark the entry as released */
100 /* mask by ~64M to setup our tlb we will jump to */
103 /* setup r3, r5, r6, r7 */
110 /* load up the pir */
117 * Coming here, we know the cpu has one TLB mapping in TLB1[0]
118 * which maps 0xfffff000-0xffffffff one-to-one. We set up a
119 * second mapping that maps addr 1:1 for 64M, and then we jump to
122 lis r9,(MAS0_TLBSEL(1)|MAS0_ESEL(1))@h
124 lis r9,(MAS1_VALID|MAS1_IPROT)@h
125 ori r9,r9,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
127 /* WIMGE = 0b00000 for now */
129 ori r8,r8,(MAS3_SX|MAS3_SW|MAS3_SR)
133 /* Now we have another mapping for this page, so we jump to that
141 .space CONFIG_NR_CPUS*24
143 /* Fill in the empty space. The actual reset vector is
144 * the last word of the page */
145 __secondary_start_code_end:
146 .space 4092 - (__secondary_start_code_end - __secondary_start_page)
147 __secondary_reset_vector:
148 b __secondary_start_page