2 * Copyright 2004 Freescale Semiconductor.
3 * Jeff Brown (jeffrey@freescale.com)
4 * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
6 * (C) Copyright 2000-2002
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/processor.h>
32 unsigned long get_board_sys_clk(ulong dummy);
33 unsigned long get_sysclk_from_px_regs(void);
36 /* --------------------------------------------------------------- */
38 void get_sys_info (sys_info_t * sysInfo)
40 volatile immap_t *immap = (immap_t *)CFG_IMMR;
41 volatile ccsr_gur_t *gur = &immap->im_gur;
42 uint plat_ratio, e600_ratio;
44 plat_ratio = (gur->porpllsr) & 0x0000003e;
49 sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
61 sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
64 sysInfo->freqSystemBus = 0;
68 // printf("assigned system bus freq = %d for plat ratio 0x%08lx\n", sysInfo->freqSystemBus, plat_ratio);
69 e600_ratio = (gur->porpllsr) & 0x003f0000;
73 sysInfo->freqProcessor = 2*sysInfo->freqSystemBus;
76 sysInfo->freqProcessor = 5*sysInfo->freqSystemBus/2;
79 sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
82 sysInfo->freqProcessor = 7*sysInfo->freqSystemBus/2;
85 sysInfo->freqProcessor = 4*sysInfo->freqSystemBus;
88 sysInfo->freqProcessor = 9*sysInfo->freqSystemBus/2;
91 /* JB - Emulator workaround until real cop is plugged in */
92 sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
93 //sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
96 // printf("assigned processor freq = %d for e600 ratio 0x%08lx\n", sysInfo->freqProcessor, e600_ratio);
101 /* ------------------------------------------------------------------------- */
104 * Measure CPU clock speed (core clock GCLK1, GCLK2)
106 * (Approx. GCLK frequency in Hz)
109 int get_clocks (void)
111 DECLARE_GLOBAL_DATA_PTR;
114 get_sys_info (&sys_info);
115 gd->cpu_clk = sys_info.freqProcessor;
116 gd->bus_clk = sys_info.freqSystemBus;
118 if(gd->cpu_clk != 0) return (0);
122 /* ------------------------------------------------------------------------- */
123 /********************************************
125 * return system bus freq in Hz
126 *********************************************/
127 ulong get_bus_freq (ulong dummy)
133 get_sys_info (&sys_info);
134 val = sys_info.freqSystemBus;
139 unsigned long get_sysclk_from_px_regs()
144 vclkh = in8(PIXIS_BASE+PIXIS_VCLKH);
145 vclkl = in8(PIXIS_BASE+PIXIS_VCLKL);
147 if((vclkh == 0x84) && (vclkl ==0x07))
151 if((vclkh == 0x3F) && (vclkl ==0x20))
155 if((vclkh == 0x3F) && (vclkl ==0x2A))
159 if((vclkh == 0x24) && (vclkl ==0x04))
163 if((vclkh == 0x3F) && (vclkl ==0x4B))
167 if((vclkh == 0x3F) && (vclkl ==0x5C))
171 if((vclkh == 0xDF) && (vclkl ==0x3B))
175 if((vclkh == 0xDF) && (vclkl ==0x4B))
183 /******* From MPC8641HPCN Design Workbook ************
186 * reads the FPGA on board for CONFIG_SYS_CLK_FREQ
188 ********************************************************/
190 unsigned long get_board_sys_clk(ulong dummy)
192 u8 i, go_bit, rd_clks;
195 go_bit = in8(PIXIS_BASE+PIXIS_VCTL);
198 rd_clks = in8(PIXIS_BASE+PIXIS_VCFGEN0);
201 /* Only if both go bit and the SCLK bit in VCFGEN0 are set
202 * should we be using the AUX register. Remember, we also set the
203 * GO bit to boot from the alternate bank on the on-board flash
209 i = in8(PIXIS_BASE+PIXIS_AUX);
211 i = in8(PIXIS_BASE+PIXIS_SPD);
212 //val = get_sysclk_from_px_regs();
215 i = in8(PIXIS_BASE+PIXIS_SPD);