2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
11 * Modified to work with little-endian systems.
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * 01/20/2004 - combined variants of original driver.
33 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35 * 01/27/2004 - Little endian support Ed Okerson
37 * Tested Architectures
38 * Port Width Chip Width # of banks Flash Chip Board
39 * 32 16 1 28F128J3 seranoa/eagle
40 * 64 16 1 28F128J3 seranoa/falcon
44 /* The DEBUG define must be before common to enable debugging */
48 #include <asm/processor.h>
49 #include <asm/byteorder.h>
50 #include <linux/byteorder/swab.h>
51 #include <environment.h>
52 #ifdef CFG_FLASH_CFI_DRIVER
55 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
56 * The width of the port and the width of the chips are determined at initialization.
57 * These widths are used to calculate the address for access CFI data structures.
58 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
61 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
62 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
63 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
64 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
68 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
69 * Table (ALT) to determine if protection is available
71 * Add support for other command sets Use the PRI and ALT to determine command set
72 * Verify erase and program timeouts.
75 #ifndef CFG_FLASH_BANKS_LIST
76 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
79 #define FLASH_CMD_CFI 0x98
80 #define FLASH_CMD_READ_ID 0x90
81 #define FLASH_CMD_RESET 0xff
82 #define FLASH_CMD_BLOCK_ERASE 0x20
83 #define FLASH_CMD_ERASE_CONFIRM 0xD0
84 #define FLASH_CMD_WRITE 0x40
85 #define FLASH_CMD_PROTECT 0x60
86 #define FLASH_CMD_PROTECT_SET 0x01
87 #define FLASH_CMD_PROTECT_CLEAR 0xD0
88 #define FLASH_CMD_CLEAR_STATUS 0x50
89 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
90 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
92 #define FLASH_STATUS_DONE 0x80
93 #define FLASH_STATUS_ESS 0x40
94 #define FLASH_STATUS_ECLBS 0x20
95 #define FLASH_STATUS_PSLBS 0x10
96 #define FLASH_STATUS_VPENS 0x08
97 #define FLASH_STATUS_PSS 0x04
98 #define FLASH_STATUS_DPS 0x02
99 #define FLASH_STATUS_R 0x01
100 #define FLASH_STATUS_PROTECT 0x01
102 #define AMD_CMD_RESET 0xF0
103 #define AMD_CMD_WRITE 0xA0
104 #define AMD_CMD_ERASE_START 0x80
105 #define AMD_CMD_ERASE_SECTOR 0x30
106 #define AMD_CMD_UNLOCK_START 0xAA
107 #define AMD_CMD_UNLOCK_ACK 0x55
109 #define AMD_STATUS_TOGGLE 0x40
110 #define AMD_STATUS_ERROR 0x20
111 #define AMD_ADDR_ERASE_START 0x555
112 #define AMD_ADDR_START 0x555
113 #define AMD_ADDR_ACK 0x2AA
115 #define FLASH_OFFSET_CFI 0x55
116 #define FLASH_OFFSET_CFI_RESP 0x10
117 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
118 #define FLASH_OFFSET_WTOUT 0x1F
119 #define FLASH_OFFSET_WBTOUT 0x20
120 #define FLASH_OFFSET_ETOUT 0x21
121 #define FLASH_OFFSET_CETOUT 0x22
122 #define FLASH_OFFSET_WMAX_TOUT 0x23
123 #define FLASH_OFFSET_WBMAX_TOUT 0x24
124 #define FLASH_OFFSET_EMAX_TOUT 0x25
125 #define FLASH_OFFSET_CEMAX_TOUT 0x26
126 #define FLASH_OFFSET_SIZE 0x27
127 #define FLASH_OFFSET_INTERFACE 0x28
128 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
129 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
130 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
131 #define FLASH_OFFSET_PROTECT 0x02
132 #define FLASH_OFFSET_USER_PROTECTION 0x85
133 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
136 #define FLASH_MAN_CFI 0x01000000
138 #define CFI_CMDSET_NONE 0
139 #define CFI_CMDSET_INTEL_EXTENDED 1
140 #define CFI_CMDSET_AMD_STANDARD 2
141 #define CFI_CMDSET_INTEL_STANDARD 3
142 #define CFI_CMDSET_AMD_EXTENDED 4
143 #define CFI_CMDSET_MITSU_STANDARD 256
144 #define CFI_CMDSET_MITSU_EXTENDED 257
145 #define CFI_CMDSET_SST 258
148 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
149 # undef FLASH_CMD_RESET
150 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
158 unsigned long long ll;
162 volatile unsigned char *cp;
163 volatile unsigned short *wp;
164 volatile unsigned long *lp;
165 volatile unsigned long long *llp;
168 #define NUM_ERASE_REGIONS 4
170 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
172 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
174 /*-----------------------------------------------------------------------
178 typedef unsigned long flash_sect_t;
180 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
181 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
182 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
183 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
184 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
185 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
186 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
187 static int flash_detect_cfi (flash_info_t * info);
188 static ulong flash_get_size (ulong base, int banknum);
189 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
190 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
191 ulong tout, char *prompt);
192 #ifdef CFG_FLASH_USE_BUFFER_WRITE
193 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
196 /*-----------------------------------------------------------------------
197 * create an address based on the offset and the port width
199 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
201 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
205 /*-----------------------------------------------------------------------
208 void print_longlong (char *str, unsigned long long data)
213 cp = (unsigned char *) &data;
214 for (i = 0; i < 8; i++)
215 sprintf (&str[i * 2], "%2.2x", *cp++);
217 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
222 for (x = 0; x < 0x40; x += 16 / info->portwidth) {
224 flash_make_addr (info, sect,
225 x + FLASH_OFFSET_CFI_RESP);
226 debug ("%p : ", cptr.cp);
227 for (y = 0; y < 16; y++) {
228 debug ("%2.2x ", cptr.cp[y]);
231 for (y = 0; y < 16; y++) {
232 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
233 debug ("%c", cptr.cp[y]);
244 /*-----------------------------------------------------------------------
245 * read a character at a port width address
247 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
251 cp = flash_make_addr (info, 0, offset);
252 #if defined(__LITTLE_ENDIAN)
255 return (cp[info->portwidth - 1]);
259 /*-----------------------------------------------------------------------
260 * read a short word by swapping for ppc format.
262 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
270 addr = flash_make_addr (info, sect, offset);
273 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
275 for (x = 0; x < 2 * info->portwidth; x++) {
276 debug ("addr[%x] = 0x%x\n", x, addr[x]);
279 #if defined(__LITTLE_ENDIAN)
280 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
282 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
283 addr[info->portwidth - 1]);
286 debug ("retval = 0x%x\n", retval);
290 /*-----------------------------------------------------------------------
291 * read a long word by picking the least significant byte of each maiximum
292 * port size word. Swap for ppc format.
294 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
302 addr = flash_make_addr (info, sect, offset);
305 debug ("long addr is at %p info->portwidth = %d\n", addr,
307 for (x = 0; x < 4 * info->portwidth; x++) {
308 debug ("addr[%x] = 0x%x\n", x, addr[x]);
311 #if defined(__LITTLE_ENDIAN)
312 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
313 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
315 retval = (addr[(2 * info->portwidth) - 1] << 24) |
316 (addr[(info->portwidth) - 1] << 16) |
317 (addr[(4 * info->portwidth) - 1] << 8) |
318 addr[(3 * info->portwidth) - 1];
323 /*-----------------------------------------------------------------------
325 unsigned long flash_init (void)
327 unsigned long size = 0;
330 /* Init: no FLASHes known */
331 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
332 flash_info[i].flash_id = FLASH_UNKNOWN;
333 size += flash_info[i].size = flash_get_size (bank_base[i], i);
334 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
335 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
336 i, flash_info[i].size, flash_info[i].size << 20);
340 /* Monitor protection ON by default */
341 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
342 flash_protect (FLAG_PROTECT_SET,
344 CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
348 /* Environment protection ON by default */
349 #ifdef CFG_ENV_IS_IN_FLASH
350 flash_protect (FLAG_PROTECT_SET,
352 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
356 /* Redundant environment protection ON by default */
357 #ifdef CFG_ENV_ADDR_REDUND
358 flash_protect (FLAG_PROTECT_SET,
360 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
366 /*-----------------------------------------------------------------------
368 int flash_erase (flash_info_t * info, int s_first, int s_last)
374 if (info->flash_id != FLASH_MAN_CFI) {
375 puts ("Can't erase unknown flash type - aborted\n");
378 if ((s_first < 0) || (s_first > s_last)) {
379 puts ("- no sectors to erase\n");
384 for (sect = s_first; sect <= s_last; ++sect) {
385 if (info->protect[sect]) {
390 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
396 for (sect = s_first; sect <= s_last; sect++) {
397 if (info->protect[sect] == 0) { /* not protected */
398 switch (info->vendor) {
399 case CFI_CMDSET_INTEL_STANDARD:
400 case CFI_CMDSET_INTEL_EXTENDED:
401 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
402 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
403 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
405 case CFI_CMDSET_AMD_STANDARD:
406 case CFI_CMDSET_AMD_EXTENDED:
407 flash_unlock_seq (info, sect);
408 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
409 AMD_CMD_ERASE_START);
410 flash_unlock_seq (info, sect);
411 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
414 debug ("Unkown flash vendor %d\n",
419 if (flash_full_status_check
420 (info, sect, info->erase_blk_tout, "erase")) {
430 /*-----------------------------------------------------------------------
432 void flash_print_info (flash_info_t * info)
436 if (info->flash_id != FLASH_MAN_CFI) {
437 puts ("missing or unknown FLASH type\n");
441 printf ("CFI conformant FLASH (%d x %d)",
442 (info->portwidth << 3), (info->chipwidth << 3));
443 printf (" Size: %ld MB in %d Sectors\n",
444 info->size >> 20, info->sector_count);
445 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
446 info->erase_blk_tout,
448 info->buffer_write_tout,
451 puts (" Sector Start Addresses:");
452 for (i = 0; i < info->sector_count; ++i) {
453 #ifdef CFG_FLASH_EMPTY_INFO
457 volatile unsigned long *flash;
460 * Check if whole sector is erased
462 if (i != (info->sector_count - 1))
463 size = info->start[i + 1] - info->start[i];
465 size = info->start[0] + info->size - info->start[i];
467 flash = (volatile unsigned long *) info->start[i];
468 size = size >> 2; /* divide by 4 for longword access */
469 for (k = 0; k < size; k++) {
470 if (*flash++ != 0xffffffff) {
478 /* print empty and read-only info */
479 printf (" %08lX%s%s",
482 info->protect[i] ? "RO " : " ");
487 info->start[i], info->protect[i] ? " (RO) " : " ");
494 /*-----------------------------------------------------------------------
495 * Copy memory to flash, returns:
498 * 2 - Flash not erased
500 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
508 #ifdef CFG_FLASH_USE_BUFFER_WRITE
511 /* get lower aligned address */
512 /* get lower aligned address */
513 wp = (addr & ~(info->portwidth - 1));
515 /* handle unaligned start */
516 if ((aln = addr - wp) != 0) {
519 for (i = 0; i < aln; ++i, ++cp)
520 flash_add_byte (info, &cword, (*(uchar *) cp));
522 for (; (i < info->portwidth) && (cnt > 0); i++) {
523 flash_add_byte (info, &cword, *src++);
527 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
528 flash_add_byte (info, &cword, (*(uchar *) cp));
529 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
534 /* handle the aligned part */
535 #ifdef CFG_FLASH_USE_BUFFER_WRITE
536 buffered_size = (info->portwidth / info->chipwidth);
537 buffered_size *= info->buffer_size;
538 while (cnt >= info->portwidth) {
539 i = buffered_size > cnt ? cnt : buffered_size;
540 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
542 i -= (i % info->portwidth);
548 while (cnt >= info->portwidth) {
550 for (i = 0; i < info->portwidth; i++) {
551 flash_add_byte (info, &cword, *src++);
553 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
555 wp += info->portwidth;
556 cnt -= info->portwidth;
558 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
564 * handle unaligned tail bytes
567 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
568 flash_add_byte (info, &cword, *src++);
571 for (; i < info->portwidth; ++i, ++cp) {
572 flash_add_byte (info, &cword, (*(uchar *) cp));
575 return flash_write_cfiword (info, wp, cword);
578 /*-----------------------------------------------------------------------
580 #ifdef CFG_FLASH_PROTECTION
582 int flash_real_protect (flash_info_t * info, long sector, int prot)
586 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
587 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
589 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
591 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
594 flash_full_status_check (info, sector, info->erase_blk_tout,
595 prot ? "protect" : "unprotect")) == 0) {
597 info->protect[sector] = prot;
598 /* Intel's unprotect unprotects all locking */
602 for (i = 0; i < info->sector_count; i++) {
603 if (info->protect[i])
604 flash_real_protect (info, i, 1);
611 /*-----------------------------------------------------------------------
612 * flash_read_user_serial - read the OneTimeProgramming cells
614 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
621 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
622 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
623 memcpy (dst, src + offset, len);
624 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
628 * flash_read_factory_serial - read the device Id from the protection area
630 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
635 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
636 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
637 memcpy (buffer, src + offset, len);
638 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
641 #endif /* CFG_FLASH_PROTECTION */
644 * flash_is_busy - check to see if the flash is busy
645 * This routine checks the status of the chip and returns true if the chip is busy
647 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
651 switch (info->vendor) {
652 case CFI_CMDSET_INTEL_STANDARD:
653 case CFI_CMDSET_INTEL_EXTENDED:
654 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
656 case CFI_CMDSET_AMD_STANDARD:
657 case CFI_CMDSET_AMD_EXTENDED:
658 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
663 debug ("flash_is_busy: %d\n", retval);
667 /*-----------------------------------------------------------------------
668 * wait for XSR.7 to be set. Time out with an error if it does not.
669 * This routine does not set the flash to read-array mode.
671 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
672 ulong tout, char *prompt)
676 /* Wait for command completion */
677 start = get_timer (0);
678 while (flash_is_busy (info, sector)) {
679 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
680 printf ("Flash %s timeout at address %lx data %lx\n",
681 prompt, info->start[sector],
682 flash_read_long (info, sector, 0));
683 flash_write_cmd (info, sector, 0, info->cmd_reset);
690 /*-----------------------------------------------------------------------
691 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
692 * This routine sets the flash to read-array mode.
694 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
695 ulong tout, char *prompt)
699 retcode = flash_status_check (info, sector, tout, prompt);
700 switch (info->vendor) {
701 case CFI_CMDSET_INTEL_EXTENDED:
702 case CFI_CMDSET_INTEL_STANDARD:
703 if ((retcode != ERR_OK)
704 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
706 printf ("Flash %s error at address %lx\n", prompt,
707 info->start[sector]);
708 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
709 puts ("Command Sequence Error.\n");
710 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
711 puts ("Block Erase Error.\n");
712 retcode = ERR_NOT_ERASED;
713 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
714 puts ("Locking Error\n");
716 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
717 puts ("Block locked.\n");
718 retcode = ERR_PROTECTED;
720 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
721 puts ("Vpp Low Error.\n");
723 flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
731 /*-----------------------------------------------------------------------
733 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
735 #if defined(__LITTLE_ENDIAN)
738 unsigned long long ll;
741 switch (info->portwidth) {
745 case FLASH_CFI_16BIT:
746 #if defined(__LITTLE_ENDIAN)
749 cword->w = (cword->w >> 8) | w;
751 cword->w = (cword->w << 8) | c;
754 case FLASH_CFI_32BIT:
755 #if defined(__LITTLE_ENDIAN)
758 cword->l = (cword->l >> 8) | l;
760 cword->l = (cword->l << 8) | c;
763 case FLASH_CFI_64BIT:
764 #if defined(__LITTLE_ENDIAN)
767 cword->ll = (cword->ll >> 8) | ll;
769 cword->ll = (cword->ll << 8) | c;
776 /*-----------------------------------------------------------------------
777 * make a proper sized command based on the port and chip widths
779 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
783 #if defined(__LITTLE_ENDIAN)
787 uchar *cp = (uchar *) cmdbuf;
789 for (i = 0; i < info->portwidth; i++)
790 *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
791 #if defined(__LITTLE_ENDIAN)
792 switch (info->portwidth) {
795 case FLASH_CFI_16BIT:
796 stmpw = *(ushort *) cmdbuf;
797 *(ushort *) cmdbuf = __swab16 (stmpw);
799 case FLASH_CFI_32BIT:
800 stmpi = *(uint *) cmdbuf;
801 *(uint *) cmdbuf = __swab32 (stmpi);
804 puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
811 * Write a proper sized command to the correct address
813 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
816 volatile cfiptr_t addr;
819 addr.cp = flash_make_addr (info, sect, offset);
820 flash_make_cmd (info, cmd, &cword);
821 switch (info->portwidth) {
823 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
824 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
827 case FLASH_CFI_16BIT:
828 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
830 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
833 case FLASH_CFI_32BIT:
834 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
836 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
839 case FLASH_CFI_64BIT:
844 print_longlong (str, cword.ll);
846 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
848 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
851 *addr.llp = cword.ll;
856 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
858 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
859 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
862 /*-----------------------------------------------------------------------
864 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
870 cptr.cp = flash_make_addr (info, sect, offset);
871 flash_make_cmd (info, cmd, &cword);
873 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
874 switch (info->portwidth) {
876 debug ("is= %x %x\n", cptr.cp[0], cword.c);
877 retval = (cptr.cp[0] == cword.c);
879 case FLASH_CFI_16BIT:
880 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
881 retval = (cptr.wp[0] == cword.w);
883 case FLASH_CFI_32BIT:
884 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
885 retval = (cptr.lp[0] == cword.l);
887 case FLASH_CFI_64BIT:
893 print_longlong (str1, cptr.llp[0]);
894 print_longlong (str2, cword.ll);
895 debug ("is= %s %s\n", str1, str2);
898 retval = (cptr.llp[0] == cword.ll);
907 /*-----------------------------------------------------------------------
909 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
915 cptr.cp = flash_make_addr (info, sect, offset);
916 flash_make_cmd (info, cmd, &cword);
917 switch (info->portwidth) {
919 retval = ((cptr.cp[0] & cword.c) == cword.c);
921 case FLASH_CFI_16BIT:
922 retval = ((cptr.wp[0] & cword.w) == cword.w);
924 case FLASH_CFI_32BIT:
925 retval = ((cptr.lp[0] & cword.l) == cword.l);
927 case FLASH_CFI_64BIT:
928 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
937 /*-----------------------------------------------------------------------
939 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
945 cptr.cp = flash_make_addr (info, sect, offset);
946 flash_make_cmd (info, cmd, &cword);
947 switch (info->portwidth) {
949 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
951 case FLASH_CFI_16BIT:
952 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
954 case FLASH_CFI_32BIT:
955 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
957 case FLASH_CFI_64BIT:
958 retval = ((cptr.llp[0] & cword.ll) !=
959 (cptr.llp[0] & cword.ll));
968 /*-----------------------------------------------------------------------
969 * detect if flash is compatible with the Common Flash Interface (CFI)
970 * http://www.jedec.org/download/search/jesd68.pdf
973 static int flash_detect_cfi (flash_info_t * info)
975 debug ("flash detect cfi\n");
977 for (info->portwidth = FLASH_CFI_8BIT;
978 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
979 for (info->chipwidth = FLASH_CFI_BY8;
980 info->chipwidth <= info->portwidth;
981 info->chipwidth <<= 1) {
982 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
983 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
984 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
985 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
986 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
987 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
988 debug ("device interface is %d\n",
990 debug ("found port %d chip %d ",
991 info->portwidth, info->chipwidth);
992 debug ("port %d bits chip %d bits\n",
993 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
994 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
999 debug ("not found\n");
1004 * The following code cannot be run from FLASH!
1007 static ulong flash_get_size (ulong base, int banknum)
1009 flash_info_t *info = &flash_info[banknum];
1011 flash_sect_t sect_cnt;
1012 unsigned long sector;
1015 uchar num_erase_regions;
1016 int erase_region_size;
1017 int erase_region_count;
1019 info->start[0] = base;
1021 if (flash_detect_cfi (info)) {
1022 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1024 flash_printqry (info, 0);
1026 switch (info->vendor) {
1027 case CFI_CMDSET_INTEL_STANDARD:
1028 case CFI_CMDSET_INTEL_EXTENDED:
1030 info->cmd_reset = FLASH_CMD_RESET;
1032 case CFI_CMDSET_AMD_STANDARD:
1033 case CFI_CMDSET_AMD_EXTENDED:
1034 info->cmd_reset = AMD_CMD_RESET;
1038 debug ("manufacturer is %d\n", info->vendor);
1039 size_ratio = info->portwidth / info->chipwidth;
1040 /* if the chip is x8/x16 reduce the ratio by half */
1041 if ((info->interface == FLASH_CFI_X8X16)
1042 && (info->chipwidth == FLASH_CFI_BY8)) {
1045 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1046 debug ("size_ratio %d port %d bits chip %d bits\n",
1047 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1048 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1049 debug ("found %d erase regions\n", num_erase_regions);
1052 for (i = 0; i < num_erase_regions; i++) {
1053 if (i > NUM_ERASE_REGIONS) {
1054 printf ("%d erase regions found, only %d used\n",
1055 num_erase_regions, NUM_ERASE_REGIONS);
1058 tmp = flash_read_long (info, 0,
1059 FLASH_OFFSET_ERASE_REGIONS +
1062 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1064 erase_region_count = (tmp & 0xffff) + 1;
1065 debug ("erase_region_count = %d erase_region_size = %d\n",
1066 erase_region_count, erase_region_size);
1067 for (j = 0; j < erase_region_count; j++) {
1068 info->start[sect_cnt] = sector;
1069 sector += (erase_region_size * size_ratio);
1072 * Only read protection status from supported devices (intel...)
1074 switch (info->vendor) {
1075 case CFI_CMDSET_INTEL_EXTENDED:
1076 case CFI_CMDSET_INTEL_STANDARD:
1077 info->protect[sect_cnt] =
1078 flash_isset (info, sect_cnt,
1079 FLASH_OFFSET_PROTECT,
1080 FLASH_STATUS_PROTECT);
1083 info->protect[sect_cnt] = 0; /* default: not protected */
1090 info->sector_count = sect_cnt;
1091 /* multiply the size by the number of chips */
1092 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1093 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1094 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1095 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1096 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1097 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1098 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1099 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1100 info->flash_id = FLASH_MAN_CFI;
1101 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1102 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1106 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1107 return (info->size);
1111 /*-----------------------------------------------------------------------
1113 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1121 ctladdr.cp = flash_make_addr (info, 0, 0);
1122 cptr.cp = (uchar *) dest;
1125 /* Check if Flash is (sufficiently) erased */
1126 switch (info->portwidth) {
1127 case FLASH_CFI_8BIT:
1128 flag = ((cptr.cp[0] & cword.c) == cword.c);
1130 case FLASH_CFI_16BIT:
1131 flag = ((cptr.wp[0] & cword.w) == cword.w);
1133 case FLASH_CFI_32BIT:
1134 flag = ((cptr.lp[0] & cword.l) == cword.l);
1136 case FLASH_CFI_64BIT:
1137 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1145 /* Disable interrupts which might cause a timeout here */
1146 flag = disable_interrupts ();
1148 switch (info->vendor) {
1149 case CFI_CMDSET_INTEL_EXTENDED:
1150 case CFI_CMDSET_INTEL_STANDARD:
1151 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1152 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1154 case CFI_CMDSET_AMD_EXTENDED:
1155 case CFI_CMDSET_AMD_STANDARD:
1156 flash_unlock_seq (info, 0);
1157 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1161 switch (info->portwidth) {
1162 case FLASH_CFI_8BIT:
1163 cptr.cp[0] = cword.c;
1165 case FLASH_CFI_16BIT:
1166 cptr.wp[0] = cword.w;
1168 case FLASH_CFI_32BIT:
1169 cptr.lp[0] = cword.l;
1171 case FLASH_CFI_64BIT:
1172 cptr.llp[0] = cword.ll;
1176 /* re-enable interrupts if necessary */
1178 enable_interrupts ();
1180 return flash_full_status_check (info, 0, info->write_tout, "write");
1183 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1185 /* loop through the sectors from the highest address
1186 * when the passed address is greater or equal to the sector address
1189 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1191 flash_sect_t sector;
1193 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1194 if (addr >= info->start[sector])
1200 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1203 flash_sect_t sector;
1206 volatile cfiptr_t src;
1207 volatile cfiptr_t dst;
1208 /* buffered writes in the AMD chip set is not supported yet */
1209 if((info->vendor == CFI_CMDSET_AMD_STANDARD) ||
1210 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1214 dst.cp = (uchar *) dest;
1215 sector = find_sector (info, dest);
1216 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1217 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1219 flash_status_check (info, sector, info->buffer_write_tout,
1220 "write to buffer")) == ERR_OK) {
1221 /* reduce the number of loops by the width of the port */
1222 switch (info->portwidth) {
1223 case FLASH_CFI_8BIT:
1226 case FLASH_CFI_16BIT:
1229 case FLASH_CFI_32BIT:
1232 case FLASH_CFI_64BIT:
1239 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1241 switch (info->portwidth) {
1242 case FLASH_CFI_8BIT:
1243 *dst.cp++ = *src.cp++;
1245 case FLASH_CFI_16BIT:
1246 *dst.wp++ = *src.wp++;
1248 case FLASH_CFI_32BIT:
1249 *dst.lp++ = *src.lp++;
1251 case FLASH_CFI_64BIT:
1252 *dst.llp++ = *src.llp++;
1259 flash_write_cmd (info, sector, 0,
1260 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1262 flash_full_status_check (info, sector,
1263 info->buffer_write_tout,
1266 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1269 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1270 #endif /* CFG_FLASH_CFI */