drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/seq_file.h>
  55 #include <linux/slab.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/vmalloc.h>
  58 #include <linux/init.h>
  59 #include <linux/delay.h>
  60 #include <linux/ioctl.h>
  61 #include <linux/synclink.h>
  62
  63 #include <asm/io.h>
  64 #include <asm/irq.h>
  65 #include <asm/dma.h>
  66 #include <linux/bitops.h>
  67 #include <asm/types.h>
  68 #include <linux/termios.h>
  69 #include <linux/workqueue.h>
  70 #include <linux/hdlc.h>
  71
  72 #include <pcmcia/cistpl.h>
  73 #include <pcmcia/cisreg.h>
  74 #include <pcmcia/ds.h>
  75
  76 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  77 #define SYNCLINK_GENERIC_HDLC 1
  78 #else
  79 #define SYNCLINK_GENERIC_HDLC 0
  80 #endif
  81
  82 #define GET_USER(error,value,addr) error = get_user(value,addr)
  83 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  84 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  85 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  86
  87 #include <asm/uaccess.h>
  88
  89 static MGSL_PARAMS default_params = {
  90         MGSL_MODE_HDLC,                 /* unsigned long mode */
  91         0,                              /* unsigned char loopback; */
  92         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  93         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  94         0,                              /* unsigned long clock_speed; */
  95         0xff,                           /* unsigned char addr_filter; */
  96         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
  97         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
  98         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
  99         9600,                           /* unsigned long data_rate; */
 100         8,                              /* unsigned char data_bits; */
 101         1,                              /* unsigned char stop_bits; */
 102         ASYNC_PARITY_NONE               /* unsigned char parity; */
 103 };
 104
 105 typedef struct
 106 {
 107         int count;
 108         unsigned char status;
 109         char data[1];
 110 } RXBUF;
 111
 112 /* The queue of BH actions to be performed */
 113
 114 #define BH_RECEIVE  1
 115 #define BH_TRANSMIT 2
 116 #define BH_STATUS   4
 117
 118 #define IO_PIN_SHUTDOWN_LIMIT 100
 119
 120 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 121
 122 struct _input_signal_events {
 123         int     ri_up;
 124         int     ri_down;
 125         int     dsr_up;
 126         int     dsr_down;
 127         int     dcd_up;
 128         int     dcd_down;
 129         int     cts_up;
 130         int     cts_down;
 131 };
 132
 133
 134 /*
 135  * Device instance data structure
 136  */
 137
 138 typedef struct _mgslpc_info {
 139         struct tty_port         port;
 140         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 141         int                     magic;
 142         int                     line;
 143
 144         struct mgsl_icount      icount;
 145
 146         int                     timeout;
 147         int                     x_char;         /* xon/xoff character */
 148         unsigned char           read_status_mask;
 149         unsigned char           ignore_status_mask;
 150
 151         unsigned char *tx_buf;
 152         int            tx_put;
 153         int            tx_get;
 154         int            tx_count;
 155
 156         /* circular list of fixed length rx buffers */
 157
 158         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 159         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 160         int            rx_put;         /* index of next empty rx buffer */
 161         int            rx_get;         /* index of next full rx buffer */
 162         int            rx_buf_size;    /* size in bytes of single rx buffer */
 163         int            rx_buf_count;   /* total number of rx buffers */
 164         int            rx_frame_count; /* number of full rx buffers */
 165
 166         wait_queue_head_t       status_event_wait_q;
 167         wait_queue_head_t       event_wait_q;
 168         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 169         struct _mgslpc_info     *next_device;   /* device list link */
 170
 171         unsigned short imra_value;
 172         unsigned short imrb_value;
 173         unsigned char  pim_value;
 174
 175         spinlock_t lock;
 176         struct work_struct task;                /* task structure for scheduling bh */
 177
 178         u32 max_frame_size;
 179
 180         u32 pending_bh;
 181
 182         bool bh_running;
 183         bool bh_requested;
 184
 185         int dcd_chkcount; /* check counts to prevent */
 186         int cts_chkcount; /* too many IRQs if a signal */
 187         int dsr_chkcount; /* is floating */
 188         int ri_chkcount;
 189
 190         bool rx_enabled;
 191         bool rx_overflow;
 192
 193         bool tx_enabled;
 194         bool tx_active;
 195         bool tx_aborting;
 196         u32 idle_mode;
 197
 198         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 199
 200         char device_name[25];           /* device instance name */
 201
 202         unsigned int io_base;   /* base I/O address of adapter */
 203         unsigned int irq_level;
 204
 205         MGSL_PARAMS params;             /* communications parameters */
 206
 207         unsigned char serial_signals;   /* current serial signal states */
 208
 209         bool irq_occurred;              /* for diagnostics use */
 210         char testing_irq;
 211         unsigned int init_error;        /* startup error (DIAGS)        */
 212
 213         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 214         bool drop_rts_on_tx_done;
 215
 216         struct  _input_signal_events    input_signal_events;
 217
 218         /* PCMCIA support */
 219         struct pcmcia_device    *p_dev;
 220         int                   stop;
 221
 222         /* SPPP/Cisco HDLC device parts */
 223         int netcount;
 224         spinlock_t netlock;
 225
 226 #if SYNCLINK_GENERIC_HDLC
 227         struct net_device *netdev;
 228 #endif
 229
 230 } MGSLPC_INFO;
 231
 232 #define MGSLPC_MAGIC 0x5402
 233
 234 /*
 235  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 236  */
 237 #define TXBUFSIZE 4096
 238
 239
 240 #define CHA     0x00   /* channel A offset */
 241 #define CHB     0x40   /* channel B offset */
 242
 243 /*
 244  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 245  */
 246 #undef PVR
 247
 248 #define RXFIFO  0
 249 #define TXFIFO  0
 250 #define STAR    0x20
 251 #define CMDR    0x20
 252 #define RSTA    0x21
 253 #define PRE     0x21
 254 #define MODE    0x22
 255 #define TIMR    0x23
 256 #define XAD1    0x24
 257 #define XAD2    0x25
 258 #define RAH1    0x26
 259 #define RAH2    0x27
 260 #define DAFO    0x27
 261 #define RAL1    0x28
 262 #define RFC     0x28
 263 #define RHCR    0x29
 264 #define RAL2    0x29
 265 #define RBCL    0x2a
 266 #define XBCL    0x2a
 267 #define RBCH    0x2b
 268 #define XBCH    0x2b
 269 #define CCR0    0x2c
 270 #define CCR1    0x2d
 271 #define CCR2    0x2e
 272 #define CCR3    0x2f
 273 #define VSTR    0x34
 274 #define BGR     0x34
 275 #define RLCR    0x35
 276 #define AML     0x36
 277 #define AMH     0x37
 278 #define GIS     0x38
 279 #define IVA     0x38
 280 #define IPC     0x39
 281 #define ISR     0x3a
 282 #define IMR     0x3a
 283 #define PVR     0x3c
 284 #define PIS     0x3d
 285 #define PIM     0x3d
 286 #define PCR     0x3e
 287 #define CCR4    0x3f
 288
 289 // IMR/ISR
 290
 291 #define IRQ_BREAK_ON    BIT15   // rx break detected
 292 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 293 #define IRQ_ALLSENT     BIT13   // all sent
 294 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 295 #define IRQ_TIMER       BIT11   // timer interrupt
 296 #define IRQ_CTS         BIT10   // CTS status change
 297 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 298 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 299 #define IRQ_RXEOM       BIT7    // receive message end
 300 #define IRQ_EXITHUNT    BIT6    // receive frame start
 301 #define IRQ_RXTIME      BIT6    // rx char timeout
 302 #define IRQ_DCD         BIT2    // carrier detect status change
 303 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 304 #define IRQ_RXFIFO      BIT0    // receive pool full
 305
 306 // STAR
 307
 308 #define XFW   BIT6              // transmit FIFO write enable
 309 #define CEC   BIT2              // command executing
 310 #define CTS   BIT1              // CTS state
 311
 312 #define PVR_DTR      BIT0
 313 #define PVR_DSR      BIT1
 314 #define PVR_RI       BIT2
 315 #define PVR_AUTOCTS  BIT3
 316 #define PVR_RS232    0x20   /* 0010b */
 317 #define PVR_V35      0xe0   /* 1110b */
 318 #define PVR_RS422    0x40   /* 0100b */
 319
 320 /* Register access functions */
 321
 322 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 323 #define read_reg(info, reg) inb((info)->io_base + (reg))
 324
 325 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 326 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 327
 328 #define set_reg_bits(info, reg, mask) \
 329     write_reg(info, (reg), \
 330                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 331 #define clear_reg_bits(info, reg, mask) \
 332     write_reg(info, (reg), \
 333                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 334 /*
 335  * interrupt enable/disable routines
 336  */
 337 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 338 {
 339         if (channel == CHA) {
 340                 info->imra_value |= mask;
 341                 write_reg16(info, CHA + IMR, info->imra_value);
 342         } else {
 343                 info->imrb_value |= mask;
 344                 write_reg16(info, CHB + IMR, info->imrb_value);
 345         }
 346 }
 347 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 348 {
 349         if (channel == CHA) {
 350                 info->imra_value &= ~mask;
 351                 write_reg16(info, CHA + IMR, info->imra_value);
 352         } else {
 353                 info->imrb_value &= ~mask;
 354                 write_reg16(info, CHB + IMR, info->imrb_value);
 355         }
 356 }
 357
 358 #define port_irq_disable(info, mask) \
 359   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 360
 361 #define port_irq_enable(info, mask) \
 362   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 363
 364 static void rx_start(MGSLPC_INFO *info);
 365 static void rx_stop(MGSLPC_INFO *info);
 366
 367 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 368 static void tx_stop(MGSLPC_INFO *info);
 369 static void tx_set_idle(MGSLPC_INFO *info);
 370
 371 static void get_signals(MGSLPC_INFO *info);
 372 static void set_signals(MGSLPC_INFO *info);
 373
 374 static void reset_device(MGSLPC_INFO *info);
 375
 376 static void hdlc_mode(MGSLPC_INFO *info);
 377 static void async_mode(MGSLPC_INFO *info);
 378
 379 static void tx_timeout(unsigned long context);
 380
 381 static int carrier_raised(struct tty_port *port);
 382 static void dtr_rts(struct tty_port *port, int onoff);
 383
 384 #if SYNCLINK_GENERIC_HDLC
 385 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 386 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 387 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 388 static int  hdlcdev_init(MGSLPC_INFO *info);
 389 static void hdlcdev_exit(MGSLPC_INFO *info);
 390 #endif
 391
 392 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 393
 394 static bool register_test(MGSLPC_INFO *info);
 395 static bool irq_test(MGSLPC_INFO *info);
 396 static int adapter_test(MGSLPC_INFO *info);
 397
 398 static int claim_resources(MGSLPC_INFO *info);
 399 static void release_resources(MGSLPC_INFO *info);
 400 static void mgslpc_add_device(MGSLPC_INFO *info);
 401 static void mgslpc_remove_device(MGSLPC_INFO *info);
 402
 403 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 404 static void rx_reset_buffers(MGSLPC_INFO *info);
 405 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 406 static void rx_free_buffers(MGSLPC_INFO *info);
 407
 408 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 409
 410 /*
 411  * Bottom half interrupt handlers
 412  */
 413 static void bh_handler(struct work_struct *work);
 414 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 415 static void bh_status(MGSLPC_INFO *info);
 416
 417 /*
 418  * ioctl handlers
 419  */
 420 static int tiocmget(struct tty_struct *tty);
 421 static int tiocmset(struct tty_struct *tty,
 422                                         unsigned int set, unsigned int clear);
 423 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 424 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 425 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 426 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 427 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 428 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 429 static int tx_abort(MGSLPC_INFO *info);
 430 static int set_rxenable(MGSLPC_INFO *info, int enable);
 431 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 432
 433 static MGSLPC_INFO *mgslpc_device_list = NULL;
 434 static int mgslpc_device_count = 0;
 435
 436 /*
 437  * Set this param to non-zero to load eax with the
 438  * .text section address and breakpoint on module load.
 439  * This is useful for use with gdb and add-symbol-file command.
 440  */
 441 static bool break_on_load=0;
 442
 443 /*
 444  * Driver major number, defaults to zero to get auto
 445  * assigned major number. May be forced as module parameter.
 446  */
 447 static int ttymajor=0;
 448
 449 static int debug_level = 0;
 450 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 451
 452 module_param(break_on_load, bool, 0);
 453 module_param(ttymajor, int, 0);
 454 module_param(debug_level, int, 0);
 455 module_param_array(maxframe, int, NULL, 0);
 456
 457 MODULE_LICENSE("GPL");
 458
 459 static char *driver_name = "SyncLink PC Card driver";
 460 static char *driver_version = "$Revision: 4.34 $";
 461
 462 static struct tty_driver *serial_driver;
 463
 464 /* number of characters left in xmit buffer before we ask for more */
 465 #define WAKEUP_CHARS 256
 466
 467 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 468 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 469
 470 /* PCMCIA prototypes */
 471
 472 static int mgslpc_config(struct pcmcia_device *link);
 473 static void mgslpc_release(u_long arg);
 474 static void mgslpc_detach(struct pcmcia_device *p_dev);
 475
 476 /*
 477  * 1st function defined in .text section. Calling this function in
 478  * init_module() followed by a breakpoint allows a remote debugger
 479  * (gdb) to get the .text address for the add-symbol-file command.
 480  * This allows remote debugging of dynamically loadable modules.
 481  */
 482 static void* mgslpc_get_text_ptr(void)
 483 {
 484         return mgslpc_get_text_ptr;
 485 }
 486
 487 /**
 488  * line discipline callback wrappers
 489  *
 490  * The wrappers maintain line discipline references
 491  * while calling into the line discipline.
 492  *
 493  * ldisc_receive_buf  - pass receive data to line discipline
 494  */
 495
 496 static void ldisc_receive_buf(struct tty_struct *tty,
 497                               const __u8 *data, char *flags, int count)
 498 {
 499         struct tty_ldisc *ld;
 500         if (!tty)
 501                 return;
 502         ld = tty_ldisc_ref(tty);
 503         if (ld) {
 504                 if (ld->ops->receive_buf)
 505                         ld->ops->receive_buf(tty, data, flags, count);
 506                 tty_ldisc_deref(ld);
 507         }
 508 }
 509
 510 static const struct tty_port_operations mgslpc_port_ops = {
 511         .carrier_raised = carrier_raised,
 512         .dtr_rts = dtr_rts
 513 };
 514
 515 static int mgslpc_probe(struct pcmcia_device *link)
 516 {
 517     MGSLPC_INFO *info;
 518     int ret;
 519
 520     if (debug_level >= DEBUG_LEVEL_INFO)
 521             printk("mgslpc_attach\n");
 522
 523     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 524     if (!info) {
 525             printk("Error can't allocate device instance data\n");
 526             return -ENOMEM;
 527     }
 528
 529     info->magic = MGSLPC_MAGIC;
 530     tty_port_init(&info->port);
 531     info->port.ops = &mgslpc_port_ops;
 532     INIT_WORK(&info->task, bh_handler);
 533     info->max_frame_size = 4096;
 534     info->port.close_delay = 5*HZ/10;
 535     info->port.closing_wait = 30*HZ;
 536     init_waitqueue_head(&info->status_event_wait_q);
 537     init_waitqueue_head(&info->event_wait_q);
 538     spin_lock_init(&info->lock);
 539     spin_lock_init(&info->netlock);
 540     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 541     info->idle_mode = HDLC_TXIDLE_FLAGS;
 542     info->imra_value = 0xffff;
 543     info->imrb_value = 0xffff;
 544     info->pim_value = 0xff;
 545
 546     info->p_dev = link;
 547     link->priv = info;
 548
 549     /* Initialize the struct pcmcia_device structure */
 550
 551     ret = mgslpc_config(link);
 552     if (ret) {
 553             tty_port_destroy(&info->port);
 554             return ret;
 555     }
 556
 557     mgslpc_add_device(info);
 558
 559     return 0;
 560 }
 561
 562 /* Card has been inserted.
 563  */
 564
 565 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
 566 {
 567         return pcmcia_request_io(p_dev);
 568 }
 569
 570 static int mgslpc_config(struct pcmcia_device *link)
 571 {
 572     MGSLPC_INFO *info = link->priv;
 573     int ret;
 574
 575     if (debug_level >= DEBUG_LEVEL_INFO)
 576             printk("mgslpc_config(0x%p)\n", link);
 577
 578     link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
 579
 580     ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
 581     if (ret != 0)
 582             goto failed;
 583
 584     link->config_index = 8;
 585     link->config_regs = PRESENT_OPTION;
 586
 587     ret = pcmcia_request_irq(link, mgslpc_isr);
 588     if (ret)
 589             goto failed;
 590     ret = pcmcia_enable_device(link);
 591     if (ret)
 592             goto failed;
 593
 594     info->io_base = link->resource[0]->start;
 595     info->irq_level = link->irq;
 596     return 0;
 597
 598 failed:
 599     mgslpc_release((u_long)link);
 600     return -ENODEV;
 601 }
 602
 603 /* Card has been removed.
 604  * Unregister device and release PCMCIA configuration.
 605  * If device is open, postpone until it is closed.
 606  */
 607 static void mgslpc_release(u_long arg)
 608 {
 609         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 610
 611         if (debug_level >= DEBUG_LEVEL_INFO)
 612                 printk("mgslpc_release(0x%p)\n", link);
 613
 614         pcmcia_disable_device(link);
 615 }
 616
 617 static void mgslpc_detach(struct pcmcia_device *link)
 618 {
 619         if (debug_level >= DEBUG_LEVEL_INFO)
 620                 printk("mgslpc_detach(0x%p)\n", link);
 621
 622         ((MGSLPC_INFO *)link->priv)->stop = 1;
 623         mgslpc_release((u_long)link);
 624
 625         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 626 }
 627
 628 static int mgslpc_suspend(struct pcmcia_device *link)
 629 {
 630         MGSLPC_INFO *info = link->priv;
 631
 632         info->stop = 1;
 633
 634         return 0;
 635 }
 636
 637 static int mgslpc_resume(struct pcmcia_device *link)
 638 {
 639         MGSLPC_INFO *info = link->priv;
 640
 641         info->stop = 0;
 642
 643         return 0;
 644 }
 645
 646
 647 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 648                                         char *name, const char *routine)
 649 {
 650 #ifdef MGSLPC_PARANOIA_CHECK
 651         static const char *badmagic =
 652                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 653         static const char *badinfo =
 654                 "Warning: null mgslpc_info for (%s) in %s\n";
 655
 656         if (!info) {
 657                 printk(badinfo, name, routine);
 658                 return true;
 659         }
 660         if (info->magic != MGSLPC_MAGIC) {
 661                 printk(badmagic, name, routine);
 662                 return true;
 663         }
 664 #else
 665         if (!info)
 666                 return true;
 667 #endif
 668         return false;
 669 }
 670
 671
 672 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 673 #define CMD_RXRESET     BIT6    // receiver reset
 674 #define CMD_RXFIFO_READ BIT5
 675 #define CMD_START_TIMER BIT4
 676 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 677 #define CMD_TXEOM       BIT1    // transmit end message
 678 #define CMD_TXRESET     BIT0    // transmit reset
 679
 680 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 681 {
 682         int i = 0;
 683         /* wait for command completion */
 684         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 685                 udelay(1);
 686                 if (i++ == 1000)
 687                         return false;
 688         }
 689         return true;
 690 }
 691
 692 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 693 {
 694         wait_command_complete(info, channel);
 695         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 696 }
 697
 698 static void tx_pause(struct tty_struct *tty)
 699 {
 700         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 701         unsigned long flags;
 702
 703         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 704                 return;
 705         if (debug_level >= DEBUG_LEVEL_INFO)
 706                 printk("tx_pause(%s)\n",info->device_name);
 707
 708         spin_lock_irqsave(&info->lock,flags);
 709         if (info->tx_enabled)
 710                 tx_stop(info);
 711         spin_unlock_irqrestore(&info->lock,flags);
 712 }
 713
 714 static void tx_release(struct tty_struct *tty)
 715 {
 716         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 717         unsigned long flags;
 718
 719         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 720                 return;
 721         if (debug_level >= DEBUG_LEVEL_INFO)
 722                 printk("tx_release(%s)\n",info->device_name);
 723
 724         spin_lock_irqsave(&info->lock,flags);
 725         if (!info->tx_enabled)
 726                 tx_start(info, tty);
 727         spin_unlock_irqrestore(&info->lock,flags);
 728 }
 729
 730 /* Return next bottom half action to perform.
 731  * or 0 if nothing to do.
 732  */
 733 static int bh_action(MGSLPC_INFO *info)
 734 {
 735         unsigned long flags;
 736         int rc = 0;
 737
 738         spin_lock_irqsave(&info->lock,flags);
 739
 740         if (info->pending_bh & BH_RECEIVE) {
 741                 info->pending_bh &= ~BH_RECEIVE;
 742                 rc = BH_RECEIVE;
 743         } else if (info->pending_bh & BH_TRANSMIT) {
 744                 info->pending_bh &= ~BH_TRANSMIT;
 745                 rc = BH_TRANSMIT;
 746         } else if (info->pending_bh & BH_STATUS) {
 747                 info->pending_bh &= ~BH_STATUS;
 748                 rc = BH_STATUS;
 749         }
 750
 751         if (!rc) {
 752                 /* Mark BH routine as complete */
 753                 info->bh_running = false;
 754                 info->bh_requested = false;
 755         }
 756
 757         spin_unlock_irqrestore(&info->lock,flags);
 758
 759         return rc;
 760 }
 761
 762 static void bh_handler(struct work_struct *work)
 763 {
 764         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 765         struct tty_struct *tty;
 766         int action;
 767
 768         if (!info)
 769                 return;
 770
 771         if (debug_level >= DEBUG_LEVEL_BH)
 772                 printk( "%s(%d):bh_handler(%s) entry\n",
 773                         __FILE__,__LINE__,info->device_name);
 774
 775         info->bh_running = true;
 776         tty = tty_port_tty_get(&info->port);
 777
 778         while((action = bh_action(info)) != 0) {
 779
 780                 /* Process work item */
 781                 if ( debug_level >= DEBUG_LEVEL_BH )
 782                         printk( "%s(%d):bh_handler() work item action=%d\n",
 783                                 __FILE__,__LINE__,action);
 784
 785                 switch (action) {
 786
 787                 case BH_RECEIVE:
 788                         while(rx_get_frame(info, tty));
 789                         break;
 790                 case BH_TRANSMIT:
 791                         bh_transmit(info, tty);
 792                         break;
 793                 case BH_STATUS:
 794                         bh_status(info);
 795                         break;
 796                 default:
 797                         /* unknown work item ID */
 798                         printk("Unknown work item ID=%08X!\n", action);
 799                         break;
 800                 }
 801         }
 802
 803         tty_kref_put(tty);
 804         if (debug_level >= DEBUG_LEVEL_BH)
 805                 printk( "%s(%d):bh_handler(%s) exit\n",
 806                         __FILE__,__LINE__,info->device_name);
 807 }
 808
 809 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 810 {
 811         if (debug_level >= DEBUG_LEVEL_BH)
 812                 printk("bh_transmit() entry on %s\n", info->device_name);
 813
 814         if (tty)
 815                 tty_wakeup(tty);
 816 }
 817
 818 static void bh_status(MGSLPC_INFO *info)
 819 {
 820         info->ri_chkcount = 0;
 821         info->dsr_chkcount = 0;
 822         info->dcd_chkcount = 0;
 823         info->cts_chkcount = 0;
 824 }
 825
 826 /* eom: non-zero = end of frame */
 827 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 828 {
 829         unsigned char data[2];
 830         unsigned char fifo_count, read_count, i;
 831         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 832
 833         if (debug_level >= DEBUG_LEVEL_ISR)
 834                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 835
 836         if (!info->rx_enabled)
 837                 return;
 838
 839         if (info->rx_frame_count >= info->rx_buf_count) {
 840                 /* no more free buffers */
 841                 issue_command(info, CHA, CMD_RXRESET);
 842                 info->pending_bh |= BH_RECEIVE;
 843                 info->rx_overflow = true;
 844                 info->icount.buf_overrun++;
 845                 return;
 846         }
 847
 848         if (eom) {
 849                 /* end of frame, get FIFO count from RBCL register */
 850                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 851                         fifo_count = 32;
 852         } else
 853                 fifo_count = 32;
 854
 855         do {
 856                 if (fifo_count == 1) {
 857                         read_count = 1;
 858                         data[0] = read_reg(info, CHA + RXFIFO);
 859                 } else {
 860                         read_count = 2;
 861                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 862                 }
 863                 fifo_count -= read_count;
 864                 if (!fifo_count && eom)
 865                         buf->status = data[--read_count];
 866
 867                 for (i = 0; i < read_count; i++) {
 868                         if (buf->count >= info->max_frame_size) {
 869                                 /* frame too large, reset receiver and reset current buffer */
 870                                 issue_command(info, CHA, CMD_RXRESET);
 871                                 buf->count = 0;
 872                                 return;
 873                         }
 874                         *(buf->data + buf->count) = data[i];
 875                         buf->count++;
 876                 }
 877         } while (fifo_count);
 878
 879         if (eom) {
 880                 info->pending_bh |= BH_RECEIVE;
 881                 info->rx_frame_count++;
 882                 info->rx_put++;
 883                 if (info->rx_put >= info->rx_buf_count)
 884                         info->rx_put = 0;
 885         }
 886         issue_command(info, CHA, CMD_RXFIFO);
 887 }
 888
 889 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
 890 {
 891         unsigned char data, status, flag;
 892         int fifo_count;
 893         int work = 0;
 894         struct mgsl_icount *icount = &info->icount;
 895
 896         if (!tty) {
 897                 /* tty is not available anymore */
 898                 issue_command(info, CHA, CMD_RXRESET);
 899                 if (debug_level >= DEBUG_LEVEL_ISR)
 900                         printk("%s(%d):rx_ready_async(tty=NULL)\n",__FILE__,__LINE__);
 901                 return;
 902         }
 903
 904         if (tcd) {
 905                 /* early termination, get FIFO count from RBCL register */
 906                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 907
 908                 /* Zero fifo count could mean 0 or 32 bytes available.
 909                  * If BIT5 of STAR is set then at least 1 byte is available.
 910                  */
 911                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 912                         fifo_count = 32;
 913         } else
 914                 fifo_count = 32;
 915
 916         tty_buffer_request_room(tty, fifo_count);
 917         /* Flush received async data to receive data buffer. */
 918         while (fifo_count) {
 919                 data   = read_reg(info, CHA + RXFIFO);
 920                 status = read_reg(info, CHA + RXFIFO);
 921                 fifo_count -= 2;
 922
 923                 icount->rx++;
 924                 flag = TTY_NORMAL;
 925
 926                 // if no frameing/crc error then save data
 927                 // BIT7:parity error
 928                 // BIT6:framing error
 929
 930                 if (status & (BIT7 + BIT6)) {
 931                         if (status & BIT7)
 932                                 icount->parity++;
 933                         else
 934                                 icount->frame++;
 935
 936                         /* discard char if tty control flags say so */
 937                         if (status & info->ignore_status_mask)
 938                                 continue;
 939
 940                         status &= info->read_status_mask;
 941
 942                         if (status & BIT7)
 943                                 flag = TTY_PARITY;
 944                         else if (status & BIT6)
 945                                 flag = TTY_FRAME;
 946                 }
 947                 work += tty_insert_flip_char(tty, data, flag);
 948         }
 949         issue_command(info, CHA, CMD_RXFIFO);
 950
 951         if (debug_level >= DEBUG_LEVEL_ISR) {
 952                 printk("%s(%d):rx_ready_async",
 953                         __FILE__,__LINE__);
 954                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
 955                         __FILE__,__LINE__,icount->rx,icount->brk,
 956                         icount->parity,icount->frame,icount->overrun);
 957         }
 958
 959         if (work)
 960                 tty_flip_buffer_push(tty);
 961 }
 962
 963
 964 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
 965 {
 966         if (!info->tx_active)
 967                 return;
 968
 969         info->tx_active = false;
 970         info->tx_aborting = false;
 971
 972         if (info->params.mode == MGSL_MODE_ASYNC)
 973                 return;
 974
 975         info->tx_count = info->tx_put = info->tx_get = 0;
 976         del_timer(&info->tx_timer);
 977
 978         if (info->drop_rts_on_tx_done) {
 979                 get_signals(info);
 980                 if (info->serial_signals & SerialSignal_RTS) {
 981                         info->serial_signals &= ~SerialSignal_RTS;
 982                         set_signals(info);
 983                 }
 984                 info->drop_rts_on_tx_done = false;
 985         }
 986
 987 #if SYNCLINK_GENERIC_HDLC
 988         if (info->netcount)
 989                 hdlcdev_tx_done(info);
 990         else
 991 #endif
 992         {
 993                 if (tty && (tty->stopped || tty->hw_stopped)) {
 994                         tx_stop(info);
 995                         return;
 996                 }
 997                 info->pending_bh |= BH_TRANSMIT;
 998         }
 999 }
1000
1001 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1002 {
1003         unsigned char fifo_count = 32;
1004         int c;
1005
1006         if (debug_level >= DEBUG_LEVEL_ISR)
1007                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1008
1009         if (info->params.mode == MGSL_MODE_HDLC) {
1010                 if (!info->tx_active)
1011                         return;
1012         } else {
1013                 if (tty && (tty->stopped || tty->hw_stopped)) {
1014                         tx_stop(info);
1015                         return;
1016                 }
1017                 if (!info->tx_count)
1018                         info->tx_active = false;
1019         }
1020
1021         if (!info->tx_count)
1022                 return;
1023
1024         while (info->tx_count && fifo_count) {
1025                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1026
1027                 if (c == 1) {
1028                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1029                 } else {
1030                         write_reg16(info, CHA + TXFIFO,
1031                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1032                 }
1033                 info->tx_count -= c;
1034                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1035                 fifo_count -= c;
1036         }
1037
1038         if (info->params.mode == MGSL_MODE_ASYNC) {
1039                 if (info->tx_count < WAKEUP_CHARS)
1040                         info->pending_bh |= BH_TRANSMIT;
1041                 issue_command(info, CHA, CMD_TXFIFO);
1042         } else {
1043                 if (info->tx_count)
1044                         issue_command(info, CHA, CMD_TXFIFO);
1045                 else
1046                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1047         }
1048 }
1049
1050 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1051 {
1052         get_signals(info);
1053         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1054                 irq_disable(info, CHB, IRQ_CTS);
1055         info->icount.cts++;
1056         if (info->serial_signals & SerialSignal_CTS)
1057                 info->input_signal_events.cts_up++;
1058         else
1059                 info->input_signal_events.cts_down++;
1060         wake_up_interruptible(&info->status_event_wait_q);
1061         wake_up_interruptible(&info->event_wait_q);
1062
1063         if (tty && tty_port_cts_enabled(&info->port)) {
1064                 if (tty->hw_stopped) {
1065                         if (info->serial_signals & SerialSignal_CTS) {
1066                                 if (debug_level >= DEBUG_LEVEL_ISR)
1067                                         printk("CTS tx start...");
1068                                 tty->hw_stopped = 0;
1069                                 tx_start(info, tty);
1070                                 info->pending_bh |= BH_TRANSMIT;
1071                                 return;
1072                         }
1073                 } else {
1074                         if (!(info->serial_signals & SerialSignal_CTS)) {
1075                                 if (debug_level >= DEBUG_LEVEL_ISR)
1076                                         printk("CTS tx stop...");
1077                                 tty->hw_stopped = 1;
1078                                 tx_stop(info);
1079                         }
1080                 }
1081         }
1082         info->pending_bh |= BH_STATUS;
1083 }
1084
1085 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1086 {
1087         get_signals(info);
1088         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1089                 irq_disable(info, CHB, IRQ_DCD);
1090         info->icount.dcd++;
1091         if (info->serial_signals & SerialSignal_DCD) {
1092                 info->input_signal_events.dcd_up++;
1093         }
1094         else
1095                 info->input_signal_events.dcd_down++;
1096 #if SYNCLINK_GENERIC_HDLC
1097         if (info->netcount) {
1098                 if (info->serial_signals & SerialSignal_DCD)
1099                         netif_carrier_on(info->netdev);
1100                 else
1101                         netif_carrier_off(info->netdev);
1102         }
1103 #endif
1104         wake_up_interruptible(&info->status_event_wait_q);
1105         wake_up_interruptible(&info->event_wait_q);
1106
1107         if (info->port.flags & ASYNC_CHECK_CD) {
1108                 if (debug_level >= DEBUG_LEVEL_ISR)
1109                         printk("%s CD now %s...", info->device_name,
1110                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1111                 if (info->serial_signals & SerialSignal_DCD)
1112                         wake_up_interruptible(&info->port.open_wait);
1113                 else {
1114                         if (debug_level >= DEBUG_LEVEL_ISR)
1115                                 printk("doing serial hangup...");
1116                         if (tty)
1117                                 tty_hangup(tty);
1118                 }
1119         }
1120         info->pending_bh |= BH_STATUS;
1121 }
1122
1123 static void dsr_change(MGSLPC_INFO *info)
1124 {
1125         get_signals(info);
1126         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1127                 port_irq_disable(info, PVR_DSR);
1128         info->icount.dsr++;
1129         if (info->serial_signals & SerialSignal_DSR)
1130                 info->input_signal_events.dsr_up++;
1131         else
1132                 info->input_signal_events.dsr_down++;
1133         wake_up_interruptible(&info->status_event_wait_q);
1134         wake_up_interruptible(&info->event_wait_q);
1135         info->pending_bh |= BH_STATUS;
1136 }
1137
1138 static void ri_change(MGSLPC_INFO *info)
1139 {
1140         get_signals(info);
1141         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1142                 port_irq_disable(info, PVR_RI);
1143         info->icount.rng++;
1144         if (info->serial_signals & SerialSignal_RI)
1145                 info->input_signal_events.ri_up++;
1146         else
1147                 info->input_signal_events.ri_down++;
1148         wake_up_interruptible(&info->status_event_wait_q);
1149         wake_up_interruptible(&info->event_wait_q);
1150         info->pending_bh |= BH_STATUS;
1151 }
1152
1153 /* Interrupt service routine entry point.
1154  *
1155  * Arguments:
1156  *
1157  * irq     interrupt number that caused interrupt
1158  * dev_id  device ID supplied during interrupt registration
1159  */
1160 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1161 {
1162         MGSLPC_INFO *info = dev_id;
1163         struct tty_struct *tty;
1164         unsigned short isr;
1165         unsigned char gis, pis;
1166         int count=0;
1167
1168         if (debug_level >= DEBUG_LEVEL_ISR)
1169                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1170
1171         if (!(info->p_dev->_locked))
1172                 return IRQ_HANDLED;
1173
1174         tty = tty_port_tty_get(&info->port);
1175
1176         spin_lock(&info->lock);
1177
1178         while ((gis = read_reg(info, CHA + GIS))) {
1179                 if (debug_level >= DEBUG_LEVEL_ISR)
1180                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1181
1182                 if ((gis & 0x70) || count > 1000) {
1183                         printk("synclink_cs:hardware failed or ejected\n");
1184                         break;
1185                 }
1186                 count++;
1187
1188                 if (gis & (BIT1 + BIT0)) {
1189                         isr = read_reg16(info, CHB + ISR);
1190                         if (isr & IRQ_DCD)
1191                                 dcd_change(info, tty);
1192                         if (isr & IRQ_CTS)
1193                                 cts_change(info, tty);
1194                 }
1195                 if (gis & (BIT3 + BIT2))
1196                 {
1197                         isr = read_reg16(info, CHA + ISR);
1198                         if (isr & IRQ_TIMER) {
1199                                 info->irq_occurred = true;
1200                                 irq_disable(info, CHA, IRQ_TIMER);
1201                         }
1202
1203                         /* receive IRQs */
1204                         if (isr & IRQ_EXITHUNT) {
1205                                 info->icount.exithunt++;
1206                                 wake_up_interruptible(&info->event_wait_q);
1207                         }
1208                         if (isr & IRQ_BREAK_ON) {
1209                                 info->icount.brk++;
1210                                 if (info->port.flags & ASYNC_SAK)
1211                                         do_SAK(tty);
1212                         }
1213                         if (isr & IRQ_RXTIME) {
1214                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1215                         }
1216                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1217                                 if (info->params.mode == MGSL_MODE_HDLC)
1218                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1219                                 else
1220                                         rx_ready_async(info, isr & IRQ_RXEOM, tty);
1221                         }
1222
1223                         /* transmit IRQs */
1224                         if (isr & IRQ_UNDERRUN) {
1225                                 if (info->tx_aborting)
1226                                         info->icount.txabort++;
1227                                 else
1228                                         info->icount.txunder++;
1229                                 tx_done(info, tty);
1230                         }
1231                         else if (isr & IRQ_ALLSENT) {
1232                                 info->icount.txok++;
1233                                 tx_done(info, tty);
1234                         }
1235                         else if (isr & IRQ_TXFIFO)
1236                                 tx_ready(info, tty);
1237                 }
1238                 if (gis & BIT7) {
1239                         pis = read_reg(info, CHA + PIS);
1240                         if (pis & BIT1)
1241                                 dsr_change(info);
1242                         if (pis & BIT2)
1243                                 ri_change(info);
1244                 }
1245         }
1246
1247         /* Request bottom half processing if there's something
1248          * for it to do and the bh is not already running
1249          */
1250
1251         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1252                 if ( debug_level >= DEBUG_LEVEL_ISR )
1253                         printk("%s(%d):%s queueing bh task.\n",
1254                                 __FILE__,__LINE__,info->device_name);
1255                 schedule_work(&info->task);
1256                 info->bh_requested = true;
1257         }
1258
1259         spin_unlock(&info->lock);
1260         tty_kref_put(tty);
1261
1262         if (debug_level >= DEBUG_LEVEL_ISR)
1263                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1264                        __FILE__, __LINE__, info->irq_level);
1265
1266         return IRQ_HANDLED;
1267 }
1268
1269 /* Initialize and start device.
1270  */
1271 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1272 {
1273         int retval = 0;
1274
1275         if (debug_level >= DEBUG_LEVEL_INFO)
1276                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1277
1278         if (info->port.flags & ASYNC_INITIALIZED)
1279                 return 0;
1280
1281         if (!info->tx_buf) {
1282                 /* allocate a page of memory for a transmit buffer */
1283                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1284                 if (!info->tx_buf) {
1285                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1286                                 __FILE__,__LINE__,info->device_name);
1287                         return -ENOMEM;
1288                 }
1289         }
1290
1291         info->pending_bh = 0;
1292
1293         memset(&info->icount, 0, sizeof(info->icount));
1294
1295         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1296
1297         /* Allocate and claim adapter resources */
1298         retval = claim_resources(info);
1299
1300         /* perform existence check and diagnostics */
1301         if ( !retval )
1302                 retval = adapter_test(info);
1303
1304         if ( retval ) {
1305                 if (capable(CAP_SYS_ADMIN) && tty)
1306                         set_bit(TTY_IO_ERROR, &tty->flags);
1307                 release_resources(info);
1308                 return retval;
1309         }
1310
1311         /* program hardware for current parameters */
1312         mgslpc_change_params(info, tty);
1313
1314         if (tty)
1315                 clear_bit(TTY_IO_ERROR, &tty->flags);
1316
1317         info->port.flags |= ASYNC_INITIALIZED;
1318
1319         return 0;
1320 }
1321
1322 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1323  */
1324 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1325 {
1326         unsigned long flags;
1327
1328         if (!(info->port.flags & ASYNC_INITIALIZED))
1329                 return;
1330
1331         if (debug_level >= DEBUG_LEVEL_INFO)
1332                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1333                          __FILE__,__LINE__, info->device_name );
1334
1335         /* clear status wait queue because status changes */
1336         /* can't happen after shutting down the hardware */
1337         wake_up_interruptible(&info->status_event_wait_q);
1338         wake_up_interruptible(&info->event_wait_q);
1339
1340         del_timer_sync(&info->tx_timer);
1341
1342         if (info->tx_buf) {
1343                 free_page((unsigned long) info->tx_buf);
1344                 info->tx_buf = NULL;
1345         }
1346
1347         spin_lock_irqsave(&info->lock,flags);
1348
1349         rx_stop(info);
1350         tx_stop(info);
1351
1352         /* TODO:disable interrupts instead of reset to preserve signal states */
1353         reset_device(info);
1354
1355         if (!tty || tty->termios.c_cflag & HUPCL) {
1356                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1357                 set_signals(info);
1358         }
1359
1360         spin_unlock_irqrestore(&info->lock,flags);
1361
1362         release_resources(info);
1363
1364         if (tty)
1365                 set_bit(TTY_IO_ERROR, &tty->flags);
1366
1367         info->port.flags &= ~ASYNC_INITIALIZED;
1368 }
1369
1370 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1371 {
1372         unsigned long flags;
1373
1374         spin_lock_irqsave(&info->lock,flags);
1375
1376         rx_stop(info);
1377         tx_stop(info);
1378         info->tx_count = info->tx_put = info->tx_get = 0;
1379
1380         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1381                 hdlc_mode(info);
1382         else
1383                 async_mode(info);
1384
1385         set_signals(info);
1386
1387         info->dcd_chkcount = 0;
1388         info->cts_chkcount = 0;
1389         info->ri_chkcount = 0;
1390         info->dsr_chkcount = 0;
1391
1392         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1393         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1394         get_signals(info);
1395
1396         if (info->netcount || (tty && (tty->termios.c_cflag & CREAD)))
1397                 rx_start(info);
1398
1399         spin_unlock_irqrestore(&info->lock,flags);
1400 }
1401
1402 /* Reconfigure adapter based on new parameters
1403  */
1404 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1405 {
1406         unsigned cflag;
1407         int bits_per_char;
1408
1409         if (!tty)
1410                 return;
1411
1412         if (debug_level >= DEBUG_LEVEL_INFO)
1413                 printk("%s(%d):mgslpc_change_params(%s)\n",
1414                          __FILE__,__LINE__, info->device_name );
1415
1416         cflag = tty->termios.c_cflag;
1417
1418         /* if B0 rate (hangup) specified then negate DTR and RTS */
1419         /* otherwise assert DTR and RTS */
1420         if (cflag & CBAUD)
1421                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1422         else
1423                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1424
1425         /* byte size and parity */
1426
1427         switch (cflag & CSIZE) {
1428         case CS5: info->params.data_bits = 5; break;
1429         case CS6: info->params.data_bits = 6; break;
1430         case CS7: info->params.data_bits = 7; break;
1431         case CS8: info->params.data_bits = 8; break;
1432         default:  info->params.data_bits = 7; break;
1433         }
1434
1435         if (cflag & CSTOPB)
1436                 info->params.stop_bits = 2;
1437         else
1438                 info->params.stop_bits = 1;
1439
1440         info->params.parity = ASYNC_PARITY_NONE;
1441         if (cflag & PARENB) {
1442                 if (cflag & PARODD)
1443                         info->params.parity = ASYNC_PARITY_ODD;
1444                 else
1445                         info->params.parity = ASYNC_PARITY_EVEN;
1446 #ifdef CMSPAR
1447                 if (cflag & CMSPAR)
1448                         info->params.parity = ASYNC_PARITY_SPACE;
1449 #endif
1450         }
1451
1452         /* calculate number of jiffies to transmit a full
1453          * FIFO (32 bytes) at specified data rate
1454          */
1455         bits_per_char = info->params.data_bits +
1456                         info->params.stop_bits + 1;
1457
1458         /* if port data rate is set to 460800 or less then
1459          * allow tty settings to override, otherwise keep the
1460          * current data rate.
1461          */
1462         if (info->params.data_rate <= 460800) {
1463                 info->params.data_rate = tty_get_baud_rate(tty);
1464         }
1465
1466         if ( info->params.data_rate ) {
1467                 info->timeout = (32*HZ*bits_per_char) /
1468                                 info->params.data_rate;
1469         }
1470         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1471
1472         if (cflag & CRTSCTS)
1473                 info->port.flags |= ASYNC_CTS_FLOW;
1474         else
1475                 info->port.flags &= ~ASYNC_CTS_FLOW;
1476
1477         if (cflag & CLOCAL)
1478                 info->port.flags &= ~ASYNC_CHECK_CD;
1479         else
1480                 info->port.flags |= ASYNC_CHECK_CD;
1481
1482         /* process tty input control flags */
1483
1484         info->read_status_mask = 0;
1485         if (I_INPCK(tty))
1486                 info->read_status_mask |= BIT7 | BIT6;
1487         if (I_IGNPAR(tty))
1488                 info->ignore_status_mask |= BIT7 | BIT6;
1489
1490         mgslpc_program_hw(info, tty);
1491 }
1492
1493 /* Add a character to the transmit buffer
1494  */
1495 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1496 {
1497         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1498         unsigned long flags;
1499
1500         if (debug_level >= DEBUG_LEVEL_INFO) {
1501                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1502                         __FILE__,__LINE__,ch,info->device_name);
1503         }
1504
1505         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1506                 return 0;
1507
1508         if (!info->tx_buf)
1509                 return 0;
1510
1511         spin_lock_irqsave(&info->lock,flags);
1512
1513         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1514                 if (info->tx_count < TXBUFSIZE - 1) {
1515                         info->tx_buf[info->tx_put++] = ch;
1516                         info->tx_put &= TXBUFSIZE-1;
1517                         info->tx_count++;
1518                 }
1519         }
1520
1521         spin_unlock_irqrestore(&info->lock,flags);
1522         return 1;
1523 }
1524
1525 /* Enable transmitter so remaining characters in the
1526  * transmit buffer are sent.
1527  */
1528 static void mgslpc_flush_chars(struct tty_struct *tty)
1529 {
1530         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1531         unsigned long flags;
1532
1533         if (debug_level >= DEBUG_LEVEL_INFO)
1534                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1535                         __FILE__,__LINE__,info->device_name,info->tx_count);
1536
1537         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1538                 return;
1539
1540         if (info->tx_count <= 0 || tty->stopped ||
1541             tty->hw_stopped || !info->tx_buf)
1542                 return;
1543
1544         if (debug_level >= DEBUG_LEVEL_INFO)
1545                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1546                         __FILE__,__LINE__,info->device_name);
1547
1548         spin_lock_irqsave(&info->lock,flags);
1549         if (!info->tx_active)
1550                 tx_start(info, tty);
1551         spin_unlock_irqrestore(&info->lock,flags);
1552 }
1553
1554 /* Send a block of data
1555  *
1556  * Arguments:
1557  *
1558  * tty        pointer to tty information structure
1559  * buf        pointer to buffer containing send data
1560  * count      size of send data in bytes
1561  *
1562  * Returns: number of characters written
1563  */
1564 static int mgslpc_write(struct tty_struct * tty,
1565                         const unsigned char *buf, int count)
1566 {
1567         int c, ret = 0;
1568         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1569         unsigned long flags;
1570
1571         if (debug_level >= DEBUG_LEVEL_INFO)
1572                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1573                         __FILE__,__LINE__,info->device_name,count);
1574
1575         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1576                 !info->tx_buf)
1577                 goto cleanup;
1578
1579         if (info->params.mode == MGSL_MODE_HDLC) {
1580                 if (count > TXBUFSIZE) {
1581                         ret = -EIO;
1582                         goto cleanup;
1583                 }
1584                 if (info->tx_active)
1585                         goto cleanup;
1586                 else if (info->tx_count)
1587                         goto start;
1588         }
1589
1590         for (;;) {
1591                 c = min(count,
1592                         min(TXBUFSIZE - info->tx_count - 1,
1593                             TXBUFSIZE - info->tx_put));
1594                 if (c <= 0)
1595                         break;
1596
1597                 memcpy(info->tx_buf + info->tx_put, buf, c);
1598
1599                 spin_lock_irqsave(&info->lock,flags);
1600                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1601                 info->tx_count += c;
1602                 spin_unlock_irqrestore(&info->lock,flags);
1603
1604                 buf += c;
1605                 count -= c;
1606                 ret += c;
1607         }
1608 start:
1609         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1610                 spin_lock_irqsave(&info->lock,flags);
1611                 if (!info->tx_active)
1612                         tx_start(info, tty);
1613                 spin_unlock_irqrestore(&info->lock,flags);
1614         }
1615 cleanup:
1616         if (debug_level >= DEBUG_LEVEL_INFO)
1617                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1618                         __FILE__,__LINE__,info->device_name,ret);
1619         return ret;
1620 }
1621
1622 /* Return the count of free bytes in transmit buffer
1623  */
1624 static int mgslpc_write_room(struct tty_struct *tty)
1625 {
1626         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1627         int ret;
1628
1629         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1630                 return 0;
1631
1632         if (info->params.mode == MGSL_MODE_HDLC) {
1633                 /* HDLC (frame oriented) mode */
1634                 if (info->tx_active)
1635                         return 0;
1636                 else
1637                         return HDLC_MAX_FRAME_SIZE;
1638         } else {
1639                 ret = TXBUFSIZE - info->tx_count - 1;
1640                 if (ret < 0)
1641                         ret = 0;
1642         }
1643
1644         if (debug_level >= DEBUG_LEVEL_INFO)
1645                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1646                          __FILE__,__LINE__, info->device_name, ret);
1647         return ret;
1648 }
1649
1650 /* Return the count of bytes in transmit buffer
1651  */
1652 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1653 {
1654         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1655         int rc;
1656
1657         if (debug_level >= DEBUG_LEVEL_INFO)
1658                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1659                          __FILE__,__LINE__, info->device_name );
1660
1661         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1662                 return 0;
1663
1664         if (info->params.mode == MGSL_MODE_HDLC)
1665                 rc = info->tx_active ? info->max_frame_size : 0;
1666         else
1667                 rc = info->tx_count;
1668
1669         if (debug_level >= DEBUG_LEVEL_INFO)
1670                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1671                          __FILE__,__LINE__, info->device_name, rc);
1672
1673         return rc;
1674 }
1675
1676 /* Discard all data in the send buffer
1677  */
1678 static void mgslpc_flush_buffer(struct tty_struct *tty)
1679 {
1680         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1681         unsigned long flags;
1682
1683         if (debug_level >= DEBUG_LEVEL_INFO)
1684                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1685                          __FILE__,__LINE__, info->device_name );
1686
1687         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1688                 return;
1689
1690         spin_lock_irqsave(&info->lock,flags);
1691         info->tx_count = info->tx_put = info->tx_get = 0;
1692         del_timer(&info->tx_timer);
1693         spin_unlock_irqrestore(&info->lock,flags);
1694
1695         wake_up_interruptible(&tty->write_wait);
1696         tty_wakeup(tty);
1697 }
1698
1699 /* Send a high-priority XON/XOFF character
1700  */
1701 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1702 {
1703         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1704         unsigned long flags;
1705
1706         if (debug_level >= DEBUG_LEVEL_INFO)
1707                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1708                          __FILE__,__LINE__, info->device_name, ch );
1709
1710         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1711                 return;
1712
1713         info->x_char = ch;
1714         if (ch) {
1715                 spin_lock_irqsave(&info->lock,flags);
1716                 if (!info->tx_enabled)
1717                         tx_start(info, tty);
1718                 spin_unlock_irqrestore(&info->lock,flags);
1719         }
1720 }
1721
1722 /* Signal remote device to throttle send data (our receive data)
1723  */
1724 static void mgslpc_throttle(struct tty_struct * tty)
1725 {
1726         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1727         unsigned long flags;
1728
1729         if (debug_level >= DEBUG_LEVEL_INFO)
1730                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1731                          __FILE__,__LINE__, info->device_name );
1732
1733         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1734                 return;
1735
1736         if (I_IXOFF(tty))
1737                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1738
1739         if (tty->termios.c_cflag & CRTSCTS) {
1740                 spin_lock_irqsave(&info->lock,flags);
1741                 info->serial_signals &= ~SerialSignal_RTS;
1742                 set_signals(info);
1743                 spin_unlock_irqrestore(&info->lock,flags);
1744         }
1745 }
1746
1747 /* Signal remote device to stop throttling send data (our receive data)
1748  */
1749 static void mgslpc_unthrottle(struct tty_struct * tty)
1750 {
1751         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1752         unsigned long flags;
1753
1754         if (debug_level >= DEBUG_LEVEL_INFO)
1755                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1756                          __FILE__,__LINE__, info->device_name );
1757
1758         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1759                 return;
1760
1761         if (I_IXOFF(tty)) {
1762                 if (info->x_char)
1763                         info->x_char = 0;
1764                 else
1765                         mgslpc_send_xchar(tty, START_CHAR(tty));
1766         }
1767
1768         if (tty->termios.c_cflag & CRTSCTS) {
1769                 spin_lock_irqsave(&info->lock,flags);
1770                 info->serial_signals |= SerialSignal_RTS;
1771                 set_signals(info);
1772                 spin_unlock_irqrestore(&info->lock,flags);
1773         }
1774 }
1775
1776 /* get the current serial statistics
1777  */
1778 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1779 {
1780         int err;
1781         if (debug_level >= DEBUG_LEVEL_INFO)
1782                 printk("get_params(%s)\n", info->device_name);
1783         if (!user_icount) {
1784                 memset(&info->icount, 0, sizeof(info->icount));
1785         } else {
1786                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1787                 if (err)
1788                         return -EFAULT;
1789         }
1790         return 0;
1791 }
1792
1793 /* get the current serial parameters
1794  */
1795 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1796 {
1797         int err;
1798         if (debug_level >= DEBUG_LEVEL_INFO)
1799                 printk("get_params(%s)\n", info->device_name);
1800         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1801         if (err)
1802                 return -EFAULT;
1803         return 0;
1804 }
1805
1806 /* set the serial parameters
1807  *
1808  * Arguments:
1809  *
1810  *      info            pointer to device instance data
1811  *      new_params      user buffer containing new serial params
1812  *
1813  * Returns:     0 if success, otherwise error code
1814  */
1815 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1816 {
1817         unsigned long flags;
1818         MGSL_PARAMS tmp_params;
1819         int err;
1820
1821         if (debug_level >= DEBUG_LEVEL_INFO)
1822                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1823                         info->device_name );
1824         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1825         if (err) {
1826                 if ( debug_level >= DEBUG_LEVEL_INFO )
1827                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1828                                 __FILE__,__LINE__,info->device_name);
1829                 return -EFAULT;
1830         }
1831
1832         spin_lock_irqsave(&info->lock,flags);
1833         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1834         spin_unlock_irqrestore(&info->lock,flags);
1835
1836         mgslpc_change_params(info, tty);
1837
1838         return 0;
1839 }
1840
1841 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1842 {
1843         int err;
1844         if (debug_level >= DEBUG_LEVEL_INFO)
1845                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1846         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1847         if (err)
1848                 return -EFAULT;
1849         return 0;
1850 }
1851
1852 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1853 {
1854         unsigned long flags;
1855         if (debug_level >= DEBUG_LEVEL_INFO)
1856                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1857         spin_lock_irqsave(&info->lock,flags);
1858         info->idle_mode = idle_mode;
1859         tx_set_idle(info);
1860         spin_unlock_irqrestore(&info->lock,flags);
1861         return 0;
1862 }
1863
1864 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1865 {
1866         int err;
1867         if (debug_level >= DEBUG_LEVEL_INFO)
1868                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1869         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1870         if (err)
1871                 return -EFAULT;
1872         return 0;
1873 }
1874
1875 static int set_interface(MGSLPC_INFO * info, int if_mode)
1876 {
1877         unsigned long flags;
1878         unsigned char val;
1879         if (debug_level >= DEBUG_LEVEL_INFO)
1880                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1881         spin_lock_irqsave(&info->lock,flags);
1882         info->if_mode = if_mode;
1883
1884         val = read_reg(info, PVR) & 0x0f;
1885         switch (info->if_mode)
1886         {
1887         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1888         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1889         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1890         }
1891         write_reg(info, PVR, val);
1892
1893         spin_unlock_irqrestore(&info->lock,flags);
1894         return 0;
1895 }
1896
1897 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1898 {
1899         unsigned long flags;
1900
1901         if (debug_level >= DEBUG_LEVEL_INFO)
1902                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1903
1904         spin_lock_irqsave(&info->lock,flags);
1905         if (enable) {
1906                 if (!info->tx_enabled)
1907                         tx_start(info, tty);
1908         } else {
1909                 if (info->tx_enabled)
1910                         tx_stop(info);
1911         }
1912         spin_unlock_irqrestore(&info->lock,flags);
1913         return 0;
1914 }
1915
1916 static int tx_abort(MGSLPC_INFO * info)
1917 {
1918         unsigned long flags;
1919
1920         if (debug_level >= DEBUG_LEVEL_INFO)
1921                 printk("tx_abort(%s)\n", info->device_name);
1922
1923         spin_lock_irqsave(&info->lock,flags);
1924         if (info->tx_active && info->tx_count &&
1925             info->params.mode == MGSL_MODE_HDLC) {
1926                 /* clear data count so FIFO is not filled on next IRQ.
1927                  * This results in underrun and abort transmission.
1928                  */
1929                 info->tx_count = info->tx_put = info->tx_get = 0;
1930                 info->tx_aborting = true;
1931         }
1932         spin_unlock_irqrestore(&info->lock,flags);
1933         return 0;
1934 }
1935
1936 static int set_rxenable(MGSLPC_INFO * info, int enable)
1937 {
1938         unsigned long flags;
1939
1940         if (debug_level >= DEBUG_LEVEL_INFO)
1941                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1942
1943         spin_lock_irqsave(&info->lock,flags);
1944         if (enable) {
1945                 if (!info->rx_enabled)
1946                         rx_start(info);
1947         } else {
1948                 if (info->rx_enabled)
1949                         rx_stop(info);
1950         }
1951         spin_unlock_irqrestore(&info->lock,flags);
1952         return 0;
1953 }
1954
1955 /* wait for specified event to occur
1956  *
1957  * Arguments:           info    pointer to device instance data
1958  *                      mask    pointer to bitmask of events to wait for
1959  * Return Value:        0       if successful and bit mask updated with
1960  *                              of events triggerred,
1961  *                      otherwise error code
1962  */
1963 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1964 {
1965         unsigned long flags;
1966         int s;
1967         int rc=0;
1968         struct mgsl_icount cprev, cnow;
1969         int events;
1970         int mask;
1971         struct  _input_signal_events oldsigs, newsigs;
1972         DECLARE_WAITQUEUE(wait, current);
1973
1974         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1975         if (rc)
1976                 return  -EFAULT;
1977
1978         if (debug_level >= DEBUG_LEVEL_INFO)
1979                 printk("wait_events(%s,%d)\n", info->device_name, mask);
1980
1981         spin_lock_irqsave(&info->lock,flags);
1982
1983         /* return immediately if state matches requested events */
1984         get_signals(info);
1985         s = info->serial_signals;
1986         events = mask &
1987                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1988                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1989                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1990                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1991         if (events) {
1992                 spin_unlock_irqrestore(&info->lock,flags);
1993                 goto exit;
1994         }
1995
1996         /* save current irq counts */
1997         cprev = info->icount;
1998         oldsigs = info->input_signal_events;
1999
2000         if ((info->params.mode == MGSL_MODE_HDLC) &&
2001             (mask & MgslEvent_ExitHuntMode))
2002                 irq_enable(info, CHA, IRQ_EXITHUNT);
2003
2004         set_current_state(TASK_INTERRUPTIBLE);
2005         add_wait_queue(&info->event_wait_q, &wait);
2006
2007         spin_unlock_irqrestore(&info->lock,flags);
2008
2009
2010         for(;;) {
2011                 schedule();
2012                 if (signal_pending(current)) {
2013                         rc = -ERESTARTSYS;
2014                         break;
2015                 }
2016
2017                 /* get current irq counts */
2018                 spin_lock_irqsave(&info->lock,flags);
2019                 cnow = info->icount;
2020                 newsigs = info->input_signal_events;
2021                 set_current_state(TASK_INTERRUPTIBLE);
2022                 spin_unlock_irqrestore(&info->lock,flags);
2023
2024                 /* if no change, wait aborted for some reason */
2025                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2026                     newsigs.dsr_down == oldsigs.dsr_down &&
2027                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2028                     newsigs.dcd_down == oldsigs.dcd_down &&
2029                     newsigs.cts_up   == oldsigs.cts_up   &&
2030                     newsigs.cts_down == oldsigs.cts_down &&
2031                     newsigs.ri_up    == oldsigs.ri_up    &&
2032                     newsigs.ri_down  == oldsigs.ri_down  &&
2033                     cnow.exithunt    == cprev.exithunt   &&
2034                     cnow.rxidle      == cprev.rxidle) {
2035                         rc = -EIO;
2036                         break;
2037                 }
2038
2039                 events = mask &
2040                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2041                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2042                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2043                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2044                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2045                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2046                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2047                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2048                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2049                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2050                 if (events)
2051                         break;
2052
2053                 cprev = cnow;
2054                 oldsigs = newsigs;
2055         }
2056
2057         remove_wait_queue(&info->event_wait_q, &wait);
2058         set_current_state(TASK_RUNNING);
2059
2060         if (mask & MgslEvent_ExitHuntMode) {
2061                 spin_lock_irqsave(&info->lock,flags);
2062                 if (!waitqueue_active(&info->event_wait_q))
2063                         irq_disable(info, CHA, IRQ_EXITHUNT);
2064                 spin_unlock_irqrestore(&info->lock,flags);
2065         }
2066 exit:
2067         if (rc == 0)
2068                 PUT_USER(rc, events, mask_ptr);
2069         return rc;
2070 }
2071
2072 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2073 {
2074         unsigned long flags;
2075         int rc;
2076         struct mgsl_icount cprev, cnow;
2077         DECLARE_WAITQUEUE(wait, current);
2078
2079         /* save current irq counts */
2080         spin_lock_irqsave(&info->lock,flags);
2081         cprev = info->icount;
2082         add_wait_queue(&info->status_event_wait_q, &wait);
2083         set_current_state(TASK_INTERRUPTIBLE);
2084         spin_unlock_irqrestore(&info->lock,flags);
2085
2086         for(;;) {
2087                 schedule();
2088                 if (signal_pending(current)) {
2089                         rc = -ERESTARTSYS;
2090                         break;
2091                 }
2092
2093                 /* get new irq counts */
2094                 spin_lock_irqsave(&info->lock,flags);
2095                 cnow = info->icount;
2096                 set_current_state(TASK_INTERRUPTIBLE);
2097                 spin_unlock_irqrestore(&info->lock,flags);
2098
2099                 /* if no change, wait aborted for some reason */
2100                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2101                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2102                         rc = -EIO;
2103                         break;
2104                 }
2105
2106                 /* check for change in caller specified modem input */
2107                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2108                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2109                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2110                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2111                         rc = 0;
2112                         break;
2113                 }
2114
2115                 cprev = cnow;
2116         }
2117         remove_wait_queue(&info->status_event_wait_q, &wait);
2118         set_current_state(TASK_RUNNING);
2119         return rc;
2120 }
2121
2122 /* return the state of the serial control and status signals
2123  */
2124 static int tiocmget(struct tty_struct *tty)
2125 {
2126         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2127         unsigned int result;
2128         unsigned long flags;
2129
2130         spin_lock_irqsave(&info->lock,flags);
2131         get_signals(info);
2132         spin_unlock_irqrestore(&info->lock,flags);
2133
2134         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2135                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2136                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2137                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2138                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2139                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2140
2141         if (debug_level >= DEBUG_LEVEL_INFO)
2142                 printk("%s(%d):%s tiocmget() value=%08X\n",
2143                          __FILE__,__LINE__, info->device_name, result );
2144         return result;
2145 }
2146
2147 /* set modem control signals (DTR/RTS)
2148  */
2149 static int tiocmset(struct tty_struct *tty,
2150                     unsigned int set, unsigned int clear)
2151 {
2152         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2153         unsigned long flags;
2154
2155         if (debug_level >= DEBUG_LEVEL_INFO)
2156                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2157                         __FILE__,__LINE__,info->device_name, set, clear);
2158
2159         if (set & TIOCM_RTS)
2160                 info->serial_signals |= SerialSignal_RTS;
2161         if (set & TIOCM_DTR)
2162                 info->serial_signals |= SerialSignal_DTR;
2163         if (clear & TIOCM_RTS)
2164                 info->serial_signals &= ~SerialSignal_RTS;
2165         if (clear & TIOCM_DTR)
2166                 info->serial_signals &= ~SerialSignal_DTR;
2167
2168         spin_lock_irqsave(&info->lock,flags);
2169         set_signals(info);
2170         spin_unlock_irqrestore(&info->lock,flags);
2171
2172         return 0;
2173 }
2174
2175 /* Set or clear transmit break condition
2176  *
2177  * Arguments:           tty             pointer to tty instance data
2178  *                      break_state     -1=set break condition, 0=clear
2179  */
2180 static int mgslpc_break(struct tty_struct *tty, int break_state)
2181 {
2182         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2183         unsigned long flags;
2184
2185         if (debug_level >= DEBUG_LEVEL_INFO)
2186                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2187                          __FILE__,__LINE__, info->device_name, break_state);
2188
2189         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2190                 return -EINVAL;
2191
2192         spin_lock_irqsave(&info->lock,flags);
2193         if (break_state == -1)
2194                 set_reg_bits(info, CHA+DAFO, BIT6);
2195         else
2196                 clear_reg_bits(info, CHA+DAFO, BIT6);
2197         spin_unlock_irqrestore(&info->lock,flags);
2198         return 0;
2199 }
2200
2201 static int mgslpc_get_icount(struct tty_struct *tty,
2202                                 struct serial_icounter_struct *icount)
2203 {
2204         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2205         struct mgsl_icount cnow;        /* kernel counter temps */
2206         unsigned long flags;
2207
2208         spin_lock_irqsave(&info->lock,flags);
2209         cnow = info->icount;
2210         spin_unlock_irqrestore(&info->lock,flags);
2211
2212         icount->cts = cnow.cts;
2213         icount->dsr = cnow.dsr;
2214         icount->rng = cnow.rng;
2215         icount->dcd = cnow.dcd;
2216         icount->rx = cnow.rx;
2217         icount->tx = cnow.tx;
2218         icount->frame = cnow.frame;
2219         icount->overrun = cnow.overrun;
2220         icount->parity = cnow.parity;
2221         icount->brk = cnow.brk;
2222         icount->buf_overrun = cnow.buf_overrun;
2223
2224         return 0;
2225 }
2226
2227 /* Service an IOCTL request
2228  *
2229  * Arguments:
2230  *
2231  *      tty     pointer to tty instance data
2232  *      cmd     IOCTL command code
2233  *      arg     command argument/context
2234  *
2235  * Return Value:        0 if success, otherwise error code
2236  */
2237 static int mgslpc_ioctl(struct tty_struct *tty,
2238                         unsigned int cmd, unsigned long arg)
2239 {
2240         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2241         void __user *argp = (void __user *)arg;
2242
2243         if (debug_level >= DEBUG_LEVEL_INFO)
2244                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2245                         info->device_name, cmd );
2246
2247         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2248                 return -ENODEV;
2249
2250         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2251             (cmd != TIOCMIWAIT)) {
2252                 if (tty->flags & (1 << TTY_IO_ERROR))
2253                     return -EIO;
2254         }
2255
2256         switch (cmd) {
2257         case MGSL_IOCGPARAMS:
2258                 return get_params(info, argp);
2259         case MGSL_IOCSPARAMS:
2260                 return set_params(info, argp, tty);
2261         case MGSL_IOCGTXIDLE:
2262                 return get_txidle(info, argp);
2263         case MGSL_IOCSTXIDLE:
2264                 return set_txidle(info, (int)arg);
2265         case MGSL_IOCGIF:
2266                 return get_interface(info, argp);
2267         case MGSL_IOCSIF:
2268                 return set_interface(info,(int)arg);
2269         case MGSL_IOCTXENABLE:
2270                 return set_txenable(info,(int)arg, tty);
2271         case MGSL_IOCRXENABLE:
2272                 return set_rxenable(info,(int)arg);
2273         case MGSL_IOCTXABORT:
2274                 return tx_abort(info);
2275         case MGSL_IOCGSTATS:
2276                 return get_stats(info, argp);
2277         case MGSL_IOCWAITEVENT:
2278                 return wait_events(info, argp);
2279         case TIOCMIWAIT:
2280                 return modem_input_wait(info,(int)arg);
2281         default:
2282                 return -ENOIOCTLCMD;
2283         }
2284         return 0;
2285 }
2286
2287 /* Set new termios settings
2288  *
2289  * Arguments:
2290  *
2291  *      tty             pointer to tty structure
2292  *      termios         pointer to buffer to hold returned old termios
2293  */
2294 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2295 {
2296         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2297         unsigned long flags;
2298
2299         if (debug_level >= DEBUG_LEVEL_INFO)
2300                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2301                         tty->driver->name );
2302
2303         /* just return if nothing has changed */
2304         if ((tty->termios.c_cflag == old_termios->c_cflag)
2305             && (RELEVANT_IFLAG(tty->termios.c_iflag)
2306                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2307           return;
2308
2309         mgslpc_change_params(info, tty);
2310
2311         /* Handle transition to B0 status */
2312         if (old_termios->c_cflag & CBAUD &&
2313             !(tty->termios.c_cflag & CBAUD)) {
2314                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2315                 spin_lock_irqsave(&info->lock,flags);
2316                 set_signals(info);
2317                 spin_unlock_irqrestore(&info->lock,flags);
2318         }
2319
2320         /* Handle transition away from B0 status */
2321         if (!(old_termios->c_cflag & CBAUD) &&
2322             tty->termios.c_cflag & CBAUD) {
2323                 info->serial_signals |= SerialSignal_DTR;
2324                 if (!(tty->termios.c_cflag & CRTSCTS) ||
2325                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2326                         info->serial_signals |= SerialSignal_RTS;
2327                 }
2328                 spin_lock_irqsave(&info->lock,flags);
2329                 set_signals(info);
2330                 spin_unlock_irqrestore(&info->lock,flags);
2331         }
2332
2333         /* Handle turning off CRTSCTS */
2334         if (old_termios->c_cflag & CRTSCTS &&
2335             !(tty->termios.c_cflag & CRTSCTS)) {
2336                 tty->hw_stopped = 0;
2337                 tx_release(tty);
2338         }
2339 }
2340
2341 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2342 {
2343         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2344         struct tty_port *port = &info->port;
2345
2346         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2347                 return;
2348
2349         if (debug_level >= DEBUG_LEVEL_INFO)
2350                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2351                          __FILE__,__LINE__, info->device_name, port->count);
2352
2353         WARN_ON(!port->count);
2354
2355         if (tty_port_close_start(port, tty, filp) == 0)
2356                 goto cleanup;
2357
2358         if (port->flags & ASYNC_INITIALIZED)
2359                 mgslpc_wait_until_sent(tty, info->timeout);
2360
2361         mgslpc_flush_buffer(tty);
2362
2363         tty_ldisc_flush(tty);
2364         shutdown(info, tty);
2365
2366         tty_port_close_end(port, tty);
2367         tty_port_tty_set(port, NULL);
2368 cleanup:
2369         if (debug_level >= DEBUG_LEVEL_INFO)
2370                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2371                         tty->driver->name, port->count);
2372 }
2373
2374 /* Wait until the transmitter is empty.
2375  */
2376 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2377 {
2378         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2379         unsigned long orig_jiffies, char_time;
2380
2381         if (!info )
2382                 return;
2383
2384         if (debug_level >= DEBUG_LEVEL_INFO)
2385                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2386                          __FILE__,__LINE__, info->device_name );
2387
2388         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2389                 return;
2390
2391         if (!(info->port.flags & ASYNC_INITIALIZED))
2392                 goto exit;
2393
2394         orig_jiffies = jiffies;
2395
2396         /* Set check interval to 1/5 of estimated time to
2397          * send a character, and make it at least 1. The check
2398          * interval should also be less than the timeout.
2399          * Note: use tight timings here to satisfy the NIST-PCTS.
2400          */
2401
2402         if ( info->params.data_rate ) {
2403                 char_time = info->timeout/(32 * 5);
2404                 if (!char_time)
2405                         char_time++;
2406         } else
2407                 char_time = 1;
2408
2409         if (timeout)
2410                 char_time = min_t(unsigned long, char_time, timeout);
2411
2412         if (info->params.mode == MGSL_MODE_HDLC) {
2413                 while (info->tx_active) {
2414                         msleep_interruptible(jiffies_to_msecs(char_time));
2415                         if (signal_pending(current))
2416                                 break;
2417                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2418                                 break;
2419                 }
2420         } else {
2421                 while ((info->tx_count || info->tx_active) &&
2422                         info->tx_enabled) {
2423                         msleep_interruptible(jiffies_to_msecs(char_time));
2424                         if (signal_pending(current))
2425                                 break;
2426                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2427                                 break;
2428                 }
2429         }
2430
2431 exit:
2432         if (debug_level >= DEBUG_LEVEL_INFO)
2433                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2434                          __FILE__,__LINE__, info->device_name );
2435 }
2436
2437 /* Called by tty_hangup() when a hangup is signaled.
2438  * This is the same as closing all open files for the port.
2439  */
2440 static void mgslpc_hangup(struct tty_struct *tty)
2441 {
2442         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2443
2444         if (debug_level >= DEBUG_LEVEL_INFO)
2445                 printk("%s(%d):mgslpc_hangup(%s)\n",
2446                          __FILE__,__LINE__, info->device_name );
2447
2448         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2449                 return;
2450
2451         mgslpc_flush_buffer(tty);
2452         shutdown(info, tty);
2453         tty_port_hangup(&info->port);
2454 }
2455
2456 static int carrier_raised(struct tty_port *port)
2457 {
2458         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2459         unsigned long flags;
2460
2461         spin_lock_irqsave(&info->lock,flags);
2462         get_signals(info);
2463         spin_unlock_irqrestore(&info->lock,flags);
2464
2465         if (info->serial_signals & SerialSignal_DCD)
2466                 return 1;
2467         return 0;
2468 }
2469
2470 static void dtr_rts(struct tty_port *port, int onoff)
2471 {
2472         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2473         unsigned long flags;
2474
2475         spin_lock_irqsave(&info->lock,flags);
2476         if (onoff)
2477                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2478         else
2479                 info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2480         set_signals(info);
2481         spin_unlock_irqrestore(&info->lock,flags);
2482 }
2483
2484
2485 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2486 {
2487         MGSLPC_INFO     *info;
2488         struct tty_port *port;
2489         int                     retval, line;
2490         unsigned long flags;
2491
2492         /* verify range of specified line number */
2493         line = tty->index;
2494         if (line >= mgslpc_device_count) {
2495                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2496                         __FILE__,__LINE__,line);
2497                 return -ENODEV;
2498         }
2499
2500         /* find the info structure for the specified line */
2501         info = mgslpc_device_list;
2502         while(info && info->line != line)
2503                 info = info->next_device;
2504         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2505                 return -ENODEV;
2506
2507         port = &info->port;
2508         tty->driver_data = info;
2509         tty_port_tty_set(port, tty);
2510
2511         if (debug_level >= DEBUG_LEVEL_INFO)
2512                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2513                          __FILE__,__LINE__,tty->driver->name, port->count);
2514
2515         /* If port is closing, signal caller to try again */
2516         if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2517                 if (port->flags & ASYNC_CLOSING)
2518                         interruptible_sleep_on(&port->close_wait);
2519                 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2520                         -EAGAIN : -ERESTARTSYS);
2521                 goto cleanup;
2522         }
2523
2524         tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2525
2526         spin_lock_irqsave(&info->netlock, flags);
2527         if (info->netcount) {
2528                 retval = -EBUSY;
2529                 spin_unlock_irqrestore(&info->netlock, flags);
2530                 goto cleanup;
2531         }
2532         spin_lock(&port->lock);
2533         port->count++;
2534         spin_unlock(&port->lock);
2535         spin_unlock_irqrestore(&info->netlock, flags);
2536
2537         if (port->count == 1) {
2538                 /* 1st open on this device, init hardware */
2539                 retval = startup(info, tty);
2540                 if (retval < 0)
2541                         goto cleanup;
2542         }
2543
2544         retval = tty_port_block_til_ready(&info->port, tty, filp);
2545         if (retval) {
2546                 if (debug_level >= DEBUG_LEVEL_INFO)
2547                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2548                                  __FILE__,__LINE__, info->device_name, retval);
2549                 goto cleanup;
2550         }
2551
2552         if (debug_level >= DEBUG_LEVEL_INFO)
2553                 printk("%s(%d):mgslpc_open(%s) success\n",
2554                          __FILE__,__LINE__, info->device_name);
2555         retval = 0;
2556
2557 cleanup:
2558         return retval;
2559 }
2560
2561 /*
2562  * /proc fs routines....
2563  */
2564
2565 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2566 {
2567         char    stat_buf[30];
2568         unsigned long flags;
2569
2570         seq_printf(m, "%s:io:%04X irq:%d",
2571                       info->device_name, info->io_base, info->irq_level);
2572
2573         /* output current serial signal states */
2574         spin_lock_irqsave(&info->lock,flags);
2575         get_signals(info);
2576         spin_unlock_irqrestore(&info->lock,flags);
2577
2578         stat_buf[0] = 0;
2579         stat_buf[1] = 0;
2580         if (info->serial_signals & SerialSignal_RTS)
2581                 strcat(stat_buf, "|RTS");
2582         if (info->serial_signals & SerialSignal_CTS)
2583                 strcat(stat_buf, "|CTS");
2584         if (info->serial_signals & SerialSignal_DTR)
2585                 strcat(stat_buf, "|DTR");
2586         if (info->serial_signals & SerialSignal_DSR)
2587                 strcat(stat_buf, "|DSR");
2588         if (info->serial_signals & SerialSignal_DCD)
2589                 strcat(stat_buf, "|CD");
2590         if (info->serial_signals & SerialSignal_RI)
2591                 strcat(stat_buf, "|RI");
2592
2593         if (info->params.mode == MGSL_MODE_HDLC) {
2594                 seq_printf(m, " HDLC txok:%d rxok:%d",
2595                               info->icount.txok, info->icount.rxok);
2596                 if (info->icount.txunder)
2597                         seq_printf(m, " txunder:%d", info->icount.txunder);
2598                 if (info->icount.txabort)
2599                         seq_printf(m, " txabort:%d", info->icount.txabort);
2600                 if (info->icount.rxshort)
2601                         seq_printf(m, " rxshort:%d", info->icount.rxshort);
2602                 if (info->icount.rxlong)
2603                         seq_printf(m, " rxlong:%d", info->icount.rxlong);
2604                 if (info->icount.rxover)
2605                         seq_printf(m, " rxover:%d", info->icount.rxover);
2606                 if (info->icount.rxcrc)
2607                         seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2608         } else {
2609                 seq_printf(m, " ASYNC tx:%d rx:%d",
2610                               info->icount.tx, info->icount.rx);
2611                 if (info->icount.frame)
2612                         seq_printf(m, " fe:%d", info->icount.frame);
2613                 if (info->icount.parity)
2614                         seq_printf(m, " pe:%d", info->icount.parity);
2615                 if (info->icount.brk)
2616                         seq_printf(m, " brk:%d", info->icount.brk);
2617                 if (info->icount.overrun)
2618                         seq_printf(m, " oe:%d", info->icount.overrun);
2619         }
2620
2621         /* Append serial signal status to end */
2622         seq_printf(m, " %s\n", stat_buf+1);
2623
2624         seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2625                        info->tx_active,info->bh_requested,info->bh_running,
2626                        info->pending_bh);
2627 }
2628
2629 /* Called to print information about devices
2630  */
2631 static int mgslpc_proc_show(struct seq_file *m, void *v)
2632 {
2633         MGSLPC_INFO *info;
2634
2635         seq_printf(m, "synclink driver:%s\n", driver_version);
2636
2637         info = mgslpc_device_list;
2638         while( info ) {
2639                 line_info(m, info);
2640                 info = info->next_device;
2641         }
2642         return 0;
2643 }
2644
2645 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2646 {
2647         return single_open(file, mgslpc_proc_show, NULL);
2648 }
2649
2650 static const struct file_operations mgslpc_proc_fops = {
2651         .owner          = THIS_MODULE,
2652         .open           = mgslpc_proc_open,
2653         .read           = seq_read,
2654         .llseek         = seq_lseek,
2655         .release        = single_release,
2656 };
2657
2658 static int rx_alloc_buffers(MGSLPC_INFO *info)
2659 {
2660         /* each buffer has header and data */
2661         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2662
2663         /* calculate total allocation size for 8 buffers */
2664         info->rx_buf_total_size = info->rx_buf_size * 8;
2665
2666         /* limit total allocated memory */
2667         if (info->rx_buf_total_size > 0x10000)
2668                 info->rx_buf_total_size = 0x10000;
2669
2670         /* calculate number of buffers */
2671         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2672
2673         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2674         if (info->rx_buf == NULL)
2675                 return -ENOMEM;
2676
2677         rx_reset_buffers(info);
2678         return 0;
2679 }
2680
2681 static void rx_free_buffers(MGSLPC_INFO *info)
2682 {
2683         kfree(info->rx_buf);
2684         info->rx_buf = NULL;
2685 }
2686
2687 static int claim_resources(MGSLPC_INFO *info)
2688 {
2689         if (rx_alloc_buffers(info) < 0 ) {
2690                 printk( "Can't allocate rx buffer %s\n", info->device_name);
2691                 release_resources(info);
2692                 return -ENODEV;
2693         }
2694         return 0;
2695 }
2696
2697 static void release_resources(MGSLPC_INFO *info)
2698 {
2699         if (debug_level >= DEBUG_LEVEL_INFO)
2700                 printk("release_resources(%s)\n", info->device_name);
2701         rx_free_buffers(info);
2702 }
2703
2704 /* Add the specified device instance data structure to the
2705  * global linked list of devices and increment the device count.
2706  *
2707  * Arguments:           info    pointer to device instance data
2708  */
2709 static void mgslpc_add_device(MGSLPC_INFO *info)
2710 {
2711         info->next_device = NULL;
2712         info->line = mgslpc_device_count;
2713         sprintf(info->device_name,"ttySLP%d",info->line);
2714
2715         if (info->line < MAX_DEVICE_COUNT) {
2716                 if (maxframe[info->line])
2717                         info->max_frame_size = maxframe[info->line];
2718         }
2719
2720         mgslpc_device_count++;
2721
2722         if (!mgslpc_device_list)
2723                 mgslpc_device_list = info;
2724         else {
2725                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2726                 while( current_dev->next_device )
2727                         current_dev = current_dev->next_device;
2728                 current_dev->next_device = info;
2729         }
2730
2731         if (info->max_frame_size < 4096)
2732                 info->max_frame_size = 4096;
2733         else if (info->max_frame_size > 65535)
2734                 info->max_frame_size = 65535;
2735
2736         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2737                 info->device_name, info->io_base, info->irq_level);
2738
2739 #if SYNCLINK_GENERIC_HDLC
2740         hdlcdev_init(info);
2741 #endif
2742         tty_port_register_device(&info->port, serial_driver, info->line,
2743                         &info->p_dev->dev);
2744 }
2745
2746 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2747 {
2748         MGSLPC_INFO *info = mgslpc_device_list;
2749         MGSLPC_INFO *last = NULL;
2750
2751         while(info) {
2752                 if (info == remove_info) {
2753                         if (last)
2754                                 last->next_device = info->next_device;
2755                         else
2756                                 mgslpc_device_list = info->next_device;
2757                         tty_unregister_device(serial_driver, info->line);
2758 #if SYNCLINK_GENERIC_HDLC
2759                         hdlcdev_exit(info);
2760 #endif
2761                         release_resources(info);
2762                         tty_port_destroy(&info->port);
2763                         kfree(info);
2764                         mgslpc_device_count--;
2765                         return;
2766                 }
2767                 last = info;
2768                 info = info->next_device;
2769         }
2770 }
2771
2772 static const struct pcmcia_device_id mgslpc_ids[] = {
2773         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2774         PCMCIA_DEVICE_NULL
2775 };
2776 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2777
2778 static struct pcmcia_driver mgslpc_driver = {
2779         .owner          = THIS_MODULE,
2780         .name           = "synclink_cs",
2781         .probe          = mgslpc_probe,
2782         .remove         = mgslpc_detach,
2783         .id_table       = mgslpc_ids,
2784         .suspend        = mgslpc_suspend,
2785         .resume         = mgslpc_resume,
2786 };
2787
2788 static const struct tty_operations mgslpc_ops = {
2789         .open = mgslpc_open,
2790         .close = mgslpc_close,
2791         .write = mgslpc_write,
2792         .put_char = mgslpc_put_char,
2793         .flush_chars = mgslpc_flush_chars,
2794         .write_room = mgslpc_write_room,
2795         .chars_in_buffer = mgslpc_chars_in_buffer,
2796         .flush_buffer = mgslpc_flush_buffer,
2797         .ioctl = mgslpc_ioctl,
2798         .throttle = mgslpc_throttle,
2799         .unthrottle = mgslpc_unthrottle,
2800         .send_xchar = mgslpc_send_xchar,
2801         .break_ctl = mgslpc_break,
2802         .wait_until_sent = mgslpc_wait_until_sent,
2803         .set_termios = mgslpc_set_termios,
2804         .stop = tx_pause,
2805         .start = tx_release,
2806         .hangup = mgslpc_hangup,
2807         .tiocmget = tiocmget,
2808         .tiocmset = tiocmset,
2809         .get_icount = mgslpc_get_icount,
2810         .proc_fops = &mgslpc_proc_fops,
2811 };
2812
2813 static int __init synclink_cs_init(void)
2814 {
2815         int rc;
2816
2817         if (break_on_load) {
2818                 mgslpc_get_text_ptr();
2819                 BREAKPOINT();
2820         }
2821
2822         serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2823                         TTY_DRIVER_REAL_RAW |
2824                         TTY_DRIVER_DYNAMIC_DEV);
2825         if (IS_ERR(serial_driver)) {
2826                 rc = PTR_ERR(serial_driver);
2827                 goto err;
2828         }
2829
2830         /* Initialize the tty_driver structure */
2831         serial_driver->driver_name = "synclink_cs";
2832         serial_driver->name = "ttySLP";
2833         serial_driver->major = ttymajor;
2834         serial_driver->minor_start = 64;
2835         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2836         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2837         serial_driver->init_termios = tty_std_termios;
2838         serial_driver->init_termios.c_cflag =
2839         B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2840         tty_set_operations(serial_driver, &mgslpc_ops);
2841
2842         rc = tty_register_driver(serial_driver);
2843         if (rc < 0) {
2844                 printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2845                                 __FILE__, __LINE__);
2846                 goto err_put_tty;
2847         }
2848
2849         rc = pcmcia_register_driver(&mgslpc_driver);
2850         if (rc < 0)
2851                 goto err_unreg_tty;
2852
2853         printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2854                         serial_driver->major);
2855
2856         return 0;
2857 err_unreg_tty:
2858         tty_unregister_driver(serial_driver);
2859 err_put_tty:
2860         put_tty_driver(serial_driver);
2861 err:
2862         return rc;
2863 }
2864
2865 static void __exit synclink_cs_exit(void)
2866 {
2867         pcmcia_unregister_driver(&mgslpc_driver);
2868         tty_unregister_driver(serial_driver);
2869         put_tty_driver(serial_driver);
2870 }
2871
2872 module_init(synclink_cs_init);
2873 module_exit(synclink_cs_exit);
2874
2875 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2876 {
2877         unsigned int M, N;
2878         unsigned char val;
2879
2880         /* note:standard BRG mode is broken in V3.2 chip
2881          * so enhanced mode is always used
2882          */
2883
2884         if (rate) {
2885                 N = 3686400 / rate;
2886                 if (!N)
2887                         N = 1;
2888                 N >>= 1;
2889                 for (M = 1; N > 64 && M < 16; M++)
2890                         N >>= 1;
2891                 N--;
2892
2893                 /* BGR[5..0] = N
2894                  * BGR[9..6] = M
2895                  * BGR[7..0] contained in BGR register
2896                  * BGR[9..8] contained in CCR2[7..6]
2897                  * divisor = (N+1)*2^M
2898                  *
2899                  * Note: M *must* not be zero (causes asymetric duty cycle)
2900                  */
2901                 write_reg(info, (unsigned char) (channel + BGR),
2902                                   (unsigned char) ((M << 6) + N));
2903                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2904                 val |= ((M << 4) & 0xc0);
2905                 write_reg(info, (unsigned char) (channel + CCR2), val);
2906         }
2907 }
2908
2909 /* Enabled the AUX clock output at the specified frequency.
2910  */
2911 static void enable_auxclk(MGSLPC_INFO *info)
2912 {
2913         unsigned char val;
2914
2915         /* MODE
2916          *
2917          * 07..06  MDS[1..0] 10 = transparent HDLC mode
2918          * 05      ADM Address Mode, 0 = no addr recognition
2919          * 04      TMD Timer Mode, 0 = external
2920          * 03      RAC Receiver Active, 0 = inactive
2921          * 02      RTS 0=RTS active during xmit, 1=RTS always active
2922          * 01      TRS Timer Resolution, 1=512
2923          * 00      TLP Test Loop, 0 = no loop
2924          *
2925          * 1000 0010
2926          */
2927         val = 0x82;
2928
2929         /* channel B RTS is used to enable AUXCLK driver on SP505 */
2930         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2931                 val |= BIT2;
2932         write_reg(info, CHB + MODE, val);
2933
2934         /* CCR0
2935          *
2936          * 07      PU Power Up, 1=active, 0=power down
2937          * 06      MCE Master Clock Enable, 1=enabled
2938          * 05      Reserved, 0
2939          * 04..02  SC[2..0] Encoding
2940          * 01..00  SM[1..0] Serial Mode, 00=HDLC
2941          *
2942          * 11000000
2943          */
2944         write_reg(info, CHB + CCR0, 0xc0);
2945
2946         /* CCR1
2947          *
2948          * 07      SFLG Shared Flag, 0 = disable shared flags
2949          * 06      GALP Go Active On Loop, 0 = not used
2950          * 05      GLP Go On Loop, 0 = not used
2951          * 04      ODS Output Driver Select, 1=TxD is push-pull output
2952          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
2953          * 02..00  CM[2..0] Clock Mode
2954          *
2955          * 0001 0111
2956          */
2957         write_reg(info, CHB + CCR1, 0x17);
2958
2959         /* CCR2 (Channel B)
2960          *
2961          * 07..06  BGR[9..8] Baud rate bits 9..8
2962          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
2963          * 04      SSEL Clock source select, 1=submode b
2964          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
2965          * 02      RWX Read/Write Exchange 0=disabled
2966          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
2967          * 00      DIV, data inversion 0=disabled, 1=enabled
2968          *
2969          * 0011 1000
2970          */
2971         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2972                 write_reg(info, CHB + CCR2, 0x38);
2973         else
2974                 write_reg(info, CHB + CCR2, 0x30);
2975
2976         /* CCR4
2977          *
2978          * 07      MCK4 Master Clock Divide by 4, 1=enabled
2979          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2980          * 05      TST1 Test Pin, 0=normal operation
2981          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
2982          * 03..02  Reserved, must be 0
2983          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
2984          *
2985          * 0101 0000
2986          */
2987         write_reg(info, CHB + CCR4, 0x50);
2988
2989         /* if auxclk not enabled, set internal BRG so
2990          * CTS transitions can be detected (requires TxC)
2991          */
2992         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2993                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
2994         else
2995                 mgslpc_set_rate(info, CHB, 921600);
2996 }
2997
2998 static void loopback_enable(MGSLPC_INFO *info)
2999 {
3000         unsigned char val;
3001
3002         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3003         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3004         write_reg(info, CHA + CCR1, val);
3005
3006         /* CCR2:04 SSEL Clock source select, 1=submode b */
3007         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3008         write_reg(info, CHA + CCR2, val);
3009
3010         /* set LinkSpeed if available, otherwise default to 2Mbps */
3011         if (info->params.clock_speed)
3012                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3013         else
3014                 mgslpc_set_rate(info, CHA, 1843200);
3015
3016         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3017         val = read_reg(info, CHA + MODE) | BIT0;
3018         write_reg(info, CHA + MODE, val);
3019 }
3020
3021 static void hdlc_mode(MGSLPC_INFO *info)
3022 {
3023         unsigned char val;
3024         unsigned char clkmode, clksubmode;
3025
3026         /* disable all interrupts */
3027         irq_disable(info, CHA, 0xffff);
3028         irq_disable(info, CHB, 0xffff);
3029         port_irq_disable(info, 0xff);
3030
3031         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3032         clkmode = clksubmode = 0;
3033         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3034             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3035                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3036                 clkmode = 7;
3037         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3038                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3039                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3040                 clkmode = 7;
3041                 clksubmode = 1;
3042         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3043                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3044                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3045                         clkmode = 6;
3046                         clksubmode = 1;
3047                 } else {
3048                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3049                         clkmode = 6;
3050                 }
3051         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3052                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3053                 clksubmode = 1;
3054         }
3055
3056         /* MODE
3057          *
3058          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3059          * 05      ADM Address Mode, 0 = no addr recognition
3060          * 04      TMD Timer Mode, 0 = external
3061          * 03      RAC Receiver Active, 0 = inactive
3062          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3063          * 01      TRS Timer Resolution, 1=512
3064          * 00      TLP Test Loop, 0 = no loop
3065          *
3066          * 1000 0010
3067          */
3068         val = 0x82;
3069         if (info->params.loopback)
3070                 val |= BIT0;
3071
3072         /* preserve RTS state */
3073         if (info->serial_signals & SerialSignal_RTS)
3074                 val |= BIT2;
3075         write_reg(info, CHA + MODE, val);
3076
3077         /* CCR0
3078          *
3079          * 07      PU Power Up, 1=active, 0=power down
3080          * 06      MCE Master Clock Enable, 1=enabled
3081          * 05      Reserved, 0
3082          * 04..02  SC[2..0] Encoding
3083          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3084          *
3085          * 11000000
3086          */
3087         val = 0xc0;
3088         switch (info->params.encoding)
3089         {
3090         case HDLC_ENCODING_NRZI:
3091                 val |= BIT3;
3092                 break;
3093         case HDLC_ENCODING_BIPHASE_SPACE:
3094                 val |= BIT4;
3095                 break;          // FM0
3096         case HDLC_ENCODING_BIPHASE_MARK:
3097                 val |= BIT4 + BIT2;
3098                 break;          // FM1
3099         case HDLC_ENCODING_BIPHASE_LEVEL:
3100                 val |= BIT4 + BIT3;
3101                 break;          // Manchester
3102         }
3103         write_reg(info, CHA + CCR0, val);
3104
3105         /* CCR1
3106          *
3107          * 07      SFLG Shared Flag, 0 = disable shared flags
3108          * 06      GALP Go Active On Loop, 0 = not used
3109          * 05      GLP Go On Loop, 0 = not used
3110          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3111          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3112          * 02..00  CM[2..0] Clock Mode
3113          *
3114          * 0001 0000
3115          */
3116         val = 0x10 + clkmode;
3117         write_reg(info, CHA + CCR1, val);
3118
3119         /* CCR2
3120          *
3121          * 07..06  BGR[9..8] Baud rate bits 9..8
3122          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3123          * 04      SSEL Clock source select, 1=submode b
3124          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3125          * 02      RWX Read/Write Exchange 0=disabled
3126          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3127          * 00      DIV, data inversion 0=disabled, 1=enabled
3128          *
3129          * 0000 0000
3130          */
3131         val = 0x00;
3132         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3133             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3134                 val |= BIT5;
3135         if (clksubmode)
3136                 val |= BIT4;
3137         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3138                 val |= BIT1;
3139         if (info->params.encoding == HDLC_ENCODING_NRZB)
3140                 val |= BIT0;
3141         write_reg(info, CHA + CCR2, val);
3142
3143         /* CCR3
3144          *
3145          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3146          * 05      EPT Enable preamble transmission, 1=enabled
3147          * 04      RADD Receive address pushed to FIFO, 0=disabled
3148          * 03      CRL CRC Reset Level, 0=FFFF
3149          * 02      RCRC Rx CRC 0=On 1=Off
3150          * 01      TCRC Tx CRC 0=On 1=Off
3151          * 00      PSD DPLL Phase Shift Disable
3152          *
3153          * 0000 0000
3154          */
3155         val = 0x00;
3156         if (info->params.crc_type == HDLC_CRC_NONE)
3157                 val |= BIT2 + BIT1;
3158         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3159                 val |= BIT5;
3160         switch (info->params.preamble_length)
3161         {
3162         case HDLC_PREAMBLE_LENGTH_16BITS:
3163                 val |= BIT6;
3164                 break;
3165         case HDLC_PREAMBLE_LENGTH_32BITS:
3166                 val |= BIT6;
3167                 break;
3168         case HDLC_PREAMBLE_LENGTH_64BITS:
3169                 val |= BIT7 + BIT6;
3170                 break;
3171         }
3172         write_reg(info, CHA + CCR3, val);
3173
3174         /* PRE - Preamble pattern */
3175         val = 0;
3176         switch (info->params.preamble)
3177         {
3178         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3179         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3180         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3181         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3182         }
3183         write_reg(info, CHA + PRE, val);
3184
3185         /* CCR4
3186          *
3187          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3188          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3189          * 05      TST1 Test Pin, 0=normal operation
3190          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3191          * 03..02  Reserved, must be 0
3192          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3193          *
3194          * 0101 0000
3195          */
3196         val = 0x50;
3197         write_reg(info, CHA + CCR4, val);
3198         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3199                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3200         else
3201                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3202
3203         /* RLCR Receive length check register
3204          *
3205          * 7     1=enable receive length check
3206          * 6..0  Max frame length = (RL + 1) * 32
3207          */
3208         write_reg(info, CHA + RLCR, 0);
3209
3210         /* XBCH Transmit Byte Count High
3211          *
3212          * 07      DMA mode, 0 = interrupt driven
3213          * 06      NRM, 0=ABM (ignored)
3214          * 05      CAS Carrier Auto Start
3215          * 04      XC Transmit Continuously (ignored)
3216          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3217          *
3218          * 0000 0000
3219          */
3220         val = 0x00;
3221         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3222                 val |= BIT5;
3223         write_reg(info, CHA + XBCH, val);
3224         enable_auxclk(info);
3225         if (info->params.loopback || info->testing_irq)
3226                 loopback_enable(info);
3227         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3228         {
3229                 irq_enable(info, CHB, IRQ_CTS);
3230                 /* PVR[3] 1=AUTO CTS active */
3231                 set_reg_bits(info, CHA + PVR, BIT3);
3232         } else
3233                 clear_reg_bits(info, CHA + PVR, BIT3);
3234
3235         irq_enable(info, CHA,
3236                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3237                          IRQ_UNDERRUN + IRQ_TXFIFO);
3238         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3239         wait_command_complete(info, CHA);
3240         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3241
3242         /* Master clock mode enabled above to allow reset commands
3243          * to complete even if no data clocks are present.
3244          *
3245          * Disable master clock mode for normal communications because
3246          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3247          * IRQ when in master clock mode.
3248          *
3249          * Leave master clock mode enabled for IRQ test because the
3250          * timer IRQ used by the test can only happen in master clock mode.
3251          */
3252         if (!info->testing_irq)
3253                 clear_reg_bits(info, CHA + CCR0, BIT6);
3254
3255         tx_set_idle(info);
3256
3257         tx_stop(info);
3258         rx_stop(info);
3259 }
3260
3261 static void rx_stop(MGSLPC_INFO *info)
3262 {
3263         if (debug_level >= DEBUG_LEVEL_ISR)
3264                 printk("%s(%d):rx_stop(%s)\n",
3265                          __FILE__,__LINE__, info->device_name );
3266
3267         /* MODE:03 RAC Receiver Active, 0=inactive */
3268         clear_reg_bits(info, CHA + MODE, BIT3);
3269
3270         info->rx_enabled = false;
3271         info->rx_overflow = false;
3272 }
3273
3274 static void rx_start(MGSLPC_INFO *info)
3275 {
3276         if (debug_level >= DEBUG_LEVEL_ISR)
3277                 printk("%s(%d):rx_start(%s)\n",
3278                          __FILE__,__LINE__, info->device_name );
3279
3280         rx_reset_buffers(info);
3281         info->rx_enabled = false;
3282         info->rx_overflow = false;
3283
3284         /* MODE:03 RAC Receiver Active, 1=active */
3285         set_reg_bits(info, CHA + MODE, BIT3);
3286
3287         info->rx_enabled = true;
3288 }
3289
3290 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3291 {
3292         if (debug_level >= DEBUG_LEVEL_ISR)
3293                 printk("%s(%d):tx_start(%s)\n",
3294                          __FILE__,__LINE__, info->device_name );
3295
3296         if (info->tx_count) {
3297                 /* If auto RTS enabled and RTS is inactive, then assert */
3298                 /* RTS and set a flag indicating that the driver should */
3299                 /* negate RTS when the transmission completes. */
3300                 info->drop_rts_on_tx_done = false;
3301
3302                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3303                         get_signals(info);
3304                         if (!(info->serial_signals & SerialSignal_RTS)) {
3305                                 info->serial_signals |= SerialSignal_RTS;
3306                                 set_signals(info);
3307                                 info->drop_rts_on_tx_done = true;
3308                         }
3309                 }
3310
3311                 if (info->params.mode == MGSL_MODE_ASYNC) {
3312                         if (!info->tx_active) {
3313                                 info->tx_active = true;
3314                                 tx_ready(info, tty);
3315                         }
3316                 } else {
3317                         info->tx_active = true;
3318                         tx_ready(info, tty);
3319                         mod_timer(&info->tx_timer, jiffies +
3320                                         msecs_to_jiffies(5000));
3321                 }
3322         }
3323
3324         if (!info->tx_enabled)
3325                 info->tx_enabled = true;
3326 }
3327
3328 static void tx_stop(MGSLPC_INFO *info)
3329 {
3330         if (debug_level >= DEBUG_LEVEL_ISR)
3331                 printk("%s(%d):tx_stop(%s)\n",
3332                          __FILE__,__LINE__, info->device_name );
3333
3334         del_timer(&info->tx_timer);
3335
3336         info->tx_enabled = false;
3337         info->tx_active = false;
3338 }
3339
3340 /* Reset the adapter to a known state and prepare it for further use.
3341  */
3342 static void reset_device(MGSLPC_INFO *info)
3343 {
3344         /* power up both channels (set BIT7) */
3345         write_reg(info, CHA + CCR0, 0x80);
3346         write_reg(info, CHB + CCR0, 0x80);
3347         write_reg(info, CHA + MODE, 0);
3348         write_reg(info, CHB + MODE, 0);
3349
3350         /* disable all interrupts */
3351         irq_disable(info, CHA, 0xffff);
3352         irq_disable(info, CHB, 0xffff);
3353         port_irq_disable(info, 0xff);
3354
3355         /* PCR Port Configuration Register
3356          *
3357          * 07..04  DEC[3..0] Serial I/F select outputs
3358          * 03      output, 1=AUTO CTS control enabled
3359          * 02      RI Ring Indicator input 0=active
3360          * 01      DSR input 0=active
3361          * 00      DTR output 0=active
3362          *
3363          * 0000 0110
3364          */
3365         write_reg(info, PCR, 0x06);
3366
3367         /* PVR Port Value Register
3368          *
3369          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3370          * 03      AUTO CTS output 1=enabled
3371          * 02      RI Ring Indicator input
3372          * 01      DSR input
3373          * 00      DTR output (1=inactive)
3374          *
3375          * 0000 0001
3376          */
3377 //      write_reg(info, PVR, PVR_DTR);
3378
3379         /* IPC Interrupt Port Configuration
3380          *
3381          * 07      VIS 1=Masked interrupts visible
3382          * 06..05  Reserved, 0
3383          * 04..03  SLA Slave address, 00 ignored
3384          * 02      CASM Cascading Mode, 1=daisy chain
3385          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3386          *
3387          * 0000 0101
3388          */
3389         write_reg(info, IPC, 0x05);
3390 }
3391
3392 static void async_mode(MGSLPC_INFO *info)
3393 {
3394         unsigned char val;
3395
3396         /* disable all interrupts */
3397         irq_disable(info, CHA, 0xffff);
3398         irq_disable(info, CHB, 0xffff);
3399         port_irq_disable(info, 0xff);
3400
3401         /* MODE
3402          *
3403          * 07      Reserved, 0
3404          * 06      FRTS RTS State, 0=active
3405          * 05      FCTS Flow Control on CTS
3406          * 04      FLON Flow Control Enable
3407          * 03      RAC Receiver Active, 0 = inactive
3408          * 02      RTS 0=Auto RTS, 1=manual RTS
3409          * 01      TRS Timer Resolution, 1=512
3410          * 00      TLP Test Loop, 0 = no loop
3411          *
3412          * 0000 0110
3413          */
3414         val = 0x06;
3415         if (info->params.loopback)
3416                 val |= BIT0;
3417
3418         /* preserve RTS state */
3419         if (!(info->serial_signals & SerialSignal_RTS))
3420                 val |= BIT6;
3421         write_reg(info, CHA + MODE, val);
3422
3423         /* CCR0
3424          *
3425          * 07      PU Power Up, 1=active, 0=power down
3426          * 06      MCE Master Clock Enable, 1=enabled
3427          * 05      Reserved, 0
3428          * 04..02  SC[2..0] Encoding, 000=NRZ
3429          * 01..00  SM[1..0] Serial Mode, 11=Async
3430          *
3431          * 1000 0011
3432          */
3433         write_reg(info, CHA + CCR0, 0x83);
3434
3435         /* CCR1
3436          *
3437          * 07..05  Reserved, 0
3438          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3439          * 03      BCR Bit Clock Rate, 1=16x
3440          * 02..00  CM[2..0] Clock Mode, 111=BRG
3441          *
3442          * 0001 1111
3443          */
3444         write_reg(info, CHA + CCR1, 0x1f);
3445
3446         /* CCR2 (channel A)
3447          *
3448          * 07..06  BGR[9..8] Baud rate bits 9..8
3449          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3450          * 04      SSEL Clock source select, 1=submode b
3451          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3452          * 02      RWX Read/Write Exchange 0=disabled
3453          * 01      Reserved, 0
3454          * 00      DIV, data inversion 0=disabled, 1=enabled
3455          *
3456          * 0001 0000
3457          */
3458         write_reg(info, CHA + CCR2, 0x10);
3459
3460         /* CCR3
3461          *
3462          * 07..01  Reserved, 0
3463          * 00      PSD DPLL Phase Shift Disable
3464          *
3465          * 0000 0000
3466          */
3467         write_reg(info, CHA + CCR3, 0);
3468
3469         /* CCR4
3470          *
3471          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3472          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3473          * 05      TST1 Test Pin, 0=normal operation
3474          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3475          * 03..00  Reserved, must be 0
3476          *
3477          * 0101 0000
3478          */
3479         write_reg(info, CHA + CCR4, 0x50);
3480         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3481
3482         /* DAFO Data Format
3483          *
3484          * 07      Reserved, 0
3485          * 06      XBRK transmit break, 0=normal operation
3486          * 05      Stop bits (0=1, 1=2)
3487          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3488          * 02      PAREN Parity Enable
3489          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3490          *
3491          */
3492         val = 0x00;
3493         if (info->params.data_bits != 8)
3494                 val |= BIT0;    /* 7 bits */
3495         if (info->params.stop_bits != 1)
3496                 val |= BIT5;
3497         if (info->params.parity != ASYNC_PARITY_NONE)
3498         {
3499                 val |= BIT2;    /* Parity enable */
3500                 if (info->params.parity == ASYNC_PARITY_ODD)
3501                         val |= BIT3;
3502                 else
3503                         val |= BIT4;
3504         }
3505         write_reg(info, CHA + DAFO, val);
3506
3507         /* RFC Rx FIFO Control
3508          *
3509          * 07      Reserved, 0
3510          * 06      DPS, 1=parity bit not stored in data byte
3511          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3512          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3513          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3514          * 01      Reserved, 0
3515          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3516          *
3517          * 0101 1100
3518          */
3519         write_reg(info, CHA + RFC, 0x5c);
3520
3521         /* RLCR Receive length check register
3522          *
3523          * Max frame length = (RL + 1) * 32
3524          */
3525         write_reg(info, CHA + RLCR, 0);
3526
3527         /* XBCH Transmit Byte Count High
3528          *
3529          * 07      DMA mode, 0 = interrupt driven
3530          * 06      NRM, 0=ABM (ignored)
3531          * 05      CAS Carrier Auto Start
3532          * 04      XC Transmit Continuously (ignored)
3533          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3534          *
3535          * 0000 0000
3536          */
3537         val = 0x00;
3538         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3539                 val |= BIT5;
3540         write_reg(info, CHA + XBCH, val);
3541         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3542                 irq_enable(info, CHA, IRQ_CTS);
3543
3544         /* MODE:03 RAC Receiver Active, 1=active */
3545         set_reg_bits(info, CHA + MODE, BIT3);
3546         enable_auxclk(info);
3547         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3548                 irq_enable(info, CHB, IRQ_CTS);
3549                 /* PVR[3] 1=AUTO CTS active */
3550                 set_reg_bits(info, CHA + PVR, BIT3);
3551         } else
3552                 clear_reg_bits(info, CHA + PVR, BIT3);
3553         irq_enable(info, CHA,
3554                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3555                           IRQ_ALLSENT + IRQ_TXFIFO);
3556         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3557         wait_command_complete(info, CHA);
3558         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3559 }
3560
3561 /* Set the HDLC idle mode for the transmitter.
3562  */
3563 static void tx_set_idle(MGSLPC_INFO *info)
3564 {
3565         /* Note: ESCC2 only supports flags and one idle modes */
3566         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3567                 set_reg_bits(info, CHA + CCR1, BIT3);
3568         else
3569                 clear_reg_bits(info, CHA + CCR1, BIT3);
3570 }
3571
3572 /* get state of the V24 status (input) signals.
3573  */
3574 static void get_signals(MGSLPC_INFO *info)
3575 {
3576         unsigned char status = 0;
3577
3578         /* preserve DTR and RTS */
3579         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3580
3581         if (read_reg(info, CHB + VSTR) & BIT7)
3582                 info->serial_signals |= SerialSignal_DCD;
3583         if (read_reg(info, CHB + STAR) & BIT1)
3584                 info->serial_signals |= SerialSignal_CTS;
3585
3586         status = read_reg(info, CHA + PVR);
3587         if (!(status & PVR_RI))
3588                 info->serial_signals |= SerialSignal_RI;
3589         if (!(status & PVR_DSR))
3590                 info->serial_signals |= SerialSignal_DSR;
3591 }
3592
3593 /* Set the state of DTR and RTS based on contents of
3594  * serial_signals member of device extension.
3595  */
3596 static void set_signals(MGSLPC_INFO *info)
3597 {
3598         unsigned char val;
3599
3600         val = read_reg(info, CHA + MODE);
3601         if (info->params.mode == MGSL_MODE_ASYNC) {
3602                 if (info->serial_signals & SerialSignal_RTS)
3603                         val &= ~BIT6;
3604                 else
3605                         val |= BIT6;
3606         } else {
3607                 if (info->serial_signals & SerialSignal_RTS)
3608                         val |= BIT2;
3609                 else
3610                         val &= ~BIT2;
3611         }
3612         write_reg(info, CHA + MODE, val);
3613
3614         if (info->serial_signals & SerialSignal_DTR)
3615                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3616         else
3617                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3618 }
3619
3620 static void rx_reset_buffers(MGSLPC_INFO *info)
3621 {
3622         RXBUF *buf;
3623         int i;
3624
3625         info->rx_put = 0;
3626         info->rx_get = 0;
3627         info->rx_frame_count = 0;
3628         for (i=0 ; i < info->rx_buf_count ; i++) {
3629                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3630                 buf->status = buf->count = 0;
3631         }
3632 }
3633
3634 /* Attempt to return a received HDLC frame
3635  * Only frames received without errors are returned.
3636  *
3637  * Returns true if frame returned, otherwise false
3638  */
3639 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3640 {
3641         unsigned short status;
3642         RXBUF *buf;
3643         unsigned int framesize = 0;
3644         unsigned long flags;
3645         bool return_frame = false;
3646
3647         if (info->rx_frame_count == 0)
3648                 return false;
3649
3650         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3651
3652         status = buf->status;
3653
3654         /* 07  VFR  1=valid frame
3655          * 06  RDO  1=data overrun
3656          * 05  CRC  1=OK, 0=error
3657          * 04  RAB  1=frame aborted
3658          */
3659         if ((status & 0xf0) != 0xA0) {
3660                 if (!(status & BIT7) || (status & BIT4))
3661                         info->icount.rxabort++;
3662                 else if (status & BIT6)
3663                         info->icount.rxover++;
3664                 else if (!(status & BIT5)) {
3665                         info->icount.rxcrc++;
3666                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3667                                 return_frame = true;
3668                 }
3669                 framesize = 0;
3670 #if SYNCLINK_GENERIC_HDLC
3671                 {
3672                         info->netdev->stats.rx_errors++;
3673                         info->netdev->stats.rx_frame_errors++;
3674                 }
3675 #endif
3676         } else
3677                 return_frame = true;
3678
3679         if (return_frame)
3680                 framesize = buf->count;
3681
3682         if (debug_level >= DEBUG_LEVEL_BH)
3683                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3684                         __FILE__,__LINE__,info->device_name,status,framesize);
3685
3686         if (debug_level >= DEBUG_LEVEL_DATA)
3687                 trace_block(info, buf->data, framesize, 0);
3688
3689         if (framesize) {
3690                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3691                       framesize+1 > info->max_frame_size) ||
3692                     framesize > info->max_frame_size)
3693                         info->icount.rxlong++;
3694                 else {
3695                         if (status & BIT5)
3696                                 info->icount.rxok++;
3697
3698                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3699                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3700                                 ++framesize;
3701                         }
3702
3703 #if SYNCLINK_GENERIC_HDLC
3704                         if (info->netcount)
3705                                 hdlcdev_rx(info, buf->data, framesize);
3706                         else
3707 #endif
3708                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3709                 }
3710         }
3711
3712         spin_lock_irqsave(&info->lock,flags);
3713         buf->status = buf->count = 0;
3714         info->rx_frame_count--;
3715         info->rx_get++;
3716         if (info->rx_get >= info->rx_buf_count)
3717                 info->rx_get = 0;
3718         spin_unlock_irqrestore(&info->lock,flags);
3719
3720         return true;
3721 }
3722
3723 static bool register_test(MGSLPC_INFO *info)
3724 {
3725         static unsigned char patterns[] =
3726             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3727         static unsigned int count = ARRAY_SIZE(patterns);
3728         unsigned int i;
3729         bool rc = true;
3730         unsigned long flags;
3731
3732         spin_lock_irqsave(&info->lock,flags);
3733         reset_device(info);
3734
3735         for (i = 0; i < count; i++) {
3736                 write_reg(info, XAD1, patterns[i]);
3737                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3738                 if ((read_reg(info, XAD1) != patterns[i]) ||
3739                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3740                         rc = false;
3741                         break;
3742                 }
3743         }
3744
3745         spin_unlock_irqrestore(&info->lock,flags);
3746         return rc;
3747 }
3748
3749 static bool irq_test(MGSLPC_INFO *info)
3750 {
3751         unsigned long end_time;
3752         unsigned long flags;
3753
3754         spin_lock_irqsave(&info->lock,flags);
3755         reset_device(info);
3756
3757         info->testing_irq = true;
3758         hdlc_mode(info);
3759
3760         info->irq_occurred = false;
3761
3762         /* init hdlc mode */
3763
3764         irq_enable(info, CHA, IRQ_TIMER);
3765         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3766         issue_command(info, CHA, CMD_START_TIMER);
3767
3768         spin_unlock_irqrestore(&info->lock,flags);
3769
3770         end_time=100;
3771         while(end_time-- && !info->irq_occurred) {
3772                 msleep_interruptible(10);
3773         }
3774
3775         info->testing_irq = false;
3776
3777         spin_lock_irqsave(&info->lock,flags);
3778         reset_device(info);
3779         spin_unlock_irqrestore(&info->lock,flags);
3780
3781         return info->irq_occurred;
3782 }
3783
3784 static int adapter_test(MGSLPC_INFO *info)
3785 {
3786         if (!register_test(info)) {
3787                 info->init_error = DiagStatus_AddressFailure;
3788                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3789                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3790                 return -ENODEV;
3791         }
3792
3793         if (!irq_test(info)) {
3794                 info->init_error = DiagStatus_IrqFailure;
3795                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3796                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3797                 return -ENODEV;
3798         }
3799
3800         if (debug_level >= DEBUG_LEVEL_INFO)
3801                 printk("%s(%d):device %s passed diagnostics\n",
3802                         __FILE__,__LINE__,info->device_name);
3803         return 0;
3804 }
3805
3806 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3807 {
3808         int i;
3809         int linecount;
3810         if (xmit)
3811                 printk("%s tx data:\n",info->device_name);
3812         else
3813                 printk("%s rx data:\n",info->device_name);
3814
3815         while(count) {
3816                 if (count > 16)
3817                         linecount = 16;
3818                 else
3819                         linecount = count;
3820
3821                 for(i=0;i<linecount;i++)
3822                         printk("%02X ",(unsigned char)data[i]);
3823                 for(;i<17;i++)
3824                         printk("   ");
3825                 for(i=0;i<linecount;i++) {
3826                         if (data[i]>=040 && data[i]<=0176)
3827                                 printk("%c",data[i]);
3828                         else
3829                                 printk(".");
3830                 }
3831                 printk("\n");
3832
3833                 data  += linecount;
3834                 count -= linecount;
3835         }
3836 }
3837
3838 /* HDLC frame time out
3839  * update stats and do tx completion processing
3840  */
3841 static void tx_timeout(unsigned long context)
3842 {
3843         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3844         unsigned long flags;
3845
3846         if ( debug_level >= DEBUG_LEVEL_INFO )
3847                 printk( "%s(%d):tx_timeout(%s)\n",
3848                         __FILE__,__LINE__,info->device_name);
3849         if(info->tx_active &&
3850            info->params.mode == MGSL_MODE_HDLC) {
3851                 info->icount.txtimeout++;
3852         }
3853         spin_lock_irqsave(&info->lock,flags);
3854         info->tx_active = false;
3855         info->tx_count = info->tx_put = info->tx_get = 0;
3856
3857         spin_unlock_irqrestore(&info->lock,flags);
3858
3859 #if SYNCLINK_GENERIC_HDLC
3860         if (info->netcount)
3861                 hdlcdev_tx_done(info);
3862         else
3863 #endif
3864         {
3865                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3866                 bh_transmit(info, tty);
3867                 tty_kref_put(tty);
3868         }
3869 }
3870
3871 #if SYNCLINK_GENERIC_HDLC
3872
3873 /**
3874  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3875  * set encoding and frame check sequence (FCS) options
3876  *
3877  * dev       pointer to network device structure
3878  * encoding  serial encoding setting
3879  * parity    FCS setting
3880  *
3881  * returns 0 if success, otherwise error code
3882  */
3883 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3884                           unsigned short parity)
3885 {
3886         MGSLPC_INFO *info = dev_to_port(dev);
3887         struct tty_struct *tty;
3888         unsigned char  new_encoding;
3889         unsigned short new_crctype;
3890
3891         /* return error if TTY interface open */
3892         if (info->port.count)
3893                 return -EBUSY;
3894
3895         switch (encoding)
3896         {
3897         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3898         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3899         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3900         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3901         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3902         default: return -EINVAL;
3903         }
3904
3905         switch (parity)
3906         {
3907         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3908         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3909         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3910         default: return -EINVAL;
3911         }
3912
3913         info->params.encoding = new_encoding;
3914         info->params.crc_type = new_crctype;
3915
3916         /* if network interface up, reprogram hardware */
3917         if (info->netcount) {
3918                 tty = tty_port_tty_get(&info->port);
3919                 mgslpc_program_hw(info, tty);
3920                 tty_kref_put(tty);
3921         }
3922
3923         return 0;
3924 }
3925
3926 /**
3927  * called by generic HDLC layer to send frame
3928  *
3929  * skb  socket buffer containing HDLC frame
3930  * dev  pointer to network device structure
3931  */
3932 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3933                                       struct net_device *dev)
3934 {
3935         MGSLPC_INFO *info = dev_to_port(dev);
3936         unsigned long flags;
3937
3938         if (debug_level >= DEBUG_LEVEL_INFO)
3939                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
3940
3941         /* stop sending until this frame completes */
3942         netif_stop_queue(dev);
3943
3944         /* copy data to device buffers */
3945         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3946         info->tx_get = 0;
3947         info->tx_put = info->tx_count = skb->len;
3948
3949         /* update network statistics */
3950         dev->stats.tx_packets++;
3951         dev->stats.tx_bytes += skb->len;
3952
3953         /* done with socket buffer, so free it */
3954         dev_kfree_skb(skb);
3955
3956         /* save start time for transmit timeout detection */
3957         dev->trans_start = jiffies;
3958
3959         /* start hardware transmitter if necessary */
3960         spin_lock_irqsave(&info->lock,flags);
3961         if (!info->tx_active) {
3962                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3963                 tx_start(info, tty);
3964                 tty_kref_put(tty);
3965         }
3966         spin_unlock_irqrestore(&info->lock,flags);
3967
3968         return NETDEV_TX_OK;
3969 }
3970
3971 /**
3972  * called by network layer when interface enabled
3973  * claim resources and initialize hardware
3974  *
3975  * dev  pointer to network device structure
3976  *
3977  * returns 0 if success, otherwise error code
3978  */
3979 static int hdlcdev_open(struct net_device *dev)
3980 {
3981         MGSLPC_INFO *info = dev_to_port(dev);
3982         struct tty_struct *tty;
3983         int rc;
3984         unsigned long flags;
3985
3986         if (debug_level >= DEBUG_LEVEL_INFO)
3987                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
3988
3989         /* generic HDLC layer open processing */
3990         if ((rc = hdlc_open(dev)))
3991                 return rc;
3992
3993         /* arbitrate between network and tty opens */
3994         spin_lock_irqsave(&info->netlock, flags);
3995         if (info->port.count != 0 || info->netcount != 0) {
3996                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3997                 spin_unlock_irqrestore(&info->netlock, flags);
3998                 return -EBUSY;
3999         }
4000         info->netcount=1;
4001         spin_unlock_irqrestore(&info->netlock, flags);
4002
4003         tty = tty_port_tty_get(&info->port);
4004         /* claim resources and init adapter */
4005         if ((rc = startup(info, tty)) != 0) {
4006                 tty_kref_put(tty);
4007                 spin_lock_irqsave(&info->netlock, flags);
4008                 info->netcount=0;
4009                 spin_unlock_irqrestore(&info->netlock, flags);
4010                 return rc;
4011         }
4012         /* assert DTR and RTS, apply hardware settings */
4013         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4014         mgslpc_program_hw(info, tty);
4015         tty_kref_put(tty);
4016
4017         /* enable network layer transmit */
4018         dev->trans_start = jiffies;
4019         netif_start_queue(dev);
4020
4021         /* inform generic HDLC layer of current DCD status */
4022         spin_lock_irqsave(&info->lock, flags);
4023         get_signals(info);
4024         spin_unlock_irqrestore(&info->lock, flags);
4025         if (info->serial_signals & SerialSignal_DCD)
4026                 netif_carrier_on(dev);
4027         else
4028                 netif_carrier_off(dev);
4029         return 0;
4030 }
4031
4032 /**
4033  * called by network layer when interface is disabled
4034  * shutdown hardware and release resources
4035  *
4036  * dev  pointer to network device structure
4037  *
4038  * returns 0 if success, otherwise error code
4039  */
4040 static int hdlcdev_close(struct net_device *dev)
4041 {
4042         MGSLPC_INFO *info = dev_to_port(dev);
4043         struct tty_struct *tty = tty_port_tty_get(&info->port);
4044         unsigned long flags;
4045
4046         if (debug_level >= DEBUG_LEVEL_INFO)
4047                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4048
4049         netif_stop_queue(dev);
4050
4051         /* shutdown adapter and release resources */
4052         shutdown(info, tty);
4053         tty_kref_put(tty);
4054         hdlc_close(dev);
4055
4056         spin_lock_irqsave(&info->netlock, flags);
4057         info->netcount=0;
4058         spin_unlock_irqrestore(&info->netlock, flags);
4059
4060         return 0;
4061 }
4062
4063 /**
4064  * called by network layer to process IOCTL call to network device
4065  *
4066  * dev  pointer to network device structure
4067  * ifr  pointer to network interface request structure
4068  * cmd  IOCTL command code
4069  *
4070  * returns 0 if success, otherwise error code
4071  */
4072 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4073 {
4074         const size_t size = sizeof(sync_serial_settings);
4075         sync_serial_settings new_line;
4076         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4077         MGSLPC_INFO *info = dev_to_port(dev);
4078         unsigned int flags;
4079
4080         if (debug_level >= DEBUG_LEVEL_INFO)
4081                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4082
4083         /* return error if TTY interface open */
4084         if (info->port.count)
4085                 return -EBUSY;
4086
4087         if (cmd != SIOCWANDEV)
4088                 return hdlc_ioctl(dev, ifr, cmd);
4089
4090         memset(&new_line, 0, size);
4091
4092         switch(ifr->ifr_settings.type) {
4093         case IF_GET_IFACE: /* return current sync_serial_settings */
4094
4095                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4096                 if (ifr->ifr_settings.size < size) {
4097                         ifr->ifr_settings.size = size; /* data size wanted */
4098                         return -ENOBUFS;
4099                 }
4100
4101                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4102                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4103                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4104                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4105
4106                 switch (flags){
4107                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4108                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4109                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4110                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4111                 default: new_line.clock_type = CLOCK_DEFAULT;
4112                 }
4113
4114                 new_line.clock_rate = info->params.clock_speed;
4115                 new_line.loopback   = info->params.loopback ? 1:0;
4116
4117                 if (copy_to_user(line, &new_line, size))
4118                         return -EFAULT;
4119                 return 0;
4120
4121         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4122
4123                 if(!capable(CAP_NET_ADMIN))
4124                         return -EPERM;
4125                 if (copy_from_user(&new_line, line, size))
4126                         return -EFAULT;
4127
4128                 switch (new_line.clock_type)
4129                 {
4130                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4131                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4132                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4133                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4134                 case CLOCK_DEFAULT:  flags = info->params.flags &
4135                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4136                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4137                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4138                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4139                 default: return -EINVAL;
4140                 }
4141
4142                 if (new_line.loopback != 0 && new_line.loopback != 1)
4143                         return -EINVAL;
4144
4145                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4146                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4147                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4148                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4149                 info->params.flags |= flags;
4150
4151                 info->params.loopback = new_line.loopback;
4152
4153                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4154                         info->params.clock_speed = new_line.clock_rate;
4155                 else
4156                         info->params.clock_speed = 0;
4157
4158                 /* if network interface up, reprogram hardware */
4159                 if (info->netcount) {
4160                         struct tty_struct *tty = tty_port_tty_get(&info->port);
4161                         mgslpc_program_hw(info, tty);
4162                         tty_kref_put(tty);
4163                 }
4164                 return 0;
4165
4166         default:
4167                 return hdlc_ioctl(dev, ifr, cmd);
4168         }
4169 }
4170
4171 /**
4172  * called by network layer when transmit timeout is detected
4173  *
4174  * dev  pointer to network device structure
4175  */
4176 static void hdlcdev_tx_timeout(struct net_device *dev)
4177 {
4178         MGSLPC_INFO *info = dev_to_port(dev);
4179         unsigned long flags;
4180
4181         if (debug_level >= DEBUG_LEVEL_INFO)
4182                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4183
4184         dev->stats.tx_errors++;
4185         dev->stats.tx_aborted_errors++;
4186
4187         spin_lock_irqsave(&info->lock,flags);
4188         tx_stop(info);
4189         spin_unlock_irqrestore(&info->lock,flags);
4190
4191         netif_wake_queue(dev);
4192 }
4193
4194 /**
4195  * called by device driver when transmit completes
4196  * reenable network layer transmit if stopped
4197  *
4198  * info  pointer to device instance information
4199  */
4200 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4201 {
4202         if (netif_queue_stopped(info->netdev))
4203                 netif_wake_queue(info->netdev);
4204 }
4205
4206 /**
4207  * called by device driver when frame received
4208  * pass frame to network layer
4209  *
4210  * info  pointer to device instance information
4211  * buf   pointer to buffer contianing frame data
4212  * size  count of data bytes in buf
4213  */
4214 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4215 {
4216         struct sk_buff *skb = dev_alloc_skb(size);
4217         struct net_device *dev = info->netdev;
4218
4219         if (debug_level >= DEBUG_LEVEL_INFO)
4220                 printk("hdlcdev_rx(%s)\n",dev->name);
4221
4222         if (skb == NULL) {
4223                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4224                 dev->stats.rx_dropped++;
4225                 return;
4226         }
4227
4228         memcpy(skb_put(skb, size), buf, size);
4229
4230         skb->protocol = hdlc_type_trans(skb, dev);
4231
4232         dev->stats.rx_packets++;
4233         dev->stats.rx_bytes += size;
4234
4235         netif_rx(skb);
4236 }
4237
4238 static const struct net_device_ops hdlcdev_ops = {
4239         .ndo_open       = hdlcdev_open,
4240         .ndo_stop       = hdlcdev_close,
4241         .ndo_change_mtu = hdlc_change_mtu,
4242         .ndo_start_xmit = hdlc_start_xmit,
4243         .ndo_do_ioctl   = hdlcdev_ioctl,
4244         .ndo_tx_timeout = hdlcdev_tx_timeout,
4245 };
4246
4247 /**
4248  * called by device driver when adding device instance
4249  * do generic HDLC initialization
4250  *
4251  * info  pointer to device instance information
4252  *
4253  * returns 0 if success, otherwise error code
4254  */
4255 static int hdlcdev_init(MGSLPC_INFO *info)
4256 {
4257         int rc;
4258         struct net_device *dev;
4259         hdlc_device *hdlc;
4260
4261         /* allocate and initialize network and HDLC layer objects */
4262
4263         if (!(dev = alloc_hdlcdev(info))) {
4264                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4265                 return -ENOMEM;
4266         }
4267
4268         /* for network layer reporting purposes only */
4269         dev->base_addr = info->io_base;
4270         dev->irq       = info->irq_level;
4271
4272         /* network layer callbacks and settings */
4273         dev->netdev_ops     = &hdlcdev_ops;
4274         dev->watchdog_timeo = 10 * HZ;
4275         dev->tx_queue_len   = 50;
4276
4277         /* generic HDLC layer callbacks and settings */
4278         hdlc         = dev_to_hdlc(dev);
4279         hdlc->attach = hdlcdev_attach;
4280         hdlc->xmit   = hdlcdev_xmit;
4281
4282         /* register objects with HDLC layer */
4283         if ((rc = register_hdlc_device(dev))) {
4284                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4285                 free_netdev(dev);
4286                 return rc;
4287         }
4288
4289         info->netdev = dev;
4290         return 0;
4291 }
4292
4293 /**
4294  * called by device driver when removing device instance
4295  * do generic HDLC cleanup
4296  *
4297  * info  pointer to device instance information
4298  */
4299 static void hdlcdev_exit(MGSLPC_INFO *info)
4300 {
4301         unregister_hdlc_device(info->netdev);
4302         free_netdev(info->netdev);
4303         info->netdev = NULL;
4304 }
4305
4306 #endif /* CONFIG_HDLC */
4307