drivers/cpufreq/cpufreq-dt.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * Copyright (C) 2014 Linaro.
   5  * Viresh Kumar <viresh.kumar@linaro.org>
   6  *
   7  * The OPP code in function set_target() is reused from
   8  * drivers/cpufreq/omap-cpufreq.c
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  16
  17 #include <linux/clk.h>
  18 #include <linux/cpu.h>
  19 #include <linux/cpu_cooling.h>
  20 #include <linux/cpufreq.h>
  21 #include <linux/cpufreq-dt.h>
  22 #include <linux/cpumask.h>
  23 #include <linux/err.h>
  24 #include <linux/module.h>
  25 #include <linux/of.h>
  26 #include <linux/pm_opp.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/regulator/consumer.h>
  29 #include <linux/slab.h>
  30 #include <linux/thermal.h>
  31
  32 struct private_data {
  33         struct device *cpu_dev;
  34         struct regulator *cpu_reg;
  35         struct thermal_cooling_device *cdev;
  36         unsigned int voltage_tolerance; /* in percentage */
  37 };
  38
  39 static int set_target(struct cpufreq_policy *policy, unsigned int index)
  40 {
  41         struct dev_pm_opp *opp;
  42         struct cpufreq_frequency_table *freq_table = policy->freq_table;
  43         struct clk *cpu_clk = policy->clk;
  44         struct private_data *priv = policy->driver_data;
  45         struct device *cpu_dev = priv->cpu_dev;
  46         struct regulator *cpu_reg = priv->cpu_reg;
  47         unsigned long volt = 0, volt_old = 0, tol = 0;
  48         unsigned int old_freq, new_freq;
  49         long freq_Hz, freq_exact;
  50         int ret;
  51
  52         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  53         if (freq_Hz <= 0)
  54                 freq_Hz = freq_table[index].frequency * 1000;
  55
  56         freq_exact = freq_Hz;
  57         new_freq = freq_Hz / 1000;
  58         old_freq = clk_get_rate(cpu_clk) / 1000;
  59
  60         if (!IS_ERR(cpu_reg)) {
  61                 rcu_read_lock();
  62                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  63                 if (IS_ERR(opp)) {
  64                         rcu_read_unlock();
  65                         dev_err(cpu_dev, "failed to find OPP for %ld\n",
  66                                 freq_Hz);
  67                         return PTR_ERR(opp);
  68                 }
  69                 volt = dev_pm_opp_get_voltage(opp);
  70                 rcu_read_unlock();
  71                 tol = volt * priv->voltage_tolerance / 100;
  72                 volt_old = regulator_get_voltage(cpu_reg);
  73         }
  74
  75         dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
  76                 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
  77                 new_freq / 1000, volt ? volt / 1000 : -1);
  78
  79         /* scaling up?  scale voltage before frequency */
  80         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  81                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  82                 if (ret) {
  83                         dev_err(cpu_dev, "failed to scale voltage up: %d\n",
  84                                 ret);
  85                         return ret;
  86                 }
  87         }
  88
  89         ret = clk_set_rate(cpu_clk, freq_exact);
  90         if (ret) {
  91                 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
  92                 if (!IS_ERR(cpu_reg))
  93                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  94                 return ret;
  95         }
  96
  97         /* scaling down?  scale voltage after frequency */
  98         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  99                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 100                 if (ret) {
 101                         dev_err(cpu_dev, "failed to scale voltage down: %d\n",
 102                                 ret);
 103                         clk_set_rate(cpu_clk, old_freq * 1000);
 104                 }
 105         }
 106
 107         return ret;
 108 }
 109
 110 static int allocate_resources(int cpu, struct device **cdev,
 111                               struct regulator **creg, struct clk **cclk)
 112 {
 113         struct device *cpu_dev;
 114         struct regulator *cpu_reg;
 115         struct clk *cpu_clk;
 116         int ret = 0;
 117         char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
 118
 119         cpu_dev = get_cpu_device(cpu);
 120         if (!cpu_dev) {
 121                 pr_err("failed to get cpu%d device\n", cpu);
 122                 return -ENODEV;
 123         }
 124
 125         /* Try "cpu0" for older DTs */
 126         if (!cpu)
 127                 reg = reg_cpu0;
 128         else
 129                 reg = reg_cpu;
 130
 131 try_again:
 132         cpu_reg = regulator_get_optional(cpu_dev, reg);
 133         if (IS_ERR(cpu_reg)) {
 134                 /*
 135                  * If cpu's regulator supply node is present, but regulator is
 136                  * not yet registered, we should try defering probe.
 137                  */
 138                 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 139                         dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
 140                                 cpu);
 141                         return -EPROBE_DEFER;
 142                 }
 143
 144                 /* Try with "cpu-supply" */
 145                 if (reg == reg_cpu0) {
 146                         reg = reg_cpu;
 147                         goto try_again;
 148                 }
 149
 150                 dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
 151                         cpu, PTR_ERR(cpu_reg));
 152         }
 153
 154         cpu_clk = clk_get(cpu_dev, NULL);
 155         if (IS_ERR(cpu_clk)) {
 156                 /* put regulator */
 157                 if (!IS_ERR(cpu_reg))
 158                         regulator_put(cpu_reg);
 159
 160                 ret = PTR_ERR(cpu_clk);
 161
 162                 /*
 163                  * If cpu's clk node is present, but clock is not yet
 164                  * registered, we should try defering probe.
 165                  */
 166                 if (ret == -EPROBE_DEFER)
 167                         dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
 168                 else
 169                         dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", ret,
 170                                 cpu);
 171         } else {
 172                 *cdev = cpu_dev;
 173                 *creg = cpu_reg;
 174                 *cclk = cpu_clk;
 175         }
 176
 177         return ret;
 178 }
 179
 180 static int cpufreq_init(struct cpufreq_policy *policy)
 181 {
 182         struct cpufreq_dt_platform_data *pd;
 183         struct cpufreq_frequency_table *freq_table;
 184         struct thermal_cooling_device *cdev;
 185         struct device_node *np;
 186         struct private_data *priv;
 187         struct device *cpu_dev;
 188         struct regulator *cpu_reg;
 189         struct clk *cpu_clk;
 190         unsigned int transition_latency;
 191         int ret;
 192
 193         ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
 194         if (ret) {
 195                 pr_err("%s: Failed to allocate resources\n: %d", __func__, ret);
 196                 return ret;
 197         }
 198
 199         np = of_node_get(cpu_dev->of_node);
 200         if (!np) {
 201                 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
 202                 ret = -ENOENT;
 203                 goto out_put_reg_clk;
 204         }
 205
 206         /* OPPs might be populated at runtime, don't check for error here */
 207         of_init_opp_table(cpu_dev);
 208
 209         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
 210         if (ret) {
 211                 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
 212                 goto out_put_node;
 213         }
 214
 215         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 216         if (!priv) {
 217                 ret = -ENOMEM;
 218                 goto out_free_table;
 219         }
 220
 221         of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
 222
 223         if (of_property_read_u32(np, "clock-latency", &transition_latency))
 224                 transition_latency = CPUFREQ_ETERNAL;
 225
 226         if (!IS_ERR(cpu_reg)) {
 227                 struct dev_pm_opp *opp;
 228                 unsigned long min_uV, max_uV;
 229                 int i;
 230
 231                 /*
 232                  * OPP is maintained in order of increasing frequency, and
 233                  * freq_table initialised from OPP is therefore sorted in the
 234                  * same order.
 235                  */
 236                 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 237                         ;
 238                 rcu_read_lock();
 239                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 240                                 freq_table[0].frequency * 1000, true);
 241                 min_uV = dev_pm_opp_get_voltage(opp);
 242                 opp = dev_pm_opp_find_freq_exact(cpu_dev,
 243                                 freq_table[i-1].frequency * 1000, true);
 244                 max_uV = dev_pm_opp_get_voltage(opp);
 245                 rcu_read_unlock();
 246                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 247                 if (ret > 0)
 248                         transition_latency += ret * 1000;
 249         }
 250
 251         /*
 252          * For now, just loading the cooling device;
 253          * thermal DT code takes care of matching them.
 254          */
 255         if (of_find_property(np, "#cooling-cells", NULL)) {
 256                 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
 257                 if (IS_ERR(cdev))
 258                         dev_err(cpu_dev,
 259                                 "running cpufreq without cooling device: %ld\n",
 260                                 PTR_ERR(cdev));
 261                 else
 262                         priv->cdev = cdev;
 263         }
 264
 265         priv->cpu_dev = cpu_dev;
 266         priv->cpu_reg = cpu_reg;
 267         policy->driver_data = priv;
 268
 269         policy->clk = cpu_clk;
 270         ret = cpufreq_table_validate_and_show(policy, freq_table);
 271         if (ret) {
 272                 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
 273                         ret);
 274                 goto out_cooling_unregister;
 275         }
 276
 277         policy->cpuinfo.transition_latency = transition_latency;
 278
 279         pd = cpufreq_get_driver_data();
 280         if (pd && !pd->independent_clocks)
 281                 cpumask_setall(policy->cpus);
 282
 283         of_node_put(np);
 284
 285         return 0;
 286
 287 out_cooling_unregister:
 288         cpufreq_cooling_unregister(priv->cdev);
 289         kfree(priv);
 290 out_free_table:
 291         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 292 out_put_node:
 293         of_node_put(np);
 294 out_put_reg_clk:
 295         clk_put(cpu_clk);
 296         if (!IS_ERR(cpu_reg))
 297                 regulator_put(cpu_reg);
 298
 299         return ret;
 300 }
 301
 302 static int cpufreq_exit(struct cpufreq_policy *policy)
 303 {
 304         struct private_data *priv = policy->driver_data;
 305
 306         cpufreq_cooling_unregister(priv->cdev);
 307         dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
 308         clk_put(policy->clk);
 309         if (!IS_ERR(priv->cpu_reg))
 310                 regulator_put(priv->cpu_reg);
 311         kfree(priv);
 312
 313         return 0;
 314 }
 315
 316 static struct cpufreq_driver dt_cpufreq_driver = {
 317         .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
 318         .verify = cpufreq_generic_frequency_table_verify,
 319         .target_index = set_target,
 320         .get = cpufreq_generic_get,
 321         .init = cpufreq_init,
 322         .exit = cpufreq_exit,
 323         .name = "cpufreq-dt",
 324         .attr = cpufreq_generic_attr,
 325 };
 326
 327 static int dt_cpufreq_probe(struct platform_device *pdev)
 328 {
 329         struct device *cpu_dev;
 330         struct regulator *cpu_reg;
 331         struct clk *cpu_clk;
 332         int ret;
 333
 334         /*
 335          * All per-cluster (CPUs sharing clock/voltages) initialization is done
 336          * from ->init(). In probe(), we just need to make sure that clk and
 337          * regulators are available. Else defer probe and retry.
 338          *
 339          * FIXME: Is checking this only for CPU0 sufficient ?
 340          */
 341         ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
 342         if (ret)
 343                 return ret;
 344
 345         clk_put(cpu_clk);
 346         if (!IS_ERR(cpu_reg))
 347                 regulator_put(cpu_reg);
 348
 349         dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
 350
 351         ret = cpufreq_register_driver(&dt_cpufreq_driver);
 352         if (ret)
 353                 dev_err(cpu_dev, "failed register driver: %d\n", ret);
 354
 355         return ret;
 356 }
 357
 358 static int dt_cpufreq_remove(struct platform_device *pdev)
 359 {
 360         cpufreq_unregister_driver(&dt_cpufreq_driver);
 361         return 0;
 362 }
 363
 364 static struct platform_driver dt_cpufreq_platdrv = {
 365         .driver = {
 366                 .name   = "cpufreq-dt",
 367                 .owner  = THIS_MODULE,
 368         },
 369         .probe          = dt_cpufreq_probe,
 370         .remove         = dt_cpufreq_remove,
 371 };
 372 module_platform_driver(dt_cpufreq_platdrv);
 373
 374 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
 375 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 376 MODULE_DESCRIPTION("Generic cpufreq driver");
 377 MODULE_LICENSE("GPL");