3 bool "Hardware crypto devices"
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
9 If you say N, all options in this submenu will be skipped and disabled.
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
31 Use VIA PadLock for AES algorithm.
33 Available in VIA C3 and newer CPUs.
35 If unsure say M. The compiled module will be
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
45 Use VIA PadLock for SHA1/SHA256 algorithms.
47 Available in VIA C7 and newer processors.
49 If unsure say M. The compiled module will be
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
56 select CRYPTO_BLKCIPHER
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
65 tristate "Support for PCI-attached cryptographic adapters"
69 Select this option if you want to use a PCI-attached cryptographic
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
79 config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
87 It is available as of z990.
89 config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
97 It is available as of z9.
99 config CRYPTO_SHA512_S390
100 tristate "SHA384 and SHA512 digest algorithm"
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
107 It is available as of z10.
109 config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
113 select CRYPTO_BLKCIPHER
116 This is the s390 hardware accelerated implementation of the
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
122 config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
126 select CRYPTO_BLKCIPHER
128 This is the s390 hardware accelerated implementation of the
129 AES cipher algorithms (FIPS-197).
131 As of z9 the ECB and CBC modes are hardware accelerated
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
140 tristate "Pseudo random number generator device driver"
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
150 It is available as of z9.
152 config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
160 It is available as of z196.
162 config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
166 select CRYPTO_BLKCIPHER
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
174 Currently the driver supports AES in ECB and CBC mode without DMA.
176 config CRYPTO_DEV_MARVELL_CESA
177 tristate "New Marvell's Cryptographic Engine driver"
178 depends on PLAT_ORION || ARCH_MVEBU
181 select CRYPTO_BLKCIPHER
185 This driver allows you to utilize the Cryptographic Engines and
186 Security Accelerator (CESA) which can be found on the Armada 370.
187 This driver supports CPU offload through DMA transfers.
189 This driver is aimed at replacing the mv_cesa driver. This will only
190 happen once it has received proper testing.
192 config CRYPTO_DEV_NIAGARA2
193 tristate "Niagara2 Stream Processing Unit driver"
195 select CRYPTO_BLKCIPHER
199 Each core of a Niagara2 processor contains a Stream
200 Processing Unit, which itself contains several cryptographic
201 sub-units. One set provides the Modular Arithmetic Unit,
202 used for SSL offload. The other set provides the Cipher
203 Group, which can perform encryption, decryption, hashing,
204 checksumming, and raw copies.
206 config CRYPTO_DEV_HIFN_795X
207 tristate "Driver HIFN 795x crypto accelerator chips"
209 select CRYPTO_BLKCIPHER
210 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
212 depends on !ARCH_DMA_ADDR_T_64BIT
214 This option allows you to have support for HIFN 795x crypto adapters.
216 config CRYPTO_DEV_HIFN_795X_RNG
217 bool "HIFN 795x random number generator"
218 depends on CRYPTO_DEV_HIFN_795X
220 Select this option if you want to enable the random number generator
221 on the HIFN 795x crypto adapters.
223 source drivers/crypto/caam/Kconfig
225 config CRYPTO_DEV_TALITOS
226 tristate "Talitos Freescale Security Engine (SEC)"
228 select CRYPTO_AUTHENC
229 select CRYPTO_BLKCIPHER
234 Say 'Y' here to use the Freescale Security Engine (SEC)
235 to offload cryptographic algorithm computation.
237 The Freescale SEC is present on PowerQUICC 'E' processors, such
238 as the MPC8349E and MPC8548E.
240 To compile this driver as a module, choose M here: the module
241 will be called talitos.
243 config CRYPTO_DEV_TALITOS1
244 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
245 depends on CRYPTO_DEV_TALITOS
246 depends on PPC_8xx || PPC_82xx
249 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
250 found on MPC82xx or the Freescale Security Engine (SEC Lite)
251 version 1.2 found on MPC8xx
253 config CRYPTO_DEV_TALITOS2
254 bool "SEC2+ (SEC version 2.0 or upper)"
255 depends on CRYPTO_DEV_TALITOS
256 default y if !PPC_8xx
258 Say 'Y' here to use the Freescale Security Engine (SEC)
259 version 2 and following as found on MPC83xx, MPC85xx, etc ...
261 config CRYPTO_DEV_IXP4XX
262 tristate "Driver for IXP4xx crypto hardware acceleration"
263 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
266 select CRYPTO_AUTHENC
267 select CRYPTO_BLKCIPHER
269 Driver for the IXP4xx NPE crypto engine.
271 config CRYPTO_DEV_PPC4XX
272 tristate "Driver AMCC PPC4xx crypto accelerator"
273 depends on PPC && 4xx
275 select CRYPTO_BLKCIPHER
277 This option allows you to have support for AMCC crypto acceleration.
279 config CRYPTO_DEV_OMAP_SHAM
280 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
281 depends on ARCH_OMAP2PLUS
288 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
289 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
291 config CRYPTO_DEV_OMAP_AES
292 tristate "Support for OMAP AES hw engine"
293 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
295 select CRYPTO_BLKCIPHER
297 OMAP processors have AES module accelerator. Select this if you
298 want to use the OMAP module for AES algorithms.
300 config CRYPTO_DEV_OMAP_DES
301 tristate "Support for OMAP DES3DES hw engine"
302 depends on ARCH_OMAP2PLUS
304 select CRYPTO_BLKCIPHER
306 OMAP processors have DES/3DES module accelerator. Select this if you
307 want to use the OMAP module for DES and 3DES algorithms. Currently
308 the ECB and CBC modes of operation supported by the driver. Also
309 accesses made on unaligned boundaries are also supported.
311 config CRYPTO_DEV_PICOXCELL
312 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
313 depends on ARCH_PICOXCELL && HAVE_CLK
316 select CRYPTO_AUTHENC
317 select CRYPTO_BLKCIPHER
323 This option enables support for the hardware offload engines in the
324 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
325 and for 3gpp Layer 2 ciphering support.
327 Saying m here will build a module named pipcoxcell_crypto.
329 config CRYPTO_DEV_SAHARA
330 tristate "Support for SAHARA crypto accelerator"
331 depends on ARCH_MXC && OF
332 select CRYPTO_BLKCIPHER
336 This option enables support for the SAHARA HW crypto accelerator
337 found in some Freescale i.MX chips.
339 config CRYPTO_DEV_S5P
340 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
341 depends on ARCH_S5PV210 || ARCH_EXYNOS
343 select CRYPTO_BLKCIPHER
345 This option allows you to have support for S5P crypto acceleration.
346 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
347 algorithms execution.
350 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
353 This enables support for the NX hardware cryptographic accelerator
354 coprocessor that is in IBM PowerPC P7+ or later processors. This
355 does not actually enable any drivers, it only allows you to select
356 which acceleration type (encryption and/or compression) to enable.
359 source "drivers/crypto/nx/Kconfig"
362 config CRYPTO_DEV_UX500
363 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
364 depends on ARCH_U8500
366 Driver for ST-Ericsson UX500 crypto engine.
369 source "drivers/crypto/ux500/Kconfig"
370 endif # if CRYPTO_DEV_UX500
372 config CRYPTO_DEV_BFIN_CRC
373 tristate "Support for Blackfin CRC hardware"
376 Newer Blackfin processors have CRC hardware. Select this if you
377 want to use the Blackfin CRC module.
379 config CRYPTO_DEV_ATMEL_AES
380 tristate "Support for Atmel AES hw accelerator"
383 select CRYPTO_BLKCIPHER
386 Some Atmel processors have AES hw accelerator.
387 Select this if you want to use the Atmel module for
390 To compile this driver as a module, choose M here: the module
391 will be called atmel-aes.
393 config CRYPTO_DEV_ATMEL_TDES
394 tristate "Support for Atmel DES/TDES hw accelerator"
397 select CRYPTO_BLKCIPHER
399 Some Atmel processors have DES/TDES hw accelerator.
400 Select this if you want to use the Atmel module for
403 To compile this driver as a module, choose M here: the module
404 will be called atmel-tdes.
406 config CRYPTO_DEV_ATMEL_SHA
407 tristate "Support for Atmel SHA hw accelerator"
411 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
413 Select this if you want to use the Atmel module for
414 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
416 To compile this driver as a module, choose M here: the module
417 will be called atmel-sha.
419 config CRYPTO_DEV_CCP
420 bool "Support for AMD Cryptographic Coprocessor"
421 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
423 The AMD Cryptographic Coprocessor provides hardware support
424 for encryption, hashing and related operations.
427 source "drivers/crypto/ccp/Kconfig"
430 config CRYPTO_DEV_MXS_DCP
431 tristate "Support for Freescale MXS DCP"
436 select CRYPTO_BLKCIPHER
439 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
440 co-processor on the die.
442 To compile this driver as a module, choose M here: the module
443 will be called mxs-dcp.
445 source "drivers/crypto/qat/Kconfig"
447 config CRYPTO_DEV_QCE
448 tristate "Qualcomm crypto engine accelerator"
449 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
456 select CRYPTO_BLKCIPHER
458 This driver supports Qualcomm crypto engine accelerator
459 hardware. To compile this driver as a module, choose M here. The
460 module will be called qcrypto.
462 config CRYPTO_DEV_VMX
463 bool "Support for VMX cryptographic acceleration instructions"
464 depends on PPC64 && VSX
466 Support for VMX cryptographic acceleration instructions.
468 source "drivers/crypto/vmx/Kconfig"
470 config CRYPTO_DEV_IMGTEC_HASH
471 tristate "Imagination Technologies hardware hash accelerator"
472 depends on MIPS || COMPILE_TEST
479 This driver interfaces with the Imagination Technologies
480 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
483 config CRYPTO_DEV_SUN4I_SS
484 tristate "Support for Allwinner Security System cryptographic accelerator"
485 depends on ARCH_SUNXI
490 select CRYPTO_BLKCIPHER
492 Some Allwinner SoC have a crypto accelerator named
493 Security System. Select this if you want to use it.
494 The Security System handle AES/DES/3DES ciphers in CBC mode
495 and SHA1 and MD5 hash algorithms.
497 To compile this driver as a module, choose M here: the module
498 will be called sun4i-ss.