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1 /*
2  * Platform driver for the Synopsys DesignWare DMA Controller
3  *
4  * Copyright (C) 2007-2008 Atmel Corporation
5  * Copyright (C) 2010-2011 ST Microelectronics
6  * Copyright (C) 2013 Intel Corporation
7  *
8  * Some parts of this driver are derived from the original dw_dmac.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/clk.h>
18 #include <linux/platform_device.h>
19 #include <linux/dmaengine.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/of.h>
22 #include <linux/of_dma.h>
23 #include <linux/acpi.h>
24 #include <linux/acpi_dma.h>
25
26 #include "internal.h"
27
28 static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
29                                         struct of_dma *ofdma)
30 {
31         struct dw_dma *dw = ofdma->of_dma_data;
32         struct dw_dma_slave slave = {
33                 .dma_dev = dw->dma.dev,
34         };
35         dma_cap_mask_t cap;
36
37         if (dma_spec->args_count != 3)
38                 return NULL;
39
40         slave.src_id = dma_spec->args[0];
41         slave.dst_id = dma_spec->args[0];
42         slave.src_master = dma_spec->args[1];
43         slave.dst_master = dma_spec->args[2];
44
45         if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
46                     slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
47                     slave.src_master >= dw->nr_masters ||
48                     slave.dst_master >= dw->nr_masters))
49                 return NULL;
50
51         dma_cap_zero(cap);
52         dma_cap_set(DMA_SLAVE, cap);
53
54         /* TODO: there should be a simpler way to do this */
55         return dma_request_channel(cap, dw_dma_filter, &slave);
56 }
57
58 #ifdef CONFIG_ACPI
59 static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
60 {
61         struct acpi_dma_spec *dma_spec = param;
62         struct dw_dma_slave slave = {
63                 .dma_dev = dma_spec->dev,
64                 .src_id = dma_spec->slave_id,
65                 .dst_id = dma_spec->slave_id,
66                 .src_master = 1,
67                 .dst_master = 0,
68         };
69
70         return dw_dma_filter(chan, &slave);
71 }
72
73 static void dw_dma_acpi_controller_register(struct dw_dma *dw)
74 {
75         struct device *dev = dw->dma.dev;
76         struct acpi_dma_filter_info *info;
77         int ret;
78
79         info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
80         if (!info)
81                 return;
82
83         dma_cap_zero(info->dma_cap);
84         dma_cap_set(DMA_SLAVE, info->dma_cap);
85         info->filter_fn = dw_dma_acpi_filter;
86
87         ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
88                                                 info);
89         if (ret)
90                 dev_err(dev, "could not register acpi_dma_controller\n");
91 }
92 #else /* !CONFIG_ACPI */
93 static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
94 #endif /* !CONFIG_ACPI */
95
96 #ifdef CONFIG_OF
97 static struct dw_dma_platform_data *
98 dw_dma_parse_dt(struct platform_device *pdev)
99 {
100         struct device_node *np = pdev->dev.of_node;
101         struct dw_dma_platform_data *pdata;
102         u32 tmp, arr[4];
103
104         if (!np) {
105                 dev_err(&pdev->dev, "Missing DT data\n");
106                 return NULL;
107         }
108
109         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
110         if (!pdata)
111                 return NULL;
112
113         if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
114                 return NULL;
115
116         if (of_property_read_bool(np, "is_private"))
117                 pdata->is_private = true;
118
119         if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
120                 pdata->chan_allocation_order = (unsigned char)tmp;
121
122         if (!of_property_read_u32(np, "chan_priority", &tmp))
123                 pdata->chan_priority = tmp;
124
125         if (!of_property_read_u32(np, "block_size", &tmp))
126                 pdata->block_size = tmp;
127
128         if (!of_property_read_u32(np, "dma-masters", &tmp)) {
129                 if (tmp > 4)
130                         return NULL;
131
132                 pdata->nr_masters = tmp;
133         }
134
135         if (!of_property_read_u32_array(np, "data_width", arr,
136                                 pdata->nr_masters))
137                 for (tmp = 0; tmp < pdata->nr_masters; tmp++)
138                         pdata->data_width[tmp] = arr[tmp];
139
140         return pdata;
141 }
142 #else
143 static inline struct dw_dma_platform_data *
144 dw_dma_parse_dt(struct platform_device *pdev)
145 {
146         return NULL;
147 }
148 #endif
149
150 static int dw_probe(struct platform_device *pdev)
151 {
152         struct dw_dma_chip *chip;
153         struct device *dev = &pdev->dev;
154         struct resource *mem;
155         struct dw_dma_platform_data *pdata;
156         int err;
157
158         chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
159         if (!chip)
160                 return -ENOMEM;
161
162         chip->irq = platform_get_irq(pdev, 0);
163         if (chip->irq < 0)
164                 return chip->irq;
165
166         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
167         chip->regs = devm_ioremap_resource(dev, mem);
168         if (IS_ERR(chip->regs))
169                 return PTR_ERR(chip->regs);
170
171         err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
172         if (err)
173                 return err;
174
175         pdata = dev_get_platdata(dev);
176         if (!pdata)
177                 pdata = dw_dma_parse_dt(pdev);
178
179         chip->dev = dev;
180
181         chip->clk = devm_clk_get(chip->dev, "hclk");
182         if (IS_ERR(chip->clk))
183                 return PTR_ERR(chip->clk);
184         err = clk_prepare_enable(chip->clk);
185         if (err)
186                 return err;
187
188         err = dw_dma_probe(chip, pdata);
189         if (err)
190                 goto err_dw_dma_probe;
191
192         platform_set_drvdata(pdev, chip);
193
194         if (pdev->dev.of_node) {
195                 err = of_dma_controller_register(pdev->dev.of_node,
196                                                  dw_dma_of_xlate, chip->dw);
197                 if (err)
198                         dev_err(&pdev->dev,
199                                 "could not register of_dma_controller\n");
200         }
201
202         if (ACPI_HANDLE(&pdev->dev))
203                 dw_dma_acpi_controller_register(chip->dw);
204
205         return 0;
206
207 err_dw_dma_probe:
208         clk_disable_unprepare(chip->clk);
209         return err;
210 }
211
212 static int dw_remove(struct platform_device *pdev)
213 {
214         struct dw_dma_chip *chip = platform_get_drvdata(pdev);
215
216         if (pdev->dev.of_node)
217                 of_dma_controller_free(pdev->dev.of_node);
218
219         dw_dma_remove(chip);
220         clk_disable_unprepare(chip->clk);
221
222         return 0;
223 }
224
225 static void dw_shutdown(struct platform_device *pdev)
226 {
227         struct dw_dma_chip *chip = platform_get_drvdata(pdev);
228
229         dw_dma_disable(chip);
230         clk_disable_unprepare(chip->clk);
231 }
232
233 #ifdef CONFIG_OF
234 static const struct of_device_id dw_dma_of_id_table[] = {
235         { .compatible = "snps,dma-spear1340" },
236         {}
237 };
238 MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
239 #endif
240
241 #ifdef CONFIG_ACPI
242 static const struct acpi_device_id dw_dma_acpi_id_table[] = {
243         { "INTL9C60", 0 },
244         { }
245 };
246 MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
247 #endif
248
249 #ifdef CONFIG_PM_SLEEP
250
251 static int dw_suspend_late(struct device *dev)
252 {
253         struct platform_device *pdev = to_platform_device(dev);
254         struct dw_dma_chip *chip = platform_get_drvdata(pdev);
255
256         dw_dma_disable(chip);
257         clk_disable_unprepare(chip->clk);
258
259         return 0;
260 }
261
262 static int dw_resume_early(struct device *dev)
263 {
264         struct platform_device *pdev = to_platform_device(dev);
265         struct dw_dma_chip *chip = platform_get_drvdata(pdev);
266
267         clk_prepare_enable(chip->clk);
268         return dw_dma_enable(chip);
269 }
270
271 #endif /* CONFIG_PM_SLEEP */
272
273 static const struct dev_pm_ops dw_dev_pm_ops = {
274         SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
275 };
276
277 static struct platform_driver dw_driver = {
278         .probe          = dw_probe,
279         .remove         = dw_remove,
280         .shutdown       = dw_shutdown,
281         .driver = {
282                 .name   = "dw_dmac",
283                 .pm     = &dw_dev_pm_ops,
284                 .of_match_table = of_match_ptr(dw_dma_of_id_table),
285                 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
286         },
287 };
288
289 static int __init dw_init(void)
290 {
291         return platform_driver_register(&dw_driver);
292 }
293 subsys_initcall(dw_init);
294
295 static void __exit dw_exit(void)
296 {
297         platform_driver_unregister(&dw_driver);
298 }
299 module_exit(dw_exit);
300
301 MODULE_LICENSE("GPL v2");
302 MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");