2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/ctype.h>
29 #include <linux/edac.h>
30 #include <linux/bitops.h>
31 #include <asm/uaccess.h>
34 #include "edac_core.h"
35 #include "edac_module.h"
37 #define CREATE_TRACE_POINTS
38 #define TRACE_INCLUDE_PATH ../../include/ras
39 #include <ras/ras_event.h>
41 /* lock to memory controller's control array */
42 static DEFINE_MUTEX(mem_ctls_mutex);
43 static LIST_HEAD(mc_devices);
45 unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
48 struct mem_ctl_info *mci = dimm->mci;
52 for (i = 0; i < mci->n_layers; i++) {
53 n = snprintf(p, len, "%s %d ",
54 edac_layer_name[mci->layers[i].type],
66 #ifdef CONFIG_EDAC_DEBUG
68 static void edac_mc_dump_channel(struct rank_info *chan)
70 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx);
71 edac_dbg(4, " channel = %p\n", chan);
72 edac_dbg(4, " channel->csrow = %p\n", chan->csrow);
73 edac_dbg(4, " channel->dimm = %p\n", chan->dimm);
76 static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
80 edac_dimm_info_location(dimm, location, sizeof(location));
82 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
83 dimm->mci->mem_is_per_rank ? "rank" : "dimm",
84 number, location, dimm->csrow, dimm->cschannel);
85 edac_dbg(4, " dimm = %p\n", dimm);
86 edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
87 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
88 edac_dbg(4, " dimm->grain = %d\n", dimm->grain);
89 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
92 static void edac_mc_dump_csrow(struct csrow_info *csrow)
94 edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
95 edac_dbg(4, " csrow = %p\n", csrow);
96 edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow->first_page);
97 edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow->last_page);
98 edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow->page_mask);
99 edac_dbg(4, " csrow->nr_channels = %d\n", csrow->nr_channels);
100 edac_dbg(4, " csrow->channels = %p\n", csrow->channels);
101 edac_dbg(4, " csrow->mci = %p\n", csrow->mci);
104 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
106 edac_dbg(3, "\tmci = %p\n", mci);
107 edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
108 edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
109 edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
110 edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
111 edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
112 mci->nr_csrows, mci->csrows);
113 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
114 mci->tot_dimms, mci->dimms);
115 edac_dbg(3, "\tdev = %p\n", mci->pdev);
116 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
117 mci->mod_name, mci->ctl_name);
118 edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
121 #endif /* CONFIG_EDAC_DEBUG */
124 * keep those in sync with the enum mem_type
126 const char *edac_mem_types[] = {
128 "Reserved csrow type",
129 "Unknown csrow type",
130 "Fast page mode RAM",
131 "Extended data out RAM",
132 "Burst Extended data out RAM",
133 "Single data rate SDRAM",
134 "Registered single data rate SDRAM",
135 "Double data rate SDRAM",
136 "Registered Double data rate SDRAM",
138 "Unbuffered DDR2 RAM",
139 "Fully buffered DDR2",
140 "Registered DDR2 RAM",
142 "Unbuffered DDR3 RAM",
143 "Registered DDR3 RAM",
145 EXPORT_SYMBOL_GPL(edac_mem_types);
148 * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
149 * @p: pointer to a pointer with the memory offset to be used. At
150 * return, this will be incremented to point to the next offset
151 * @size: Size of the data structure to be reserved
152 * @n_elems: Number of elements that should be reserved
154 * If 'size' is a constant, the compiler will optimize this whole function
155 * down to either a no-op or the addition of a constant to the value of '*p'.
157 * The 'p' pointer is absolutely needed to keep the proper advancing
158 * further in memory to the proper offsets when allocating the struct along
159 * with its embedded structs, as edac_device_alloc_ctl_info() does it
160 * above, for example.
162 * At return, the pointer 'p' will be incremented to be used on a next call
165 void *edac_align_ptr(void **p, unsigned size, int n_elems)
170 *p += size * n_elems;
173 * 'p' can possibly be an unaligned item X such that sizeof(X) is
174 * 'size'. Adjust 'p' so that its alignment is at least as
175 * stringent as what the compiler would provide for X and return
176 * the aligned result.
177 * Here we assume that the alignment of a "long long" is the most
178 * stringent alignment that the compiler will ever provide by default.
179 * As far as I know, this is a reasonable assumption.
181 if (size > sizeof(long))
182 align = sizeof(long long);
183 else if (size > sizeof(int))
184 align = sizeof(long);
185 else if (size > sizeof(short))
187 else if (size > sizeof(char))
188 align = sizeof(short);
192 r = (unsigned long)p % align;
199 return (void *)(((unsigned long)ptr) + align - r);
202 static void _edac_mc_free(struct mem_ctl_info *mci)
205 struct csrow_info *csr;
206 const unsigned int tot_dimms = mci->tot_dimms;
207 const unsigned int tot_channels = mci->num_cschannel;
208 const unsigned int tot_csrows = mci->nr_csrows;
211 for (i = 0; i < tot_dimms; i++)
212 kfree(mci->dimms[i]);
216 for (row = 0; row < tot_csrows; row++) {
217 csr = mci->csrows[row];
220 for (chn = 0; chn < tot_channels; chn++)
221 kfree(csr->channels[chn]);
222 kfree(csr->channels);
233 * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure
234 * @mc_num: Memory controller number
235 * @n_layers: Number of MC hierarchy layers
236 * layers: Describes each layer as seen by the Memory Controller
237 * @size_pvt: size of private storage needed
240 * Everything is kmalloc'ed as one big chunk - more efficient.
241 * Only can be used if all structures have the same lifetime - otherwise
242 * you have to allocate and initialize your own structures.
244 * Use edac_mc_free() to free mc structures allocated by this function.
246 * NOTE: drivers handle multi-rank memories in different ways: in some
247 * drivers, one multi-rank memory stick is mapped as one entry, while, in
248 * others, a single multi-rank memory stick would be mapped into several
249 * entries. Currently, this function will allocate multiple struct dimm_info
250 * on such scenarios, as grouping the multiple ranks require drivers change.
254 * On success: struct mem_ctl_info pointer
256 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
258 struct edac_mc_layer *layers,
261 struct mem_ctl_info *mci;
262 struct edac_mc_layer *layer;
263 struct csrow_info *csr;
264 struct rank_info *chan;
265 struct dimm_info *dimm;
266 u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
267 unsigned pos[EDAC_MAX_LAYERS];
268 unsigned size, tot_dimms = 1, count = 1;
269 unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
270 void *pvt, *p, *ptr = NULL;
271 int i, j, row, chn, n, len, off;
272 bool per_rank = false;
274 BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
276 * Calculate the total amount of dimms and csrows/cschannels while
277 * in the old API emulation mode
279 for (i = 0; i < n_layers; i++) {
280 tot_dimms *= layers[i].size;
281 if (layers[i].is_virt_csrow)
282 tot_csrows *= layers[i].size;
284 tot_channels *= layers[i].size;
286 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
290 /* Figure out the offsets of the various items from the start of an mc
291 * structure. We want the alignment of each item to be at least as
292 * stringent as what the compiler would provide if we could simply
293 * hardcode everything into a single struct.
295 mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
296 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
297 for (i = 0; i < n_layers; i++) {
298 count *= layers[i].size;
299 edac_dbg(4, "errcount layer %d size %d\n", i, count);
300 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
301 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
302 tot_errcount += 2 * count;
305 edac_dbg(4, "allocating %d error counters\n", tot_errcount);
306 pvt = edac_align_ptr(&ptr, sz_pvt, 1);
307 size = ((unsigned long)pvt) + sz_pvt;
309 edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
312 per_rank ? "ranks" : "dimms",
313 tot_csrows * tot_channels);
315 mci = kzalloc(size, GFP_KERNEL);
319 /* Adjust pointers so they point within the memory we just allocated
320 * rather than an imaginary chunk of memory located at address 0.
322 layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
323 for (i = 0; i < n_layers; i++) {
324 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
325 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
327 pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
329 /* setup index and various internal pointers */
330 mci->mc_idx = mc_num;
331 mci->tot_dimms = tot_dimms;
333 mci->n_layers = n_layers;
335 memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
336 mci->nr_csrows = tot_csrows;
337 mci->num_cschannel = tot_channels;
338 mci->mem_is_per_rank = per_rank;
341 * Alocate and fill the csrow/channels structs
343 mci->csrows = kcalloc(sizeof(*mci->csrows), tot_csrows, GFP_KERNEL);
346 for (row = 0; row < tot_csrows; row++) {
347 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
350 mci->csrows[row] = csr;
351 csr->csrow_idx = row;
353 csr->nr_channels = tot_channels;
354 csr->channels = kcalloc(sizeof(*csr->channels), tot_channels,
359 for (chn = 0; chn < tot_channels; chn++) {
360 chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
363 csr->channels[chn] = chan;
364 chan->chan_idx = chn;
370 * Allocate and fill the dimm structs
372 mci->dimms = kcalloc(sizeof(*mci->dimms), tot_dimms, GFP_KERNEL);
376 memset(&pos, 0, sizeof(pos));
379 for (i = 0; i < tot_dimms; i++) {
380 chan = mci->csrows[row]->channels[chn];
381 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
382 if (off < 0 || off >= tot_dimms) {
383 edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
387 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
390 mci->dimms[off] = dimm;
394 * Copy DIMM location and initialize it.
396 len = sizeof(dimm->label);
398 n = snprintf(p, len, "mc#%u", mc_num);
401 for (j = 0; j < n_layers; j++) {
402 n = snprintf(p, len, "%s#%u",
403 edac_layer_name[layers[j].type],
407 dimm->location[j] = pos[j];
413 /* Link it to the csrows old API data */
416 dimm->cschannel = chn;
418 /* Increment csrow location */
420 if (row == tot_csrows) {
425 /* Increment dimm location */
426 for (j = n_layers - 1; j >= 0; j--) {
428 if (pos[j] < layers[j].size)
434 mci->op_state = OP_ALLOC;
443 EXPORT_SYMBOL_GPL(edac_mc_alloc);
447 * 'Free' a previously allocated 'mci' structure
448 * @mci: pointer to a struct mem_ctl_info structure
450 void edac_mc_free(struct mem_ctl_info *mci)
454 /* If we're not yet registered with sysfs free only what was allocated
455 * in edac_mc_alloc().
457 if (!device_is_registered(&mci->dev)) {
462 /* the mci instance is freed here, when the sysfs object is dropped */
463 edac_unregister_sysfs(mci);
465 EXPORT_SYMBOL_GPL(edac_mc_free);
471 * scan list of controllers looking for the one that manages
473 * @dev: pointer to a struct device related with the MCI
475 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
477 struct mem_ctl_info *mci;
478 struct list_head *item;
482 list_for_each(item, &mc_devices) {
483 mci = list_entry(item, struct mem_ctl_info, link);
485 if (mci->pdev == dev)
491 EXPORT_SYMBOL_GPL(find_mci_by_dev);
494 * handler for EDAC to check if NMI type handler has asserted interrupt
496 static int edac_mc_assert_error_check_and_clear(void)
500 if (edac_op_state == EDAC_OPSTATE_POLL)
503 old_state = edac_err_assert;
510 * edac_mc_workq_function
511 * performs the operation scheduled by a workq request
513 static void edac_mc_workq_function(struct work_struct *work_req)
515 struct delayed_work *d_work = to_delayed_work(work_req);
516 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
518 mutex_lock(&mem_ctls_mutex);
520 /* if this control struct has movd to offline state, we are done */
521 if (mci->op_state == OP_OFFLINE) {
522 mutex_unlock(&mem_ctls_mutex);
526 /* Only poll controllers that are running polled and have a check */
527 if (edac_mc_assert_error_check_and_clear() && (mci->edac_check != NULL))
528 mci->edac_check(mci);
530 mutex_unlock(&mem_ctls_mutex);
533 queue_delayed_work(edac_workqueue, &mci->work,
534 msecs_to_jiffies(edac_mc_get_poll_msec()));
538 * edac_mc_workq_setup
539 * initialize a workq item for this mci
540 * passing in the new delay period in msec
544 * called with the mem_ctls_mutex held
546 static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
550 /* if this instance is not in the POLL state, then simply return */
551 if (mci->op_state != OP_RUNNING_POLL)
554 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
555 mod_delayed_work(edac_workqueue, &mci->work, msecs_to_jiffies(msec));
559 * edac_mc_workq_teardown
560 * stop the workq processing on this mci
564 * called WITHOUT lock held
566 static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
570 if (mci->op_state != OP_RUNNING_POLL)
573 status = cancel_delayed_work(&mci->work);
575 edac_dbg(0, "not canceled, flush the queue\n");
577 /* workq instance might be running, wait for it */
578 flush_workqueue(edac_workqueue);
583 * edac_mc_reset_delay_period(unsigned long value)
585 * user space has updated our poll period value, need to
586 * reset our workq delays
588 void edac_mc_reset_delay_period(int value)
590 struct mem_ctl_info *mci;
591 struct list_head *item;
593 mutex_lock(&mem_ctls_mutex);
595 list_for_each(item, &mc_devices) {
596 mci = list_entry(item, struct mem_ctl_info, link);
598 edac_mc_workq_setup(mci, (unsigned long) value);
601 mutex_unlock(&mem_ctls_mutex);
606 /* Return 0 on success, 1 on failure.
607 * Before calling this function, caller must
608 * assign a unique value to mci->mc_idx.
612 * called with the mem_ctls_mutex lock held
614 static int add_mc_to_global_list(struct mem_ctl_info *mci)
616 struct list_head *item, *insert_before;
617 struct mem_ctl_info *p;
619 insert_before = &mc_devices;
621 p = find_mci_by_dev(mci->pdev);
622 if (unlikely(p != NULL))
625 list_for_each(item, &mc_devices) {
626 p = list_entry(item, struct mem_ctl_info, link);
628 if (p->mc_idx >= mci->mc_idx) {
629 if (unlikely(p->mc_idx == mci->mc_idx))
632 insert_before = item;
637 list_add_tail_rcu(&mci->link, insert_before);
638 atomic_inc(&edac_handlers);
642 edac_printk(KERN_WARNING, EDAC_MC,
643 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
644 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
648 edac_printk(KERN_WARNING, EDAC_MC,
649 "bug in low-level driver: attempt to assign\n"
650 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
654 static void del_mc_from_global_list(struct mem_ctl_info *mci)
656 atomic_dec(&edac_handlers);
657 list_del_rcu(&mci->link);
659 /* these are for safe removal of devices from global list while
660 * NMI handlers may be traversing list
663 INIT_LIST_HEAD(&mci->link);
667 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
669 * If found, return a pointer to the structure.
672 * Caller must hold mem_ctls_mutex.
674 struct mem_ctl_info *edac_mc_find(int idx)
676 struct list_head *item;
677 struct mem_ctl_info *mci;
679 list_for_each(item, &mc_devices) {
680 mci = list_entry(item, struct mem_ctl_info, link);
682 if (mci->mc_idx >= idx) {
683 if (mci->mc_idx == idx)
692 EXPORT_SYMBOL(edac_mc_find);
695 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
696 * create sysfs entries associated with mci structure
697 * @mci: pointer to the mci structure to be added to the list
704 /* FIXME - should a warning be printed if no error detection? correction? */
705 int edac_mc_add_mc(struct mem_ctl_info *mci)
709 #ifdef CONFIG_EDAC_DEBUG
710 if (edac_debug_level >= 3)
711 edac_mc_dump_mci(mci);
713 if (edac_debug_level >= 4) {
716 for (i = 0; i < mci->nr_csrows; i++) {
717 struct csrow_info *csrow = mci->csrows[i];
721 for (j = 0; j < csrow->nr_channels; j++)
722 nr_pages += csrow->channels[j]->dimm->nr_pages;
725 edac_mc_dump_csrow(csrow);
726 for (j = 0; j < csrow->nr_channels; j++)
727 if (csrow->channels[j]->dimm->nr_pages)
728 edac_mc_dump_channel(csrow->channels[j]);
730 for (i = 0; i < mci->tot_dimms; i++)
731 if (mci->dimms[i]->nr_pages)
732 edac_mc_dump_dimm(mci->dimms[i], i);
735 mutex_lock(&mem_ctls_mutex);
737 if (add_mc_to_global_list(mci))
740 /* set load time so that error rate can be tracked */
741 mci->start_time = jiffies;
743 if (edac_create_sysfs_mci_device(mci)) {
744 edac_mc_printk(mci, KERN_WARNING,
745 "failed to create sysfs device\n");
749 /* If there IS a check routine, then we are running POLLED */
750 if (mci->edac_check != NULL) {
751 /* This instance is NOW RUNNING */
752 mci->op_state = OP_RUNNING_POLL;
754 edac_mc_workq_setup(mci, edac_mc_get_poll_msec());
756 mci->op_state = OP_RUNNING_INTERRUPT;
759 /* Report action taken */
760 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
761 " DEV %s\n", mci->mod_name, mci->ctl_name, edac_dev_name(mci));
763 mutex_unlock(&mem_ctls_mutex);
767 del_mc_from_global_list(mci);
770 mutex_unlock(&mem_ctls_mutex);
773 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
776 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
777 * remove mci structure from global list
778 * @pdev: Pointer to 'struct device' representing mci structure to remove.
780 * Return pointer to removed mci structure, or NULL if device not found.
782 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
784 struct mem_ctl_info *mci;
788 mutex_lock(&mem_ctls_mutex);
790 /* find the requested mci struct in the global list */
791 mci = find_mci_by_dev(dev);
793 mutex_unlock(&mem_ctls_mutex);
797 del_mc_from_global_list(mci);
798 mutex_unlock(&mem_ctls_mutex);
800 /* flush workq processes */
801 edac_mc_workq_teardown(mci);
803 /* marking MCI offline */
804 mci->op_state = OP_OFFLINE;
806 /* remove from sysfs */
807 edac_remove_sysfs_mci_device(mci);
809 edac_printk(KERN_INFO, EDAC_MC,
810 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
811 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
815 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
817 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
822 unsigned long flags = 0;
826 /* ECC error page was not in our memory. Ignore it. */
827 if (!pfn_valid(page))
830 /* Find the actual page structure then map it and fix */
831 pg = pfn_to_page(page);
834 local_irq_save(flags);
836 virt_addr = kmap_atomic(pg);
838 /* Perform architecture specific atomic scrub operation */
839 atomic_scrub(virt_addr + offset, size);
841 /* Unmap and complete */
842 kunmap_atomic(virt_addr);
845 local_irq_restore(flags);
848 /* FIXME - should return -1 */
849 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
851 struct csrow_info **csrows = mci->csrows;
854 edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
857 for (i = 0; i < mci->nr_csrows; i++) {
858 struct csrow_info *csrow = csrows[i];
860 for (j = 0; j < csrow->nr_channels; j++) {
861 struct dimm_info *dimm = csrow->channels[j]->dimm;
867 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
869 csrow->first_page, page, csrow->last_page,
872 if ((page >= csrow->first_page) &&
873 (page <= csrow->last_page) &&
874 ((page & csrow->page_mask) ==
875 (csrow->first_page & csrow->page_mask))) {
882 edac_mc_printk(mci, KERN_ERR,
883 "could not look up page error address %lx\n",
884 (unsigned long)page);
888 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
890 const char *edac_layer_name[] = {
891 [EDAC_MC_LAYER_BRANCH] = "branch",
892 [EDAC_MC_LAYER_CHANNEL] = "channel",
893 [EDAC_MC_LAYER_SLOT] = "slot",
894 [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
896 EXPORT_SYMBOL_GPL(edac_layer_name);
898 static void edac_inc_ce_error(struct mem_ctl_info *mci,
899 bool enable_per_layer_report,
900 const int pos[EDAC_MAX_LAYERS],
907 if (!enable_per_layer_report) {
908 mci->ce_noinfo_count += count;
912 for (i = 0; i < mci->n_layers; i++) {
916 mci->ce_per_layer[i][index] += count;
918 if (i < mci->n_layers - 1)
919 index *= mci->layers[i + 1].size;
923 static void edac_inc_ue_error(struct mem_ctl_info *mci,
924 bool enable_per_layer_report,
925 const int pos[EDAC_MAX_LAYERS],
932 if (!enable_per_layer_report) {
933 mci->ce_noinfo_count += count;
937 for (i = 0; i < mci->n_layers; i++) {
941 mci->ue_per_layer[i][index] += count;
943 if (i < mci->n_layers - 1)
944 index *= mci->layers[i + 1].size;
948 static void edac_ce_error(struct mem_ctl_info *mci,
949 const u16 error_count,
950 const int pos[EDAC_MAX_LAYERS],
952 const char *location,
955 const char *other_detail,
956 const bool enable_per_layer_report,
957 const unsigned long page_frame_number,
958 const unsigned long offset_in_page,
961 unsigned long remapped_page;
963 if (edac_mc_get_log_ce()) {
964 if (other_detail && *other_detail)
965 edac_mc_printk(mci, KERN_WARNING,
966 "%d CE %s on %s (%s %s - %s)\n",
968 msg, label, location,
969 detail, other_detail);
971 edac_mc_printk(mci, KERN_WARNING,
972 "%d CE %s on %s (%s %s)\n",
974 msg, label, location,
977 edac_inc_ce_error(mci, enable_per_layer_report, pos, error_count);
979 if (mci->scrub_mode & SCRUB_SW_SRC) {
981 * Some memory controllers (called MCs below) can remap
982 * memory so that it is still available at a different
983 * address when PCI devices map into memory.
984 * MC's that can't do this, lose the memory where PCI
985 * devices are mapped. This mapping is MC-dependent
986 * and so we call back into the MC driver for it to
987 * map the MC page to a physical (CPU) page which can
988 * then be mapped to a virtual page - which can then
991 remapped_page = mci->ctl_page_to_phys ?
992 mci->ctl_page_to_phys(mci, page_frame_number) :
995 edac_mc_scrub_block(remapped_page,
996 offset_in_page, grain);
1000 static void edac_ue_error(struct mem_ctl_info *mci,
1001 const u16 error_count,
1002 const int pos[EDAC_MAX_LAYERS],
1004 const char *location,
1007 const char *other_detail,
1008 const bool enable_per_layer_report)
1010 if (edac_mc_get_log_ue()) {
1011 if (other_detail && *other_detail)
1012 edac_mc_printk(mci, KERN_WARNING,
1013 "%d UE %s on %s (%s %s - %s)\n",
1015 msg, label, location, detail,
1018 edac_mc_printk(mci, KERN_WARNING,
1019 "%d UE %s on %s (%s %s)\n",
1021 msg, label, location, detail);
1024 if (edac_mc_get_panic_on_ue()) {
1025 if (other_detail && *other_detail)
1026 panic("UE %s on %s (%s%s - %s)\n",
1027 msg, label, location, detail, other_detail);
1029 panic("UE %s on %s (%s%s)\n",
1030 msg, label, location, detail);
1033 edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count);
1036 #define OTHER_LABEL " or "
1039 * edac_mc_handle_error - reports a memory event to userspace
1041 * @type: severity of the error (CE/UE/Fatal)
1042 * @mci: a struct mem_ctl_info pointer
1043 * @error_count: Number of errors of the same type
1044 * @page_frame_number: mem page where the error occurred
1045 * @offset_in_page: offset of the error inside the page
1046 * @syndrome: ECC syndrome
1047 * @top_layer: Memory layer[0] position
1048 * @mid_layer: Memory layer[1] position
1049 * @low_layer: Memory layer[2] position
1050 * @msg: Message meaningful to the end users that
1051 * explains the event
1052 * @other_detail: Technical details about the event that
1053 * may help hardware manufacturers and
1054 * EDAC developers to analyse the event
1056 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1057 struct mem_ctl_info *mci,
1058 const u16 error_count,
1059 const unsigned long page_frame_number,
1060 const unsigned long offset_in_page,
1061 const unsigned long syndrome,
1062 const int top_layer,
1063 const int mid_layer,
1064 const int low_layer,
1066 const char *other_detail)
1068 /* FIXME: too much for stack: move it to some pre-alocated area */
1069 char detail[80], location[80];
1070 char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms];
1072 int row = -1, chan = -1;
1073 int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1076 bool enable_per_layer_report = false;
1079 edac_dbg(3, "MC%d\n", mci->mc_idx);
1082 * Check if the event report is consistent and if the memory
1083 * location is known. If it is known, enable_per_layer_report will be
1084 * true, the DIMM(s) label info will be filled and the per-layer
1085 * error counters will be incremented.
1087 for (i = 0; i < mci->n_layers; i++) {
1088 if (pos[i] >= (int)mci->layers[i].size) {
1089 if (type == HW_EVENT_ERR_CORRECTED)
1094 edac_mc_printk(mci, KERN_ERR,
1095 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1096 edac_layer_name[mci->layers[i].type],
1097 pos[i], mci->layers[i].size);
1099 * Instead of just returning it, let's use what's
1100 * known about the error. The increment routines and
1101 * the DIMM filter logic will do the right thing by
1102 * pointing the likely damaged DIMMs.
1107 enable_per_layer_report = true;
1111 * Get the dimm label/grain that applies to the match criteria.
1112 * As the error algorithm may not be able to point to just one memory
1113 * stick, the logic here will get all possible labels that could
1114 * pottentially be affected by the error.
1115 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1116 * to have only the MC channel and the MC dimm (also called "branch")
1117 * but the channel is not known, as the memory is arranged in pairs,
1118 * where each memory belongs to a separate channel within the same
1124 for (i = 0; i < mci->tot_dimms; i++) {
1125 struct dimm_info *dimm = mci->dimms[i];
1127 if (top_layer >= 0 && top_layer != dimm->location[0])
1129 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1131 if (low_layer >= 0 && low_layer != dimm->location[2])
1134 /* get the max grain, over the error match range */
1135 if (dimm->grain > grain)
1136 grain = dimm->grain;
1139 * If the error is memory-controller wide, there's no need to
1140 * seek for the affected DIMMs because the whole
1141 * channel/memory controller/... may be affected.
1142 * Also, don't show errors for empty DIMM slots.
1144 if (enable_per_layer_report && dimm->nr_pages) {
1146 strcpy(p, OTHER_LABEL);
1147 p += strlen(OTHER_LABEL);
1149 strcpy(p, dimm->label);
1154 * get csrow/channel of the DIMM, in order to allow
1155 * incrementing the compat API counters
1157 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1158 mci->mem_is_per_rank ? "rank" : "dimm",
1159 dimm->csrow, dimm->cschannel);
1162 else if (row >= 0 && row != dimm->csrow)
1166 chan = dimm->cschannel;
1167 else if (chan >= 0 && chan != dimm->cschannel)
1172 if (!enable_per_layer_report) {
1173 strcpy(label, "any memory");
1175 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
1177 strcpy(label, "unknown memory");
1178 if (type == HW_EVENT_ERR_CORRECTED) {
1180 mci->csrows[row]->ce_count += error_count;
1182 mci->csrows[row]->channels[chan]->ce_count += error_count;
1186 mci->csrows[row]->ue_count += error_count;
1189 /* Fill the RAM location data */
1191 for (i = 0; i < mci->n_layers; i++) {
1195 p += sprintf(p, "%s:%d ",
1196 edac_layer_name[mci->layers[i].type],
1202 /* Report the error via the trace interface */
1204 grain_bits = fls_long(grain) + 1;
1205 trace_mc_event(type, msg, label, error_count,
1206 mci->mc_idx, top_layer, mid_layer, low_layer,
1207 PAGES_TO_MiB(page_frame_number) | offset_in_page,
1208 grain_bits, syndrome, other_detail);
1210 /* Memory type dependent details about the error */
1211 if (type == HW_EVENT_ERR_CORRECTED) {
1212 snprintf(detail, sizeof(detail),
1213 "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1214 page_frame_number, offset_in_page,
1216 edac_ce_error(mci, error_count, pos, msg, location, label,
1217 detail, other_detail, enable_per_layer_report,
1218 page_frame_number, offset_in_page, grain);
1220 snprintf(detail, sizeof(detail),
1221 "page:0x%lx offset:0x%lx grain:%ld",
1222 page_frame_number, offset_in_page, grain);
1224 edac_ue_error(mci, error_count, pos, msg, location, label,
1225 detail, other_detail, enable_per_layer_report);
1228 EXPORT_SYMBOL_GPL(edac_mc_handle_error);