2 * PCA953x 4/8/16/24/40 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_data/pca953x.h>
20 #include <linux/slab.h>
22 #include <linux/of_platform.h>
25 #define PCA953X_INPUT 0
26 #define PCA953X_OUTPUT 1
27 #define PCA953X_INVERT 2
28 #define PCA953X_DIRECTION 3
30 #define REG_ADDR_AI 0x80
33 #define PCA957X_INVRT 1
34 #define PCA957X_BKEN 2
35 #define PCA957X_PUPD 3
39 #define PCA957X_INTS 7
41 #define PCA_GPIO_MASK 0x00FF
42 #define PCA_INT 0x0100
43 #define PCA953X_TYPE 0x1000
44 #define PCA957X_TYPE 0x2000
46 static const struct i2c_device_id pca953x_id[] = {
47 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
48 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
49 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
50 { "pca9536", 4 | PCA953X_TYPE, },
51 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
52 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
53 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
54 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9556", 8 | PCA953X_TYPE, },
57 { "pca9557", 8 | PCA953X_TYPE, },
58 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
59 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
60 { "pca9698", 40 | PCA953X_TYPE, },
62 { "max7310", 8 | PCA953X_TYPE, },
63 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
64 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
65 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
66 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
67 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
68 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
69 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
70 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
71 { "xra1202", 8 | PCA953X_TYPE },
74 MODULE_DEVICE_TABLE(i2c, pca953x_id);
79 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
83 u8 reg_output[MAX_BANK];
84 u8 reg_direction[MAX_BANK];
85 struct mutex i2c_lock;
87 #ifdef CONFIG_GPIO_PCA953X_IRQ
88 struct mutex irq_lock;
89 u8 irq_mask[MAX_BANK];
90 u8 irq_stat[MAX_BANK];
91 u8 irq_trig_raise[MAX_BANK];
92 u8 irq_trig_fall[MAX_BANK];
95 struct i2c_client *client;
96 struct gpio_chip gpio_chip;
97 const char *const *names;
101 static inline struct pca953x_chip *to_pca(struct gpio_chip *gc)
103 return container_of(gc, struct pca953x_chip, gpio_chip);
106 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
110 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
111 int offset = off / BANK_SZ;
113 ret = i2c_smbus_read_byte_data(chip->client,
114 (reg << bank_shift) + offset);
118 dev_err(&chip->client->dev, "failed reading register\n");
125 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
129 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
130 int offset = off / BANK_SZ;
132 ret = i2c_smbus_write_byte_data(chip->client,
133 (reg << bank_shift) + offset, val);
136 dev_err(&chip->client->dev, "failed writing register\n");
143 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
147 if (chip->gpio_chip.ngpio <= 8)
148 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
149 else if (chip->gpio_chip.ngpio >= 24) {
150 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
151 ret = i2c_smbus_write_i2c_block_data(chip->client,
152 (reg << bank_shift) | REG_ADDR_AI,
155 switch (chip->chip_type) {
157 ret = i2c_smbus_write_word_data(chip->client,
158 reg << 1, (u16) *val);
161 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
165 ret = i2c_smbus_write_byte_data(chip->client,
173 dev_err(&chip->client->dev, "failed writing register\n");
180 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
184 if (chip->gpio_chip.ngpio <= 8) {
185 ret = i2c_smbus_read_byte_data(chip->client, reg);
187 } else if (chip->gpio_chip.ngpio >= 24) {
188 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
190 ret = i2c_smbus_read_i2c_block_data(chip->client,
191 (reg << bank_shift) | REG_ADDR_AI,
194 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
195 val[0] = (u16)ret & 0xFF;
196 val[1] = (u16)ret >> 8;
199 dev_err(&chip->client->dev, "failed reading register\n");
206 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
208 struct pca953x_chip *chip = to_pca(gc);
212 mutex_lock(&chip->i2c_lock);
213 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
215 switch (chip->chip_type) {
217 offset = PCA953X_DIRECTION;
220 offset = PCA957X_CFG;
223 ret = pca953x_write_single(chip, offset, reg_val, off);
227 chip->reg_direction[off / BANK_SZ] = reg_val;
230 mutex_unlock(&chip->i2c_lock);
234 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
235 unsigned off, int val)
237 struct pca953x_chip *chip = to_pca(gc);
241 mutex_lock(&chip->i2c_lock);
242 /* set output level */
244 reg_val = chip->reg_output[off / BANK_SZ]
245 | (1u << (off % BANK_SZ));
247 reg_val = chip->reg_output[off / BANK_SZ]
248 & ~(1u << (off % BANK_SZ));
250 switch (chip->chip_type) {
252 offset = PCA953X_OUTPUT;
255 offset = PCA957X_OUT;
258 ret = pca953x_write_single(chip, offset, reg_val, off);
262 chip->reg_output[off / BANK_SZ] = reg_val;
265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
266 switch (chip->chip_type) {
268 offset = PCA953X_DIRECTION;
271 offset = PCA957X_CFG;
274 ret = pca953x_write_single(chip, offset, reg_val, off);
278 chip->reg_direction[off / BANK_SZ] = reg_val;
281 mutex_unlock(&chip->i2c_lock);
285 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
287 struct pca953x_chip *chip = to_pca(gc);
291 mutex_lock(&chip->i2c_lock);
292 switch (chip->chip_type) {
294 offset = PCA953X_INPUT;
300 ret = pca953x_read_single(chip, offset, ®_val, off);
301 mutex_unlock(&chip->i2c_lock);
303 /* NOTE: diagnostic already emitted; that's all we should
304 * do unless gpio_*_value_cansleep() calls become different
305 * from their nonsleeping siblings (and report faults).
310 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
313 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
315 struct pca953x_chip *chip = to_pca(gc);
319 mutex_lock(&chip->i2c_lock);
321 reg_val = chip->reg_output[off / BANK_SZ]
322 | (1u << (off % BANK_SZ));
324 reg_val = chip->reg_output[off / BANK_SZ]
325 & ~(1u << (off % BANK_SZ));
327 switch (chip->chip_type) {
329 offset = PCA953X_OUTPUT;
332 offset = PCA957X_OUT;
335 ret = pca953x_write_single(chip, offset, reg_val, off);
339 chip->reg_output[off / BANK_SZ] = reg_val;
341 mutex_unlock(&chip->i2c_lock);
344 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
346 struct gpio_chip *gc;
348 gc = &chip->gpio_chip;
350 gc->direction_input = pca953x_gpio_direction_input;
351 gc->direction_output = pca953x_gpio_direction_output;
352 gc->get = pca953x_gpio_get_value;
353 gc->set = pca953x_gpio_set_value;
354 gc->can_sleep = true;
356 gc->base = chip->gpio_start;
358 gc->label = chip->client->name;
359 gc->dev = &chip->client->dev;
360 gc->owner = THIS_MODULE;
361 gc->names = chip->names;
364 #ifdef CONFIG_GPIO_PCA953X_IRQ
365 static void pca953x_irq_mask(struct irq_data *d)
367 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
368 struct pca953x_chip *chip = to_pca(gc);
370 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
373 static void pca953x_irq_unmask(struct irq_data *d)
375 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
376 struct pca953x_chip *chip = to_pca(gc);
378 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
381 static void pca953x_irq_bus_lock(struct irq_data *d)
383 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
384 struct pca953x_chip *chip = to_pca(gc);
386 mutex_lock(&chip->irq_lock);
389 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
391 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
392 struct pca953x_chip *chip = to_pca(gc);
396 /* Look for any newly setup interrupt */
397 for (i = 0; i < NBANK(chip); i++) {
398 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
399 new_irqs &= ~chip->reg_direction[i];
402 level = __ffs(new_irqs);
403 pca953x_gpio_direction_input(&chip->gpio_chip,
404 level + (BANK_SZ * i));
405 new_irqs &= ~(1 << level);
409 mutex_unlock(&chip->irq_lock);
412 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
414 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
415 struct pca953x_chip *chip = to_pca(gc);
416 int bank_nb = d->hwirq / BANK_SZ;
417 u8 mask = 1 << (d->hwirq % BANK_SZ);
419 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
420 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
425 if (type & IRQ_TYPE_EDGE_FALLING)
426 chip->irq_trig_fall[bank_nb] |= mask;
428 chip->irq_trig_fall[bank_nb] &= ~mask;
430 if (type & IRQ_TYPE_EDGE_RISING)
431 chip->irq_trig_raise[bank_nb] |= mask;
433 chip->irq_trig_raise[bank_nb] &= ~mask;
438 static struct irq_chip pca953x_irq_chip = {
440 .irq_mask = pca953x_irq_mask,
441 .irq_unmask = pca953x_irq_unmask,
442 .irq_bus_lock = pca953x_irq_bus_lock,
443 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
444 .irq_set_type = pca953x_irq_set_type,
447 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
449 u8 cur_stat[MAX_BANK];
450 u8 old_stat[MAX_BANK];
451 bool pending_seen = false;
452 bool trigger_seen = false;
453 u8 trigger[MAX_BANK];
454 int ret, i, offset = 0;
456 switch (chip->chip_type) {
458 offset = PCA953X_INPUT;
464 ret = pca953x_read_regs(chip, offset, cur_stat);
468 /* Remove output pins from the equation */
469 for (i = 0; i < NBANK(chip); i++)
470 cur_stat[i] &= chip->reg_direction[i];
472 memcpy(old_stat, chip->irq_stat, NBANK(chip));
474 for (i = 0; i < NBANK(chip); i++) {
475 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
483 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
485 for (i = 0; i < NBANK(chip); i++) {
486 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
487 (cur_stat[i] & chip->irq_trig_raise[i]);
488 pending[i] &= trigger[i];
496 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
498 struct pca953x_chip *chip = devid;
499 u8 pending[MAX_BANK];
501 unsigned nhandled = 0;
504 if (!pca953x_irq_pending(chip, pending))
507 for (i = 0; i < NBANK(chip); i++) {
509 level = __ffs(pending[i]);
510 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
511 level + (BANK_SZ * i)));
512 pending[i] &= ~(1 << level);
517 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
520 static int pca953x_irq_setup(struct pca953x_chip *chip,
521 const struct i2c_device_id *id,
524 struct i2c_client *client = chip->client;
525 int ret, i, offset = 0;
527 if (client->irq && irq_base != -1
528 && (id->driver_data & PCA_INT)) {
530 switch (chip->chip_type) {
532 offset = PCA953X_INPUT;
538 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
543 * There is no way to know which GPIO line generated the
544 * interrupt. We have to rely on the previous read for
547 for (i = 0; i < NBANK(chip); i++)
548 chip->irq_stat[i] &= chip->reg_direction[i];
549 mutex_init(&chip->irq_lock);
551 ret = devm_request_threaded_irq(&client->dev,
555 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
557 dev_name(&client->dev), chip);
559 dev_err(&client->dev, "failed to request irq %d\n",
564 ret = gpiochip_irqchip_add(&chip->gpio_chip,
570 dev_err(&client->dev,
571 "could not connect irqchip to gpiochip\n");
575 gpiochip_set_chained_irqchip(&chip->gpio_chip,
583 #else /* CONFIG_GPIO_PCA953X_IRQ */
584 static int pca953x_irq_setup(struct pca953x_chip *chip,
585 const struct i2c_device_id *id,
588 struct i2c_client *client = chip->client;
590 if (irq_base != -1 && (id->driver_data & PCA_INT))
591 dev_warn(&client->dev, "interrupt support not compiled in\n");
597 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
602 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
606 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
607 chip->reg_direction);
611 /* set platform specific polarity inversion */
613 memset(val, 0xFF, NBANK(chip));
615 memset(val, 0, NBANK(chip));
617 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
622 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
627 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
630 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
634 /* set platform specific polarity inversion */
636 memset(val, 0xFF, NBANK(chip));
638 memset(val, 0, NBANK(chip));
639 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
643 /* To enable register 6, 7 to control pull up and pull down */
644 memset(val, 0x02, NBANK(chip));
645 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
654 static int pca953x_probe(struct i2c_client *client,
655 const struct i2c_device_id *id)
657 struct pca953x_platform_data *pdata;
658 struct pca953x_chip *chip;
663 chip = devm_kzalloc(&client->dev,
664 sizeof(struct pca953x_chip), GFP_KERNEL);
668 pdata = dev_get_platdata(&client->dev);
670 irq_base = pdata->irq_base;
671 chip->gpio_start = pdata->gpio_base;
672 invert = pdata->invert;
673 chip->names = pdata->names;
675 chip->gpio_start = -1;
679 chip->client = client;
681 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
683 mutex_init(&chip->i2c_lock);
685 /* initialize cached registers from their original values.
686 * we can't share this chip with another i2c master.
688 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
690 if (chip->chip_type == PCA953X_TYPE)
691 ret = device_pca953x_init(chip, invert);
693 ret = device_pca957x_init(chip, invert);
697 ret = gpiochip_add(&chip->gpio_chip);
701 ret = pca953x_irq_setup(chip, id, irq_base);
705 if (pdata && pdata->setup) {
706 ret = pdata->setup(client, chip->gpio_chip.base,
707 chip->gpio_chip.ngpio, pdata->context);
709 dev_warn(&client->dev, "setup failed, %d\n", ret);
712 i2c_set_clientdata(client, chip);
716 static int pca953x_remove(struct i2c_client *client)
718 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
719 struct pca953x_chip *chip = i2c_get_clientdata(client);
722 if (pdata && pdata->teardown) {
723 ret = pdata->teardown(client, chip->gpio_chip.base,
724 chip->gpio_chip.ngpio, pdata->context);
726 dev_err(&client->dev, "%s failed, %d\n",
732 gpiochip_remove(&chip->gpio_chip);
737 static const struct of_device_id pca953x_dt_ids[] = {
738 { .compatible = "nxp,pca9505", },
739 { .compatible = "nxp,pca9534", },
740 { .compatible = "nxp,pca9535", },
741 { .compatible = "nxp,pca9536", },
742 { .compatible = "nxp,pca9537", },
743 { .compatible = "nxp,pca9538", },
744 { .compatible = "nxp,pca9539", },
745 { .compatible = "nxp,pca9554", },
746 { .compatible = "nxp,pca9555", },
747 { .compatible = "nxp,pca9556", },
748 { .compatible = "nxp,pca9557", },
749 { .compatible = "nxp,pca9574", },
750 { .compatible = "nxp,pca9575", },
751 { .compatible = "nxp,pca9698", },
753 { .compatible = "maxim,max7310", },
754 { .compatible = "maxim,max7312", },
755 { .compatible = "maxim,max7313", },
756 { .compatible = "maxim,max7315", },
758 { .compatible = "ti,pca6107", },
759 { .compatible = "ti,tca6408", },
760 { .compatible = "ti,tca6416", },
761 { .compatible = "ti,tca6424", },
763 { .compatible = "exar,xra1202", },
767 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
769 static struct i2c_driver pca953x_driver = {
772 .of_match_table = pca953x_dt_ids,
774 .probe = pca953x_probe,
775 .remove = pca953x_remove,
776 .id_table = pca953x_id,
779 static int __init pca953x_init(void)
781 return i2c_add_driver(&pca953x_driver);
783 /* register after i2c postcore initcall and before
784 * subsys initcalls that may rely on these GPIOs
786 subsys_initcall(pca953x_init);
788 static void __exit pca953x_exit(void)
790 i2c_del_driver(&pca953x_driver);
792 module_exit(pca953x_exit);
794 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
795 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
796 MODULE_LICENSE("GPL");