2 * vf610 GPIO support through PORT and GPIO module
4 * Copyright (c) 2014 Toradex AG.
6 * Author: Stefan Agner <stefan@agner.ch>.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/bitops.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
29 #include <linux/of_device.h>
30 #include <linux/of_irq.h>
32 #define VF610_GPIO_PER_PORT 32
34 struct vf610_gpio_port {
37 void __iomem *gpio_base;
38 u8 irqc[VF610_GPIO_PER_PORT];
42 #define GPIO_PDOR 0x00
43 #define GPIO_PSOR 0x04
44 #define GPIO_PCOR 0x08
45 #define GPIO_PTOR 0x0c
46 #define GPIO_PDIR 0x10
48 #define PORT_PCR(n) ((n) * 0x4)
49 #define PORT_PCR_IRQC_OFFSET 16
51 #define PORT_ISFR 0xa0
52 #define PORT_DFER 0xc0
53 #define PORT_DFCR 0xc4
54 #define PORT_DFWR 0xc8
56 #define PORT_INT_OFF 0x0
57 #define PORT_INT_LOGIC_ZERO 0x8
58 #define PORT_INT_RISING_EDGE 0x9
59 #define PORT_INT_FALLING_EDGE 0xa
60 #define PORT_INT_EITHER_EDGE 0xb
61 #define PORT_INT_LOGIC_ONE 0xc
63 static struct irq_chip vf610_gpio_irq_chip;
65 static struct vf610_gpio_port *to_vf610_gp(struct gpio_chip *gc)
67 return container_of(gc, struct vf610_gpio_port, gc);
70 static const struct of_device_id vf610_gpio_dt_ids[] = {
71 { .compatible = "fsl,vf610-gpio" },
75 static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
77 writel_relaxed(val, reg);
80 static inline u32 vf610_gpio_readl(void __iomem *reg)
82 return readl_relaxed(reg);
85 static int vf610_gpio_request(struct gpio_chip *chip, unsigned offset)
87 return pinctrl_request_gpio(chip->base + offset);
90 static void vf610_gpio_free(struct gpio_chip *chip, unsigned offset)
92 pinctrl_free_gpio(chip->base + offset);
95 static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
97 struct vf610_gpio_port *port = to_vf610_gp(gc);
99 return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio));
102 static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
104 struct vf610_gpio_port *port = to_vf610_gp(gc);
105 unsigned long mask = BIT(gpio);
108 vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
110 vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
113 static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
115 return pinctrl_gpio_direction_input(chip->base + gpio);
118 static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
121 vf610_gpio_set(chip, gpio, value);
123 return pinctrl_gpio_direction_output(chip->base + gpio);
126 static void vf610_gpio_irq_handler(struct irq_desc *desc)
128 struct vf610_gpio_port *port =
129 to_vf610_gp(irq_desc_get_handler_data(desc));
130 struct irq_chip *chip = irq_desc_get_chip(desc);
132 unsigned long irq_isfr;
134 chained_irq_enter(chip, desc);
136 irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
138 for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
139 vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
141 generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
144 chained_irq_exit(chip, desc);
147 static void vf610_gpio_irq_ack(struct irq_data *d)
149 struct vf610_gpio_port *port =
150 to_vf610_gp(irq_data_get_irq_chip_data(d));
153 vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
156 static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
158 struct vf610_gpio_port *port =
159 to_vf610_gp(irq_data_get_irq_chip_data(d));
163 case IRQ_TYPE_EDGE_RISING:
164 irqc = PORT_INT_RISING_EDGE;
166 case IRQ_TYPE_EDGE_FALLING:
167 irqc = PORT_INT_FALLING_EDGE;
169 case IRQ_TYPE_EDGE_BOTH:
170 irqc = PORT_INT_EITHER_EDGE;
172 case IRQ_TYPE_LEVEL_LOW:
173 irqc = PORT_INT_LOGIC_ZERO;
175 case IRQ_TYPE_LEVEL_HIGH:
176 irqc = PORT_INT_LOGIC_ONE;
182 port->irqc[d->hwirq] = irqc;
184 if (type & IRQ_TYPE_LEVEL_MASK)
185 irq_set_handler_locked(d, handle_level_irq);
187 irq_set_handler_locked(d, handle_edge_irq);
192 static void vf610_gpio_irq_mask(struct irq_data *d)
194 struct vf610_gpio_port *port =
195 to_vf610_gp(irq_data_get_irq_chip_data(d));
196 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
198 vf610_gpio_writel(0, pcr_base);
201 static void vf610_gpio_irq_unmask(struct irq_data *d)
203 struct vf610_gpio_port *port =
204 to_vf610_gp(irq_data_get_irq_chip_data(d));
205 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
207 vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
211 static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
213 struct vf610_gpio_port *port =
214 to_vf610_gp(irq_data_get_irq_chip_data(d));
217 enable_irq_wake(port->irq);
219 disable_irq_wake(port->irq);
224 static struct irq_chip vf610_gpio_irq_chip = {
225 .name = "gpio-vf610",
226 .irq_ack = vf610_gpio_irq_ack,
227 .irq_mask = vf610_gpio_irq_mask,
228 .irq_unmask = vf610_gpio_irq_unmask,
229 .irq_set_type = vf610_gpio_irq_set_type,
230 .irq_set_wake = vf610_gpio_irq_set_wake,
233 static int vf610_gpio_probe(struct platform_device *pdev)
235 struct device *dev = &pdev->dev;
236 struct device_node *np = dev->of_node;
237 struct vf610_gpio_port *port;
238 struct resource *iores;
239 struct gpio_chip *gc;
242 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
246 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
247 port->base = devm_ioremap_resource(dev, iores);
248 if (IS_ERR(port->base))
249 return PTR_ERR(port->base);
251 iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
252 port->gpio_base = devm_ioremap_resource(dev, iores);
253 if (IS_ERR(port->gpio_base))
254 return PTR_ERR(port->gpio_base);
256 port->irq = platform_get_irq(pdev, 0);
263 gc->label = "vf610-gpio";
264 gc->ngpio = VF610_GPIO_PER_PORT;
265 gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
267 gc->request = vf610_gpio_request;
268 gc->free = vf610_gpio_free;
269 gc->direction_input = vf610_gpio_direction_input;
270 gc->get = vf610_gpio_get;
271 gc->direction_output = vf610_gpio_direction_output;
272 gc->set = vf610_gpio_set;
274 ret = gpiochip_add(gc);
278 /* Clear the interrupt status register for all GPIO's */
279 vf610_gpio_writel(~0, port->base + PORT_ISFR);
281 ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
282 handle_edge_irq, IRQ_TYPE_NONE);
284 dev_err(dev, "failed to add irqchip\n");
288 gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
289 vf610_gpio_irq_handler);
294 static struct platform_driver vf610_gpio_driver = {
296 .name = "gpio-vf610",
297 .of_match_table = vf610_gpio_dt_ids,
299 .probe = vf610_gpio_probe,
302 static int __init gpio_vf610_init(void)
304 return platform_driver_register(&vf610_gpio_driver);
306 device_initcall(gpio_vf610_init);
308 MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>");
309 MODULE_DESCRIPTION("Freescale VF610 GPIO");
310 MODULE_LICENSE("GPL v2");