3 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/imx-regs.h>
18 enum mxc_gpio_direction {
19 MXC_GPIO_DIRECTION_IN,
20 MXC_GPIO_DIRECTION_OUT,
23 #define GPIO_PER_BANK 32
25 struct mxc_gpio_plat {
26 struct gpio_regs *regs;
29 struct mxc_bank_info {
30 struct gpio_regs *regs;
33 #ifndef CONFIG_DM_GPIO
34 #define GPIO_TO_PORT(n) ((n) / 32)
36 /* GPIO port description */
37 static unsigned long gpio_ports[] = {
38 [0] = GPIO1_BASE_ADDR,
39 [1] = GPIO2_BASE_ADDR,
40 [2] = GPIO3_BASE_ADDR,
41 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
42 defined(CONFIG_MX53) || defined(CONFIG_MX6)
43 [3] = GPIO4_BASE_ADDR,
45 #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
46 [4] = GPIO5_BASE_ADDR,
47 [5] = GPIO6_BASE_ADDR,
49 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
50 [6] = GPIO7_BASE_ADDR,
54 static int mxc_gpio_direction(unsigned int gpio,
55 enum mxc_gpio_direction direction)
57 unsigned int port = GPIO_TO_PORT(gpio);
58 struct gpio_regs *regs;
61 if (port >= ARRAY_SIZE(gpio_ports)) {
62 printf("%s: Invalid GPIO %d\n", __func__, gpio);
68 regs = (struct gpio_regs *)gpio_ports[port];
70 l = readl(®s->gpio_dir);
73 case MXC_GPIO_DIRECTION_OUT:
76 case MXC_GPIO_DIRECTION_IN:
79 writel(l, ®s->gpio_dir);
84 int gpio_set_value(unsigned gpio, int value)
86 unsigned int port = GPIO_TO_PORT(gpio);
87 struct gpio_regs *regs;
90 if (port >= ARRAY_SIZE(gpio_ports)) {
91 printf("%s: Invalid GPIO %d\n", __func__, gpio);
97 regs = (struct gpio_regs *)gpio_ports[port];
99 l = readl(®s->gpio_dr);
104 writel(l, ®s->gpio_dr);
109 int gpio_get_value(unsigned gpio)
111 unsigned int port = GPIO_TO_PORT(gpio);
112 struct gpio_regs *regs;
115 if (port >= ARRAY_SIZE(gpio_ports)) {
116 printf("%s: Invalid GPIO %d\n", __func__, gpio);
122 regs = (struct gpio_regs *)gpio_ports[port];
124 if (readl(®s->gpio_dir) & (1 << gpio)) {
125 printf("WARNING: Reading status of output GPIO_%d_%d\n",
126 port - GPIO_TO_PORT(0), gpio);
127 val = (readl(®s->gpio_dr) >> gpio) & 0x01;
129 val = (readl(®s->gpio_psr) >> gpio) & 0x01;
134 int gpio_request(unsigned gpio, const char *label)
136 unsigned int port = GPIO_TO_PORT(gpio);
137 if (port >= ARRAY_SIZE(gpio_ports)) {
138 printf("%s: Invalid GPIO %d\n", __func__, gpio);
144 int gpio_free(unsigned gpio)
146 unsigned int port = GPIO_TO_PORT(gpio);
147 if (port >= ARRAY_SIZE(gpio_ports)) {
148 printf("%s: Invalid GPIO %d\n", __func__, gpio);
154 int gpio_direction_input(unsigned gpio)
156 return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN);
159 int gpio_direction_output(unsigned gpio, int value)
161 int ret = gpio_set_value(gpio, value);
166 return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT);
170 #ifdef CONFIG_DM_GPIO
171 static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)
175 val = readl(®s->gpio_dir);
177 return val & (1 << offset) ? 1 : 0;
180 static void mxc_gpio_bank_direction(struct gpio_regs *regs, int offset,
181 enum mxc_gpio_direction direction)
185 l = readl(®s->gpio_dir);
188 case MXC_GPIO_DIRECTION_OUT:
191 case MXC_GPIO_DIRECTION_IN:
194 writel(l, ®s->gpio_dir);
197 static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset,
202 l = readl(®s->gpio_dr);
207 writel(l, ®s->gpio_dr);
210 static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
212 return (readl(®s->gpio_psr) >> offset) & 0x01;
215 /* set GPIO pin 'gpio' as an input */
216 static int mxc_gpio_direction_input(struct udevice *dev, unsigned offset)
218 struct mxc_bank_info *bank = dev_get_priv(dev);
220 /* Configure GPIO direction as input. */
221 mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_IN);
226 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
227 static int mxc_gpio_direction_output(struct udevice *dev, unsigned offset,
230 struct mxc_bank_info *bank = dev_get_priv(dev);
232 /* Configure GPIO output value. */
233 mxc_gpio_bank_set_value(bank->regs, offset, value);
235 /* Configure GPIO direction as output. */
236 mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_OUT);
241 /* read GPIO IN value of pin 'gpio' */
242 static int mxc_gpio_get_value(struct udevice *dev, unsigned offset)
244 struct mxc_bank_info *bank = dev_get_priv(dev);
246 return mxc_gpio_bank_get_value(bank->regs, offset);
249 /* write GPIO OUT value to pin 'gpio' */
250 static int mxc_gpio_set_value(struct udevice *dev, unsigned offset,
253 struct mxc_bank_info *bank = dev_get_priv(dev);
255 mxc_gpio_bank_set_value(bank->regs, offset, value);
260 static int mxc_gpio_get_function(struct udevice *dev, unsigned offset)
262 struct mxc_bank_info *bank = dev_get_priv(dev);
264 /* GPIOF_FUNC is not implemented yet */
265 if (mxc_gpio_is_output(bank->regs, offset))
271 static const struct dm_gpio_ops gpio_mxc_ops = {
272 .direction_input = mxc_gpio_direction_input,
273 .direction_output = mxc_gpio_direction_output,
274 .get_value = mxc_gpio_get_value,
275 .set_value = mxc_gpio_set_value,
276 .get_function = mxc_gpio_get_function,
279 static const struct mxc_gpio_plat mxc_plat[] = {
280 { (struct gpio_regs *)GPIO1_BASE_ADDR },
281 { (struct gpio_regs *)GPIO2_BASE_ADDR },
282 { (struct gpio_regs *)GPIO3_BASE_ADDR },
283 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
284 defined(CONFIG_MX53) || defined(CONFIG_MX6)
285 { (struct gpio_regs *)GPIO4_BASE_ADDR },
287 #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
288 { (struct gpio_regs *)GPIO5_BASE_ADDR },
289 { (struct gpio_regs *)GPIO6_BASE_ADDR },
291 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
292 { (struct gpio_regs *)GPIO7_BASE_ADDR },
296 static int mxc_gpio_probe(struct udevice *dev)
298 struct mxc_bank_info *bank = dev_get_priv(dev);
299 struct mxc_gpio_plat *plat = dev_get_platdata(dev);
300 struct gpio_dev_priv *uc_priv = dev->uclass_priv;
304 banknum = plat - mxc_plat;
305 sprintf(name, "GPIO%d_", banknum + 1);
309 uc_priv->bank_name = str;
310 uc_priv->gpio_count = GPIO_PER_BANK;
311 bank->regs = plat->regs;
316 U_BOOT_DRIVER(gpio_mxc) = {
319 .ops = &gpio_mxc_ops,
320 .probe = mxc_gpio_probe,
321 .priv_auto_alloc_size = sizeof(struct mxc_bank_info),
324 U_BOOT_DEVICES(mxc_gpios) = {
325 { "gpio_mxc", &mxc_plat[0] },
326 { "gpio_mxc", &mxc_plat[1] },
327 { "gpio_mxc", &mxc_plat[2] },
328 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
329 defined(CONFIG_MX53) || defined(CONFIG_MX6)
330 { "gpio_mxc", &mxc_plat[3] },
332 #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
333 { "gpio_mxc", &mxc_plat[4] },
334 { "gpio_mxc", &mxc_plat[5] },
336 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
337 { "gpio_mxc", &mxc_plat[6] },