2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
26 * Authors: Dave Airlie <airlied@redhat.com>
32 #include <drm/drm_fb_helper.h>
33 #include <drm/drm_crtc_helper.h>
35 void ast_set_index_reg_mask(struct ast_private *ast,
36 uint32_t base, uint8_t index,
37 uint8_t mask, uint8_t val)
40 ast_io_write8(ast, base, index);
41 tmp = (ast_io_read8(ast, base + 1) & mask) | val;
42 ast_set_index_reg(ast, base, index, tmp);
45 uint8_t ast_get_index_reg(struct ast_private *ast,
46 uint32_t base, uint8_t index)
49 ast_io_write8(ast, base, index);
50 ret = ast_io_read8(ast, base + 1);
54 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
55 uint32_t base, uint8_t index, uint8_t mask)
58 ast_io_write8(ast, base, index);
59 ret = ast_io_read8(ast, base + 1) & mask;
63 static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev)
65 struct device_node *np = dev->pdev->dev.of_node;
66 struct ast_private *ast = dev->dev_private;
67 uint32_t data, jregd0, jregd1;
70 ast->config_mode = ast_use_defaults;
71 *scu_rev = 0xffffffff;
73 /* Check if we have device-tree properties */
74 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id",
76 /* We do, disable P2A access */
77 ast->config_mode = ast_use_dt;
78 DRM_INFO("Using device-tree for configuration\n");
82 /* Not all families have a P2A bridge */
83 if (dev->pdev->device != PCI_CHIP_AST2000)
87 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge
88 * is disabled. We force using P2A if VGA only mode bit
91 jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
92 jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
93 if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) {
94 /* Double check it's actually working */
95 data = ast_read32(ast, 0xf004);
96 if (data != 0xFFFFFFFF) {
97 /* P2A works, grab silicon revision */
98 ast->config_mode = ast_use_p2a;
100 DRM_INFO("Using P2A bridge for configuration\n");
102 /* Read SCU7c (silicon revision register) */
103 ast_write32(ast, 0xf004, 0x1e6e0000);
104 ast_write32(ast, 0xf000, 0x1);
105 *scu_rev = ast_read32(ast, 0x1207c);
110 /* We have a P2A bridge but it's disabled */
111 DRM_INFO("P2A bridge disabled, using default configuration\n");
114 static int ast_detect_chip(struct drm_device *dev, bool *need_post)
116 struct ast_private *ast = dev->dev_private;
117 uint32_t jreg, scu_rev;
120 * If VGA isn't enabled, we need to enable now or subsequent
121 * access to the scratch registers will fail. We also inform
122 * our caller that it needs to POST the chip
123 * (Assumption: VGA not enabled -> need to POST)
125 if (!ast_is_vga_enabled(dev)) {
127 DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
133 /* Enable extended register access */
134 ast_enable_mmio(dev);
137 /* Find out whether P2A works or whether to use device-tree */
138 ast_detect_config_mode(dev, &scu_rev);
140 /* Identify chipset */
141 if (dev->pdev->device == PCI_CHIP_AST1180) {
143 DRM_INFO("AST 1180 detected\n");
145 if (dev->pdev->revision >= 0x30) {
147 DRM_INFO("AST 2400 detected\n");
148 } else if (dev->pdev->revision >= 0x20) {
150 DRM_INFO("AST 2300 detected\n");
151 } else if (dev->pdev->revision >= 0x10) {
152 switch (scu_rev & 0x0300) {
155 DRM_INFO("AST 1100 detected\n");
159 DRM_INFO("AST 2200 detected\n");
163 DRM_INFO("AST 2150 detected\n");
167 DRM_INFO("AST 2100 detected\n");
170 ast->vga2_clone = false;
173 DRM_INFO("AST 2000 detected\n");
177 /* Check if we support wide screen */
180 ast->support_wide_screen = true;
183 ast->support_wide_screen = false;
186 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
188 ast->support_wide_screen = true;
189 else if (jreg & 0x01)
190 ast->support_wide_screen = true;
192 ast->support_wide_screen = false;
193 if (ast->chip == AST2300 &&
194 (scu_rev & 0x300) == 0x0) /* ast1300 */
195 ast->support_wide_screen = true;
196 if (ast->chip == AST2400 &&
197 (scu_rev & 0x300) == 0x100) /* ast1400 */
198 ast->support_wide_screen = true;
203 /* Check 3rd Tx option (digital output afaik) */
204 ast->tx_chip_type = AST_TX_NONE;
207 * VGACRA3 Enhanced Color Mode Register, check if DVO is already
208 * enabled, in that case, assume we have a SIL164 TMDS transmitter
210 * Don't make that assumption if we the chip wasn't enabled and
211 * is at power-on reset, otherwise we'll incorrectly "detect" a
212 * SIL164 when there is none.
215 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
217 ast->tx_chip_type = AST_TX_SIL164;
220 if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
222 * On AST2300 and 2400, look the configuration set by the SoC in
223 * the SOC scratch register #1 bits 11:8 (interestingly marked
224 * as "reserved" in the spec)
226 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
229 ast->tx_chip_type = AST_TX_SIL164;
232 ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL);
233 if (ast->dp501_fw_addr) {
234 /* backup firmware */
235 if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) {
236 kfree(ast->dp501_fw_addr);
237 ast->dp501_fw_addr = NULL;
242 ast->tx_chip_type = AST_TX_DP501;
246 /* Print stuff for diagnostic purposes */
247 switch(ast->tx_chip_type) {
249 DRM_INFO("Using Sil164 TMDS transmitter\n");
252 DRM_INFO("Using DP501 DisplayPort transmitter\n");
255 DRM_INFO("Analog VGA only\n");
260 static int ast_get_dram_info(struct drm_device *dev)
262 struct device_node *np = dev->pdev->dev.of_node;
263 struct ast_private *ast = dev->dev_private;
264 uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap;
265 uint32_t denum, num, div, ref_pll, dsel;
267 switch (ast->config_mode) {
270 * If some properties are missing, use reasonable
271 * defaults for AST2400
273 if (of_property_read_u32(np, "aspeed,mcr-configuration",
275 mcr_cfg = 0x00000577;
276 if (of_property_read_u32(np, "aspeed,mcr-scu-mpll",
278 mcr_scu_mpll = 0x000050C0;
279 if (of_property_read_u32(np, "aspeed,mcr-scu-strap",
284 ast_write32(ast, 0xf004, 0x1e6e0000);
285 ast_write32(ast, 0xf000, 0x1);
286 mcr_cfg = ast_read32(ast, 0x10004);
287 mcr_scu_mpll = ast_read32(ast, 0x10120);
288 mcr_scu_strap = ast_read32(ast, 0x10170);
290 case ast_use_defaults:
292 ast->dram_bus_width = 16;
293 ast->dram_type = AST_DRAM_1Gx16;
299 ast->dram_bus_width = 16;
301 ast->dram_bus_width = 32;
303 if (ast->chip == AST2300 || ast->chip == AST2400) {
304 switch (mcr_cfg & 0x03) {
306 ast->dram_type = AST_DRAM_512Mx16;
310 ast->dram_type = AST_DRAM_1Gx16;
313 ast->dram_type = AST_DRAM_2Gx16;
316 ast->dram_type = AST_DRAM_4Gx16;
320 switch (mcr_cfg & 0x0c) {
323 ast->dram_type = AST_DRAM_512Mx16;
327 ast->dram_type = AST_DRAM_1Gx16;
329 ast->dram_type = AST_DRAM_512Mx32;
332 ast->dram_type = AST_DRAM_1Gx32;
337 if (mcr_scu_strap & 0x2000)
342 denum = mcr_scu_mpll & 0x1f;
343 num = (mcr_scu_mpll & 0x3fe0) >> 5;
344 dsel = (mcr_scu_mpll & 0xc000) >> 14;
357 ast->mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000);
361 static void ast_user_framebuffer_destroy(struct drm_framebuffer *fb)
363 struct ast_framebuffer *ast_fb = to_ast_framebuffer(fb);
365 drm_gem_object_unreference_unlocked(ast_fb->obj);
366 drm_framebuffer_cleanup(fb);
370 static const struct drm_framebuffer_funcs ast_fb_funcs = {
371 .destroy = ast_user_framebuffer_destroy,
375 int ast_framebuffer_init(struct drm_device *dev,
376 struct ast_framebuffer *ast_fb,
377 const struct drm_mode_fb_cmd2 *mode_cmd,
378 struct drm_gem_object *obj)
382 drm_helper_mode_fill_fb_struct(dev, &ast_fb->base, mode_cmd);
384 ret = drm_framebuffer_init(dev, &ast_fb->base, &ast_fb_funcs);
386 DRM_ERROR("framebuffer init failed %d\n", ret);
392 static struct drm_framebuffer *
393 ast_user_framebuffer_create(struct drm_device *dev,
394 struct drm_file *filp,
395 const struct drm_mode_fb_cmd2 *mode_cmd)
397 struct drm_gem_object *obj;
398 struct ast_framebuffer *ast_fb;
401 obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
403 return ERR_PTR(-ENOENT);
405 ast_fb = kzalloc(sizeof(*ast_fb), GFP_KERNEL);
407 drm_gem_object_unreference_unlocked(obj);
408 return ERR_PTR(-ENOMEM);
411 ret = ast_framebuffer_init(dev, ast_fb, mode_cmd, obj);
413 drm_gem_object_unreference_unlocked(obj);
417 return &ast_fb->base;
420 static const struct drm_mode_config_funcs ast_mode_funcs = {
421 .fb_create = ast_user_framebuffer_create,
424 static u32 ast_get_vram_info(struct drm_device *dev)
426 struct ast_private *ast = dev->dev_private;
431 vram_size = AST_VIDMEM_DEFAULT_SIZE;
432 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff);
434 case 0: vram_size = AST_VIDMEM_SIZE_8M; break;
435 case 1: vram_size = AST_VIDMEM_SIZE_16M; break;
436 case 2: vram_size = AST_VIDMEM_SIZE_32M; break;
437 case 3: vram_size = AST_VIDMEM_SIZE_64M; break;
440 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff);
441 switch (jreg & 0x03) {
443 vram_size -= 0x100000;
446 vram_size -= 0x200000;
449 vram_size -= 0x400000;
456 int ast_driver_load(struct drm_device *dev, unsigned long flags)
458 struct ast_private *ast;
462 ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
466 dev->dev_private = ast;
469 ast->regs = pci_iomap(dev->pdev, 1, 0);
476 * If we don't have IO space at all, use MMIO now and
477 * assume the chip has MMIO enabled by default (rev 0x20
480 if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) {
481 DRM_INFO("platform has no IO space, trying MMIO\n");
482 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
485 /* "map" IO regs if the above hasn't done so already */
487 ast->ioregs = pci_iomap(dev->pdev, 2, 0);
494 ast_detect_chip(dev, &need_post);
496 if (ast->chip != AST1180) {
497 ret = ast_get_dram_info(dev);
500 ast->vram_size = ast_get_vram_info(dev);
501 DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size);
507 ret = ast_mm_init(ast);
511 drm_mode_config_init(dev);
513 dev->mode_config.funcs = (void *)&ast_mode_funcs;
514 dev->mode_config.min_width = 0;
515 dev->mode_config.min_height = 0;
516 dev->mode_config.preferred_depth = 24;
517 dev->mode_config.prefer_shadow = 1;
518 dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0);
520 if (ast->chip == AST2100 ||
521 ast->chip == AST2200 ||
522 ast->chip == AST2300 ||
523 ast->chip == AST2400 ||
524 ast->chip == AST1180) {
525 dev->mode_config.max_width = 1920;
526 dev->mode_config.max_height = 2048;
528 dev->mode_config.max_width = 1600;
529 dev->mode_config.max_height = 1200;
532 ret = ast_mode_init(dev);
536 ret = ast_fbdev_init(dev);
543 dev->dev_private = NULL;
547 void ast_driver_unload(struct drm_device *dev)
549 struct ast_private *ast = dev->dev_private;
551 kfree(ast->dp501_fw_addr);
554 drm_mode_config_cleanup(dev);
557 pci_iounmap(dev->pdev, ast->ioregs);
558 pci_iounmap(dev->pdev, ast->regs);
562 int ast_gem_create(struct drm_device *dev,
563 u32 size, bool iskernel,
564 struct drm_gem_object **obj)
566 struct ast_bo *astbo;
571 size = roundup(size, PAGE_SIZE);
575 ret = ast_bo_create(dev, size, 0, 0, &astbo);
577 if (ret != -ERESTARTSYS)
578 DRM_ERROR("failed to allocate GEM object\n");
585 int ast_dumb_create(struct drm_file *file,
586 struct drm_device *dev,
587 struct drm_mode_create_dumb *args)
590 struct drm_gem_object *gobj;
593 args->pitch = args->width * ((args->bpp + 7) / 8);
594 args->size = args->pitch * args->height;
596 ret = ast_gem_create(dev, args->size, false,
601 ret = drm_gem_handle_create(file, gobj, &handle);
602 drm_gem_object_unreference_unlocked(gobj);
606 args->handle = handle;
610 static void ast_bo_unref(struct ast_bo **bo)
612 struct ttm_buffer_object *tbo;
622 void ast_gem_free_object(struct drm_gem_object *obj)
624 struct ast_bo *ast_bo = gem_to_ast_bo(obj);
626 ast_bo_unref(&ast_bo);
630 static inline u64 ast_bo_mmap_offset(struct ast_bo *bo)
632 return drm_vma_node_offset_addr(&bo->bo.vma_node);
635 ast_dumb_mmap_offset(struct drm_file *file,
636 struct drm_device *dev,
640 struct drm_gem_object *obj;
643 obj = drm_gem_object_lookup(file, handle);
647 bo = gem_to_ast_bo(obj);
648 *offset = ast_bo_mmap_offset(bo);
650 drm_gem_object_unreference_unlocked(obj);