2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Mika Kuoppala <mika.kuoppala@intel.com>
29 #include "intel_renderstate.h"
31 static const struct intel_renderstate_rodata *
32 render_state_get_rodata(struct drm_device *dev, const int gen)
36 return &gen6_null_state;
38 return &gen7_null_state;
40 return &gen8_null_state;
46 static int render_state_init(struct render_state *so, struct drm_device *dev)
50 so->gen = INTEL_INFO(dev)->gen;
51 so->rodata = render_state_get_rodata(dev, so->gen);
52 if (so->rodata == NULL)
55 if (so->rodata->batch_items * 4 > 4096)
58 so->obj = i915_gem_alloc_object(dev, 4096);
62 ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
66 so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
70 drm_gem_object_unreference(&so->obj->base);
74 static int render_state_setup(struct render_state *so)
76 const struct intel_renderstate_rodata *rodata = so->rodata;
77 unsigned int i = 0, reloc_index = 0;
82 ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
86 page = sg_page(so->obj->pages->sgl);
89 while (i < rodata->batch_items) {
90 u32 s = rodata->batch[i];
92 if (i * 4 == rodata->reloc[reloc_index]) {
93 u64 r = s + so->ggtt_offset;
96 if (i + 1 >= rodata->batch_items ||
97 rodata->batch[i + 1] != 0)
101 s = upper_32_bits(r);
111 ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
115 if (rodata->reloc[reloc_index] != -1) {
116 DRM_ERROR("only %d relocs resolved\n", reloc_index);
123 void i915_gem_render_state_fini(struct render_state *so)
125 i915_gem_object_ggtt_unpin(so->obj);
126 drm_gem_object_unreference(&so->obj->base);
129 int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
130 struct render_state *so)
134 if (WARN_ON(ring->id != RCS))
137 ret = render_state_init(so, ring->dev);
141 if (so->rodata == NULL)
144 ret = render_state_setup(so);
146 i915_gem_render_state_fini(so);
153 int i915_gem_render_state_init(struct intel_engine_cs *ring)
155 struct render_state so;
158 ret = i915_gem_render_state_prepare(ring, &so);
162 if (so.rodata == NULL)
165 ret = ring->dispatch_execbuffer(ring,
167 so.rodata->batch_items * 4,
168 I915_DISPATCH_SECURE);
172 i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
174 ret = __i915_add_request(ring, NULL, so.obj, NULL);
175 /* __i915_add_request moves object to inactive if it fails */
177 i915_gem_render_state_fini(&so);