2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
46 struct notifier_block lid_notifier;
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
55 struct intel_lvds_connector *attached_connector;
58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
60 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
65 return container_of(connector, struct intel_lvds_connector, base.base);
68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 struct drm_device *dev = encoder->base.dev;
72 struct drm_i915_private *dev_priv = dev->dev_private;
73 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 tmp = I915_READ(lvds_encoder->reg);
78 if (!(tmp & LVDS_PORT_EN))
82 *pipe = PORT_TO_PIPE_CPT(tmp);
84 *pipe = PORT_TO_PIPE(tmp);
89 static void intel_lvds_get_config(struct intel_encoder *encoder,
90 struct intel_crtc_config *pipe_config)
92 struct drm_device *dev = encoder->base.dev;
93 struct drm_i915_private *dev_priv = dev->dev_private;
94 u32 lvds_reg, tmp, flags = 0;
96 if (HAS_PCH_SPLIT(dev))
101 tmp = I915_READ(lvds_reg);
102 if (tmp & LVDS_HSYNC_POLARITY)
103 flags |= DRM_MODE_FLAG_NHSYNC;
105 flags |= DRM_MODE_FLAG_PHSYNC;
106 if (tmp & LVDS_VSYNC_POLARITY)
107 flags |= DRM_MODE_FLAG_NVSYNC;
109 flags |= DRM_MODE_FLAG_PVSYNC;
111 pipe_config->adjusted_mode.flags |= flags;
114 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
115 * This is an exception to the general rule that mode_set doesn't turn
118 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
120 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
121 struct drm_device *dev = encoder->base.dev;
122 struct drm_i915_private *dev_priv = dev->dev_private;
123 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
124 struct drm_display_mode *fixed_mode =
125 lvds_encoder->attached_connector->base.panel.fixed_mode;
126 int pipe = crtc->pipe;
129 if (HAS_PCH_SPLIT(dev)) {
130 assert_fdi_rx_pll_disabled(dev_priv, pipe);
131 assert_shared_dpll_disabled(dev_priv,
132 intel_crtc_to_shared_dpll(crtc));
134 assert_pll_disabled(dev_priv, pipe);
137 temp = I915_READ(lvds_encoder->reg);
138 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
140 if (HAS_PCH_CPT(dev)) {
141 temp &= ~PORT_TRANS_SEL_MASK;
142 temp |= PORT_TRANS_SEL_CPT(pipe);
145 temp |= LVDS_PIPEB_SELECT;
147 temp &= ~LVDS_PIPEB_SELECT;
151 /* set the corresponsding LVDS_BORDER bit */
152 temp &= ~LVDS_BORDER_ENABLE;
153 temp |= crtc->config.gmch_pfit.lvds_border_bits;
154 /* Set the B0-B3 data pairs corresponding to whether we're going to
155 * set the DPLLs for dual-channel mode or not.
157 if (lvds_encoder->is_dual_link)
158 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
160 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
162 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
163 * appropriately here, but we need to look more thoroughly into how
164 * panels behave in the two modes.
167 /* Set the dithering flag on LVDS as needed, note that there is no
168 * special lvds dither control bit on pch-split platforms, dithering is
169 * only controlled through the PIPECONF reg. */
170 if (INTEL_INFO(dev)->gen == 4) {
171 /* Bspec wording suggests that LVDS port dithering only exists
172 * for 18bpp panels. */
173 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
174 temp |= LVDS_ENABLE_DITHER;
176 temp &= ~LVDS_ENABLE_DITHER;
178 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
179 if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
180 temp |= LVDS_HSYNC_POLARITY;
181 if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
182 temp |= LVDS_VSYNC_POLARITY;
184 I915_WRITE(lvds_encoder->reg, temp);
188 * Sets the power state for the panel.
190 static void intel_enable_lvds(struct intel_encoder *encoder)
192 struct drm_device *dev = encoder->base.dev;
193 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
194 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
195 struct drm_i915_private *dev_priv = dev->dev_private;
196 u32 ctl_reg, stat_reg;
198 if (HAS_PCH_SPLIT(dev)) {
199 ctl_reg = PCH_PP_CONTROL;
200 stat_reg = PCH_PP_STATUS;
202 ctl_reg = PP_CONTROL;
203 stat_reg = PP_STATUS;
206 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
208 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
209 POSTING_READ(lvds_encoder->reg);
210 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
211 DRM_ERROR("timed out waiting for panel to power on\n");
213 intel_panel_enable_backlight(dev, intel_crtc->pipe);
216 static void intel_disable_lvds(struct intel_encoder *encoder)
218 struct drm_device *dev = encoder->base.dev;
219 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
220 struct drm_i915_private *dev_priv = dev->dev_private;
221 u32 ctl_reg, stat_reg;
223 if (HAS_PCH_SPLIT(dev)) {
224 ctl_reg = PCH_PP_CONTROL;
225 stat_reg = PCH_PP_STATUS;
227 ctl_reg = PP_CONTROL;
228 stat_reg = PP_STATUS;
231 intel_panel_disable_backlight(dev);
233 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
234 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
235 DRM_ERROR("timed out waiting for panel to power off\n");
237 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
238 POSTING_READ(lvds_encoder->reg);
241 static int intel_lvds_mode_valid(struct drm_connector *connector,
242 struct drm_display_mode *mode)
244 struct intel_connector *intel_connector = to_intel_connector(connector);
245 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
247 if (mode->hdisplay > fixed_mode->hdisplay)
249 if (mode->vdisplay > fixed_mode->vdisplay)
255 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
256 struct intel_crtc_config *pipe_config)
258 struct drm_device *dev = intel_encoder->base.dev;
259 struct drm_i915_private *dev_priv = dev->dev_private;
260 struct intel_lvds_encoder *lvds_encoder =
261 to_lvds_encoder(&intel_encoder->base);
262 struct intel_connector *intel_connector =
263 &lvds_encoder->attached_connector->base;
264 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
265 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
266 unsigned int lvds_bpp;
268 /* Should never happen!! */
269 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
270 DRM_ERROR("Can't support LVDS on pipe A\n");
274 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
280 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
281 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
282 pipe_config->pipe_bpp, lvds_bpp);
283 pipe_config->pipe_bpp = lvds_bpp;
287 * We have timings from the BIOS for the panel, put them in
288 * to the adjusted mode. The CRTC will be set up for this mode,
289 * with the panel scaling set up to source from the H/VDisplay
290 * of the original mode.
292 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
295 if (HAS_PCH_SPLIT(dev)) {
296 pipe_config->has_pch_encoder = true;
298 intel_pch_panel_fitting(intel_crtc, pipe_config,
299 intel_connector->panel.fitting_mode);
302 intel_gmch_panel_fitting(intel_crtc, pipe_config,
303 intel_connector->panel.fitting_mode);
306 drm_mode_set_crtcinfo(adjusted_mode, 0);
307 pipe_config->timings_set = true;
310 * XXX: It would be nice to support lower refresh rates on the
311 * panels to reduce power consumption, and perhaps match the
312 * user's requested refresh rate.
318 static void intel_lvds_mode_set(struct drm_encoder *encoder,
319 struct drm_display_mode *mode,
320 struct drm_display_mode *adjusted_mode)
323 * The LVDS pin pair will already have been turned on in the
324 * intel_crtc_mode_set since it has a large impact on the DPLL
330 * Detect the LVDS connection.
332 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
333 * connected and closed means disconnected. We also send hotplug events as
334 * needed, using lid status notification from the input layer.
336 static enum drm_connector_status
337 intel_lvds_detect(struct drm_connector *connector, bool force)
339 struct drm_device *dev = connector->dev;
340 enum drm_connector_status status;
342 status = intel_panel_detect(dev);
343 if (status != connector_status_unknown)
346 return connector_status_connected;
350 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
352 static int intel_lvds_get_modes(struct drm_connector *connector)
354 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
355 struct drm_device *dev = connector->dev;
356 struct drm_display_mode *mode;
358 /* use cached edid if we have one */
359 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
360 return drm_add_edid_modes(connector, lvds_connector->base.edid);
362 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
366 drm_mode_probed_add(connector, mode);
370 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
372 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
376 /* The GPU hangs up on these systems if modeset is performed on LID open */
377 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
379 .callback = intel_no_modeset_on_lid_dmi_callback,
380 .ident = "Toshiba Tecra A11",
382 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
383 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
387 { } /* terminating entry */
391 * Lid events. Note the use of 'modeset':
392 * - we set it to MODESET_ON_LID_OPEN on lid close,
393 * and set it to MODESET_DONE on open
394 * - we use it as a "only once" bit (ie we ignore
395 * duplicate events where it was already properly set)
396 * - the suspend/resume paths will set it to
397 * MODESET_SUSPENDED and ignore the lid open event,
398 * because they restore the mode ("lid open").
400 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
403 struct intel_lvds_connector *lvds_connector =
404 container_of(nb, struct intel_lvds_connector, lid_notifier);
405 struct drm_connector *connector = &lvds_connector->base.base;
406 struct drm_device *dev = connector->dev;
407 struct drm_i915_private *dev_priv = dev->dev_private;
409 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
412 mutex_lock(&dev_priv->modeset_restore_lock);
413 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
416 * check and update the status of LVDS connector after receiving
417 * the LID nofication event.
419 connector->status = connector->funcs->detect(connector, false);
421 /* Don't force modeset on machines where it causes a GPU lockup */
422 if (dmi_check_system(intel_no_modeset_on_lid))
424 if (!acpi_lid_open()) {
425 /* do modeset on next lid open event */
426 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
430 if (dev_priv->modeset_restore == MODESET_DONE)
433 drm_modeset_lock_all(dev);
434 intel_modeset_setup_hw_state(dev, true);
435 drm_modeset_unlock_all(dev);
437 dev_priv->modeset_restore = MODESET_DONE;
440 mutex_unlock(&dev_priv->modeset_restore_lock);
445 * intel_lvds_destroy - unregister and free LVDS structures
446 * @connector: connector to free
448 * Unregister the DDC bus for this connector then free the driver private
451 static void intel_lvds_destroy(struct drm_connector *connector)
453 struct intel_lvds_connector *lvds_connector =
454 to_lvds_connector(connector);
456 if (lvds_connector->lid_notifier.notifier_call)
457 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
459 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
460 kfree(lvds_connector->base.edid);
462 intel_panel_fini(&lvds_connector->base.panel);
464 drm_sysfs_connector_remove(connector);
465 drm_connector_cleanup(connector);
469 static int intel_lvds_set_property(struct drm_connector *connector,
470 struct drm_property *property,
473 struct intel_connector *intel_connector = to_intel_connector(connector);
474 struct drm_device *dev = connector->dev;
476 if (property == dev->mode_config.scaling_mode_property) {
477 struct drm_crtc *crtc;
479 if (value == DRM_MODE_SCALE_NONE) {
480 DRM_DEBUG_KMS("no scaling not supported\n");
484 if (intel_connector->panel.fitting_mode == value) {
485 /* the LVDS scaling property is not changed */
488 intel_connector->panel.fitting_mode = value;
490 crtc = intel_attached_encoder(connector)->base.crtc;
491 if (crtc && crtc->enabled) {
493 * If the CRTC is enabled, the display will be changed
494 * according to the new panel fitting mode.
496 intel_crtc_restore_mode(crtc);
503 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
504 .mode_set = intel_lvds_mode_set,
507 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
508 .get_modes = intel_lvds_get_modes,
509 .mode_valid = intel_lvds_mode_valid,
510 .best_encoder = intel_best_encoder,
513 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
514 .dpms = intel_connector_dpms,
515 .detect = intel_lvds_detect,
516 .fill_modes = drm_helper_probe_single_connector_modes,
517 .set_property = intel_lvds_set_property,
518 .destroy = intel_lvds_destroy,
521 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
522 .destroy = intel_encoder_destroy,
525 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
527 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
531 /* These systems claim to have LVDS, but really don't */
532 static const struct dmi_system_id intel_no_lvds[] = {
534 .callback = intel_no_lvds_dmi_callback,
535 .ident = "Apple Mac Mini (Core series)",
537 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
538 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
542 .callback = intel_no_lvds_dmi_callback,
543 .ident = "Apple Mac Mini (Core 2 series)",
545 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
546 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
550 .callback = intel_no_lvds_dmi_callback,
551 .ident = "MSI IM-945GSE-A",
553 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
554 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
558 .callback = intel_no_lvds_dmi_callback,
559 .ident = "Dell Studio Hybrid",
561 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
562 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
566 .callback = intel_no_lvds_dmi_callback,
567 .ident = "Dell OptiPlex FX170",
569 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
570 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
574 .callback = intel_no_lvds_dmi_callback,
575 .ident = "AOpen Mini PC",
577 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
578 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "AOpen Mini PC MP915",
585 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
586 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "AOpen i915GMm-HFS",
593 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
594 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "AOpen i45GMx-I",
601 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
602 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "Aopen i945GTt-VFA",
609 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
613 .callback = intel_no_lvds_dmi_callback,
614 .ident = "Clientron U800",
616 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
617 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
621 .callback = intel_no_lvds_dmi_callback,
622 .ident = "Clientron E830",
624 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
625 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
629 .callback = intel_no_lvds_dmi_callback,
630 .ident = "Asus EeeBox PC EB1007",
632 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
633 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
637 .callback = intel_no_lvds_dmi_callback,
638 .ident = "Asus AT5NM10T-I",
640 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
641 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
645 .callback = intel_no_lvds_dmi_callback,
646 .ident = "Hewlett-Packard HP t5740",
648 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
649 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
653 .callback = intel_no_lvds_dmi_callback,
654 .ident = "Hewlett-Packard t5745",
656 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
657 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Hewlett-Packard st5747",
664 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
665 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "MSI Wind Box DC500",
672 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
673 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "Gigabyte GA-D525TUD",
680 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
681 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "Supermicro X7SPA-H",
688 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
689 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "Fujitsu Esprimo Q900",
696 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
697 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Intel D510MO",
704 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
705 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Intel D525MW",
712 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
713 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
717 { } /* terminating entry */
721 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
723 * @connector: LVDS connector
725 * Find the reduced downclock for LVDS in EDID.
727 static void intel_find_lvds_downclock(struct drm_device *dev,
728 struct drm_display_mode *fixed_mode,
729 struct drm_connector *connector)
731 struct drm_i915_private *dev_priv = dev->dev_private;
732 struct drm_display_mode *scan;
735 temp_downclock = fixed_mode->clock;
736 list_for_each_entry(scan, &connector->probed_modes, head) {
738 * If one mode has the same resolution with the fixed_panel
739 * mode while they have the different refresh rate, it means
740 * that the reduced downclock is found for the LVDS. In such
741 * case we can set the different FPx0/1 to dynamically select
742 * between low and high frequency.
744 if (scan->hdisplay == fixed_mode->hdisplay &&
745 scan->hsync_start == fixed_mode->hsync_start &&
746 scan->hsync_end == fixed_mode->hsync_end &&
747 scan->htotal == fixed_mode->htotal &&
748 scan->vdisplay == fixed_mode->vdisplay &&
749 scan->vsync_start == fixed_mode->vsync_start &&
750 scan->vsync_end == fixed_mode->vsync_end &&
751 scan->vtotal == fixed_mode->vtotal) {
752 if (scan->clock < temp_downclock) {
754 * The downclock is already found. But we
755 * expect to find the lower downclock.
757 temp_downclock = scan->clock;
761 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
762 /* We found the downclock for LVDS. */
763 dev_priv->lvds_downclock_avail = 1;
764 dev_priv->lvds_downclock = temp_downclock;
765 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
766 "Normal clock %dKhz, downclock %dKhz\n",
767 fixed_mode->clock, temp_downclock);
772 * Enumerate the child dev array parsed from VBT to check whether
773 * the LVDS is present.
774 * If it is present, return 1.
775 * If it is not present, return false.
776 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
778 static bool lvds_is_present_in_vbt(struct drm_device *dev,
781 struct drm_i915_private *dev_priv = dev->dev_private;
784 if (!dev_priv->vbt.child_dev_num)
787 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
788 struct child_device_config *child = dev_priv->vbt.child_dev + i;
790 /* If the device type is not LFP, continue.
791 * We have to check both the new identifiers as well as the
792 * old for compatibility with some BIOSes.
794 if (child->device_type != DEVICE_TYPE_INT_LFP &&
795 child->device_type != DEVICE_TYPE_LFP)
798 if (intel_gmbus_is_port_valid(child->i2c_pin))
799 *i2c_pin = child->i2c_pin;
801 /* However, we cannot trust the BIOS writers to populate
802 * the VBT correctly. Since LVDS requires additional
803 * information from AIM blocks, a non-zero addin offset is
804 * a good indicator that the LVDS is actually present.
806 if (child->addin_offset)
809 /* But even then some BIOS writers perform some black magic
810 * and instantiate the device without reference to any
811 * additional data. Trust that if the VBT was written into
812 * the OpRegion then they have validated the LVDS's existence.
814 if (dev_priv->opregion.vbt)
821 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
823 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
827 static const struct dmi_system_id intel_dual_link_lvds[] = {
829 .callback = intel_dual_link_lvds_callback,
830 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
832 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
833 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
836 { } /* terminating entry */
839 bool intel_is_dual_link_lvds(struct drm_device *dev)
841 struct intel_encoder *encoder;
842 struct intel_lvds_encoder *lvds_encoder;
844 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
846 if (encoder->type == INTEL_OUTPUT_LVDS) {
847 lvds_encoder = to_lvds_encoder(&encoder->base);
849 return lvds_encoder->is_dual_link;
856 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
858 struct drm_device *dev = lvds_encoder->base.base.dev;
860 struct drm_i915_private *dev_priv = dev->dev_private;
862 /* use the module option value if specified */
863 if (i915_lvds_channel_mode > 0)
864 return i915_lvds_channel_mode == 2;
866 if (dmi_check_system(intel_dual_link_lvds))
869 /* BIOS should set the proper LVDS register value at boot, but
870 * in reality, it doesn't set the value when the lid is closed;
871 * we need to check "the value to be set" in VBT when LVDS
872 * register is uninitialized.
874 val = I915_READ(lvds_encoder->reg);
875 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
876 val = dev_priv->vbt.bios_lvds_val;
878 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
881 static bool intel_lvds_supported(struct drm_device *dev)
883 /* With the introduction of the PCH we gained a dedicated
884 * LVDS presence pin, use it. */
885 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
888 /* Otherwise LVDS was only attached to mobile products,
889 * except for the inglorious 830gm */
890 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
897 * intel_lvds_init - setup LVDS connectors on this device
900 * Create the connector, register the LVDS DDC bus, and try to figure out what
901 * modes we can display on the LVDS panel (if present).
903 void intel_lvds_init(struct drm_device *dev)
905 struct drm_i915_private *dev_priv = dev->dev_private;
906 struct intel_lvds_encoder *lvds_encoder;
907 struct intel_encoder *intel_encoder;
908 struct intel_lvds_connector *lvds_connector;
909 struct intel_connector *intel_connector;
910 struct drm_connector *connector;
911 struct drm_encoder *encoder;
912 struct drm_display_mode *scan; /* *modes, *bios_mode; */
913 struct drm_display_mode *fixed_mode = NULL;
915 struct drm_crtc *crtc;
920 if (!intel_lvds_supported(dev))
923 /* Skip init on machines we know falsely report LVDS */
924 if (dmi_check_system(intel_no_lvds))
927 pin = GMBUS_PORT_PANEL;
928 if (!lvds_is_present_in_vbt(dev, &pin)) {
929 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
933 if (HAS_PCH_SPLIT(dev)) {
934 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
936 if (dev_priv->vbt.edp_support) {
937 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
942 lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
946 lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
947 if (!lvds_connector) {
952 lvds_encoder->attached_connector = lvds_connector;
954 intel_encoder = &lvds_encoder->base;
955 encoder = &intel_encoder->base;
956 intel_connector = &lvds_connector->base;
957 connector = &intel_connector->base;
958 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
959 DRM_MODE_CONNECTOR_LVDS);
961 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
962 DRM_MODE_ENCODER_LVDS);
964 intel_encoder->enable = intel_enable_lvds;
965 intel_encoder->pre_enable = intel_pre_enable_lvds;
966 intel_encoder->compute_config = intel_lvds_compute_config;
967 intel_encoder->disable = intel_disable_lvds;
968 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
969 intel_encoder->get_config = intel_lvds_get_config;
970 intel_connector->get_hw_state = intel_connector_get_hw_state;
972 intel_connector_attach_encoder(intel_connector, intel_encoder);
973 intel_encoder->type = INTEL_OUTPUT_LVDS;
975 intel_encoder->cloneable = false;
976 if (HAS_PCH_SPLIT(dev))
977 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
978 else if (IS_GEN4(dev))
979 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
981 intel_encoder->crtc_mask = (1 << 1);
983 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
984 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
985 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
986 connector->interlace_allowed = false;
987 connector->doublescan_allowed = false;
989 if (HAS_PCH_SPLIT(dev)) {
990 lvds_encoder->reg = PCH_LVDS;
992 lvds_encoder->reg = LVDS;
995 /* create the scaling mode property */
996 drm_mode_create_scaling_mode_property(dev);
997 drm_object_attach_property(&connector->base,
998 dev->mode_config.scaling_mode_property,
999 DRM_MODE_SCALE_ASPECT);
1000 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1003 * 1) check for EDID on DDC
1004 * 2) check for VBT data
1005 * 3) check to see if LVDS is already on
1006 * if none of the above, no panel
1007 * 4) make sure lid is open
1008 * if closed, act like it's not there for now
1012 * Attempt to get the fixed panel mode from DDC. Assume that the
1013 * preferred mode is the right one.
1015 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1017 if (drm_add_edid_modes(connector, edid)) {
1018 drm_mode_connector_update_edid_property(connector,
1022 edid = ERR_PTR(-EINVAL);
1025 edid = ERR_PTR(-ENOENT);
1027 lvds_connector->base.edid = edid;
1029 if (IS_ERR_OR_NULL(edid)) {
1030 /* Didn't get an EDID, so
1031 * Set wide sync ranges so we get all modes
1032 * handed to valid_mode for checking
1034 connector->display_info.min_vfreq = 0;
1035 connector->display_info.max_vfreq = 200;
1036 connector->display_info.min_hfreq = 0;
1037 connector->display_info.max_hfreq = 200;
1040 list_for_each_entry(scan, &connector->probed_modes, head) {
1041 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1042 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1043 drm_mode_debug_printmodeline(scan);
1045 fixed_mode = drm_mode_duplicate(dev, scan);
1047 intel_find_lvds_downclock(dev, fixed_mode,
1054 /* Failed to get EDID, what about VBT? */
1055 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1056 DRM_DEBUG_KMS("using mode from VBT: ");
1057 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1059 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1061 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1067 * If we didn't get EDID, try checking if the panel is already turned
1068 * on. If so, assume that whatever is currently programmed is the
1072 /* Ironlake: FIXME if still fail, not try pipe mode now */
1073 if (HAS_PCH_SPLIT(dev))
1076 lvds = I915_READ(LVDS);
1077 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1078 crtc = intel_get_crtc_for_pipe(dev, pipe);
1080 if (crtc && (lvds & LVDS_PORT_EN)) {
1081 fixed_mode = intel_crtc_mode_get(dev, crtc);
1083 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1084 drm_mode_debug_printmodeline(fixed_mode);
1085 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1090 /* If we still don't have a mode after all that, give up. */
1095 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1096 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1097 lvds_encoder->is_dual_link ? "dual" : "single");
1100 * Unlock registers and just
1101 * leave them unlocked
1103 if (HAS_PCH_SPLIT(dev)) {
1104 I915_WRITE(PCH_PP_CONTROL,
1105 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1107 I915_WRITE(PP_CONTROL,
1108 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1110 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1111 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1112 DRM_DEBUG_KMS("lid notifier registration failed\n");
1113 lvds_connector->lid_notifier.notifier_call = NULL;
1115 drm_sysfs_connector_add(connector);
1117 intel_panel_init(&intel_connector->panel, fixed_mode);
1118 intel_panel_setup_backlight(connector);
1123 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1124 drm_connector_cleanup(connector);
1125 drm_encoder_cleanup(encoder);
1127 drm_mode_destroy(dev, fixed_mode);
1128 kfree(lvds_encoder);
1129 kfree(lvds_connector);