2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/kernel.h>
22 #include <linux/clk.h>
23 #include <linux/cpufreq.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/slab.h>
29 #include <linux/list.h>
30 #include <linux/iommu.h>
31 #include <linux/types.h>
32 #include <asm/sizes.h>
35 #include <mach/board.h>
36 #include <mach/socinfo.h>
37 #include <mach/iommu_domains.h>
41 #include <drm/drm_crtc_helper.h>
42 #include <drm/drm_fb_helper.h>
46 #define NUM_DOMAINS 1 /* one for KMS, then one per gpu core (?) */
48 struct msm_drm_private {
52 struct drm_fb_helper *fbdev;
54 /* list of GEM objects: */
55 struct list_head inactive_list;
57 struct workqueue_struct *wq;
59 /* registered IOMMU domains: */
60 unsigned int num_iommus;
61 struct iommu_domain *iommus[NUM_DOMAINS];
63 unsigned int num_crtcs;
64 struct drm_crtc *crtcs[8];
66 unsigned int num_encoders;
67 struct drm_encoder *encoders[8];
69 unsigned int num_connectors;
70 struct drm_connector *connectors[8];
74 uint32_t pixel_format;
77 /* As there are different display controller blocks depending on the
78 * snapdragon version, the kms support is split out and the appropriate
79 * implementation is loaded at runtime. The kms module is responsible
80 * for constructing the appropriate planes/crtcs/encoders/connectors.
82 struct msm_kms_funcs {
83 /* hw initialization: */
84 int (*hw_init)(struct msm_kms *kms);
86 void (*irq_preinstall)(struct msm_kms *kms);
87 int (*irq_postinstall)(struct msm_kms *kms);
88 void (*irq_uninstall)(struct msm_kms *kms);
89 irqreturn_t (*irq)(struct msm_kms *kms);
90 int (*enable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);
91 void (*disable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);
93 const struct msm_format *(*get_format)(struct msm_kms *kms, uint32_t format);
94 long (*round_pixclk)(struct msm_kms *kms, unsigned long rate,
95 struct drm_encoder *encoder);
97 void (*preclose)(struct msm_kms *kms, struct drm_file *file);
98 void (*destroy)(struct msm_kms *kms);
102 const struct msm_kms_funcs *funcs;
105 struct msm_kms *mdp4_kms_init(struct drm_device *dev);
107 int msm_register_iommu(struct drm_device *dev, struct iommu_domain *iommu);
108 int msm_iommu_attach(struct drm_device *dev, struct iommu_domain *iommu,
109 const char **names, int cnt);
111 int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
112 int msm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
113 uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
114 int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
116 int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint32_t *iova);
117 void msm_gem_put_iova(struct drm_gem_object *obj, int id);
118 int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
119 struct drm_mode_create_dumb *args);
120 int msm_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
122 int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
123 uint32_t handle, uint64_t *offset);
124 void *msm_gem_vaddr_locked(struct drm_gem_object *obj);
125 void *msm_gem_vaddr(struct drm_gem_object *obj);
126 int msm_gem_queue_inactive_work(struct drm_gem_object *obj,
127 struct work_struct *work);
128 void msm_gem_free_object(struct drm_gem_object *obj);
129 int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
130 uint32_t size, uint32_t flags, uint32_t *handle);
131 struct drm_gem_object *msm_gem_new(struct drm_device *dev,
132 uint32_t size, uint32_t flags);
134 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
135 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
136 struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
137 struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
138 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
139 struct drm_file *file, struct drm_mode_fb_cmd2 *mode_cmd);
141 struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
143 struct drm_connector *hdmi_connector_init(struct drm_device *dev,
144 struct drm_encoder *encoder);
145 void __init hdmi_register(void);
146 void __exit hdmi_unregister(void);
148 #ifdef CONFIG_DEBUG_FS
149 void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
150 void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
151 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
154 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
155 const char *dbgname);
156 void msm_writel(u32 data, void __iomem *addr);
157 u32 msm_readl(const void __iomem *addr);
159 #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
160 #define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
162 static inline int align_pitch(int width, int bpp)
164 int bytespp = (bpp + 7) / 8;
165 /* adreno needs pitch aligned to 32 pixels: */
166 return bytespp * ALIGN(width, 32);
169 /* for the generated headers: */
170 #define INVALID_IDX(idx) ({BUG(); 0;})
172 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
174 /* for conditionally setting boolean flag(s): */
175 #define COND(bool, val) ((bool) ? (val) : 0)
177 /* just put these here until we start adding driver private ioctls: */
178 // TODO might shuffle these around.. just need something for now..
179 #define MSM_BO_CACHE_MASK 0x0000000f
180 #define MSM_BO_SCANOUT 0x00010000 /* scanout capable */
182 #define MSM_BO_CACHED 0x00000001 /* default */
183 #define MSM_BO_WC 0x0000002
184 #define MSM_BO_UNCACHED 0x00000004
187 #endif /* __MSM_DRV_H__ */