2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <engine/software.h>
26 #include <engine/disp.h>
28 #include <core/class.h>
32 static struct nouveau_oclass
33 nv84_disp_sclass[] = {
34 { NV84_DISP_MAST_CLASS, &nv50_disp_mast_ofuncs },
35 { NV84_DISP_SYNC_CLASS, &nv50_disp_sync_ofuncs },
36 { NV84_DISP_OVLY_CLASS, &nv50_disp_ovly_ofuncs },
37 { NV84_DISP_OIMM_CLASS, &nv50_disp_oimm_ofuncs },
38 { NV84_DISP_CURS_CLASS, &nv50_disp_curs_ofuncs },
43 nv84_disp_base_omthds[] = {
44 { SOR_MTHD(NV50_DISP_SOR_PWR) , nv50_sor_mthd },
45 { SOR_MTHD(NV84_DISP_SOR_HDMI_PWR) , nv50_sor_mthd },
46 { SOR_MTHD(NV50_DISP_SOR_LVDS_SCRIPT) , nv50_sor_mthd },
47 { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd },
48 { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd },
49 { PIOR_MTHD(NV50_DISP_PIOR_PWR) , nv50_pior_mthd },
50 { PIOR_MTHD(NV50_DISP_PIOR_TMDS_PWR) , nv50_pior_mthd },
51 { PIOR_MTHD(NV50_DISP_PIOR_DP_PWR) , nv50_pior_mthd },
55 static struct nouveau_oclass
56 nv84_disp_base_oclass[] = {
57 { NV84_DISP_CLASS, &nv50_disp_base_ofuncs, nv84_disp_base_omthds },
62 nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
63 struct nouveau_oclass *oclass, void *data, u32 size,
64 struct nouveau_object **pobject)
66 struct nv50_disp_priv *priv;
69 ret = nouveau_disp_create(parent, engine, oclass, 2, "PDISP",
71 *pobject = nv_object(priv);
75 nv_engine(priv)->sclass = nv84_disp_base_oclass;
76 nv_engine(priv)->cclass = &nv50_disp_cclass;
77 nv_subdev(priv)->intr = nv50_disp_intr;
78 INIT_WORK(&priv->supervisor, nv50_disp_intr_supervisor);
79 priv->sclass = nv84_disp_sclass;
84 priv->dac.power = nv50_dac_power;
85 priv->dac.sense = nv50_dac_sense;
86 priv->sor.power = nv50_sor_power;
87 priv->sor.hdmi = nv84_hdmi_ctrl;
88 priv->pior.power = nv50_pior_power;
89 priv->pior.dp = &nv50_pior_dp_func;
95 .handle = NV_ENGINE(DISP, 0x82),
96 .ofuncs = &(struct nouveau_ofuncs) {
97 .ctor = nv84_disp_ctor,
98 .dtor = _nouveau_disp_dtor,
99 .init = _nouveau_disp_init,
100 .fini = _nouveau_disp_fini,