2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <engine/software.h>
26 #include <engine/disp.h>
28 #include <core/class.h>
32 static struct nouveau_oclass
33 nva3_disp_sclass[] = {
34 { NVA3_DISP_MAST_CLASS, &nv50_disp_mast_ofuncs },
35 { NVA3_DISP_SYNC_CLASS, &nv50_disp_sync_ofuncs },
36 { NVA3_DISP_OVLY_CLASS, &nv50_disp_ovly_ofuncs },
37 { NVA3_DISP_OIMM_CLASS, &nv50_disp_oimm_ofuncs },
38 { NVA3_DISP_CURS_CLASS, &nv50_disp_curs_ofuncs },
43 nva3_disp_base_omthds[] = {
44 { SOR_MTHD(NV50_DISP_SOR_PWR) , nv50_sor_mthd },
45 { SOR_MTHD(NVA3_DISP_SOR_HDA_ELD) , nv50_sor_mthd },
46 { SOR_MTHD(NV84_DISP_SOR_HDMI_PWR) , nv50_sor_mthd },
47 { SOR_MTHD(NV94_DISP_SOR_DP_TRAIN) , nv50_sor_mthd },
48 { SOR_MTHD(NV94_DISP_SOR_DP_LNKCTL) , nv50_sor_mthd },
49 { SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(0)), nv50_sor_mthd },
50 { SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(1)), nv50_sor_mthd },
51 { SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(2)), nv50_sor_mthd },
52 { SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(3)), nv50_sor_mthd },
53 { DAC_MTHD(NV50_DISP_DAC_PWR) , nv50_dac_mthd },
54 { DAC_MTHD(NV50_DISP_DAC_LOAD) , nv50_dac_mthd },
58 static struct nouveau_oclass
59 nva3_disp_base_oclass[] = {
60 { NVA3_DISP_CLASS, &nv50_disp_base_ofuncs, nva3_disp_base_omthds },
65 nva3_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
66 struct nouveau_oclass *oclass, void *data, u32 size,
67 struct nouveau_object **pobject)
69 struct nv50_disp_priv *priv;
72 ret = nouveau_disp_create(parent, engine, oclass, "PDISP",
74 *pobject = nv_object(priv);
78 nv_engine(priv)->sclass = nva3_disp_base_oclass;
79 nv_engine(priv)->cclass = &nv50_disp_cclass;
80 nv_subdev(priv)->intr = nv50_disp_intr;
81 priv->sclass = nva3_disp_sclass;
85 priv->dac.power = nv50_dac_power;
86 priv->dac.sense = nv50_dac_sense;
87 priv->sor.power = nv50_sor_power;
88 priv->sor.hda_eld = nva3_hda_eld;
89 priv->sor.hdmi = nva3_hdmi_ctrl;
90 priv->sor.dp_train = nv94_sor_dp_train;
91 priv->sor.dp_lnkctl = nv94_sor_dp_lnkctl;
92 priv->sor.dp_drvctl = nv94_sor_dp_drvctl;
94 INIT_LIST_HEAD(&priv->base.vblank.list);
95 spin_lock_init(&priv->base.vblank.lock);
101 .handle = NV_ENGINE(DISP, 0x85),
102 .ofuncs = &(struct nouveau_ofuncs) {
103 .ctor = nva3_disp_ctor,
104 .dtor = _nouveau_disp_dtor,
105 .init = _nouveau_disp_init,
106 .fini = _nouveau_disp_fini,