1 uint32_t nvc0_grgpc_data[] = {
4 /* 0x0004: gpc_mmio_list_head */
6 /* 0x0008: gpc_mmio_list_tail */
8 /* 0x000c: tpc_count */
10 /* 0x0010: tpc_mask */
12 /* 0x0014: tpc_mmio_list_head */
14 /* 0x0018: tpc_mmio_list_tail */
16 /* 0x001c: cmd_queue */
35 /* 0x0064: chipsets */
64 /* 0x00d4: nvc0_gpc_mmio_head */
89 /* 0x0134: nvc0_gpc_mmio_tail */
90 /* 0x0134: nnvc0_gpc_mmio_head */
115 /* 0x0194: nnvc0_gpc_mmio_tail */
117 /* 0x0198: nnvc1_gpc_mmio_tail */
118 /* 0x0198: nvd9_gpc_mmio_head */
145 /* 0x0200: nvd9_gpc_mmio_tail */
146 /* 0x0200: nvc0_tpc_mmio_head */
167 /* 0x0250: nvc0_tpc_mmio_tail */
171 /* 0x025c: nvcf_tpc_mmio_tail */
173 /* 0x0260: nvc3_tpc_mmio_tail */
174 /* 0x0260: nnvc0_tpc_mmio_head */
194 /* 0x02ac: nnvc0_tpc_mmio_tail */
195 /* 0x02ac: nnvc3_tpc_mmio_head */
218 /* 0x0304: nnvc3_tpc_mmio_tail */
220 /* 0x0308: nnvc1_tpc_mmio_tail */
221 /* 0x0308: nvd9_tpc_mmio_head */
247 uint32_t nvc0_grgpc_code[] = {
249 /* 0x0004: queue_put */
256 /* 0x001c: queue_put_next */
264 /* 0x0039: queue_get */
276 /* 0x0066: queue_get_done */
278 /* 0x0068: nv_rd32 */
283 /* 0x0078: nv_rd32_wait */
289 /* 0x008d: nv_wr32 */
295 /* 0x00a3: nv_wr32_wait */
299 /* 0x00ae: watchdog_reset */
304 /* 0x00bd: watchdog_clear */
308 /* 0x00c9: wait_donez */
315 /* 0x00e2: wait_done_wait_donez */
324 /* 0x0103: wait_doneo */
332 /* 0x011c: wait_done_wait_doneo */
341 /* 0x013d: mmctx_size */
342 /* 0x013f: nv_mmctx_size_loop */
351 /* 0x015c: mmctx_xfer */
361 /* 0x0180: mmctx_base_disabled */
365 /* 0x018f: mmctx_multi_disabled */
373 /* 0x01a8: mmctx_exec_loop */
374 /* 0x01a8: mmctx_wait_free */
383 /* 0x01c9: mmctx_fini_wait */
389 /* 0x01de: mmctx_stop */
394 /* 0x01ed: mmctx_stop_wait */
397 /* 0x01f6: mmctx_done */
402 /* 0x0207: strand_wait */
406 /* 0x0213: strand_pre */
412 /* 0x0226: strand_post */
418 /* 0x0239: strand_set */
429 /* 0x0263: strand_ctx_init */
452 /* 0x02ba: ctx_init_strand_loop */
496 /* 0x035f: init_find_chipset */
502 /* 0x0373: init_context */
552 /* 0x0431: main_not_ctx_xfer */
571 /* 0x0474: ih_no_fifo */
578 /* 0x048f: hub_barrier_done */
585 /* 0x04a4: ctx_redswitch */
590 /* 0x04b4: ctx_redswitch_delay */
594 /* 0x04c3: ctx_xfer */
600 /* 0x04d4: ctx_xfer_not_load */
630 /* 0x054b: ctx_xfer_post */
636 /* 0x055c: ctx_xfer_done */