2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * Supports following chips:
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/i2c.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/err.h>
35 #include <linux/mutex.h>
36 #include <linux/delay.h>
38 /* Addresses to scan */
39 static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
45 module_param(reset, bool, 0);
46 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
49 #define W83795_REG_BANKSEL 0x00
50 #define W83795_REG_VENDORID 0xfd
51 #define W83795_REG_CHIPID 0xfe
52 #define W83795_REG_DEVICEID 0xfb
53 #define W83795_REG_DEVICEID_A 0xff
55 #define W83795_REG_I2C_ADDR 0xfc
56 #define W83795_REG_CONFIG 0x01
57 #define W83795_REG_CONFIG_CONFIG48 0x04
58 #define W83795_REG_CONFIG_START 0x01
60 /* Multi-Function Pin Ctrl Registers */
61 #define W83795_REG_VOLT_CTRL1 0x02
62 #define W83795_REG_VOLT_CTRL2 0x03
63 #define W83795_REG_TEMP_CTRL1 0x04
64 #define W83795_REG_TEMP_CTRL2 0x05
65 #define W83795_REG_FANIN_CTRL1 0x06
66 #define W83795_REG_FANIN_CTRL2 0x07
67 #define W83795_REG_VMIGB_CTRL 0x08
69 #define TEMP_CTRL_DISABLE 0
70 #define TEMP_CTRL_TD 1
71 #define TEMP_CTRL_VSEN 2
72 #define TEMP_CTRL_TR 3
73 #define TEMP_CTRL_SHIFT 4
74 #define TEMP_CTRL_HASIN_SHIFT 5
75 /* temp mode may effect VSEN17-12 (in20-15) */
76 static const u16 W83795_REG_TEMP_CTRL[][6] = {
77 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
78 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
79 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
80 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
81 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
82 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
83 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
88 #define TEMP_CRIT_HYST 2
90 #define TEMP_WARN_HYST 4
91 /* only crit and crit_hyst affect real-time alarm status
92 * current crit crit_hyst warn warn_hyst */
93 static const u16 W83795_REG_TEMP[][5] = {
94 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
95 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
96 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
97 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
98 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
99 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
105 static const u16 W83795_REG_IN[][3] = {
106 /* Current, HL, LL */
107 {0x10, 0x70, 0x71}, /* VSEN1 */
108 {0x11, 0x72, 0x73}, /* VSEN2 */
109 {0x12, 0x74, 0x75}, /* VSEN3 */
110 {0x13, 0x76, 0x77}, /* VSEN4 */
111 {0x14, 0x78, 0x79}, /* VSEN5 */
112 {0x15, 0x7a, 0x7b}, /* VSEN6 */
113 {0x16, 0x7c, 0x7d}, /* VSEN7 */
114 {0x17, 0x7e, 0x7f}, /* VSEN8 */
115 {0x18, 0x80, 0x81}, /* VSEN9 */
116 {0x19, 0x82, 0x83}, /* VSEN10 */
117 {0x1A, 0x84, 0x85}, /* VSEN11 */
118 {0x1B, 0x86, 0x87}, /* VTT */
119 {0x1C, 0x88, 0x89}, /* 3VDD */
120 {0x1D, 0x8a, 0x8b}, /* 3VSB */
121 {0x1E, 0x8c, 0x8d}, /* VBAT */
122 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
123 {0x20, 0xaa, 0xab}, /* VSEN13 */
124 {0x21, 0x96, 0x97}, /* VSEN14 */
125 {0x22, 0x9a, 0x9b}, /* VSEN15 */
126 {0x23, 0x9e, 0x9f}, /* VSEN16 */
127 {0x24, 0xa2, 0xa3}, /* VSEN17 */
129 #define W83795_REG_VRLSB 0x3C
131 static const u8 W83795_REG_IN_HL_LSB[] = {
135 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
144 #define IN_LSB_REG(index, type) \
145 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
146 : (W83795_REG_IN_HL_LSB[(index)] + 1))
148 #define IN_LSB_REG_NUM 10
150 #define IN_LSB_SHIFT 0
152 static const u8 IN_LSB_SHIFT_IDX[][2] = {
153 /* High/Low LSB shift, LSB No. */
154 {0x00, 0x00}, /* VSEN1 */
155 {0x02, 0x00}, /* VSEN2 */
156 {0x04, 0x00}, /* VSEN3 */
157 {0x06, 0x00}, /* VSEN4 */
158 {0x00, 0x01}, /* VSEN5 */
159 {0x02, 0x01}, /* VSEN6 */
160 {0x04, 0x01}, /* VSEN7 */
161 {0x06, 0x01}, /* VSEN8 */
162 {0x00, 0x02}, /* VSEN9 */
163 {0x02, 0x02}, /* VSEN10 */
164 {0x04, 0x02}, /* VSEN11 */
165 {0x00, 0x03}, /* VTT */
166 {0x02, 0x03}, /* 3VDD */
167 {0x04, 0x03}, /* 3VSB */
168 {0x06, 0x03}, /* VBAT */
169 {0x06, 0x04}, /* VSEN12 */
170 {0x06, 0x05}, /* VSEN13 */
171 {0x06, 0x06}, /* VSEN14 */
172 {0x06, 0x07}, /* VSEN15 */
173 {0x06, 0x08}, /* VSEN16 */
174 {0x06, 0x09}, /* VSEN17 */
178 #define W83795_REG_FAN(index) (0x2E + (index))
179 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
180 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
181 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
182 (((index) & 1) ? 4 : 0)
184 #define W83795_REG_VID_CTRL 0x6A
186 #define ALARM_BEEP_REG_NUM 6
187 #define W83795_REG_ALARM(index) (0x41 + (index))
188 #define W83795_REG_BEEP(index) (0x50 + (index))
190 #define W83795_REG_CLR_CHASSIS 0x4D
193 #define W83795_REG_TEMP_NUM 6
194 #define W83795_REG_FCMS1 0x201
195 #define W83795_REG_FCMS2 0x208
196 #define W83795_REG_TFMR(index) (0x202 + (index))
197 #define W83795_REG_FOMC 0x20F
199 #define W83795_REG_TSS(index) (0x209 + (index))
203 #define PWM_NONSTOP 2
204 #define PWM_STOP_TIME 3
206 #define W83795_REG_PWM(index, nr) \
207 (((nr) == 0 ? 0x210 : \
208 (nr) == 1 ? 0x220 : \
209 (nr) == 2 ? 0x228 : \
210 (nr) == 3 ? 0x230 : 0x218) + (index))
212 #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
213 #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
214 #define W83795_REG_TFTS 0x250
216 #define TEMP_PWM_TTTI 0
217 #define TEMP_PWM_CTFS 1
218 #define TEMP_PWM_HCT 2
219 #define TEMP_PWM_HOT 3
220 #define W83795_REG_TTTI(index) (0x260 + (index))
221 #define W83795_REG_CTFS(index) (0x268 + (index))
222 #define W83795_REG_HT(index) (0x270 + (index))
226 #define W83795_REG_SF4_TEMP(temp_num, index) \
227 (0x280 + 0x10 * (temp_num) + (index))
228 #define W83795_REG_SF4_PWM(temp_num, index) \
229 (0x288 + 0x10 * (temp_num) + (index))
231 #define W83795_REG_DTSC 0x301
232 #define W83795_REG_DTSE 0x302
233 #define W83795_REG_DTS(index) (0x26 + (index))
234 #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
237 #define DTS_CRIT_HYST 1
239 #define DTS_WARN_HYST 3
240 #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
242 #define SETUP_PWM_DEFAULT 0
243 #define SETUP_PWM_UPTIME 1
244 #define SETUP_PWM_DOWNTIME 2
245 #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
247 static inline u16 in_from_reg(u8 index, u16 val)
249 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
250 if (index >= 12 && index <= 14)
256 static inline u16 in_to_reg(u8 index, u16 val)
258 if (index >= 12 && index <= 14)
264 static inline unsigned long fan_from_reg(u16 val)
266 if ((val == 0xfff) || (val == 0))
268 return 1350000UL / val;
271 static inline u16 fan_to_reg(long rpm)
275 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
278 static inline unsigned long time_from_reg(u8 reg)
283 static inline u8 time_to_reg(unsigned long val)
285 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
288 static inline long temp_from_reg(s8 reg)
293 static inline s8 temp_to_reg(long val, s8 min, s8 max)
295 return SENSORS_LIMIT(val / 1000, min, max);
298 static const u16 pwm_freq_cksel0[16] = {
299 1024, 512, 341, 256, 205, 171, 146, 128,
300 85, 64, 32, 16, 8, 4, 2, 1
303 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
305 unsigned long base_clock;
308 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
309 return base_clock / ((reg & 0x7f) + 1);
311 return pwm_freq_cksel0[reg & 0x0f];
314 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
316 unsigned long base_clock;
318 unsigned long best0, best1;
320 /* Best fit for cksel = 0 */
321 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
322 if (val > (pwm_freq_cksel0[reg0] +
323 pwm_freq_cksel0[reg0 + 1]) / 2)
326 if (val < 375) /* cksel = 1 can't beat this */
328 best0 = pwm_freq_cksel0[reg0];
330 /* Best fit for cksel = 1 */
331 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
332 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
333 best1 = base_clock / reg1;
334 reg1 = 0x80 | (reg1 - 1);
336 /* Choose the closest one */
337 if (abs(val - best0) > abs(val - best1))
343 enum chip_types {w83795g, w83795adg};
346 struct device *hwmon_dev;
347 struct mutex update_lock;
348 unsigned long last_updated; /* In jiffies */
349 enum chip_types chip_type;
353 u32 has_in; /* Enable monitor VIN or not */
354 u8 has_dyn_in; /* Only in2-0 can have this */
355 u16 in[21][3]; /* Register value, read/high/low */
356 u8 in_lsb[10][3]; /* LSB Register value, high/low */
357 u8 has_gain; /* has gain: in17-20 * 8 */
359 u16 has_fan; /* Enable fan14-1 or not */
360 u16 fan[14]; /* Register value combine */
361 u16 fan_min[14]; /* Register value combine */
363 u8 has_temp; /* Enable monitor temp6-1 or not */
364 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
365 u8 temp_read_vrlsb[6];
366 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
367 u8 temp_src[3]; /* Register value */
369 u8 enable_dts; /* Enable PECI and SB-TSI,
370 * bit 0: =1 enable, =0 disable,
371 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
372 u8 has_dts; /* Enable monitor DTS temp */
373 s8 dts[8]; /* Register value */
374 u8 dts_read_vrlsb[8]; /* Register value */
375 s8 dts_ext[4]; /* Register value */
377 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
378 * no config register, only affected by chip
380 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
382 u16 clkin; /* CLKIN frequency in kHz */
383 u8 pwm_fcms[2]; /* Register value */
384 u8 pwm_tfmr[6]; /* Register value */
385 u8 pwm_fomc; /* Register value */
387 u16 target_speed[8]; /* Register value, target speed for speed
389 u8 tol_speed; /* tolerance of target speed */
390 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
391 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
393 u8 setup_pwm[3]; /* Register value */
395 u8 alarms[6]; /* Register value */
396 u8 beeps[6]; /* Register value */
403 * We assume that nobdody can change the bank outside the driver.
406 /* Must be called with data->update_lock held, except during initialization */
407 static int w83795_set_bank(struct i2c_client *client, u8 bank)
409 struct w83795_data *data = i2c_get_clientdata(client);
412 /* If the same bank is already set, nothing to do */
413 if ((data->bank & 0x07) == bank)
416 /* Change to new bank, preserve all other bits */
417 bank |= data->bank & ~0x07;
418 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
420 dev_err(&client->dev,
421 "Failed to set bank to %d, err %d\n",
430 /* Must be called with data->update_lock held, except during initialization */
431 static u8 w83795_read(struct i2c_client *client, u16 reg)
435 err = w83795_set_bank(client, reg >> 8);
437 return 0x00; /* Arbitrary */
439 err = i2c_smbus_read_byte_data(client, reg & 0xff);
441 dev_err(&client->dev,
442 "Failed to read from register 0x%03x, err %d\n",
444 return 0x00; /* Arbitrary */
449 /* Must be called with data->update_lock held, except during initialization */
450 static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
454 err = w83795_set_bank(client, reg >> 8);
458 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
460 dev_err(&client->dev,
461 "Failed to write to register 0x%03x, err %d\n",
466 static struct w83795_data *w83795_update_device(struct device *dev)
468 struct i2c_client *client = to_i2c_client(dev);
469 struct w83795_data *data = i2c_get_clientdata(client);
473 mutex_lock(&data->update_lock);
475 if (!(time_after(jiffies, data->last_updated + HZ * 2)
479 /* Update the voltages value */
480 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
481 if (!(data->has_in & (1 << i)))
483 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
484 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
485 data->in[i][IN_READ] = tmp;
488 /* in0-2 can have dynamic limits (W83795G only) */
489 if (data->has_dyn_in) {
490 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
491 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
493 for (i = 0; i < 3; i++) {
494 if (!(data->has_dyn_in & (1 << i)))
496 data->in[i][IN_MAX] =
497 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
498 data->in[i][IN_LOW] =
499 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
500 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
501 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
506 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
507 if (!(data->has_fan & (1 << i)))
509 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
511 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
514 /* Update temperature */
515 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
516 /* even stop monitor, register still keep value, just read out
518 if (!(data->has_temp & (1 << i))) {
519 data->temp[i][TEMP_READ] = 0;
520 data->temp_read_vrlsb[i] = 0;
523 data->temp[i][TEMP_READ] =
524 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
525 data->temp_read_vrlsb[i] =
526 w83795_read(client, W83795_REG_VRLSB);
529 /* Update dts temperature */
530 if (data->enable_dts != 0) {
531 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
532 if (!(data->has_dts & (1 << i)))
535 w83795_read(client, W83795_REG_DTS(i));
536 data->dts_read_vrlsb[i] =
537 w83795_read(client, W83795_REG_VRLSB);
541 /* Update pwm output */
542 for (i = 0; i < data->has_pwm; i++) {
543 data->pwm[i][PWM_OUTPUT] =
544 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
548 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
549 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
551 data->last_updated = jiffies;
555 mutex_unlock(&data->update_lock);
563 #define ALARM_STATUS 0
564 #define BEEP_ENABLE 1
566 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
568 struct w83795_data *data = w83795_update_device(dev);
569 struct sensor_device_attribute_2 *sensor_attr =
570 to_sensor_dev_attr_2(attr);
571 int nr = sensor_attr->nr;
572 int index = sensor_attr->index >> 3;
573 int bit = sensor_attr->index & 0x07;
576 if (ALARM_STATUS == nr) {
577 val = (data->alarms[index] >> (bit)) & 1;
578 } else { /* BEEP_ENABLE */
579 val = (data->beeps[index] >> (bit)) & 1;
582 return sprintf(buf, "%u\n", val);
586 store_beep(struct device *dev, struct device_attribute *attr,
587 const char *buf, size_t count)
589 struct i2c_client *client = to_i2c_client(dev);
590 struct w83795_data *data = i2c_get_clientdata(client);
591 struct sensor_device_attribute_2 *sensor_attr =
592 to_sensor_dev_attr_2(attr);
593 int index = sensor_attr->index >> 3;
594 int shift = sensor_attr->index & 0x07;
595 u8 beep_bit = 1 << shift;
598 if (strict_strtoul(buf, 10, &val) < 0)
600 if (val != 0 && val != 1)
603 mutex_lock(&data->update_lock);
604 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
605 data->beeps[index] &= ~beep_bit;
606 data->beeps[index] |= val << shift;
607 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
608 mutex_unlock(&data->update_lock);
613 /* Write any value to clear chassis alarm */
615 store_chassis_clear(struct device *dev,
616 struct device_attribute *attr, const char *buf,
619 struct i2c_client *client = to_i2c_client(dev);
620 struct w83795_data *data = i2c_get_clientdata(client);
623 mutex_lock(&data->update_lock);
624 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
626 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
627 mutex_unlock(&data->update_lock);
634 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
636 struct sensor_device_attribute_2 *sensor_attr =
637 to_sensor_dev_attr_2(attr);
638 int nr = sensor_attr->nr;
639 int index = sensor_attr->index;
640 struct w83795_data *data = w83795_update_device(dev);
644 val = data->fan[index] & 0x0fff;
646 val = data->fan_min[index] & 0x0fff;
648 return sprintf(buf, "%lu\n", fan_from_reg(val));
652 store_fan_min(struct device *dev, struct device_attribute *attr,
653 const char *buf, size_t count)
655 struct sensor_device_attribute_2 *sensor_attr =
656 to_sensor_dev_attr_2(attr);
657 int index = sensor_attr->index;
658 struct i2c_client *client = to_i2c_client(dev);
659 struct w83795_data *data = i2c_get_clientdata(client);
662 if (strict_strtoul(buf, 10, &val))
664 val = fan_to_reg(val);
666 mutex_lock(&data->update_lock);
667 data->fan_min[index] = val;
668 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
672 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
675 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
678 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
679 mutex_unlock(&data->update_lock);
685 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
687 struct w83795_data *data = w83795_update_device(dev);
688 struct sensor_device_attribute_2 *sensor_attr =
689 to_sensor_dev_attr_2(attr);
690 int nr = sensor_attr->nr;
691 int index = sensor_attr->index;
696 val = time_from_reg(data->pwm[index][nr]);
699 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
702 val = data->pwm[index][nr];
706 return sprintf(buf, "%u\n", val);
710 store_pwm(struct device *dev, struct device_attribute *attr,
711 const char *buf, size_t count)
713 struct i2c_client *client = to_i2c_client(dev);
714 struct w83795_data *data = i2c_get_clientdata(client);
715 struct sensor_device_attribute_2 *sensor_attr =
716 to_sensor_dev_attr_2(attr);
717 int nr = sensor_attr->nr;
718 int index = sensor_attr->index;
721 if (strict_strtoul(buf, 10, &val) < 0)
724 mutex_lock(&data->update_lock);
727 val = time_to_reg(val);
730 val = pwm_freq_to_reg(val, data->clkin);
733 val = SENSORS_LIMIT(val, 0, 0xff);
736 w83795_write(client, W83795_REG_PWM(index, nr), val);
737 data->pwm[index][nr] = val;
738 mutex_unlock(&data->update_lock);
743 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
745 struct sensor_device_attribute_2 *sensor_attr =
746 to_sensor_dev_attr_2(attr);
747 struct i2c_client *client = to_i2c_client(dev);
748 struct w83795_data *data = i2c_get_clientdata(client);
749 int index = sensor_attr->index;
752 if (1 == (data->pwm_fcms[0] & (1 << index))) {
756 for (tmp = 0; tmp < 6; tmp++) {
757 if (data->pwm_tfmr[tmp] & (1 << index)) {
762 if (data->pwm_fomc & (1 << index))
768 return sprintf(buf, "%u\n", tmp);
772 store_pwm_enable(struct device *dev, struct device_attribute *attr,
773 const char *buf, size_t count)
775 struct i2c_client *client = to_i2c_client(dev);
776 struct w83795_data *data = i2c_get_clientdata(client);
777 struct sensor_device_attribute_2 *sensor_attr =
778 to_sensor_dev_attr_2(attr);
779 int index = sensor_attr->index;
783 if (strict_strtoul(buf, 10, &val) < 0)
788 mutex_lock(&data->update_lock);
792 data->pwm_fcms[0] &= ~(1 << index);
793 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
794 for (i = 0; i < 6; i++) {
795 data->pwm_tfmr[i] &= ~(1 << index);
796 w83795_write(client, W83795_REG_TFMR(i),
799 data->pwm_fomc |= 1 << index;
800 data->pwm_fomc ^= val << index;
801 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
804 data->pwm_fcms[0] |= (1 << index);
805 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
808 mutex_unlock(&data->update_lock);
813 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
815 struct sensor_device_attribute_2 *sensor_attr =
816 to_sensor_dev_attr_2(attr);
817 struct i2c_client *client = to_i2c_client(dev);
818 struct w83795_data *data = i2c_get_clientdata(client);
819 int index = sensor_attr->index;
821 u8 tmp = data->temp_src[val];
830 return sprintf(buf, "%u\n", tmp);
834 store_temp_src(struct device *dev, struct device_attribute *attr,
835 const char *buf, size_t count)
837 struct i2c_client *client = to_i2c_client(dev);
838 struct w83795_data *data = i2c_get_clientdata(client);
839 struct sensor_device_attribute_2 *sensor_attr =
840 to_sensor_dev_attr_2(attr);
841 int index = sensor_attr->index;
845 if (strict_strtoul(buf, 10, &tmp) < 0)
847 tmp = SENSORS_LIMIT(tmp, 0, 15);
849 mutex_lock(&data->update_lock);
852 data->temp_src[val] &= 0x0f;
854 data->temp_src[val] &= 0xf0;
856 data->temp_src[val] |= tmp;
857 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
858 mutex_unlock(&data->update_lock);
863 #define TEMP_PWM_ENABLE 0
864 #define TEMP_PWM_FAN_MAP 1
866 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
869 struct i2c_client *client = to_i2c_client(dev);
870 struct w83795_data *data = i2c_get_clientdata(client);
871 struct sensor_device_attribute_2 *sensor_attr =
872 to_sensor_dev_attr_2(attr);
873 int nr = sensor_attr->nr;
874 int index = sensor_attr->index;
878 case TEMP_PWM_ENABLE:
879 tmp = (data->pwm_fcms[1] >> index) & 1;
885 case TEMP_PWM_FAN_MAP:
886 tmp = data->pwm_tfmr[index];
890 return sprintf(buf, "%u\n", tmp);
894 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
895 const char *buf, size_t count)
897 struct i2c_client *client = to_i2c_client(dev);
898 struct w83795_data *data = i2c_get_clientdata(client);
899 struct sensor_device_attribute_2 *sensor_attr =
900 to_sensor_dev_attr_2(attr);
901 int nr = sensor_attr->nr;
902 int index = sensor_attr->index;
905 if (strict_strtoul(buf, 10, &tmp) < 0)
909 case TEMP_PWM_ENABLE:
910 if ((tmp != 3) && (tmp != 4))
913 mutex_lock(&data->update_lock);
914 data->pwm_fcms[1] &= ~(1 << index);
915 data->pwm_fcms[1] |= tmp << index;
916 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
917 mutex_unlock(&data->update_lock);
919 case TEMP_PWM_FAN_MAP:
920 mutex_lock(&data->update_lock);
921 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
922 w83795_write(client, W83795_REG_TFMR(index), tmp);
923 data->pwm_tfmr[index] = tmp;
924 mutex_unlock(&data->update_lock);
930 #define FANIN_TARGET 0
933 show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
935 struct i2c_client *client = to_i2c_client(dev);
936 struct w83795_data *data = i2c_get_clientdata(client);
937 struct sensor_device_attribute_2 *sensor_attr =
938 to_sensor_dev_attr_2(attr);
939 int nr = sensor_attr->nr;
940 int index = sensor_attr->index;
945 tmp = fan_from_reg(data->target_speed[index]);
948 tmp = data->tol_speed;
952 return sprintf(buf, "%u\n", tmp);
956 store_fanin(struct device *dev, struct device_attribute *attr,
957 const char *buf, size_t count)
959 struct i2c_client *client = to_i2c_client(dev);
960 struct w83795_data *data = i2c_get_clientdata(client);
961 struct sensor_device_attribute_2 *sensor_attr =
962 to_sensor_dev_attr_2(attr);
963 int nr = sensor_attr->nr;
964 int index = sensor_attr->index;
967 if (strict_strtoul(buf, 10, &val) < 0)
970 mutex_lock(&data->update_lock);
973 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
974 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
975 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
976 data->target_speed[index] = val;
979 val = SENSORS_LIMIT(val, 0, 0x3f);
980 w83795_write(client, W83795_REG_TFTS, val);
981 data->tol_speed = val;
984 mutex_unlock(&data->update_lock);
991 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
993 struct i2c_client *client = to_i2c_client(dev);
994 struct w83795_data *data = i2c_get_clientdata(client);
995 struct sensor_device_attribute_2 *sensor_attr =
996 to_sensor_dev_attr_2(attr);
997 int nr = sensor_attr->nr;
998 int index = sensor_attr->index;
999 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1001 return sprintf(buf, "%ld\n", tmp);
1005 store_temp_pwm(struct device *dev, struct device_attribute *attr,
1006 const char *buf, size_t count)
1008 struct i2c_client *client = to_i2c_client(dev);
1009 struct w83795_data *data = i2c_get_clientdata(client);
1010 struct sensor_device_attribute_2 *sensor_attr =
1011 to_sensor_dev_attr_2(attr);
1012 int nr = sensor_attr->nr;
1013 int index = sensor_attr->index;
1017 if (strict_strtoul(buf, 10, &val) < 0)
1021 mutex_lock(&data->update_lock);
1024 val = SENSORS_LIMIT(val, 0, 0x7f);
1025 w83795_write(client, W83795_REG_TTTI(index), val);
1028 val = SENSORS_LIMIT(val, 0, 0x7f);
1029 w83795_write(client, W83795_REG_CTFS(index), val);
1032 val = SENSORS_LIMIT(val, 0, 0x0f);
1033 tmp = w83795_read(client, W83795_REG_HT(index));
1035 tmp |= (val << 4) & 0xf0;
1036 w83795_write(client, W83795_REG_HT(index), tmp);
1039 val = SENSORS_LIMIT(val, 0, 0x0f);
1040 tmp = w83795_read(client, W83795_REG_HT(index));
1043 w83795_write(client, W83795_REG_HT(index), tmp);
1046 data->pwm_temp[index][nr] = val;
1047 mutex_unlock(&data->update_lock);
1053 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1055 struct i2c_client *client = to_i2c_client(dev);
1056 struct w83795_data *data = i2c_get_clientdata(client);
1057 struct sensor_device_attribute_2 *sensor_attr =
1058 to_sensor_dev_attr_2(attr);
1059 int nr = sensor_attr->nr;
1060 int index = sensor_attr->index;
1062 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1066 store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1067 const char *buf, size_t count)
1069 struct i2c_client *client = to_i2c_client(dev);
1070 struct w83795_data *data = i2c_get_clientdata(client);
1071 struct sensor_device_attribute_2 *sensor_attr =
1072 to_sensor_dev_attr_2(attr);
1073 int nr = sensor_attr->nr;
1074 int index = sensor_attr->index;
1077 if (strict_strtoul(buf, 10, &val) < 0)
1080 mutex_lock(&data->update_lock);
1081 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1082 data->sf4_reg[index][SF4_PWM][nr] = val;
1083 mutex_unlock(&data->update_lock);
1089 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1091 struct i2c_client *client = to_i2c_client(dev);
1092 struct w83795_data *data = i2c_get_clientdata(client);
1093 struct sensor_device_attribute_2 *sensor_attr =
1094 to_sensor_dev_attr_2(attr);
1095 int nr = sensor_attr->nr;
1096 int index = sensor_attr->index;
1098 return sprintf(buf, "%u\n",
1099 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1103 store_sf4_temp(struct device *dev, struct device_attribute *attr,
1104 const char *buf, size_t count)
1106 struct i2c_client *client = to_i2c_client(dev);
1107 struct w83795_data *data = i2c_get_clientdata(client);
1108 struct sensor_device_attribute_2 *sensor_attr =
1109 to_sensor_dev_attr_2(attr);
1110 int nr = sensor_attr->nr;
1111 int index = sensor_attr->index;
1114 if (strict_strtoul(buf, 10, &val) < 0)
1118 mutex_lock(&data->update_lock);
1119 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1120 data->sf4_reg[index][SF4_TEMP][nr] = val;
1121 mutex_unlock(&data->update_lock);
1128 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1130 struct sensor_device_attribute_2 *sensor_attr =
1131 to_sensor_dev_attr_2(attr);
1132 int nr = sensor_attr->nr;
1133 int index = sensor_attr->index;
1134 struct w83795_data *data = w83795_update_device(dev);
1135 long temp = temp_from_reg(data->temp[index][nr]);
1137 if (TEMP_READ == nr)
1138 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
1139 return sprintf(buf, "%ld\n", temp);
1143 store_temp(struct device *dev, struct device_attribute *attr,
1144 const char *buf, size_t count)
1146 struct sensor_device_attribute_2 *sensor_attr =
1147 to_sensor_dev_attr_2(attr);
1148 int nr = sensor_attr->nr;
1149 int index = sensor_attr->index;
1150 struct i2c_client *client = to_i2c_client(dev);
1151 struct w83795_data *data = i2c_get_clientdata(client);
1154 if (strict_strtol(buf, 10, &tmp) < 0)
1157 mutex_lock(&data->update_lock);
1158 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1159 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1160 mutex_unlock(&data->update_lock);
1166 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1168 struct i2c_client *client = to_i2c_client(dev);
1169 struct w83795_data *data = i2c_get_clientdata(client);
1170 struct sensor_device_attribute_2 *sensor_attr =
1171 to_sensor_dev_attr_2(attr);
1172 int index = sensor_attr->index;
1175 if (data->enable_dts == 0)
1176 return sprintf(buf, "%d\n", 0);
1178 if ((data->has_dts >> index) & 0x01) {
1179 if (data->enable_dts & 2)
1187 return sprintf(buf, "%d\n", tmp);
1191 show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1193 struct sensor_device_attribute_2 *sensor_attr =
1194 to_sensor_dev_attr_2(attr);
1195 int index = sensor_attr->index;
1196 struct w83795_data *data = w83795_update_device(dev);
1197 long temp = temp_from_reg(data->dts[index]);
1199 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
1200 return sprintf(buf, "%ld\n", temp);
1204 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1206 struct sensor_device_attribute_2 *sensor_attr =
1207 to_sensor_dev_attr_2(attr);
1208 int nr = sensor_attr->nr;
1209 struct i2c_client *client = to_i2c_client(dev);
1210 struct w83795_data *data = i2c_get_clientdata(client);
1211 long temp = temp_from_reg(data->dts_ext[nr]);
1213 return sprintf(buf, "%ld\n", temp);
1217 store_dts_ext(struct device *dev, struct device_attribute *attr,
1218 const char *buf, size_t count)
1220 struct sensor_device_attribute_2 *sensor_attr =
1221 to_sensor_dev_attr_2(attr);
1222 int nr = sensor_attr->nr;
1223 struct i2c_client *client = to_i2c_client(dev);
1224 struct w83795_data *data = i2c_get_clientdata(client);
1227 if (strict_strtol(buf, 10, &tmp) < 0)
1230 mutex_lock(&data->update_lock);
1231 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1232 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1233 mutex_unlock(&data->update_lock);
1239 Type 3: Thermal diode
1247 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1249 struct i2c_client *client = to_i2c_client(dev);
1250 struct w83795_data *data = i2c_get_clientdata(client);
1251 struct sensor_device_attribute_2 *sensor_attr =
1252 to_sensor_dev_attr_2(attr);
1253 int index = sensor_attr->index;
1256 if (data->has_temp >> index & 0x01) {
1257 if (data->temp_mode >> index & 0x01)
1265 return sprintf(buf, "%d\n", tmp);
1269 store_temp_mode(struct device *dev, struct device_attribute *attr,
1270 const char *buf, size_t count)
1272 struct i2c_client *client = to_i2c_client(dev);
1273 struct w83795_data *data = i2c_get_clientdata(client);
1274 struct sensor_device_attribute_2 *sensor_attr =
1275 to_sensor_dev_attr_2(attr);
1276 int index = sensor_attr->index;
1281 if (strict_strtoul(buf, 10, &val) < 0)
1283 if ((val != 4) && (val != 3))
1285 if ((index > 3) && (val == 3))
1288 mutex_lock(&data->update_lock);
1291 data->has_temp |= 1 << index;
1292 data->temp_mode |= 1 << index;
1293 } else if (val == 4) {
1295 data->has_temp |= 1 << index;
1297 data->temp_mode &= ~tmp;
1301 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1303 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1305 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1307 tmp |= W83795_REG_TEMP_CTRL[index][val];
1309 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1310 data->has_in &= ~mask;
1313 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1315 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1317 mutex_unlock(&data->update_lock);
1322 /* show/store VIN */
1324 show_in(struct device *dev, struct device_attribute *attr, char *buf)
1326 struct sensor_device_attribute_2 *sensor_attr =
1327 to_sensor_dev_attr_2(attr);
1328 int nr = sensor_attr->nr;
1329 int index = sensor_attr->index;
1330 struct w83795_data *data = w83795_update_device(dev);
1331 u16 val = data->in[index][nr];
1336 /* calculate this value again by sensors as sensors3.conf */
1337 if ((index >= 17) &&
1338 !((data->has_gain >> (index - 17)) & 1))
1343 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1345 val |= (data->in_lsb[lsb_idx][nr] >>
1346 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1347 if ((index >= 17) &&
1348 !((data->has_gain >> (index - 17)) & 1))
1352 val = in_from_reg(index, val);
1354 return sprintf(buf, "%d\n", val);
1358 store_in(struct device *dev, struct device_attribute *attr,
1359 const char *buf, size_t count)
1361 struct sensor_device_attribute_2 *sensor_attr =
1362 to_sensor_dev_attr_2(attr);
1363 int nr = sensor_attr->nr;
1364 int index = sensor_attr->index;
1365 struct i2c_client *client = to_i2c_client(dev);
1366 struct w83795_data *data = i2c_get_clientdata(client);
1371 if (strict_strtoul(buf, 10, &val) < 0)
1373 val = in_to_reg(index, val);
1375 if ((index >= 17) &&
1376 !((data->has_gain >> (index - 17)) & 1))
1378 val = SENSORS_LIMIT(val, 0, 0x3FF);
1379 mutex_lock(&data->update_lock);
1381 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1382 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1383 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1384 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1385 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1386 data->in_lsb[lsb_idx][nr] = tmp;
1388 tmp = (val >> 2) & 0xff;
1389 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1390 data->in[index][nr] = tmp;
1392 mutex_unlock(&data->update_lock);
1398 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1400 struct sensor_device_attribute_2 *sensor_attr =
1401 to_sensor_dev_attr_2(attr);
1402 int nr = sensor_attr->nr;
1403 struct i2c_client *client = to_i2c_client(dev);
1404 struct w83795_data *data = i2c_get_clientdata(client);
1405 u16 val = data->setup_pwm[nr];
1408 case SETUP_PWM_UPTIME:
1409 case SETUP_PWM_DOWNTIME:
1410 val = time_from_reg(val);
1414 return sprintf(buf, "%d\n", val);
1418 store_sf_setup(struct device *dev, struct device_attribute *attr,
1419 const char *buf, size_t count)
1421 struct sensor_device_attribute_2 *sensor_attr =
1422 to_sensor_dev_attr_2(attr);
1423 int nr = sensor_attr->nr;
1424 struct i2c_client *client = to_i2c_client(dev);
1425 struct w83795_data *data = i2c_get_clientdata(client);
1428 if (strict_strtoul(buf, 10, &val) < 0)
1432 case SETUP_PWM_DEFAULT:
1433 val = SENSORS_LIMIT(val, 0, 0xff);
1435 case SETUP_PWM_UPTIME:
1436 case SETUP_PWM_DOWNTIME:
1437 val = time_to_reg(val);
1443 mutex_lock(&data->update_lock);
1444 data->setup_pwm[nr] = val;
1445 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1446 mutex_unlock(&data->update_lock);
1453 /* Don't change the attribute order, _max and _min are accessed by index
1454 * somewhere else in the code */
1455 #define SENSOR_ATTR_IN(index) { \
1456 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1458 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1459 store_in, IN_MAX, index), \
1460 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1461 store_in, IN_LOW, index), \
1462 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1463 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1464 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1465 show_alarm_beep, store_beep, BEEP_ENABLE, \
1466 index + ((index > 14) ? 1 : 0)) }
1468 #define SENSOR_ATTR_FAN(index) { \
1469 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1470 NULL, FAN_INPUT, index - 1), \
1471 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1472 show_fan, store_fan_min, FAN_MIN, index - 1), \
1473 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1474 NULL, ALARM_STATUS, index + 31), \
1475 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1476 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
1478 #define SENSOR_ATTR_PWM(index) { \
1479 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1480 store_pwm, PWM_OUTPUT, index - 1), \
1481 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1482 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1483 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1484 show_pwm, store_pwm, PWM_START, index - 1), \
1485 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1486 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1487 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1488 show_pwm, store_pwm, PWM_FREQ, index - 1), \
1489 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1490 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1491 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1492 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
1494 #define SENSOR_ATTR_DTS(index) { \
1495 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1496 show_dts_mode, NULL, NOT_USED, index - 7), \
1497 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1498 NULL, NOT_USED, index - 7), \
1499 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
1500 store_dts_ext, DTS_CRIT, NOT_USED), \
1501 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1502 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1503 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1504 store_dts_ext, DTS_WARN, NOT_USED), \
1505 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1506 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1507 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1508 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1509 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1510 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
1512 #define SENSOR_ATTR_TEMP(index) { \
1513 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1514 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1515 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1516 NULL, TEMP_READ, index - 1), \
1517 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
1518 store_temp, TEMP_CRIT, index - 1), \
1519 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1520 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1521 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1522 store_temp, TEMP_WARN, index - 1), \
1523 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1524 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1525 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1526 show_alarm_beep, NULL, ALARM_STATUS, \
1527 index + (index > 4 ? 11 : 17)), \
1528 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1529 show_alarm_beep, store_beep, BEEP_ENABLE, \
1530 index + (index > 4 ? 11 : 17)), \
1531 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1532 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1533 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1534 show_temp_pwm_enable, store_temp_pwm_enable, \
1535 TEMP_PWM_ENABLE, index - 1), \
1536 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1537 show_temp_pwm_enable, store_temp_pwm_enable, \
1538 TEMP_PWM_FAN_MAP, index - 1), \
1539 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1540 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1541 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
1542 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1543 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
1544 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1545 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1546 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1547 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1548 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1549 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1550 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1551 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1552 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1553 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1554 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1555 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1556 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1557 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1558 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1559 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1560 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1561 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1562 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1563 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1564 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1565 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1566 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1567 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1568 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1569 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1570 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1571 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1572 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1573 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1574 show_sf4_temp, store_sf4_temp, 6, index - 1) }
1577 static struct sensor_device_attribute_2 w83795_in[][5] = {
1601 static const struct sensor_device_attribute_2 w83795_fan[][4] = {
1611 SENSOR_ATTR_FAN(10),
1612 SENSOR_ATTR_FAN(11),
1613 SENSOR_ATTR_FAN(12),
1614 SENSOR_ATTR_FAN(13),
1615 SENSOR_ATTR_FAN(14),
1618 static const struct sensor_device_attribute_2 w83795_temp[][29] = {
1619 SENSOR_ATTR_TEMP(1),
1620 SENSOR_ATTR_TEMP(2),
1621 SENSOR_ATTR_TEMP(3),
1622 SENSOR_ATTR_TEMP(4),
1623 SENSOR_ATTR_TEMP(5),
1624 SENSOR_ATTR_TEMP(6),
1627 static const struct sensor_device_attribute_2 w83795_dts[][8] = {
1631 SENSOR_ATTR_DTS(10),
1632 SENSOR_ATTR_DTS(11),
1633 SENSOR_ATTR_DTS(12),
1634 SENSOR_ATTR_DTS(13),
1635 SENSOR_ATTR_DTS(14),
1638 static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
1649 static const struct sensor_device_attribute_2 sda_single_files[] = {
1650 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1651 store_chassis_clear, ALARM_STATUS, 46),
1652 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1653 store_beep, BEEP_ENABLE, 47),
1654 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1655 store_fanin, FANIN_TOL, NOT_USED),
1656 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1657 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1658 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1659 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1660 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1661 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1668 static void w83795_init_client(struct i2c_client *client)
1670 struct w83795_data *data = i2c_get_clientdata(client);
1671 static const u16 clkin[4] = { /* in kHz */
1672 14318, 24000, 33333, 48000
1677 w83795_write(client, W83795_REG_CONFIG, 0x80);
1679 /* Start monitoring if needed */
1680 config = w83795_read(client, W83795_REG_CONFIG);
1681 if (!(config & W83795_REG_CONFIG_START)) {
1682 dev_info(&client->dev, "Enabling monitoring operations\n");
1683 w83795_write(client, W83795_REG_CONFIG,
1684 config | W83795_REG_CONFIG_START);
1687 data->clkin = clkin[(config >> 3) & 0x3];
1688 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
1691 static int w83795_get_device_id(struct i2c_client *client)
1695 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1697 /* Special case for rev. A chips; can't be checked first because later
1698 revisions emulate this for compatibility */
1699 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1702 alt_id = i2c_smbus_read_byte_data(client,
1703 W83795_REG_DEVICEID_A);
1711 /* Return 0 if detection is successful, -ENODEV otherwise */
1712 static int w83795_detect(struct i2c_client *client,
1713 struct i2c_board_info *info)
1715 int bank, vendor_id, device_id, expected, i2c_addr, config;
1716 struct i2c_adapter *adapter = client->adapter;
1717 unsigned short address = client->addr;
1718 const char *chip_name;
1720 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1722 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1723 if (bank < 0 || (bank & 0x7c)) {
1724 dev_dbg(&adapter->dev,
1725 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1730 /* Check Nuvoton vendor ID */
1731 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1732 expected = bank & 0x80 ? 0x5c : 0xa3;
1733 if (vendor_id != expected) {
1734 dev_dbg(&adapter->dev,
1735 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1736 address, "vendor id");
1740 /* Check device ID */
1741 device_id = w83795_get_device_id(client) |
1742 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1743 if ((device_id >> 4) != 0x795) {
1744 dev_dbg(&adapter->dev,
1745 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1746 address, "device id\n");
1750 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1752 if ((bank & 0x07) == 0) {
1753 i2c_addr = i2c_smbus_read_byte_data(client,
1754 W83795_REG_I2C_ADDR);
1755 if ((i2c_addr & 0x7f) != address) {
1756 dev_dbg(&adapter->dev,
1757 "w83795: Detection failed at addr 0x%02hx, "
1758 "check %s\n", address, "i2c addr");
1763 /* Check 795 chip type: 795G or 795ADG
1764 Usually we don't write to chips during detection, but here we don't
1765 quite have the choice; hopefully it's OK, we are about to return
1767 if ((bank & 0x07) != 0)
1768 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1770 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1771 if (config & W83795_REG_CONFIG_CONFIG48)
1772 chip_name = "w83795adg";
1774 chip_name = "w83795g";
1776 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
1777 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1778 'A' + (device_id & 0xf), address);
1783 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1784 const struct device_attribute *))
1786 struct w83795_data *data = dev_get_drvdata(dev);
1789 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1790 if (!(data->has_in & (1 << i)))
1792 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1793 err = fn(dev, &w83795_in[i][j].dev_attr);
1799 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1800 if (!(data->has_fan & (1 << i)))
1802 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1803 err = fn(dev, &w83795_fan[i][j].dev_attr);
1809 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1810 err = fn(dev, &sda_single_files[i].dev_attr);
1815 for (i = 0; i < data->has_pwm; i++) {
1816 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1817 err = fn(dev, &w83795_pwm[i][j].dev_attr);
1823 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1824 if (!(data->has_temp & (1 << i)))
1826 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1827 err = fn(dev, &w83795_temp[i][j].dev_attr);
1833 if (data->enable_dts != 0) {
1834 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
1835 if (!(data->has_dts & (1 << i)))
1837 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1838 err = fn(dev, &w83795_dts[i][j].dev_attr);
1848 /* We need a wrapper that fits in w83795_handle_files */
1849 static int device_remove_file_wrapper(struct device *dev,
1850 const struct device_attribute *attr)
1852 device_remove_file(dev, attr);
1856 static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1858 struct w83795_data *data = i2c_get_clientdata(client);
1860 int i, err_max, err_min;
1862 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1864 /* Return immediately if VRM isn't configured */
1865 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1868 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1869 for (i = 0; i < 2; i++) {
1870 if (!(data->has_dyn_in & (1 << i)))
1873 /* Voltage limits in dynamic mode, switch to read-only */
1874 err_max = sysfs_chmod_file(&client->dev.kobj,
1875 &w83795_in[i][2].dev_attr.attr,
1877 err_min = sysfs_chmod_file(&client->dev.kobj,
1878 &w83795_in[i][3].dev_attr.attr,
1880 if (err_max || err_min)
1881 dev_warn(&client->dev, "Failed to set in%d limits "
1882 "read-only (%d, %d)\n", i, err_max, err_min);
1884 dev_info(&client->dev, "in%d limits set dynamically "
1889 /* Check pins that can be used for either temperature or voltage monitoring */
1890 static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1891 int temp_chan, int in_chan)
1893 /* config is a 2-bit value */
1895 case 0x2: /* Voltage monitoring */
1896 data->has_in |= 1 << in_chan;
1898 case 0x1: /* Thermal diode */
1901 data->temp_mode |= 1 << temp_chan;
1903 case 0x3: /* Thermistor */
1904 data->has_temp |= 1 << temp_chan;
1909 static int w83795_probe(struct i2c_client *client,
1910 const struct i2c_device_id *id)
1914 struct device *dev = &client->dev;
1915 struct w83795_data *data;
1918 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1924 i2c_set_clientdata(client, data);
1925 data->chip_type = id->driver_data;
1926 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1927 mutex_init(&data->update_lock);
1929 /* Initialize the chip */
1930 w83795_init_client(client);
1932 /* Check which voltages and fans are present */
1933 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1934 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1935 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1936 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
1938 /* Check which analog temperatures and extra voltages are present */
1939 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1941 data->enable_dts = 1;
1942 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1943 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
1944 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1945 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
1946 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
1947 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
1948 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
1950 /* Check DTS enable status */
1951 if (data->enable_dts) {
1952 if (1 & w83795_read(client, W83795_REG_DTSC))
1953 data->enable_dts |= 2;
1954 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1957 /* Report PECI Tbase values */
1958 if (data->enable_dts == 1) {
1959 for (i = 0; i < 8; i++) {
1960 if (!(data->has_dts & (1 << i)))
1962 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
1963 dev_info(&client->dev,
1964 "PECI agent %d Tbase temperature: %u\n",
1965 i + 1, (unsigned int)tmp & 0x7f);
1969 /* First update the voltages measured value and limits */
1970 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1971 if (!(data->has_in & (1 << i)))
1973 data->in[i][IN_MAX] =
1974 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1975 data->in[i][IN_LOW] =
1976 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1977 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
1978 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
1979 data->in[i][IN_READ] = tmp;
1981 for (i = 0; i < IN_LSB_REG_NUM; i++) {
1982 if ((i == 2 && data->chip_type == w83795adg) ||
1983 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
1985 data->in_lsb[i][IN_MAX] =
1986 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1987 data->in_lsb[i][IN_LOW] =
1988 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1990 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1992 /* First update fan and limits */
1993 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1994 /* Each register contains LSB for 2 fans, but we want to
1995 * read it only once to save time */
1996 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
1997 tmp = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
1999 if (!(data->has_fan & (1 << i)))
2002 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
2004 (tmp >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
2005 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
2006 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
2009 /* temperature and limits */
2010 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2011 if (!(data->has_temp & (1 << i)))
2013 data->temp[i][TEMP_CRIT] =
2014 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
2015 data->temp[i][TEMP_CRIT_HYST] =
2016 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
2017 data->temp[i][TEMP_WARN] =
2018 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
2019 data->temp[i][TEMP_WARN_HYST] =
2020 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
2021 data->temp[i][TEMP_READ] =
2022 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
2023 data->temp_read_vrlsb[i] =
2024 w83795_read(client, W83795_REG_VRLSB);
2027 /* dts temperature and limits */
2028 if (data->enable_dts != 0) {
2029 data->dts_ext[DTS_CRIT] =
2030 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
2031 data->dts_ext[DTS_CRIT_HYST] =
2032 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
2033 data->dts_ext[DTS_WARN] =
2034 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
2035 data->dts_ext[DTS_WARN_HYST] =
2036 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
2037 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
2038 if (!(data->has_dts & (1 << i)))
2040 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
2041 data->dts_read_vrlsb[i] =
2042 w83795_read(client, W83795_REG_VRLSB);
2046 /* First update temp source selction */
2047 for (i = 0; i < 3; i++)
2048 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
2050 /* pwm and smart fan */
2051 if (data->chip_type == w83795g)
2055 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
2056 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
2057 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
2058 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
2059 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
2060 for (i = 0; i < data->has_pwm; i++) {
2061 for (tmp = 0; tmp < 5; tmp++) {
2063 w83795_read(client, W83795_REG_PWM(i, tmp));
2066 for (i = 0; i < 8; i++) {
2067 data->target_speed[i] =
2068 w83795_read(client, W83795_REG_FTSH(i)) << 4;
2069 data->target_speed[i] |=
2070 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
2072 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
2074 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2075 data->pwm_temp[i][TEMP_PWM_TTTI] =
2076 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
2077 data->pwm_temp[i][TEMP_PWM_CTFS] =
2078 w83795_read(client, W83795_REG_CTFS(i));
2079 tmp = w83795_read(client, W83795_REG_HT(i));
2080 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
2081 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
2083 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
2084 for (tmp = 0; tmp < 7; tmp++) {
2085 data->sf4_reg[i][SF4_TEMP][tmp] =
2087 W83795_REG_SF4_TEMP(i, tmp));
2088 data->sf4_reg[i][SF4_PWM][tmp] =
2089 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
2093 /* Setup PWM Register */
2094 for (i = 0; i < 3; i++) {
2095 data->setup_pwm[i] =
2096 w83795_read(client, W83795_REG_SETUP_PWM(i));
2099 /* alarm and beep */
2100 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
2101 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
2102 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2105 err = w83795_handle_files(dev, device_create_file);
2109 if (data->chip_type == w83795g)
2110 w83795_check_dynamic_in_limits(client);
2112 data->hwmon_dev = hwmon_device_register(dev);
2113 if (IS_ERR(data->hwmon_dev)) {
2114 err = PTR_ERR(data->hwmon_dev);
2121 w83795_handle_files(dev, device_remove_file_wrapper);
2127 static int w83795_remove(struct i2c_client *client)
2129 struct w83795_data *data = i2c_get_clientdata(client);
2131 hwmon_device_unregister(data->hwmon_dev);
2132 w83795_handle_files(&client->dev, device_remove_file_wrapper);
2139 static const struct i2c_device_id w83795_id[] = {
2140 { "w83795g", w83795g },
2141 { "w83795adg", w83795adg },
2144 MODULE_DEVICE_TABLE(i2c, w83795_id);
2146 static struct i2c_driver w83795_driver = {
2150 .probe = w83795_probe,
2151 .remove = w83795_remove,
2152 .id_table = w83795_id,
2154 .class = I2C_CLASS_HWMON,
2155 .detect = w83795_detect,
2156 .address_list = normal_i2c,
2159 static int __init sensors_w83795_init(void)
2161 return i2c_add_driver(&w83795_driver);
2164 static void __exit sensors_w83795_exit(void)
2166 i2c_del_driver(&w83795_driver);
2169 MODULE_AUTHOR("Wei Song");
2170 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
2171 MODULE_LICENSE("GPL");
2173 module_init(sensors_w83795_init);
2174 module_exit(sensors_w83795_exit);