drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42
  43 #include "mlx4_ib.h"
  44
  45 enum {
  46         MLX4_IB_VENDOR_CLASS1 = 0x9,
  47         MLX4_IB_VENDOR_CLASS2 = 0xa
  48 };
  49
  50 #define MLX4_TUN_SEND_WRID_SHIFT 34
  51 #define MLX4_TUN_QPN_SHIFT 32
  52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  54
  55 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  57
  58  /* Port mgmt change event handling */
  59
  60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  63 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  64 #define GUID_TBL_BLK_NUM_ENTRIES 8
  65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  66
  67 /* Counters should be saturate once they reach their maximum value */
  68 #define ASSIGN_32BIT_COUNTER(counter, value) do {\
  69         if ((value) > U32_MAX)                   \
  70                 counter = cpu_to_be32(U32_MAX); \
  71         else                                     \
  72                 counter = cpu_to_be32(value);    \
  73 } while (0)
  74
  75 struct mlx4_mad_rcv_buf {
  76         struct ib_grh grh;
  77         u8 payload[256];
  78 } __packed;
  79
  80 struct mlx4_mad_snd_buf {
  81         u8 payload[256];
  82 } __packed;
  83
  84 struct mlx4_tunnel_mad {
  85         struct ib_grh grh;
  86         struct mlx4_ib_tunnel_header hdr;
  87         struct ib_mad mad;
  88 } __packed;
  89
  90 struct mlx4_rcv_tunnel_mad {
  91         struct mlx4_rcv_tunnel_hdr hdr;
  92         struct ib_grh grh;
  93         struct ib_mad mad;
  94 } __packed;
  95
  96 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  97 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  98 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  99                                 int block, u32 change_bitmap);
 100
 101 __be64 mlx4_ib_gen_node_guid(void)
 102 {
 103 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
 104         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
 105 }
 106
 107 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 108 {
 109         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 110                 cpu_to_be64(0xff00000000000000LL);
 111 }
 112
 113 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 114                  int port, const struct ib_wc *in_wc,
 115                  const struct ib_grh *in_grh,
 116                  const void *in_mad, void *response_mad)
 117 {
 118         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 119         void *inbox;
 120         int err;
 121         u32 in_modifier = port;
 122         u8 op_modifier = 0;
 123
 124         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 125         if (IS_ERR(inmailbox))
 126                 return PTR_ERR(inmailbox);
 127         inbox = inmailbox->buf;
 128
 129         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 130         if (IS_ERR(outmailbox)) {
 131                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 132                 return PTR_ERR(outmailbox);
 133         }
 134
 135         memcpy(inbox, in_mad, 256);
 136
 137         /*
 138          * Key check traps can't be generated unless we have in_wc to
 139          * tell us where to send the trap.
 140          */
 141         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 142                 op_modifier |= 0x1;
 143         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 144                 op_modifier |= 0x2;
 145         if (mlx4_is_mfunc(dev->dev) &&
 146             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 147                 op_modifier |= 0x8;
 148
 149         if (in_wc) {
 150                 struct {
 151                         __be32          my_qpn;
 152                         u32             reserved1;
 153                         __be32          rqpn;
 154                         u8              sl;
 155                         u8              g_path;
 156                         u16             reserved2[2];
 157                         __be16          pkey;
 158                         u32             reserved3[11];
 159                         u8              grh[40];
 160                 } *ext_info;
 161
 162                 memset(inbox + 256, 0, 256);
 163                 ext_info = inbox + 256;
 164
 165                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 166                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 167                 ext_info->sl     = in_wc->sl << 4;
 168                 ext_info->g_path = in_wc->dlid_path_bits |
 169                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 170                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 171
 172                 if (in_grh)
 173                         memcpy(ext_info->grh, in_grh, 40);
 174
 175                 op_modifier |= 0x4;
 176
 177                 in_modifier |= in_wc->slid << 16;
 178         }
 179
 180         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 181                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 182                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 183                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 184
 185         if (!err)
 186                 memcpy(response_mad, outmailbox->buf, 256);
 187
 188         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 189         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 190
 191         return err;
 192 }
 193
 194 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 195 {
 196         struct ib_ah *new_ah;
 197         struct ib_ah_attr ah_attr;
 198         unsigned long flags;
 199
 200         if (!dev->send_agent[port_num - 1][0])
 201                 return;
 202
 203         memset(&ah_attr, 0, sizeof ah_attr);
 204         ah_attr.dlid     = lid;
 205         ah_attr.sl       = sl;
 206         ah_attr.port_num = port_num;
 207
 208         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 209                               &ah_attr);
 210         if (IS_ERR(new_ah))
 211                 return;
 212
 213         spin_lock_irqsave(&dev->sm_lock, flags);
 214         if (dev->sm_ah[port_num - 1])
 215                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 216         dev->sm_ah[port_num - 1] = new_ah;
 217         spin_unlock_irqrestore(&dev->sm_lock, flags);
 218 }
 219
 220 /*
 221  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 222  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 223  */
 224 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
 225                       u16 prev_lid)
 226 {
 227         struct ib_port_info *pinfo;
 228         u16 lid;
 229         __be16 *base;
 230         u32 bn, pkey_change_bitmap;
 231         int i;
 232
 233
 234         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 235         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 236              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 237             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 238                 switch (mad->mad_hdr.attr_id) {
 239                 case IB_SMP_ATTR_PORT_INFO:
 240                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 241                         lid = be16_to_cpu(pinfo->lid);
 242
 243                         update_sm_ah(dev, port_num,
 244                                      be16_to_cpu(pinfo->sm_lid),
 245                                      pinfo->neighbormtu_mastersmsl & 0xf);
 246
 247                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 248                                 handle_client_rereg_event(dev, port_num);
 249
 250                         if (prev_lid != lid)
 251                                 handle_lid_change_event(dev, port_num);
 252                         break;
 253
 254                 case IB_SMP_ATTR_PKEY_TABLE:
 255                         if (!mlx4_is_mfunc(dev->dev)) {
 256                                 mlx4_ib_dispatch_event(dev, port_num,
 257                                                        IB_EVENT_PKEY_CHANGE);
 258                                 break;
 259                         }
 260
 261                         /* at this point, we are running in the master.
 262                          * Slaves do not receive SMPs.
 263                          */
 264                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 265                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 266                         pkey_change_bitmap = 0;
 267                         for (i = 0; i < 32; i++) {
 268                                 pr_debug("PKEY[%d] = x%x\n",
 269                                          i + bn*32, be16_to_cpu(base[i]));
 270                                 if (be16_to_cpu(base[i]) !=
 271                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 272                                         pkey_change_bitmap |= (1 << i);
 273                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 274                                                 be16_to_cpu(base[i]);
 275                                 }
 276                         }
 277                         pr_debug("PKEY Change event: port=%d, "
 278                                  "block=0x%x, change_bitmap=0x%x\n",
 279                                  port_num, bn, pkey_change_bitmap);
 280
 281                         if (pkey_change_bitmap) {
 282                                 mlx4_ib_dispatch_event(dev, port_num,
 283                                                        IB_EVENT_PKEY_CHANGE);
 284                                 if (!dev->sriov.is_going_down)
 285                                         __propagate_pkey_ev(dev, port_num, bn,
 286                                                             pkey_change_bitmap);
 287                         }
 288                         break;
 289
 290                 case IB_SMP_ATTR_GUID_INFO:
 291                         /* paravirtualized master's guid is guid 0 -- does not change */
 292                         if (!mlx4_is_master(dev->dev))
 293                                 mlx4_ib_dispatch_event(dev, port_num,
 294                                                        IB_EVENT_GID_CHANGE);
 295                         /*if master, notify relevant slaves*/
 296                         if (mlx4_is_master(dev->dev) &&
 297                             !dev->sriov.is_going_down) {
 298                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 299                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 300                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 301                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 302                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 303                         }
 304                         break;
 305
 306                 default:
 307                         break;
 308                 }
 309 }
 310
 311 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 312                                 int block, u32 change_bitmap)
 313 {
 314         int i, ix, slave, err;
 315         int have_event = 0;
 316
 317         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 318                 if (slave == mlx4_master_func_num(dev->dev))
 319                         continue;
 320                 if (!mlx4_is_slave_active(dev->dev, slave))
 321                         continue;
 322
 323                 have_event = 0;
 324                 for (i = 0; i < 32; i++) {
 325                         if (!(change_bitmap & (1 << i)))
 326                                 continue;
 327                         for (ix = 0;
 328                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 329                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 330                                     [ix] == i + 32 * block) {
 331                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 332                                         pr_debug("propagate_pkey_ev: slave %d,"
 333                                                  " port %d, ix %d (%d)\n",
 334                                                  slave, port_num, ix, err);
 335                                         have_event = 1;
 336                                         break;
 337                                 }
 338                         }
 339                         if (have_event)
 340                                 break;
 341                 }
 342         }
 343 }
 344
 345 static void node_desc_override(struct ib_device *dev,
 346                                struct ib_mad *mad)
 347 {
 348         unsigned long flags;
 349
 350         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 351              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 352             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 353             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 354                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 355                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 356                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 357         }
 358 }
 359
 360 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
 361 {
 362         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 363         struct ib_mad_send_buf *send_buf;
 364         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 365         int ret;
 366         unsigned long flags;
 367
 368         if (agent) {
 369                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 370                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
 371                                               IB_MGMT_BASE_VERSION);
 372                 if (IS_ERR(send_buf))
 373                         return;
 374                 /*
 375                  * We rely here on the fact that MLX QPs don't use the
 376                  * address handle after the send is posted (this is
 377                  * wrong following the IB spec strictly, but we know
 378                  * it's OK for our devices).
 379                  */
 380                 spin_lock_irqsave(&dev->sm_lock, flags);
 381                 memcpy(send_buf->mad, mad, sizeof *mad);
 382                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 383                         ret = ib_post_send_mad(send_buf, NULL);
 384                 else
 385                         ret = -EINVAL;
 386                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 387
 388                 if (ret)
 389                         ib_free_send_mad(send_buf);
 390         }
 391 }
 392
 393 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 394                                                              struct ib_sa_mad *sa_mad)
 395 {
 396         int ret = 0;
 397
 398         /* dispatch to different sa handlers */
 399         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 400         case IB_SA_ATTR_MC_MEMBER_REC:
 401                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 402                 break;
 403         default:
 404                 break;
 405         }
 406         return ret;
 407 }
 408
 409 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 410 {
 411         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 412         int i;
 413
 414         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 415                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 416                         return i;
 417         }
 418         return -1;
 419 }
 420
 421
 422 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 423                                    u8 port, u16 pkey, u16 *ix)
 424 {
 425         int i, ret;
 426         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 427         u16 slot_pkey;
 428
 429         if (slave == mlx4_master_func_num(dev->dev))
 430                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 431
 432         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 433
 434         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 435                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 436                         continue;
 437
 438                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 439
 440                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 441                 if (ret)
 442                         continue;
 443                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 444                         if (slot_pkey & 0x8000) {
 445                                 *ix = (u16) pkey_ix;
 446                                 return 0;
 447                         } else {
 448                                 /* take first partial pkey index found */
 449                                 if (partial_ix == 0xFF)
 450                                         partial_ix = pkey_ix;
 451                         }
 452                 }
 453         }
 454
 455         if (partial_ix < 0xFF) {
 456                 *ix = (u16) partial_ix;
 457                 return 0;
 458         }
 459
 460         return -EINVAL;
 461 }
 462
 463 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 464                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 465                           struct ib_grh *grh, struct ib_mad *mad)
 466 {
 467         struct ib_sge list;
 468         struct ib_send_wr wr, *bad_wr;
 469         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 470         struct mlx4_ib_demux_pv_qp *tun_qp;
 471         struct mlx4_rcv_tunnel_mad *tun_mad;
 472         struct ib_ah_attr attr;
 473         struct ib_ah *ah;
 474         struct ib_qp *src_qp = NULL;
 475         unsigned tun_tx_ix = 0;
 476         int dqpn;
 477         int ret = 0;
 478         u16 tun_pkey_ix;
 479         u16 cached_pkey;
 480         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 481
 482         if (dest_qpt > IB_QPT_GSI)
 483                 return -EINVAL;
 484
 485         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 486
 487         /* check if proxy qp created */
 488         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 489                 return -EAGAIN;
 490
 491         if (!dest_qpt)
 492                 tun_qp = &tun_ctx->qp[0];
 493         else
 494                 tun_qp = &tun_ctx->qp[1];
 495
 496         /* compute P_Key index to put in tunnel header for slave */
 497         if (dest_qpt) {
 498                 u16 pkey_ix;
 499                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 500                 if (ret)
 501                         return -EINVAL;
 502
 503                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 504                 if (ret)
 505                         return -EINVAL;
 506                 tun_pkey_ix = pkey_ix;
 507         } else
 508                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 509
 510         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 511
 512         /* get tunnel tx data buf for slave */
 513         src_qp = tun_qp->qp;
 514
 515         /* create ah. Just need an empty one with the port num for the post send.
 516          * The driver will set the force loopback bit in post_send */
 517         memset(&attr, 0, sizeof attr);
 518         attr.port_num = port;
 519         if (is_eth) {
 520                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
 521                 attr.ah_flags = IB_AH_GRH;
 522         }
 523         ah = ib_create_ah(tun_ctx->pd, &attr);
 524         if (IS_ERR(ah))
 525                 return -ENOMEM;
 526
 527         /* allocate tunnel tx buf after pass failure returns */
 528         spin_lock(&tun_qp->tx_lock);
 529         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 530             (MLX4_NUM_TUNNEL_BUFS - 1))
 531                 ret = -EAGAIN;
 532         else
 533                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 534         spin_unlock(&tun_qp->tx_lock);
 535         if (ret)
 536                 goto out;
 537
 538         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 539         if (tun_qp->tx_ring[tun_tx_ix].ah)
 540                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 541         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 542         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 543                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 544                                    sizeof (struct mlx4_rcv_tunnel_mad),
 545                                    DMA_TO_DEVICE);
 546
 547         /* copy over to tunnel buffer */
 548         if (grh)
 549                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 550         memcpy(&tun_mad->mad, mad, sizeof *mad);
 551
 552         /* adjust tunnel data */
 553         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 554         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 555         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 556
 557         if (is_eth) {
 558                 u16 vlan = 0;
 559                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 560                                                 NULL)) {
 561                         /* VST mode */
 562                         if (vlan != wc->vlan_id)
 563                                 /* Packet vlan is not the VST-assigned vlan.
 564                                  * Drop the packet.
 565                                  */
 566                                 goto out;
 567                          else
 568                                 /* Remove the vlan tag before forwarding
 569                                  * the packet to the VF.
 570                                  */
 571                                 vlan = 0xffff;
 572                 } else {
 573                         vlan = wc->vlan_id;
 574                 }
 575
 576                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 577                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 578                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 579         } else {
 580                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 581                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 582         }
 583
 584         ib_dma_sync_single_for_device(&dev->ib_dev,
 585                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 586                                       sizeof (struct mlx4_rcv_tunnel_mad),
 587                                       DMA_TO_DEVICE);
 588
 589         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 590         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 591         list.lkey = tun_ctx->mr->lkey;
 592
 593         wr.wr.ud.ah = ah;
 594         wr.wr.ud.port_num = port;
 595         wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
 596         wr.wr.ud.remote_qpn = dqpn;
 597         wr.next = NULL;
 598         wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 599         wr.sg_list = &list;
 600         wr.num_sge = 1;
 601         wr.opcode = IB_WR_SEND;
 602         wr.send_flags = IB_SEND_SIGNALED;
 603
 604         ret = ib_post_send(src_qp, &wr, &bad_wr);
 605 out:
 606         if (ret)
 607                 ib_destroy_ah(ah);
 608         return ret;
 609 }
 610
 611 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 612                         struct ib_wc *wc, struct ib_grh *grh,
 613                         struct ib_mad *mad)
 614 {
 615         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 616         int err;
 617         int slave;
 618         u8 *slave_id;
 619         int is_eth = 0;
 620
 621         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 622                 is_eth = 0;
 623         else
 624                 is_eth = 1;
 625
 626         if (is_eth) {
 627                 if (!(wc->wc_flags & IB_WC_GRH)) {
 628                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 629                         return -EINVAL;
 630                 }
 631                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 632                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 633                         return -EINVAL;
 634                 }
 635                 if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
 636                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 637                         return -ENOENT;
 638                 }
 639                 if (slave >= dev->dev->caps.sqp_demux) {
 640                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 641                                      slave, dev->dev->caps.sqp_demux);
 642                         return -ENOENT;
 643                 }
 644
 645                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 646                         return 0;
 647
 648                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 649                 if (err)
 650                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 651                                  slave, err);
 652                 return 0;
 653         }
 654
 655         /* Initially assume that this mad is for us */
 656         slave = mlx4_master_func_num(dev->dev);
 657
 658         /* See if the slave id is encoded in a response mad */
 659         if (mad->mad_hdr.method & 0x80) {
 660                 slave_id = (u8 *) &mad->mad_hdr.tid;
 661                 slave = *slave_id;
 662                 if (slave != 255) /*255 indicates the dom0*/
 663                         *slave_id = 0; /* remap tid */
 664         }
 665
 666         /* If a grh is present, we demux according to it */
 667         if (wc->wc_flags & IB_WC_GRH) {
 668                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 669                 if (slave < 0) {
 670                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 671                         return -ENOENT;
 672                 }
 673         }
 674         /* Class-specific handling */
 675         switch (mad->mad_hdr.mgmt_class) {
 676         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 677         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 678                 /* 255 indicates the dom0 */
 679                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 680                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 681                                 return -EPERM;
 682                         /* for a VF. drop unsolicited MADs */
 683                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 684                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 685                                              slave, mad->mad_hdr.mgmt_class,
 686                                              mad->mad_hdr.method);
 687                                 return -EINVAL;
 688                         }
 689                 }
 690                 break;
 691         case IB_MGMT_CLASS_SUBN_ADM:
 692                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 693                                              (struct ib_sa_mad *) mad))
 694                         return 0;
 695                 break;
 696         case IB_MGMT_CLASS_CM:
 697                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 698                         return 0;
 699                 break;
 700         case IB_MGMT_CLASS_DEVICE_MGMT:
 701                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 702                         return 0;
 703                 break;
 704         default:
 705                 /* Drop unsupported classes for slaves in tunnel mode */
 706                 if (slave != mlx4_master_func_num(dev->dev)) {
 707                         pr_debug("dropping unsupported ingress mad from class:%d "
 708                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 709                         return 0;
 710                 }
 711         }
 712         /*make sure that no slave==255 was not handled yet.*/
 713         if (slave >= dev->dev->caps.sqp_demux) {
 714                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 715                              slave, dev->dev->caps.sqp_demux);
 716                 return -ENOENT;
 717         }
 718
 719         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 720         if (err)
 721                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 722                          slave, err);
 723         return 0;
 724 }
 725
 726 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 727                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 728                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 729 {
 730         u16 slid, prev_lid = 0;
 731         int err;
 732         struct ib_port_attr pattr;
 733
 734         if (in_wc && in_wc->qp->qp_num) {
 735                 pr_debug("received MAD: slid:%d sqpn:%d "
 736                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 737                         in_wc->slid, in_wc->src_qp,
 738                         in_wc->dlid_path_bits,
 739                         in_wc->qp->qp_num,
 740                         in_wc->wc_flags,
 741                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 742                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 743                 if (in_wc->wc_flags & IB_WC_GRH) {
 744                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 745                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 746                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 747                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 748                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 749                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 750                 }
 751         }
 752
 753         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 754
 755         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 756                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 757                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 758         }
 759
 760         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 761             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 762                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 763                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 764                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 765                         return IB_MAD_RESULT_SUCCESS;
 766
 767                 /*
 768                  * Don't process SMInfo queries -- the SMA can't handle them.
 769                  */
 770                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 771                         return IB_MAD_RESULT_SUCCESS;
 772         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 773                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 774                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 775                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 776                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 777                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 778                         return IB_MAD_RESULT_SUCCESS;
 779         } else
 780                 return IB_MAD_RESULT_SUCCESS;
 781
 782         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 783              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 784             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 785             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 786             !ib_query_port(ibdev, port_num, &pattr))
 787                 prev_lid = pattr.lid;
 788
 789         err = mlx4_MAD_IFC(to_mdev(ibdev),
 790                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 791                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 792                            MLX4_MAD_IFC_NET_VIEW,
 793                            port_num, in_wc, in_grh, in_mad, out_mad);
 794         if (err)
 795                 return IB_MAD_RESULT_FAILURE;
 796
 797         if (!out_mad->mad_hdr.status) {
 798                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 799                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
 800                 /* slaves get node desc from FW */
 801                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 802                         node_desc_override(ibdev, out_mad);
 803         }
 804
 805         /* set return bit in status of directed route responses */
 806         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 807                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 808
 809         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 810                 /* no response for trap repress */
 811                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 812
 813         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 814 }
 815
 816 static void edit_counter(struct mlx4_counter *cnt,
 817                                         struct ib_pma_portcounters *pma_cnt)
 818 {
 819         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
 820                              (be64_to_cpu(cnt->tx_bytes) >> 2));
 821         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
 822                              (be64_to_cpu(cnt->rx_bytes) >> 2));
 823         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
 824                              be64_to_cpu(cnt->tx_frames));
 825         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
 826                              be64_to_cpu(cnt->rx_frames));
 827 }
 828
 829 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 830                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 831                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 832 {
 833         struct mlx4_cmd_mailbox *mailbox;
 834         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 835         int err;
 836         u32 inmod = dev->counters[port_num - 1] & 0xffff;
 837         u8 mode;
 838
 839         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 840                 return -EINVAL;
 841
 842         mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 843         if (IS_ERR(mailbox))
 844                 return IB_MAD_RESULT_FAILURE;
 845
 846         err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
 847                            MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
 848                            MLX4_CMD_WRAPPED);
 849         if (err)
 850                 err = IB_MAD_RESULT_FAILURE;
 851         else {
 852                 memset(out_mad->data, 0, sizeof out_mad->data);
 853                 mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
 854                 switch (mode & 0xf) {
 855                 case 0:
 856                         edit_counter(mailbox->buf,
 857                                                 (void *)(out_mad->data + 40));
 858                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 859                         break;
 860                 default:
 861                         err = IB_MAD_RESULT_FAILURE;
 862                 }
 863         }
 864
 865         mlx4_free_cmd_mailbox(dev->dev, mailbox);
 866
 867         return err;
 868 }
 869
 870 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 871                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 872                         const struct ib_mad_hdr *in, size_t in_mad_size,
 873                         struct ib_mad_hdr *out, size_t *out_mad_size,
 874                         u16 *out_mad_pkey_index)
 875 {
 876         const struct ib_mad *in_mad = (const struct ib_mad *)in;
 877         struct ib_mad *out_mad = (struct ib_mad *)out;
 878
 879         BUG_ON(in_mad_size != sizeof(*in_mad) ||
 880                *out_mad_size != sizeof(*out_mad));
 881
 882         switch (rdma_port_get_link_layer(ibdev, port_num)) {
 883         case IB_LINK_LAYER_INFINIBAND:
 884                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 885                                       in_grh, in_mad, out_mad);
 886         case IB_LINK_LAYER_ETHERNET:
 887                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 888                                           in_grh, in_mad, out_mad);
 889         default:
 890                 return -EINVAL;
 891         }
 892 }
 893
 894 static void send_handler(struct ib_mad_agent *agent,
 895                          struct ib_mad_send_wc *mad_send_wc)
 896 {
 897         if (mad_send_wc->send_buf->context[0])
 898                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 899         ib_free_send_mad(mad_send_wc->send_buf);
 900 }
 901
 902 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 903 {
 904         struct ib_mad_agent *agent;
 905         int p, q;
 906         int ret;
 907         enum rdma_link_layer ll;
 908
 909         for (p = 0; p < dev->num_ports; ++p) {
 910                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 911                 for (q = 0; q <= 1; ++q) {
 912                         if (ll == IB_LINK_LAYER_INFINIBAND) {
 913                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 914                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
 915                                                               NULL, 0, send_handler,
 916                                                               NULL, NULL, 0);
 917                                 if (IS_ERR(agent)) {
 918                                         ret = PTR_ERR(agent);
 919                                         goto err;
 920                                 }
 921                                 dev->send_agent[p][q] = agent;
 922                         } else
 923                                 dev->send_agent[p][q] = NULL;
 924                 }
 925         }
 926
 927         return 0;
 928
 929 err:
 930         for (p = 0; p < dev->num_ports; ++p)
 931                 for (q = 0; q <= 1; ++q)
 932                         if (dev->send_agent[p][q])
 933                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
 934
 935         return ret;
 936 }
 937
 938 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 939 {
 940         struct ib_mad_agent *agent;
 941         int p, q;
 942
 943         for (p = 0; p < dev->num_ports; ++p) {
 944                 for (q = 0; q <= 1; ++q) {
 945                         agent = dev->send_agent[p][q];
 946                         if (agent) {
 947                                 dev->send_agent[p][q] = NULL;
 948                                 ib_unregister_mad_agent(agent);
 949                         }
 950                 }
 951
 952                 if (dev->sm_ah[p])
 953                         ib_destroy_ah(dev->sm_ah[p]);
 954         }
 955 }
 956
 957 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 958 {
 959         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 960
 961         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 962                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 963                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 964 }
 965
 966 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 967 {
 968         /* re-configure the alias-guid and mcg's */
 969         if (mlx4_is_master(dev->dev)) {
 970                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
 971
 972                 if (!dev->sriov.is_going_down) {
 973                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 974                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 975                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 976                 }
 977         }
 978         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 979 }
 980
 981 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 982                               struct mlx4_eqe *eqe)
 983 {
 984         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 985                             GET_MASK_FROM_EQE(eqe));
 986 }
 987
 988 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
 989                                       u32 guid_tbl_blk_num, u32 change_bitmap)
 990 {
 991         struct ib_smp *in_mad  = NULL;
 992         struct ib_smp *out_mad  = NULL;
 993         u16 i;
 994
 995         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
 996                 return;
 997
 998         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
 999         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1000         if (!in_mad || !out_mad) {
1001                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1002                 goto out;
1003         }
1004
1005         guid_tbl_blk_num  *= 4;
1006
1007         for (i = 0; i < 4; i++) {
1008                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1009                         continue;
1010                 memset(in_mad, 0, sizeof *in_mad);
1011                 memset(out_mad, 0, sizeof *out_mad);
1012
1013                 in_mad->base_version  = 1;
1014                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1015                 in_mad->class_version = 1;
1016                 in_mad->method        = IB_MGMT_METHOD_GET;
1017                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1018                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1019
1020                 if (mlx4_MAD_IFC(dev,
1021                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1022                                  port_num, NULL, NULL, in_mad, out_mad)) {
1023                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1024                         goto out;
1025                 }
1026
1027                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1028                                                     port_num,
1029                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1030                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1031                                                      port_num,
1032                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1033         }
1034
1035 out:
1036         kfree(in_mad);
1037         kfree(out_mad);
1038         return;
1039 }
1040
1041 void handle_port_mgmt_change_event(struct work_struct *work)
1042 {
1043         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1044         struct mlx4_ib_dev *dev = ew->ib_dev;
1045         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1046         u8 port = eqe->event.port_mgmt_change.port;
1047         u32 changed_attr;
1048         u32 tbl_block;
1049         u32 change_bitmap;
1050
1051         switch (eqe->subtype) {
1052         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1053                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1054
1055                 /* Update the SM ah - This should be done before handling
1056                    the other changed attributes so that MADs can be sent to the SM */
1057                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1058                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1059                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1060                         update_sm_ah(dev, port, lid, sl);
1061                 }
1062
1063                 /* Check if it is a lid change event */
1064                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1065                         handle_lid_change_event(dev, port);
1066
1067                 /* Generate GUID changed event */
1068                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1069                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1070                         /*if master, notify all slaves*/
1071                         if (mlx4_is_master(dev->dev))
1072                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1073                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1074                 }
1075
1076                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1077                         handle_client_rereg_event(dev, port);
1078                 break;
1079
1080         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1081                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1082                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1083                         propagate_pkey_ev(dev, port, eqe);
1084                 break;
1085         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1086                 /* paravirtualized master's guid is guid 0 -- does not change */
1087                 if (!mlx4_is_master(dev->dev))
1088                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1089                 /*if master, notify relevant slaves*/
1090                 else if (!dev->sriov.is_going_down) {
1091                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1092                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1093                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1094                 }
1095                 break;
1096         default:
1097                 pr_warn("Unsupported subtype 0x%x for "
1098                         "Port Management Change event\n", eqe->subtype);
1099         }
1100
1101         kfree(ew);
1102 }
1103
1104 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1105                             enum ib_event_type type)
1106 {
1107         struct ib_event event;
1108
1109         event.device            = &dev->ib_dev;
1110         event.element.port_num  = port_num;
1111         event.event             = type;
1112
1113         ib_dispatch_event(&event);
1114 }
1115
1116 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1117 {
1118         unsigned long flags;
1119         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1120         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1121         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1122         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1123                 queue_work(ctx->wq, &ctx->work);
1124         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1125 }
1126
1127 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1128                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1129                                   int index)
1130 {
1131         struct ib_sge sg_list;
1132         struct ib_recv_wr recv_wr, *bad_recv_wr;
1133         int size;
1134
1135         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1136                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1137
1138         sg_list.addr = tun_qp->ring[index].map;
1139         sg_list.length = size;
1140         sg_list.lkey = ctx->mr->lkey;
1141
1142         recv_wr.next = NULL;
1143         recv_wr.sg_list = &sg_list;
1144         recv_wr.num_sge = 1;
1145         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1146                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1147         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1148                                       size, DMA_FROM_DEVICE);
1149         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1150 }
1151
1152 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1153                 int slave, struct ib_sa_mad *sa_mad)
1154 {
1155         int ret = 0;
1156
1157         /* dispatch to different sa handlers */
1158         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1159         case IB_SA_ATTR_MC_MEMBER_REC:
1160                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1161                 break;
1162         default:
1163                 break;
1164         }
1165         return ret;
1166 }
1167
1168 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1169 {
1170         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1171
1172         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1173 }
1174
1175
1176 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1177                          enum ib_qp_type dest_qpt, u16 pkey_index,
1178                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1179                          u8 *s_mac, struct ib_mad *mad)
1180 {
1181         struct ib_sge list;
1182         struct ib_send_wr wr, *bad_wr;
1183         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1184         struct mlx4_ib_demux_pv_qp *sqp;
1185         struct mlx4_mad_snd_buf *sqp_mad;
1186         struct ib_ah *ah;
1187         struct ib_qp *send_qp = NULL;
1188         unsigned wire_tx_ix = 0;
1189         int ret = 0;
1190         u16 wire_pkey_ix;
1191         int src_qpnum;
1192         u8 sgid_index;
1193
1194
1195         sqp_ctx = dev->sriov.sqps[port-1];
1196
1197         /* check if proxy qp created */
1198         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1199                 return -EAGAIN;
1200
1201         if (dest_qpt == IB_QPT_SMI) {
1202                 src_qpnum = 0;
1203                 sqp = &sqp_ctx->qp[0];
1204                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1205         } else {
1206                 src_qpnum = 1;
1207                 sqp = &sqp_ctx->qp[1];
1208                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1209         }
1210
1211         send_qp = sqp->qp;
1212
1213         /* create ah */
1214         sgid_index = attr->grh.sgid_index;
1215         attr->grh.sgid_index = 0;
1216         ah = ib_create_ah(sqp_ctx->pd, attr);
1217         if (IS_ERR(ah))
1218                 return -ENOMEM;
1219         attr->grh.sgid_index = sgid_index;
1220         to_mah(ah)->av.ib.gid_index = sgid_index;
1221         /* get rid of force-loopback bit */
1222         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1223         spin_lock(&sqp->tx_lock);
1224         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1225             (MLX4_NUM_TUNNEL_BUFS - 1))
1226                 ret = -EAGAIN;
1227         else
1228                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1229         spin_unlock(&sqp->tx_lock);
1230         if (ret)
1231                 goto out;
1232
1233         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1234         if (sqp->tx_ring[wire_tx_ix].ah)
1235                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1236         sqp->tx_ring[wire_tx_ix].ah = ah;
1237         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1238                                    sqp->tx_ring[wire_tx_ix].buf.map,
1239                                    sizeof (struct mlx4_mad_snd_buf),
1240                                    DMA_TO_DEVICE);
1241
1242         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1243
1244         ib_dma_sync_single_for_device(&dev->ib_dev,
1245                                       sqp->tx_ring[wire_tx_ix].buf.map,
1246                                       sizeof (struct mlx4_mad_snd_buf),
1247                                       DMA_TO_DEVICE);
1248
1249         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1250         list.length = sizeof (struct mlx4_mad_snd_buf);
1251         list.lkey = sqp_ctx->mr->lkey;
1252
1253         wr.wr.ud.ah = ah;
1254         wr.wr.ud.port_num = port;
1255         wr.wr.ud.pkey_index = wire_pkey_ix;
1256         wr.wr.ud.remote_qkey = qkey;
1257         wr.wr.ud.remote_qpn = remote_qpn;
1258         wr.next = NULL;
1259         wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1260         wr.sg_list = &list;
1261         wr.num_sge = 1;
1262         wr.opcode = IB_WR_SEND;
1263         wr.send_flags = IB_SEND_SIGNALED;
1264         if (s_mac)
1265                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1266
1267
1268         ret = ib_post_send(send_qp, &wr, &bad_wr);
1269 out:
1270         if (ret)
1271                 ib_destroy_ah(ah);
1272         return ret;
1273 }
1274
1275 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1276 {
1277         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1278                 return slave;
1279         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1280 }
1281
1282 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1283                                     struct ib_ah_attr *ah_attr)
1284 {
1285         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1286                 ah_attr->grh.sgid_index = slave;
1287         else
1288                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1289 }
1290
1291 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1292 {
1293         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1294         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1295         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1296         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1297         struct mlx4_ib_ah ah;
1298         struct ib_ah_attr ah_attr;
1299         u8 *slave_id;
1300         int slave;
1301         int port;
1302
1303         /* Get slave that sent this packet */
1304         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1305             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1306             (wc->src_qp & 0x1) != ctx->port - 1 ||
1307             wc->src_qp & 0x4) {
1308                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1309                 return;
1310         }
1311         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1312         if (slave != ctx->slave) {
1313                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1314                              "belongs to another slave\n", wc->src_qp);
1315                 return;
1316         }
1317
1318         /* Map transaction ID */
1319         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1320                                    sizeof (struct mlx4_tunnel_mad),
1321                                    DMA_FROM_DEVICE);
1322         switch (tunnel->mad.mad_hdr.method) {
1323         case IB_MGMT_METHOD_SET:
1324         case IB_MGMT_METHOD_GET:
1325         case IB_MGMT_METHOD_REPORT:
1326         case IB_SA_METHOD_GET_TABLE:
1327         case IB_SA_METHOD_DELETE:
1328         case IB_SA_METHOD_GET_MULTI:
1329         case IB_SA_METHOD_GET_TRACE_TBL:
1330                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1331                 if (*slave_id) {
1332                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1333                                      "class:%d slave:%d\n", *slave_id,
1334                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1335                         return;
1336                 } else
1337                         *slave_id = slave;
1338         default:
1339                 /* nothing */;
1340         }
1341
1342         /* Class-specific handling */
1343         switch (tunnel->mad.mad_hdr.mgmt_class) {
1344         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1345         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1346                 if (slave != mlx4_master_func_num(dev->dev) &&
1347                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1348                         return;
1349                 break;
1350         case IB_MGMT_CLASS_SUBN_ADM:
1351                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1352                               (struct ib_sa_mad *) &tunnel->mad))
1353                         return;
1354                 break;
1355         case IB_MGMT_CLASS_CM:
1356                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1357                               (struct ib_mad *) &tunnel->mad))
1358                         return;
1359                 break;
1360         case IB_MGMT_CLASS_DEVICE_MGMT:
1361                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1362                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1363                         return;
1364                 break;
1365         default:
1366                 /* Drop unsupported classes for slaves in tunnel mode */
1367                 if (slave != mlx4_master_func_num(dev->dev)) {
1368                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1369                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1370                         return;
1371                 }
1372         }
1373
1374         /* We are using standard ib_core services to send the mad, so generate a
1375          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1376         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1377         ah.ibah.device = ctx->ib_dev;
1378         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1379         if (ah_attr.ah_flags & IB_AH_GRH)
1380                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1381
1382         port = mlx4_slave_convert_port(dev->dev, slave, ah_attr.port_num);
1383         if (port < 0)
1384                 return;
1385         ah_attr.port_num = port;
1386         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1387         ah_attr.vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1388         /* if slave have default vlan use it */
1389         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1390                                     &ah_attr.vlan_id, &ah_attr.sl);
1391
1392         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1393                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1394                              IB_QPT_SMI : IB_QPT_GSI,
1395                              be16_to_cpu(tunnel->hdr.pkey_index),
1396                              be32_to_cpu(tunnel->hdr.remote_qpn),
1397                              be32_to_cpu(tunnel->hdr.qkey),
1398                              &ah_attr, wc->smac, &tunnel->mad);
1399 }
1400
1401 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1402                                  enum ib_qp_type qp_type, int is_tun)
1403 {
1404         int i;
1405         struct mlx4_ib_demux_pv_qp *tun_qp;
1406         int rx_buf_size, tx_buf_size;
1407
1408         if (qp_type > IB_QPT_GSI)
1409                 return -EINVAL;
1410
1411         tun_qp = &ctx->qp[qp_type];
1412
1413         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1414                                GFP_KERNEL);
1415         if (!tun_qp->ring)
1416                 return -ENOMEM;
1417
1418         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1419                                   sizeof (struct mlx4_ib_tun_tx_buf),
1420                                   GFP_KERNEL);
1421         if (!tun_qp->tx_ring) {
1422                 kfree(tun_qp->ring);
1423                 tun_qp->ring = NULL;
1424                 return -ENOMEM;
1425         }
1426
1427         if (is_tun) {
1428                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1429                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1430         } else {
1431                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1432                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1433         }
1434
1435         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1436                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1437                 if (!tun_qp->ring[i].addr)
1438                         goto err;
1439                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1440                                                         tun_qp->ring[i].addr,
1441                                                         rx_buf_size,
1442                                                         DMA_FROM_DEVICE);
1443                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1444                         kfree(tun_qp->ring[i].addr);
1445                         goto err;
1446                 }
1447         }
1448
1449         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1450                 tun_qp->tx_ring[i].buf.addr =
1451                         kmalloc(tx_buf_size, GFP_KERNEL);
1452                 if (!tun_qp->tx_ring[i].buf.addr)
1453                         goto tx_err;
1454                 tun_qp->tx_ring[i].buf.map =
1455                         ib_dma_map_single(ctx->ib_dev,
1456                                           tun_qp->tx_ring[i].buf.addr,
1457                                           tx_buf_size,
1458                                           DMA_TO_DEVICE);
1459                 if (ib_dma_mapping_error(ctx->ib_dev,
1460                                          tun_qp->tx_ring[i].buf.map)) {
1461                         kfree(tun_qp->tx_ring[i].buf.addr);
1462                         goto tx_err;
1463                 }
1464                 tun_qp->tx_ring[i].ah = NULL;
1465         }
1466         spin_lock_init(&tun_qp->tx_lock);
1467         tun_qp->tx_ix_head = 0;
1468         tun_qp->tx_ix_tail = 0;
1469         tun_qp->proxy_qpt = qp_type;
1470
1471         return 0;
1472
1473 tx_err:
1474         while (i > 0) {
1475                 --i;
1476                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1477                                     tx_buf_size, DMA_TO_DEVICE);
1478                 kfree(tun_qp->tx_ring[i].buf.addr);
1479         }
1480         kfree(tun_qp->tx_ring);
1481         tun_qp->tx_ring = NULL;
1482         i = MLX4_NUM_TUNNEL_BUFS;
1483 err:
1484         while (i > 0) {
1485                 --i;
1486                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1487                                     rx_buf_size, DMA_FROM_DEVICE);
1488                 kfree(tun_qp->ring[i].addr);
1489         }
1490         kfree(tun_qp->ring);
1491         tun_qp->ring = NULL;
1492         return -ENOMEM;
1493 }
1494
1495 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1496                                      enum ib_qp_type qp_type, int is_tun)
1497 {
1498         int i;
1499         struct mlx4_ib_demux_pv_qp *tun_qp;
1500         int rx_buf_size, tx_buf_size;
1501
1502         if (qp_type > IB_QPT_GSI)
1503                 return;
1504
1505         tun_qp = &ctx->qp[qp_type];
1506         if (is_tun) {
1507                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1508                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1509         } else {
1510                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1511                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1512         }
1513
1514
1515         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1516                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1517                                     rx_buf_size, DMA_FROM_DEVICE);
1518                 kfree(tun_qp->ring[i].addr);
1519         }
1520
1521         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1522                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1523                                     tx_buf_size, DMA_TO_DEVICE);
1524                 kfree(tun_qp->tx_ring[i].buf.addr);
1525                 if (tun_qp->tx_ring[i].ah)
1526                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1527         }
1528         kfree(tun_qp->tx_ring);
1529         kfree(tun_qp->ring);
1530 }
1531
1532 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1533 {
1534         struct mlx4_ib_demux_pv_ctx *ctx;
1535         struct mlx4_ib_demux_pv_qp *tun_qp;
1536         struct ib_wc wc;
1537         int ret;
1538         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1539         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1540
1541         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1542                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1543                 if (wc.status == IB_WC_SUCCESS) {
1544                         switch (wc.opcode) {
1545                         case IB_WC_RECV:
1546                                 mlx4_ib_multiplex_mad(ctx, &wc);
1547                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1548                                                              wc.wr_id &
1549                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1550                                 if (ret)
1551                                         pr_err("Failed reposting tunnel "
1552                                                "buf:%lld\n", wc.wr_id);
1553                                 break;
1554                         case IB_WC_SEND:
1555                                 pr_debug("received tunnel send completion:"
1556                                          "wrid=0x%llx, status=0x%x\n",
1557                                          wc.wr_id, wc.status);
1558                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1559                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1560                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1561                                         = NULL;
1562                                 spin_lock(&tun_qp->tx_lock);
1563                                 tun_qp->tx_ix_tail++;
1564                                 spin_unlock(&tun_qp->tx_lock);
1565
1566                                 break;
1567                         default:
1568                                 break;
1569                         }
1570                 } else  {
1571                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1572                                  " status = %d, wrid = 0x%llx\n",
1573                                  ctx->slave, wc.status, wc.wr_id);
1574                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1575                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1576                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1577                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1578                                         = NULL;
1579                                 spin_lock(&tun_qp->tx_lock);
1580                                 tun_qp->tx_ix_tail++;
1581                                 spin_unlock(&tun_qp->tx_lock);
1582                         }
1583                 }
1584         }
1585 }
1586
1587 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1588 {
1589         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1590
1591         /* It's worse than that! He's dead, Jim! */
1592         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1593                event->event, sqp->port);
1594 }
1595
1596 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1597                             enum ib_qp_type qp_type, int create_tun)
1598 {
1599         int i, ret;
1600         struct mlx4_ib_demux_pv_qp *tun_qp;
1601         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1602         struct ib_qp_attr attr;
1603         int qp_attr_mask_INIT;
1604
1605         if (qp_type > IB_QPT_GSI)
1606                 return -EINVAL;
1607
1608         tun_qp = &ctx->qp[qp_type];
1609
1610         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1611         qp_init_attr.init_attr.send_cq = ctx->cq;
1612         qp_init_attr.init_attr.recv_cq = ctx->cq;
1613         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1614         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1615         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1616         qp_init_attr.init_attr.cap.max_send_sge = 1;
1617         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1618         if (create_tun) {
1619                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1620                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1621                 qp_init_attr.port = ctx->port;
1622                 qp_init_attr.slave = ctx->slave;
1623                 qp_init_attr.proxy_qp_type = qp_type;
1624                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1625                            IB_QP_QKEY | IB_QP_PORT;
1626         } else {
1627                 qp_init_attr.init_attr.qp_type = qp_type;
1628                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1629                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1630         }
1631         qp_init_attr.init_attr.port_num = ctx->port;
1632         qp_init_attr.init_attr.qp_context = ctx;
1633         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1634         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1635         if (IS_ERR(tun_qp->qp)) {
1636                 ret = PTR_ERR(tun_qp->qp);
1637                 tun_qp->qp = NULL;
1638                 pr_err("Couldn't create %s QP (%d)\n",
1639                        create_tun ? "tunnel" : "special", ret);
1640                 return ret;
1641         }
1642
1643         memset(&attr, 0, sizeof attr);
1644         attr.qp_state = IB_QPS_INIT;
1645         ret = 0;
1646         if (create_tun)
1647                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1648                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1649                                               &attr.pkey_index);
1650         if (ret || !create_tun)
1651                 attr.pkey_index =
1652                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1653         attr.qkey = IB_QP1_QKEY;
1654         attr.port_num = ctx->port;
1655         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1656         if (ret) {
1657                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1658                        create_tun ? "tunnel" : "special", ret);
1659                 goto err_qp;
1660         }
1661         attr.qp_state = IB_QPS_RTR;
1662         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1663         if (ret) {
1664                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1665                        create_tun ? "tunnel" : "special", ret);
1666                 goto err_qp;
1667         }
1668         attr.qp_state = IB_QPS_RTS;
1669         attr.sq_psn = 0;
1670         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1671         if (ret) {
1672                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1673                        create_tun ? "tunnel" : "special", ret);
1674                 goto err_qp;
1675         }
1676
1677         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1678                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1679                 if (ret) {
1680                         pr_err(" mlx4_ib_post_pv_buf error"
1681                                " (err = %d, i = %d)\n", ret, i);
1682                         goto err_qp;
1683                 }
1684         }
1685         return 0;
1686
1687 err_qp:
1688         ib_destroy_qp(tun_qp->qp);
1689         tun_qp->qp = NULL;
1690         return ret;
1691 }
1692
1693 /*
1694  * IB MAD completion callback for real SQPs
1695  */
1696 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1697 {
1698         struct mlx4_ib_demux_pv_ctx *ctx;
1699         struct mlx4_ib_demux_pv_qp *sqp;
1700         struct ib_wc wc;
1701         struct ib_grh *grh;
1702         struct ib_mad *mad;
1703
1704         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1705         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1706
1707         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1708                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1709                 if (wc.status == IB_WC_SUCCESS) {
1710                         switch (wc.opcode) {
1711                         case IB_WC_SEND:
1712                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1713                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1714                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1715                                         = NULL;
1716                                 spin_lock(&sqp->tx_lock);
1717                                 sqp->tx_ix_tail++;
1718                                 spin_unlock(&sqp->tx_lock);
1719                                 break;
1720                         case IB_WC_RECV:
1721                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1722                                                 (sqp->ring[wc.wr_id &
1723                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1724                                 grh = &(((struct mlx4_mad_rcv_buf *)
1725                                                 (sqp->ring[wc.wr_id &
1726                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1727                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1728                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1729                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1730                                         pr_err("Failed reposting SQP "
1731                                                "buf:%lld\n", wc.wr_id);
1732                                 break;
1733                         default:
1734                                 BUG_ON(1);
1735                                 break;
1736                         }
1737                 } else  {
1738                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1739                                  " status = %d, wrid = 0x%llx\n",
1740                                  ctx->slave, wc.status, wc.wr_id);
1741                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1742                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1743                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1744                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1745                                         = NULL;
1746                                 spin_lock(&sqp->tx_lock);
1747                                 sqp->tx_ix_tail++;
1748                                 spin_unlock(&sqp->tx_lock);
1749                         }
1750                 }
1751         }
1752 }
1753
1754 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1755                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1756 {
1757         struct mlx4_ib_demux_pv_ctx *ctx;
1758
1759         *ret_ctx = NULL;
1760         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1761         if (!ctx) {
1762                 pr_err("failed allocating pv resource context "
1763                        "for port %d, slave %d\n", port, slave);
1764                 return -ENOMEM;
1765         }
1766
1767         ctx->ib_dev = &dev->ib_dev;
1768         ctx->port = port;
1769         ctx->slave = slave;
1770         *ret_ctx = ctx;
1771         return 0;
1772 }
1773
1774 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1775 {
1776         if (dev->sriov.demux[port - 1].tun[slave]) {
1777                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1778                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1779         }
1780 }
1781
1782 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1783                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1784 {
1785         int ret, cq_size;
1786         struct ib_cq_init_attr cq_attr = {};
1787
1788         if (ctx->state != DEMUX_PV_STATE_DOWN)
1789                 return -EEXIST;
1790
1791         ctx->state = DEMUX_PV_STATE_STARTING;
1792         /* have QP0 only if link layer is IB */
1793         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1794             IB_LINK_LAYER_INFINIBAND)
1795                 ctx->has_smi = 1;
1796
1797         if (ctx->has_smi) {
1798                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1799                 if (ret) {
1800                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1801                         goto err_out;
1802                 }
1803         }
1804
1805         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1806         if (ret) {
1807                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1808                 goto err_out_qp0;
1809         }
1810
1811         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1812         if (ctx->has_smi)
1813                 cq_size *= 2;
1814
1815         cq_attr.cqe = cq_size;
1816         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1817                                NULL, ctx, &cq_attr);
1818         if (IS_ERR(ctx->cq)) {
1819                 ret = PTR_ERR(ctx->cq);
1820                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1821                 goto err_buf;
1822         }
1823
1824         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1825         if (IS_ERR(ctx->pd)) {
1826                 ret = PTR_ERR(ctx->pd);
1827                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1828                 goto err_cq;
1829         }
1830
1831         ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1832         if (IS_ERR(ctx->mr)) {
1833                 ret = PTR_ERR(ctx->mr);
1834                 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1835                 goto err_pd;
1836         }
1837
1838         if (ctx->has_smi) {
1839                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1840                 if (ret) {
1841                         pr_err("Couldn't create %s QP0 (%d)\n",
1842                                create_tun ? "tunnel for" : "",  ret);
1843                         goto err_mr;
1844                 }
1845         }
1846
1847         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1848         if (ret) {
1849                 pr_err("Couldn't create %s QP1 (%d)\n",
1850                        create_tun ? "tunnel for" : "",  ret);
1851                 goto err_qp0;
1852         }
1853
1854         if (create_tun)
1855                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1856         else
1857                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1858
1859         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1860
1861         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1862         if (ret) {
1863                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1864                 goto err_wq;
1865         }
1866         ctx->state = DEMUX_PV_STATE_ACTIVE;
1867         return 0;
1868
1869 err_wq:
1870         ctx->wq = NULL;
1871         ib_destroy_qp(ctx->qp[1].qp);
1872         ctx->qp[1].qp = NULL;
1873
1874
1875 err_qp0:
1876         if (ctx->has_smi)
1877                 ib_destroy_qp(ctx->qp[0].qp);
1878         ctx->qp[0].qp = NULL;
1879
1880 err_mr:
1881         ib_dereg_mr(ctx->mr);
1882         ctx->mr = NULL;
1883
1884 err_pd:
1885         ib_dealloc_pd(ctx->pd);
1886         ctx->pd = NULL;
1887
1888 err_cq:
1889         ib_destroy_cq(ctx->cq);
1890         ctx->cq = NULL;
1891
1892 err_buf:
1893         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1894
1895 err_out_qp0:
1896         if (ctx->has_smi)
1897                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1898 err_out:
1899         ctx->state = DEMUX_PV_STATE_DOWN;
1900         return ret;
1901 }
1902
1903 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1904                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1905 {
1906         if (!ctx)
1907                 return;
1908         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1909                 ctx->state = DEMUX_PV_STATE_DOWNING;
1910                 if (flush)
1911                         flush_workqueue(ctx->wq);
1912                 if (ctx->has_smi) {
1913                         ib_destroy_qp(ctx->qp[0].qp);
1914                         ctx->qp[0].qp = NULL;
1915                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1916                 }
1917                 ib_destroy_qp(ctx->qp[1].qp);
1918                 ctx->qp[1].qp = NULL;
1919                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1920                 ib_dereg_mr(ctx->mr);
1921                 ctx->mr = NULL;
1922                 ib_dealloc_pd(ctx->pd);
1923                 ctx->pd = NULL;
1924                 ib_destroy_cq(ctx->cq);
1925                 ctx->cq = NULL;
1926                 ctx->state = DEMUX_PV_STATE_DOWN;
1927         }
1928 }
1929
1930 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1931                                   int port, int do_init)
1932 {
1933         int ret = 0;
1934
1935         if (!do_init) {
1936                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1937                 /* for master, destroy real sqp resources */
1938                 if (slave == mlx4_master_func_num(dev->dev))
1939                         destroy_pv_resources(dev, slave, port,
1940                                              dev->sriov.sqps[port - 1], 1);
1941                 /* destroy the tunnel qp resources */
1942                 destroy_pv_resources(dev, slave, port,
1943                                      dev->sriov.demux[port - 1].tun[slave], 1);
1944                 return 0;
1945         }
1946
1947         /* create the tunnel qp resources */
1948         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1949                                   dev->sriov.demux[port - 1].tun[slave]);
1950
1951         /* for master, create the real sqp resources */
1952         if (!ret && slave == mlx4_master_func_num(dev->dev))
1953                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1954                                           dev->sriov.sqps[port - 1]);
1955         return ret;
1956 }
1957
1958 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1959 {
1960         struct mlx4_ib_demux_work *dmxw;
1961
1962         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1963         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1964                                dmxw->do_init);
1965         kfree(dmxw);
1966         return;
1967 }
1968
1969 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1970                                        struct mlx4_ib_demux_ctx *ctx,
1971                                        int port)
1972 {
1973         char name[12];
1974         int ret = 0;
1975         int i;
1976
1977         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1978                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1979         if (!ctx->tun)
1980                 return -ENOMEM;
1981
1982         ctx->dev = dev;
1983         ctx->port = port;
1984         ctx->ib_dev = &dev->ib_dev;
1985
1986         for (i = 0;
1987              i < min(dev->dev->caps.sqp_demux,
1988              (u16)(dev->dev->persist->num_vfs + 1));
1989              i++) {
1990                 struct mlx4_active_ports actv_ports =
1991                         mlx4_get_active_ports(dev->dev, i);
1992
1993                 if (!test_bit(port - 1, actv_ports.ports))
1994                         continue;
1995
1996                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1997                 if (ret) {
1998                         ret = -ENOMEM;
1999                         goto err_mcg;
2000                 }
2001         }
2002
2003         ret = mlx4_ib_mcg_port_init(ctx);
2004         if (ret) {
2005                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2006                 goto err_mcg;
2007         }
2008
2009         snprintf(name, sizeof name, "mlx4_ibt%d", port);
2010         ctx->wq = create_singlethread_workqueue(name);
2011         if (!ctx->wq) {
2012                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2013                 ret = -ENOMEM;
2014                 goto err_wq;
2015         }
2016
2017         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2018         ctx->ud_wq = create_singlethread_workqueue(name);
2019         if (!ctx->ud_wq) {
2020                 pr_err("Failed to create up/down WQ for port %d\n", port);
2021                 ret = -ENOMEM;
2022                 goto err_udwq;
2023         }
2024
2025         return 0;
2026
2027 err_udwq:
2028         destroy_workqueue(ctx->wq);
2029         ctx->wq = NULL;
2030
2031 err_wq:
2032         mlx4_ib_mcg_port_cleanup(ctx, 1);
2033 err_mcg:
2034         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2035                 free_pv_object(dev, i, port);
2036         kfree(ctx->tun);
2037         ctx->tun = NULL;
2038         return ret;
2039 }
2040
2041 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2042 {
2043         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2044                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2045                 flush_workqueue(sqp_ctx->wq);
2046                 if (sqp_ctx->has_smi) {
2047                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2048                         sqp_ctx->qp[0].qp = NULL;
2049                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2050                 }
2051                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2052                 sqp_ctx->qp[1].qp = NULL;
2053                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2054                 ib_dereg_mr(sqp_ctx->mr);
2055                 sqp_ctx->mr = NULL;
2056                 ib_dealloc_pd(sqp_ctx->pd);
2057                 sqp_ctx->pd = NULL;
2058                 ib_destroy_cq(sqp_ctx->cq);
2059                 sqp_ctx->cq = NULL;
2060                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2061         }
2062 }
2063
2064 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2065 {
2066         int i;
2067         if (ctx) {
2068                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2069                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2070                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2071                         if (!ctx->tun[i])
2072                                 continue;
2073                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2074                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2075                 }
2076                 flush_workqueue(ctx->wq);
2077                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2078                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2079                         free_pv_object(dev, i, ctx->port);
2080                 }
2081                 kfree(ctx->tun);
2082                 destroy_workqueue(ctx->ud_wq);
2083                 destroy_workqueue(ctx->wq);
2084         }
2085 }
2086
2087 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2088 {
2089         int i;
2090
2091         if (!mlx4_is_master(dev->dev))
2092                 return;
2093         /* initialize or tear down tunnel QPs for the master */
2094         for (i = 0; i < dev->dev->caps.num_ports; i++)
2095                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2096         return;
2097 }
2098
2099 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2100 {
2101         int i = 0;
2102         int err;
2103
2104         if (!mlx4_is_mfunc(dev->dev))
2105                 return 0;
2106
2107         dev->sriov.is_going_down = 0;
2108         spin_lock_init(&dev->sriov.going_down_lock);
2109         mlx4_ib_cm_paravirt_init(dev);
2110
2111         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2112
2113         if (mlx4_is_slave(dev->dev)) {
2114                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2115                 return 0;
2116         }
2117
2118         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2119                 if (i == mlx4_master_func_num(dev->dev))
2120                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2121                 else
2122                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2123         }
2124
2125         err = mlx4_ib_init_alias_guid_service(dev);
2126         if (err) {
2127                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2128                 goto paravirt_err;
2129         }
2130         err = mlx4_ib_device_register_sysfs(dev);
2131         if (err) {
2132                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2133                 goto sysfs_err;
2134         }
2135
2136         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2137                      dev->dev->caps.sqp_demux);
2138         for (i = 0; i < dev->num_ports; i++) {
2139                 union ib_gid gid;
2140                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2141                 if (err)
2142                         goto demux_err;
2143                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2144                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2145                                       &dev->sriov.sqps[i]);
2146                 if (err)
2147                         goto demux_err;
2148                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2149                 if (err)
2150                         goto free_pv;
2151         }
2152         mlx4_ib_master_tunnels(dev, 1);
2153         return 0;
2154
2155 free_pv:
2156         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2157 demux_err:
2158         while (--i >= 0) {
2159                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2160                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2161         }
2162         mlx4_ib_device_unregister_sysfs(dev);
2163
2164 sysfs_err:
2165         mlx4_ib_destroy_alias_guid_service(dev);
2166
2167 paravirt_err:
2168         mlx4_ib_cm_paravirt_clean(dev, -1);
2169
2170         return err;
2171 }
2172
2173 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2174 {
2175         int i;
2176         unsigned long flags;
2177
2178         if (!mlx4_is_mfunc(dev->dev))
2179                 return;
2180
2181         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2182         dev->sriov.is_going_down = 1;
2183         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2184         if (mlx4_is_master(dev->dev)) {
2185                 for (i = 0; i < dev->num_ports; i++) {
2186                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2187                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2188                         kfree(dev->sriov.sqps[i]);
2189                         dev->sriov.sqps[i] = NULL;
2190                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2191                 }
2192
2193                 mlx4_ib_cm_paravirt_clean(dev, -1);
2194                 mlx4_ib_destroy_alias_guid_service(dev);
2195                 mlx4_ib_device_unregister_sysfs(dev);
2196         }
2197 }