2 * Sony CXD2820R demodulator driver
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #include "cxd2820r_priv.h"
25 module_param_named(debug, cxd2820r_debug, int, 0644);
26 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
28 /* write multiple registers */
29 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
34 struct i2c_msg msg[1] = {
44 memcpy(&buf[1], val, len);
46 ret = i2c_transfer(priv->i2c, msg, 1);
50 warn("i2c wr failed ret:%d reg:%02x len:%d", ret, reg, len);
56 /* read multiple registers */
57 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
62 struct i2c_msg msg[2] = {
76 ret = i2c_transfer(priv->i2c, msg, 2);
78 memcpy(val, buf, len);
81 warn("i2c rd failed ret:%d reg:%02x len:%d", ret, reg, len);
88 /* write multiple registers */
89 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
94 u8 reg = (reginfo >> 0) & 0xff;
95 u8 bank = (reginfo >> 8) & 0xff;
96 u8 i2c = (reginfo >> 16) & 0x01;
100 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
102 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
104 /* switch bank if needed */
105 if (bank != priv->bank[i2c]) {
106 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
109 priv->bank[i2c] = bank;
111 return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
114 /* read multiple registers */
115 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
120 u8 reg = (reginfo >> 0) & 0xff;
121 u8 bank = (reginfo >> 8) & 0xff;
122 u8 i2c = (reginfo >> 16) & 0x01;
126 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
128 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
130 /* switch bank if needed */
131 if (bank != priv->bank[i2c]) {
132 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
135 priv->bank[i2c] = bank;
137 return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
140 /* write single register */
141 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
143 return cxd2820r_wr_regs(priv, reg, &val, 1);
146 /* read single register */
147 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
149 return cxd2820r_rd_regs(priv, reg, val, 1);
152 /* write single register with mask */
153 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
159 /* no need for read if whole reg is written */
161 ret = cxd2820r_rd_reg(priv, reg, &tmp);
170 return cxd2820r_wr_reg(priv, reg, val);
173 int cxd2820r_gpio(struct dvb_frontend *fe)
175 struct cxd2820r_priv *priv = fe->demodulator_priv;
177 u8 *gpio, tmp0, tmp1;
178 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
180 switch (fe->dtv_property_cache.delivery_system) {
182 gpio = priv->cfg.gpio_dvbt;
185 gpio = priv->cfg.gpio_dvbt2;
187 case SYS_DVBC_ANNEX_AC:
188 gpio = priv->cfg.gpio_dvbc;
195 /* update GPIOs only when needed */
196 if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
201 for (i = 0; i < sizeof(priv->gpio); i++) {
202 /* enable / disable */
203 if (gpio[i] & CXD2820R_GPIO_E)
204 tmp0 |= (2 << 6) >> (2 * i);
206 tmp0 |= (1 << 6) >> (2 * i);
209 if (gpio[i] & CXD2820R_GPIO_I)
210 tmp1 |= (1 << (3 + i));
212 tmp1 |= (0 << (3 + i));
215 if (gpio[i] & CXD2820R_GPIO_H)
216 tmp1 |= (1 << (0 + i));
218 tmp1 |= (0 << (0 + i));
220 dbg("%s: GPIO i=%d %02x %02x", __func__, i, tmp0, tmp1);
223 dbg("%s: wr gpio=%02x %02x", __func__, tmp0, tmp1);
225 /* write bits [7:2] */
226 ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
230 /* write bits [5:0] */
231 ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
235 memcpy(priv->gpio, gpio, sizeof(priv->gpio));
239 dbg("%s: failed:%d", __func__, ret);
244 static int cxd2820r_lock(struct cxd2820r_priv *priv, int active_fe)
247 dbg("%s: active_fe=%d", __func__, active_fe);
249 mutex_lock(&priv->fe_lock);
251 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
252 if (priv->active_fe == active_fe)
254 else if (priv->active_fe == -1)
255 priv->active_fe = active_fe;
259 mutex_unlock(&priv->fe_lock);
265 static void cxd2820r_unlock(struct cxd2820r_priv *priv, int active_fe)
267 dbg("%s: active_fe=%d", __func__, active_fe);
269 mutex_lock(&priv->fe_lock);
271 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
272 if (priv->active_fe == active_fe)
273 priv->active_fe = -1;
275 mutex_unlock(&priv->fe_lock);
280 /* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
281 u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
283 return div_u64(dividend + (divisor / 2), divisor);
286 static int cxd2820r_set_frontend(struct dvb_frontend *fe,
287 struct dvb_frontend_parameters *p)
289 struct cxd2820r_priv *priv = fe->demodulator_priv;
290 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
292 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
294 if (fe->ops.info.type == FE_OFDM) {
296 ret = cxd2820r_lock(priv, 0);
300 switch (priv->delivery_system) {
302 if (c->delivery_system == SYS_DVBT) {
304 ret = cxd2820r_set_frontend_t(fe, p);
306 /* SLEEP => DVB-T2 */
307 ret = cxd2820r_set_frontend_t2(fe, p);
311 if (c->delivery_system == SYS_DVBT) {
313 ret = cxd2820r_set_frontend_t(fe, p);
314 } else if (c->delivery_system == SYS_DVBT2) {
315 /* DVB-T => DVB-T2 */
316 ret = cxd2820r_sleep_t(fe);
319 ret = cxd2820r_set_frontend_t2(fe, p);
323 if (c->delivery_system == SYS_DVBT2) {
324 /* DVB-T2 => DVB-T2 */
325 ret = cxd2820r_set_frontend_t2(fe, p);
326 } else if (c->delivery_system == SYS_DVBT) {
327 /* DVB-T2 => DVB-T */
328 ret = cxd2820r_sleep_t2(fe);
331 ret = cxd2820r_set_frontend_t(fe, p);
335 dbg("%s: error state=%d", __func__,
336 priv->delivery_system);
341 ret = cxd2820r_lock(priv, 1);
345 ret = cxd2820r_set_frontend_c(fe, p);
351 static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
353 struct cxd2820r_priv *priv = fe->demodulator_priv;
355 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
357 if (fe->ops.info.type == FE_OFDM) {
359 ret = cxd2820r_lock(priv, 0);
363 switch (fe->dtv_property_cache.delivery_system) {
365 ret = cxd2820r_read_status_t(fe, status);
368 ret = cxd2820r_read_status_t2(fe, status);
375 ret = cxd2820r_lock(priv, 1);
379 ret = cxd2820r_read_status_c(fe, status);
385 static int cxd2820r_get_frontend(struct dvb_frontend *fe,
386 struct dvb_frontend_parameters *p)
388 struct cxd2820r_priv *priv = fe->demodulator_priv;
390 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
392 if (fe->ops.info.type == FE_OFDM) {
394 ret = cxd2820r_lock(priv, 0);
398 switch (fe->dtv_property_cache.delivery_system) {
400 ret = cxd2820r_get_frontend_t(fe, p);
403 ret = cxd2820r_get_frontend_t2(fe, p);
410 ret = cxd2820r_lock(priv, 1);
414 ret = cxd2820r_get_frontend_c(fe, p);
420 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
422 struct cxd2820r_priv *priv = fe->demodulator_priv;
424 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
426 if (fe->ops.info.type == FE_OFDM) {
428 ret = cxd2820r_lock(priv, 0);
432 switch (fe->dtv_property_cache.delivery_system) {
434 ret = cxd2820r_read_ber_t(fe, ber);
437 ret = cxd2820r_read_ber_t2(fe, ber);
444 ret = cxd2820r_lock(priv, 1);
448 ret = cxd2820r_read_ber_c(fe, ber);
454 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
456 struct cxd2820r_priv *priv = fe->demodulator_priv;
458 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
460 if (fe->ops.info.type == FE_OFDM) {
462 ret = cxd2820r_lock(priv, 0);
466 switch (fe->dtv_property_cache.delivery_system) {
468 ret = cxd2820r_read_signal_strength_t(fe, strength);
471 ret = cxd2820r_read_signal_strength_t2(fe, strength);
478 ret = cxd2820r_lock(priv, 1);
482 ret = cxd2820r_read_signal_strength_c(fe, strength);
488 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
490 struct cxd2820r_priv *priv = fe->demodulator_priv;
492 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
494 if (fe->ops.info.type == FE_OFDM) {
496 ret = cxd2820r_lock(priv, 0);
500 switch (fe->dtv_property_cache.delivery_system) {
502 ret = cxd2820r_read_snr_t(fe, snr);
505 ret = cxd2820r_read_snr_t2(fe, snr);
512 ret = cxd2820r_lock(priv, 1);
516 ret = cxd2820r_read_snr_c(fe, snr);
522 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
524 struct cxd2820r_priv *priv = fe->demodulator_priv;
526 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
528 if (fe->ops.info.type == FE_OFDM) {
530 ret = cxd2820r_lock(priv, 0);
534 switch (fe->dtv_property_cache.delivery_system) {
536 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
539 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
546 ret = cxd2820r_lock(priv, 1);
550 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
556 static int cxd2820r_init(struct dvb_frontend *fe)
558 struct cxd2820r_priv *priv = fe->demodulator_priv;
560 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
562 priv->delivery_system = SYS_UNDEFINED;
563 /* delivery system is unknown at that (init) phase */
565 if (fe->ops.info.type == FE_OFDM) {
567 ret = cxd2820r_lock(priv, 0);
571 ret = cxd2820r_init_t(fe);
574 ret = cxd2820r_lock(priv, 1);
578 ret = cxd2820r_init_c(fe);
584 static int cxd2820r_sleep(struct dvb_frontend *fe)
586 struct cxd2820r_priv *priv = fe->demodulator_priv;
588 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
590 if (fe->ops.info.type == FE_OFDM) {
592 ret = cxd2820r_lock(priv, 0);
596 switch (fe->dtv_property_cache.delivery_system) {
598 ret = cxd2820r_sleep_t(fe);
601 ret = cxd2820r_sleep_t2(fe);
607 cxd2820r_unlock(priv, 0);
610 ret = cxd2820r_lock(priv, 1);
614 ret = cxd2820r_sleep_c(fe);
616 cxd2820r_unlock(priv, 1);
622 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
623 struct dvb_frontend_tune_settings *s)
625 struct cxd2820r_priv *priv = fe->demodulator_priv;
627 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
629 if (fe->ops.info.type == FE_OFDM) {
631 ret = cxd2820r_lock(priv, 0);
635 switch (fe->dtv_property_cache.delivery_system) {
637 ret = cxd2820r_get_tune_settings_t(fe, s);
640 ret = cxd2820r_get_tune_settings_t2(fe, s);
647 ret = cxd2820r_lock(priv, 1);
651 ret = cxd2820r_get_tune_settings_c(fe, s);
657 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe,
658 struct dvb_frontend_parameters *p)
660 struct cxd2820r_priv *priv = fe->demodulator_priv;
661 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
663 fe_status_t status = 0;
664 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
666 /* switch between DVB-T and DVB-T2 when tune fails */
667 if (priv->last_tune_failed) {
668 if (priv->delivery_system == SYS_DVBT)
669 c->delivery_system = SYS_DVBT2;
671 c->delivery_system = SYS_DVBT;
675 ret = cxd2820r_set_frontend(fe, p);
680 /* frontend lock wait loop count */
681 switch (priv->delivery_system) {
694 /* wait frontend lock */
696 dbg("%s: LOOP=%d", __func__, i);
698 ret = cxd2820r_read_status(fe, &status);
702 if (status & FE_HAS_SIGNAL)
706 /* check if we have a valid signal */
708 priv->last_tune_failed = 0;
709 return DVBFE_ALGO_SEARCH_SUCCESS;
711 priv->last_tune_failed = 1;
712 return DVBFE_ALGO_SEARCH_AGAIN;
716 dbg("%s: failed:%d", __func__, ret);
717 return DVBFE_ALGO_SEARCH_ERROR;
720 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
722 return DVBFE_ALGO_CUSTOM;
725 static void cxd2820r_release(struct dvb_frontend *fe)
727 struct cxd2820r_priv *priv = fe->demodulator_priv;
730 if (fe->ops.info.type == FE_OFDM)
736 static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
738 struct cxd2820r_priv *priv = fe->demodulator_priv;
739 dbg("%s: %d", __func__, enable);
741 /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
742 return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
745 static const struct dvb_frontend_ops cxd2820r_ops[2];
747 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
748 struct i2c_adapter *i2c, struct dvb_frontend *fe)
751 struct cxd2820r_priv *priv = NULL;
756 /* allocate memory for the internal priv */
757 priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
763 memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
764 mutex_init(&priv->fe_lock);
766 priv->active_fe = -1; /* NONE */
768 /* check if the demod is there */
769 priv->bank[0] = priv->bank[1] = 0xff;
770 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
771 dbg("%s: chip id=%02x", __func__, tmp);
772 if (ret || tmp != 0xe1)
775 /* create frontends */
776 memcpy(&priv->fe[0].ops, &cxd2820r_ops[0],
777 sizeof(struct dvb_frontend_ops));
778 memcpy(&priv->fe[1].ops, &cxd2820r_ops[1],
779 sizeof(struct dvb_frontend_ops));
781 priv->fe[0].demodulator_priv = priv;
782 priv->fe[1].demodulator_priv = priv;
787 /* FE1: FE0 given as pointer, just return FE1 we have
789 priv = fe->demodulator_priv;
797 EXPORT_SYMBOL(cxd2820r_attach);
799 static const struct dvb_frontend_ops cxd2820r_ops[2] = {
803 .name = "Sony CXD2820R (DVB-T/T2)",
806 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
807 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
808 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
809 FE_CAN_QPSK | FE_CAN_QAM_16 |
810 FE_CAN_QAM_64 | FE_CAN_QAM_256 |
812 FE_CAN_TRANSMISSION_MODE_AUTO |
813 FE_CAN_GUARD_INTERVAL_AUTO |
814 FE_CAN_HIERARCHY_AUTO |
819 .release = cxd2820r_release,
820 .init = cxd2820r_init,
821 .sleep = cxd2820r_sleep,
823 .get_tune_settings = cxd2820r_get_tune_settings,
824 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
826 .get_frontend = cxd2820r_get_frontend,
828 .get_frontend_algo = cxd2820r_get_frontend_algo,
829 .search = cxd2820r_search,
831 .read_status = cxd2820r_read_status,
832 .read_snr = cxd2820r_read_snr,
833 .read_ber = cxd2820r_read_ber,
834 .read_ucblocks = cxd2820r_read_ucblocks,
835 .read_signal_strength = cxd2820r_read_signal_strength,
840 .name = "Sony CXD2820R (DVB-C)",
843 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
844 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
848 .release = cxd2820r_release,
849 .init = cxd2820r_init,
850 .sleep = cxd2820r_sleep,
852 .get_tune_settings = cxd2820r_get_tune_settings,
853 .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
855 .set_frontend = cxd2820r_set_frontend,
856 .get_frontend = cxd2820r_get_frontend,
858 .read_status = cxd2820r_read_status,
859 .read_snr = cxd2820r_read_snr,
860 .read_ber = cxd2820r_read_ber,
861 .read_ucblocks = cxd2820r_read_ucblocks,
862 .read_signal_strength = cxd2820r_read_signal_strength,
867 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
868 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
869 MODULE_LICENSE("GPL");