drivers/media/dvb-frontends/rtl2832.c

   1 /*
   2  * Realtek RTL2832 DVB-T demodulator driver
   3  *
   4  * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
   5  *
   6  *      This program is free software; you can redistribute it and/or modify
   7  *      it under the terms of the GNU General Public License as published by
   8  *      the Free Software Foundation; either version 2 of the License, or
   9  *      (at your option) any later version.
  10  *
  11  *      This program is distributed in the hope that it will be useful,
  12  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *      GNU General Public License for more details.
  15  *
  16  *      You should have received a copy of the GNU General Public License along
  17  *      with this program; if not, write to the Free Software Foundation, Inc.,
  18  *      51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include "rtl2832_priv.h"
  22 #include "dvb_math.h"
  23 #include <linux/bitops.h>
  24
  25 #define REG_MASK(b) (BIT(b + 1) - 1)
  26
  27 static const struct rtl2832_reg_entry registers[] = {
  28         [DVBT_SOFT_RST]         = {0x1, 0x1,   2, 2},
  29         [DVBT_IIC_REPEAT]       = {0x1, 0x1,   3, 3},
  30         [DVBT_TR_WAIT_MIN_8K]   = {0x1, 0x88, 11, 2},
  31         [DVBT_RSD_BER_FAIL_VAL] = {0x1, 0x8f, 15, 0},
  32         [DVBT_EN_BK_TRK]        = {0x1, 0xa6,  7, 7},
  33         [DVBT_AD_EN_REG]        = {0x0, 0x8,   7, 7},
  34         [DVBT_AD_EN_REG1]       = {0x0, 0x8,   6, 6},
  35         [DVBT_EN_BBIN]          = {0x1, 0xb1,  0, 0},
  36         [DVBT_MGD_THD0]         = {0x1, 0x95,  7, 0},
  37         [DVBT_MGD_THD1]         = {0x1, 0x96,  7, 0},
  38         [DVBT_MGD_THD2]         = {0x1, 0x97,  7, 0},
  39         [DVBT_MGD_THD3]         = {0x1, 0x98,  7, 0},
  40         [DVBT_MGD_THD4]         = {0x1, 0x99,  7, 0},
  41         [DVBT_MGD_THD5]         = {0x1, 0x9a,  7, 0},
  42         [DVBT_MGD_THD6]         = {0x1, 0x9b,  7, 0},
  43         [DVBT_MGD_THD7]         = {0x1, 0x9c,  7, 0},
  44         [DVBT_EN_CACQ_NOTCH]    = {0x1, 0x61,  4, 4},
  45         [DVBT_AD_AV_REF]        = {0x0, 0x9,   6, 0},
  46         [DVBT_REG_PI]           = {0x0, 0xa,   2, 0},
  47         [DVBT_PIP_ON]           = {0x0, 0x21,  3, 3},
  48         [DVBT_SCALE1_B92]       = {0x2, 0x92,  7, 0},
  49         [DVBT_SCALE1_B93]       = {0x2, 0x93,  7, 0},
  50         [DVBT_SCALE1_BA7]       = {0x2, 0xa7,  7, 0},
  51         [DVBT_SCALE1_BA9]       = {0x2, 0xa9,  7, 0},
  52         [DVBT_SCALE1_BAA]       = {0x2, 0xaa,  7, 0},
  53         [DVBT_SCALE1_BAB]       = {0x2, 0xab,  7, 0},
  54         [DVBT_SCALE1_BAC]       = {0x2, 0xac,  7, 0},
  55         [DVBT_SCALE1_BB0]       = {0x2, 0xb0,  7, 0},
  56         [DVBT_SCALE1_BB1]       = {0x2, 0xb1,  7, 0},
  57         [DVBT_KB_P1]            = {0x1, 0x64,  3, 1},
  58         [DVBT_KB_P2]            = {0x1, 0x64,  6, 4},
  59         [DVBT_KB_P3]            = {0x1, 0x65,  2, 0},
  60         [DVBT_OPT_ADC_IQ]       = {0x0, 0x6,   5, 4},
  61         [DVBT_AD_AVI]           = {0x0, 0x9,   1, 0},
  62         [DVBT_AD_AVQ]           = {0x0, 0x9,   3, 2},
  63         [DVBT_K1_CR_STEP12]     = {0x2, 0xad,  9, 4},
  64         [DVBT_TRK_KS_P2]        = {0x1, 0x6f,  2, 0},
  65         [DVBT_TRK_KS_I2]        = {0x1, 0x70,  5, 3},
  66         [DVBT_TR_THD_SET2]      = {0x1, 0x72,  3, 0},
  67         [DVBT_TRK_KC_P2]        = {0x1, 0x73,  5, 3},
  68         [DVBT_TRK_KC_I2]        = {0x1, 0x75,  2, 0},
  69         [DVBT_CR_THD_SET2]      = {0x1, 0x76,  7, 6},
  70         [DVBT_PSET_IFFREQ]      = {0x1, 0x19, 21, 0},
  71         [DVBT_SPEC_INV]         = {0x1, 0x15,  0, 0},
  72         [DVBT_RSAMP_RATIO]      = {0x1, 0x9f, 27, 2},
  73         [DVBT_CFREQ_OFF_RATIO]  = {0x1, 0x9d, 23, 4},
  74         [DVBT_FSM_STAGE]        = {0x3, 0x51,  6, 3},
  75         [DVBT_RX_CONSTEL]       = {0x3, 0x3c,  3, 2},
  76         [DVBT_RX_HIER]          = {0x3, 0x3c,  6, 4},
  77         [DVBT_RX_C_RATE_LP]     = {0x3, 0x3d,  2, 0},
  78         [DVBT_RX_C_RATE_HP]     = {0x3, 0x3d,  5, 3},
  79         [DVBT_GI_IDX]           = {0x3, 0x51,  1, 0},
  80         [DVBT_FFT_MODE_IDX]     = {0x3, 0x51,  2, 2},
  81         [DVBT_RSD_BER_EST]      = {0x3, 0x4e, 15, 0},
  82         [DVBT_CE_EST_EVM]       = {0x4, 0xc,  15, 0},
  83         [DVBT_RF_AGC_VAL]       = {0x3, 0x5b, 13, 0},
  84         [DVBT_IF_AGC_VAL]       = {0x3, 0x59, 13, 0},
  85         [DVBT_DAGC_VAL]         = {0x3, 0x5,   7, 0},
  86         [DVBT_SFREQ_OFF]        = {0x3, 0x18, 13, 0},
  87         [DVBT_CFREQ_OFF]        = {0x3, 0x5f, 17, 0},
  88         [DVBT_POLAR_RF_AGC]     = {0x0, 0xe,   1, 1},
  89         [DVBT_POLAR_IF_AGC]     = {0x0, 0xe,   0, 0},
  90         [DVBT_AAGC_HOLD]        = {0x1, 0x4,   5, 5},
  91         [DVBT_EN_RF_AGC]        = {0x1, 0x4,   6, 6},
  92         [DVBT_EN_IF_AGC]        = {0x1, 0x4,   7, 7},
  93         [DVBT_IF_AGC_MIN]       = {0x1, 0x8,   7, 0},
  94         [DVBT_IF_AGC_MAX]       = {0x1, 0x9,   7, 0},
  95         [DVBT_RF_AGC_MIN]       = {0x1, 0xa,   7, 0},
  96         [DVBT_RF_AGC_MAX]       = {0x1, 0xb,   7, 0},
  97         [DVBT_IF_AGC_MAN]       = {0x1, 0xc,   6, 6},
  98         [DVBT_IF_AGC_MAN_VAL]   = {0x1, 0xc,  13, 0},
  99         [DVBT_RF_AGC_MAN]       = {0x1, 0xe,   6, 6},
 100         [DVBT_RF_AGC_MAN_VAL]   = {0x1, 0xe,  13, 0},
 101         [DVBT_DAGC_TRG_VAL]     = {0x1, 0x12,  7, 0},
 102         [DVBT_AGC_TARG_VAL_0]   = {0x1, 0x2,   0, 0},
 103         [DVBT_AGC_TARG_VAL_8_1] = {0x1, 0x3,   7, 0},
 104         [DVBT_AAGC_LOOP_GAIN]   = {0x1, 0xc7,  5, 1},
 105         [DVBT_LOOP_GAIN2_3_0]   = {0x1, 0x4,   4, 1},
 106         [DVBT_LOOP_GAIN2_4]     = {0x1, 0x5,   7, 7},
 107         [DVBT_LOOP_GAIN3]       = {0x1, 0xc8,  4, 0},
 108         [DVBT_VTOP1]            = {0x1, 0x6,   5, 0},
 109         [DVBT_VTOP2]            = {0x1, 0xc9,  5, 0},
 110         [DVBT_VTOP3]            = {0x1, 0xca,  5, 0},
 111         [DVBT_KRF1]             = {0x1, 0xcb,  7, 0},
 112         [DVBT_KRF2]             = {0x1, 0x7,   7, 0},
 113         [DVBT_KRF3]             = {0x1, 0xcd,  7, 0},
 114         [DVBT_KRF4]             = {0x1, 0xce,  7, 0},
 115         [DVBT_EN_GI_PGA]        = {0x1, 0xe5,  0, 0},
 116         [DVBT_THD_LOCK_UP]      = {0x1, 0xd9,  8, 0},
 117         [DVBT_THD_LOCK_DW]      = {0x1, 0xdb,  8, 0},
 118         [DVBT_THD_UP1]          = {0x1, 0xdd,  7, 0},
 119         [DVBT_THD_DW1]          = {0x1, 0xde,  7, 0},
 120         [DVBT_INTER_CNT_LEN]    = {0x1, 0xd8,  3, 0},
 121         [DVBT_GI_PGA_STATE]     = {0x1, 0xe6,  3, 3},
 122         [DVBT_EN_AGC_PGA]       = {0x1, 0xd7,  0, 0},
 123         [DVBT_CKOUTPAR]         = {0x1, 0x7b,  5, 5},
 124         [DVBT_CKOUT_PWR]        = {0x1, 0x7b,  6, 6},
 125         [DVBT_SYNC_DUR]         = {0x1, 0x7b,  7, 7},
 126         [DVBT_ERR_DUR]          = {0x1, 0x7c,  0, 0},
 127         [DVBT_SYNC_LVL]         = {0x1, 0x7c,  1, 1},
 128         [DVBT_ERR_LVL]          = {0x1, 0x7c,  2, 2},
 129         [DVBT_VAL_LVL]          = {0x1, 0x7c,  3, 3},
 130         [DVBT_SERIAL]           = {0x1, 0x7c,  4, 4},
 131         [DVBT_SER_LSB]          = {0x1, 0x7c,  5, 5},
 132         [DVBT_CDIV_PH0]         = {0x1, 0x7d,  3, 0},
 133         [DVBT_CDIV_PH1]         = {0x1, 0x7d,  7, 4},
 134         [DVBT_MPEG_IO_OPT_2_2]  = {0x0, 0x6,   7, 7},
 135         [DVBT_MPEG_IO_OPT_1_0]  = {0x0, 0x7,   7, 6},
 136         [DVBT_CKOUTPAR_PIP]     = {0x0, 0xb7,  4, 4},
 137         [DVBT_CKOUT_PWR_PIP]    = {0x0, 0xb7,  3, 3},
 138         [DVBT_SYNC_LVL_PIP]     = {0x0, 0xb7,  2, 2},
 139         [DVBT_ERR_LVL_PIP]      = {0x0, 0xb7,  1, 1},
 140         [DVBT_VAL_LVL_PIP]      = {0x0, 0xb7,  0, 0},
 141         [DVBT_CKOUTPAR_PID]     = {0x0, 0xb9,  4, 4},
 142         [DVBT_CKOUT_PWR_PID]    = {0x0, 0xb9,  3, 3},
 143         [DVBT_SYNC_LVL_PID]     = {0x0, 0xb9,  2, 2},
 144         [DVBT_ERR_LVL_PID]      = {0x0, 0xb9,  1, 1},
 145         [DVBT_VAL_LVL_PID]      = {0x0, 0xb9,  0, 0},
 146         [DVBT_SM_PASS]          = {0x1, 0x93, 11, 0},
 147         [DVBT_AD7_SETTING]      = {0x0, 0x11, 15, 0},
 148         [DVBT_RSSI_R]           = {0x3, 0x1,   6, 0},
 149         [DVBT_ACI_DET_IND]      = {0x3, 0x12,  0, 0},
 150         [DVBT_REG_MON]          = {0x0, 0xd,   1, 0},
 151         [DVBT_REG_MONSEL]       = {0x0, 0xd,   2, 2},
 152         [DVBT_REG_GPE]          = {0x0, 0xd,   7, 7},
 153         [DVBT_REG_GPO]          = {0x0, 0x10,  0, 0},
 154         [DVBT_REG_4MSEL]        = {0x0, 0x13,  0, 0},
 155 };
 156
 157 /* Our regmap is bypassing I2C adapter lock, thus we do it! */
 158 int rtl2832_bulk_write(struct i2c_client *client, unsigned int reg,
 159                        const void *val, size_t val_count)
 160 {
 161         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 162         int ret;
 163
 164         i2c_lock_adapter(client->adapter);
 165         ret = regmap_bulk_write(dev->regmap, reg, val, val_count);
 166         i2c_unlock_adapter(client->adapter);
 167         return ret;
 168 }
 169
 170 int rtl2832_update_bits(struct i2c_client *client, unsigned int reg,
 171                         unsigned int mask, unsigned int val)
 172 {
 173         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 174         int ret;
 175
 176         i2c_lock_adapter(client->adapter);
 177         ret = regmap_update_bits(dev->regmap, reg, mask, val);
 178         i2c_unlock_adapter(client->adapter);
 179         return ret;
 180 }
 181
 182 int rtl2832_bulk_read(struct i2c_client *client, unsigned int reg, void *val,
 183                       size_t val_count)
 184 {
 185         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 186         int ret;
 187
 188         i2c_lock_adapter(client->adapter);
 189         ret = regmap_bulk_read(dev->regmap, reg, val, val_count);
 190         i2c_unlock_adapter(client->adapter);
 191         return ret;
 192 }
 193
 194 /* write multiple registers */
 195 static int rtl2832_wr_regs(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val, int len)
 196 {
 197         return rtl2832_bulk_write(dev->client, page << 8 | reg, val, len);
 198 }
 199
 200 /* read multiple registers */
 201 static int rtl2832_rd_regs(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val, int len)
 202 {
 203         return rtl2832_bulk_read(dev->client, page << 8 | reg, val, len);
 204 }
 205
 206 /* write single register */
 207 static int rtl2832_wr_reg(struct rtl2832_dev *dev, u8 reg, u8 page, u8 val)
 208 {
 209         return rtl2832_wr_regs(dev, reg, page, &val, 1);
 210 }
 211
 212 /* read single register */
 213 static int rtl2832_rd_reg(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val)
 214 {
 215         return rtl2832_rd_regs(dev, reg, page, val, 1);
 216 }
 217
 218 static int rtl2832_rd_demod_reg(struct rtl2832_dev *dev, int reg, u32 *val)
 219 {
 220         struct i2c_client *client = dev->client;
 221         int ret;
 222
 223         u8 reg_start_addr;
 224         u8 msb, lsb;
 225         u8 page;
 226         u8 reading[4];
 227         u32 reading_tmp;
 228         int i;
 229
 230         u8 len;
 231         u32 mask;
 232
 233         reg_start_addr = registers[reg].start_address;
 234         msb = registers[reg].msb;
 235         lsb = registers[reg].lsb;
 236         page = registers[reg].page;
 237
 238         len = (msb >> 3) + 1;
 239         mask = REG_MASK(msb - lsb);
 240
 241         ret = rtl2832_rd_regs(dev, reg_start_addr, page, &reading[0], len);
 242         if (ret)
 243                 goto err;
 244
 245         reading_tmp = 0;
 246         for (i = 0; i < len; i++)
 247                 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
 248
 249         *val = (reading_tmp >> lsb) & mask;
 250
 251         return ret;
 252
 253 err:
 254         dev_dbg(&client->dev, "failed=%d\n", ret);
 255         return ret;
 256
 257 }
 258
 259 static int rtl2832_wr_demod_reg(struct rtl2832_dev *dev, int reg, u32 val)
 260 {
 261         struct i2c_client *client = dev->client;
 262         int ret, i;
 263         u8 len;
 264         u8 reg_start_addr;
 265         u8 msb, lsb;
 266         u8 page;
 267         u32 mask;
 268
 269
 270         u8 reading[4];
 271         u8 writing[4];
 272         u32 reading_tmp;
 273         u32 writing_tmp;
 274
 275
 276         reg_start_addr = registers[reg].start_address;
 277         msb = registers[reg].msb;
 278         lsb = registers[reg].lsb;
 279         page = registers[reg].page;
 280
 281         len = (msb >> 3) + 1;
 282         mask = REG_MASK(msb - lsb);
 283
 284
 285         ret = rtl2832_rd_regs(dev, reg_start_addr, page, &reading[0], len);
 286         if (ret)
 287                 goto err;
 288
 289         reading_tmp = 0;
 290         for (i = 0; i < len; i++)
 291                 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
 292
 293         writing_tmp = reading_tmp & ~(mask << lsb);
 294         writing_tmp |= ((val & mask) << lsb);
 295
 296
 297         for (i = 0; i < len; i++)
 298                 writing[i] = (writing_tmp >> ((len - 1 - i) * 8)) & 0xff;
 299
 300         ret = rtl2832_wr_regs(dev, reg_start_addr, page, &writing[0], len);
 301         if (ret)
 302                 goto err;
 303
 304         return ret;
 305
 306 err:
 307         dev_dbg(&client->dev, "failed=%d\n", ret);
 308         return ret;
 309
 310 }
 311
 312 static int rtl2832_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 313 {
 314         struct rtl2832_dev *dev = fe->demodulator_priv;
 315         struct i2c_client *client = dev->client;
 316         int ret;
 317
 318         dev_dbg(&client->dev, "enable=%d\n", enable);
 319
 320         /* gate already open or close */
 321         if (dev->i2c_gate_state == enable)
 322                 return 0;
 323
 324         ret = rtl2832_wr_demod_reg(dev, DVBT_IIC_REPEAT, (enable ? 0x1 : 0x0));
 325         if (ret)
 326                 goto err;
 327
 328         dev->i2c_gate_state = enable;
 329
 330         return ret;
 331 err:
 332         dev_dbg(&client->dev, "failed=%d\n", ret);
 333         return ret;
 334 }
 335
 336 static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
 337 {
 338         struct rtl2832_dev *dev = fe->demodulator_priv;
 339         struct i2c_client *client = dev->client;
 340         int ret;
 341         u64 pset_iffreq;
 342         u8 en_bbin = (if_freq == 0 ? 0x1 : 0x0);
 343
 344         /*
 345         * PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
 346         *               / CrystalFreqHz)
 347         */
 348
 349         pset_iffreq = if_freq % dev->pdata->clk;
 350         pset_iffreq *= 0x400000;
 351         pset_iffreq = div_u64(pset_iffreq, dev->pdata->clk);
 352         pset_iffreq = -pset_iffreq;
 353         pset_iffreq = pset_iffreq & 0x3fffff;
 354         dev_dbg(&client->dev, "if_frequency=%d pset_iffreq=%08x\n",
 355                 if_freq, (unsigned)pset_iffreq);
 356
 357         ret = rtl2832_wr_demod_reg(dev, DVBT_EN_BBIN, en_bbin);
 358         if (ret)
 359                 return ret;
 360
 361         ret = rtl2832_wr_demod_reg(dev, DVBT_PSET_IFFREQ, pset_iffreq);
 362
 363         return ret;
 364 }
 365
 366 static int rtl2832_init(struct dvb_frontend *fe)
 367 {
 368         struct rtl2832_dev *dev = fe->demodulator_priv;
 369         struct i2c_client *client = dev->client;
 370         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 371         const struct rtl2832_reg_value *init;
 372         int i, ret, len;
 373         /* initialization values for the demodulator registers */
 374         struct rtl2832_reg_value rtl2832_initial_regs[] = {
 375                 {DVBT_AD_EN_REG,                0x1},
 376                 {DVBT_AD_EN_REG1,               0x1},
 377                 {DVBT_RSD_BER_FAIL_VAL,         0x2800},
 378                 {DVBT_MGD_THD0,                 0x10},
 379                 {DVBT_MGD_THD1,                 0x20},
 380                 {DVBT_MGD_THD2,                 0x20},
 381                 {DVBT_MGD_THD3,                 0x40},
 382                 {DVBT_MGD_THD4,                 0x22},
 383                 {DVBT_MGD_THD5,                 0x32},
 384                 {DVBT_MGD_THD6,                 0x37},
 385                 {DVBT_MGD_THD7,                 0x39},
 386                 {DVBT_EN_BK_TRK,                0x0},
 387                 {DVBT_EN_CACQ_NOTCH,            0x0},
 388                 {DVBT_AD_AV_REF,                0x2a},
 389                 {DVBT_REG_PI,                   0x6},
 390                 {DVBT_PIP_ON,                   0x0},
 391                 {DVBT_CDIV_PH0,                 0x8},
 392                 {DVBT_CDIV_PH1,                 0x8},
 393                 {DVBT_SCALE1_B92,               0x4},
 394                 {DVBT_SCALE1_B93,               0xb0},
 395                 {DVBT_SCALE1_BA7,               0x78},
 396                 {DVBT_SCALE1_BA9,               0x28},
 397                 {DVBT_SCALE1_BAA,               0x59},
 398                 {DVBT_SCALE1_BAB,               0x83},
 399                 {DVBT_SCALE1_BAC,               0xd4},
 400                 {DVBT_SCALE1_BB0,               0x65},
 401                 {DVBT_SCALE1_BB1,               0x43},
 402                 {DVBT_KB_P1,                    0x1},
 403                 {DVBT_KB_P2,                    0x4},
 404                 {DVBT_KB_P3,                    0x7},
 405                 {DVBT_K1_CR_STEP12,             0xa},
 406                 {DVBT_REG_GPE,                  0x1},
 407                 {DVBT_SERIAL,                   0x0},
 408                 {DVBT_CDIV_PH0,                 0x9},
 409                 {DVBT_CDIV_PH1,                 0x9},
 410                 {DVBT_MPEG_IO_OPT_2_2,          0x0},
 411                 {DVBT_MPEG_IO_OPT_1_0,          0x0},
 412                 {DVBT_TRK_KS_P2,                0x4},
 413                 {DVBT_TRK_KS_I2,                0x7},
 414                 {DVBT_TR_THD_SET2,              0x6},
 415                 {DVBT_TRK_KC_I2,                0x5},
 416                 {DVBT_CR_THD_SET2,              0x1},
 417         };
 418
 419         dev_dbg(&client->dev, "\n");
 420
 421         for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
 422                 ret = rtl2832_wr_demod_reg(dev, rtl2832_initial_regs[i].reg,
 423                         rtl2832_initial_regs[i].value);
 424                 if (ret)
 425                         goto err;
 426         }
 427
 428         /* load tuner specific settings */
 429         dev_dbg(&client->dev, "load settings for tuner=%02x\n",
 430                 dev->pdata->tuner);
 431         switch (dev->pdata->tuner) {
 432         case RTL2832_TUNER_FC0012:
 433         case RTL2832_TUNER_FC0013:
 434                 len = ARRAY_SIZE(rtl2832_tuner_init_fc0012);
 435                 init = rtl2832_tuner_init_fc0012;
 436                 break;
 437         case RTL2832_TUNER_TUA9001:
 438                 len = ARRAY_SIZE(rtl2832_tuner_init_tua9001);
 439                 init = rtl2832_tuner_init_tua9001;
 440                 break;
 441         case RTL2832_TUNER_E4000:
 442                 len = ARRAY_SIZE(rtl2832_tuner_init_e4000);
 443                 init = rtl2832_tuner_init_e4000;
 444                 break;
 445         case RTL2832_TUNER_R820T:
 446         case RTL2832_TUNER_R828D:
 447                 len = ARRAY_SIZE(rtl2832_tuner_init_r820t);
 448                 init = rtl2832_tuner_init_r820t;
 449                 break;
 450         default:
 451                 ret = -EINVAL;
 452                 goto err;
 453         }
 454
 455         for (i = 0; i < len; i++) {
 456                 ret = rtl2832_wr_demod_reg(dev, init[i].reg, init[i].value);
 457                 if (ret)
 458                         goto err;
 459         }
 460
 461         /*
 462          * r820t NIM code does a software reset here at the demod -
 463          * may not be needed, as there's already a software reset at
 464          * set_params()
 465          */
 466 #if 1
 467         /* soft reset */
 468         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
 469         if (ret)
 470                 goto err;
 471
 472         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
 473         if (ret)
 474                 goto err;
 475 #endif
 476         /* init stats here in order signal app which stats are supported */
 477         c->cnr.len = 1;
 478         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 479         /* start statistics polling */
 480         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 481         dev->sleeping = false;
 482
 483         return ret;
 484 err:
 485         dev_dbg(&client->dev, "failed=%d\n", ret);
 486         return ret;
 487 }
 488
 489 static int rtl2832_sleep(struct dvb_frontend *fe)
 490 {
 491         struct rtl2832_dev *dev = fe->demodulator_priv;
 492         struct i2c_client *client = dev->client;
 493
 494         dev_dbg(&client->dev, "\n");
 495         dev->sleeping = true;
 496         /* stop statistics polling */
 497         cancel_delayed_work_sync(&dev->stat_work);
 498         dev->fe_status = 0;
 499         return 0;
 500 }
 501
 502 static int rtl2832_get_tune_settings(struct dvb_frontend *fe,
 503         struct dvb_frontend_tune_settings *s)
 504 {
 505         struct rtl2832_dev *dev = fe->demodulator_priv;
 506         struct i2c_client *client = dev->client;
 507
 508         dev_dbg(&client->dev, "\n");
 509         s->min_delay_ms = 1000;
 510         s->step_size = fe->ops.info.frequency_stepsize * 2;
 511         s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
 512         return 0;
 513 }
 514
 515 static int rtl2832_set_frontend(struct dvb_frontend *fe)
 516 {
 517         struct rtl2832_dev *dev = fe->demodulator_priv;
 518         struct i2c_client *client = dev->client;
 519         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 520         int ret, i, j;
 521         u64 bw_mode, num, num2;
 522         u32 resamp_ratio, cfreq_off_ratio;
 523         static u8 bw_params[3][32] = {
 524         /* 6 MHz bandwidth */
 525                 {
 526                 0xf5, 0xff, 0x15, 0x38, 0x5d, 0x6d, 0x52, 0x07, 0xfa, 0x2f,
 527                 0x53, 0xf5, 0x3f, 0xca, 0x0b, 0x91, 0xea, 0x30, 0x63, 0xb2,
 528                 0x13, 0xda, 0x0b, 0xc4, 0x18, 0x7e, 0x16, 0x66, 0x08, 0x67,
 529                 0x19, 0xe0,
 530                 },
 531
 532         /*  7 MHz bandwidth */
 533                 {
 534                 0xe7, 0xcc, 0xb5, 0xba, 0xe8, 0x2f, 0x67, 0x61, 0x00, 0xaf,
 535                 0x86, 0xf2, 0xbf, 0x59, 0x04, 0x11, 0xb6, 0x33, 0xa4, 0x30,
 536                 0x15, 0x10, 0x0a, 0x42, 0x18, 0xf8, 0x17, 0xd9, 0x07, 0x22,
 537                 0x19, 0x10,
 538                 },
 539
 540         /*  8 MHz bandwidth */
 541                 {
 542                 0x09, 0xf6, 0xd2, 0xa7, 0x9a, 0xc9, 0x27, 0x77, 0x06, 0xbf,
 543                 0xec, 0xf4, 0x4f, 0x0b, 0xfc, 0x01, 0x63, 0x35, 0x54, 0xa7,
 544                 0x16, 0x66, 0x08, 0xb4, 0x19, 0x6e, 0x19, 0x65, 0x05, 0xc8,
 545                 0x19, 0xe0,
 546                 },
 547         };
 548
 549
 550         dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u inversion=%u\n",
 551                 c->frequency, c->bandwidth_hz, c->inversion);
 552
 553         /* program tuner */
 554         if (fe->ops.tuner_ops.set_params)
 555                 fe->ops.tuner_ops.set_params(fe);
 556
 557         /* PIP mode related */
 558         ret = rtl2832_wr_regs(dev, 0x92, 1, "\x00\x0f\xff", 3);
 559         if (ret)
 560                 goto err;
 561
 562         /* If the frontend has get_if_frequency(), use it */
 563         if (fe->ops.tuner_ops.get_if_frequency) {
 564                 u32 if_freq;
 565
 566                 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
 567                 if (ret)
 568                         goto err;
 569
 570                 ret = rtl2832_set_if(fe, if_freq);
 571                 if (ret)
 572                         goto err;
 573         }
 574
 575         switch (c->bandwidth_hz) {
 576         case 6000000:
 577                 i = 0;
 578                 bw_mode = 48000000;
 579                 break;
 580         case 7000000:
 581                 i = 1;
 582                 bw_mode = 56000000;
 583                 break;
 584         case 8000000:
 585                 i = 2;
 586                 bw_mode = 64000000;
 587                 break;
 588         default:
 589                 dev_err(&client->dev, "invalid bandwidth_hz %u\n",
 590                         c->bandwidth_hz);
 591                 ret = -EINVAL;
 592                 goto err;
 593         }
 594
 595         for (j = 0; j < sizeof(bw_params[0]); j++) {
 596                 ret = rtl2832_wr_regs(dev, 0x1c+j, 1, &bw_params[i][j], 1);
 597                 if (ret)
 598                         goto err;
 599         }
 600
 601         /* calculate and set resample ratio
 602         * RSAMP_RATIO = floor(CrystalFreqHz * 7 * pow(2, 22)
 603         *       / ConstWithBandwidthMode)
 604         */
 605         num = dev->pdata->clk * 7;
 606         num *= 0x400000;
 607         num = div_u64(num, bw_mode);
 608         resamp_ratio =  num & 0x3ffffff;
 609         ret = rtl2832_wr_demod_reg(dev, DVBT_RSAMP_RATIO, resamp_ratio);
 610         if (ret)
 611                 goto err;
 612
 613         /* calculate and set cfreq off ratio
 614         * CFREQ_OFF_RATIO = - floor(ConstWithBandwidthMode * pow(2, 20)
 615         *       / (CrystalFreqHz * 7))
 616         */
 617         num = bw_mode << 20;
 618         num2 = dev->pdata->clk * 7;
 619         num = div_u64(num, num2);
 620         num = -num;
 621         cfreq_off_ratio = num & 0xfffff;
 622         ret = rtl2832_wr_demod_reg(dev, DVBT_CFREQ_OFF_RATIO, cfreq_off_ratio);
 623         if (ret)
 624                 goto err;
 625
 626         /* soft reset */
 627         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
 628         if (ret)
 629                 goto err;
 630
 631         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
 632         if (ret)
 633                 goto err;
 634
 635         return ret;
 636 err:
 637         dev_dbg(&client->dev, "failed=%d\n", ret);
 638         return ret;
 639 }
 640
 641 static int rtl2832_get_frontend(struct dvb_frontend *fe)
 642 {
 643         struct rtl2832_dev *dev = fe->demodulator_priv;
 644         struct i2c_client *client = dev->client;
 645         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 646         int ret;
 647         u8 buf[3];
 648
 649         if (dev->sleeping)
 650                 return 0;
 651
 652         ret = rtl2832_rd_regs(dev, 0x3c, 3, buf, 2);
 653         if (ret)
 654                 goto err;
 655
 656         ret = rtl2832_rd_reg(dev, 0x51, 3, &buf[2]);
 657         if (ret)
 658                 goto err;
 659
 660         dev_dbg(&client->dev, "TPS=%*ph\n", 3, buf);
 661
 662         switch ((buf[0] >> 2) & 3) {
 663         case 0:
 664                 c->modulation = QPSK;
 665                 break;
 666         case 1:
 667                 c->modulation = QAM_16;
 668                 break;
 669         case 2:
 670                 c->modulation = QAM_64;
 671                 break;
 672         }
 673
 674         switch ((buf[2] >> 2) & 1) {
 675         case 0:
 676                 c->transmission_mode = TRANSMISSION_MODE_2K;
 677                 break;
 678         case 1:
 679                 c->transmission_mode = TRANSMISSION_MODE_8K;
 680         }
 681
 682         switch ((buf[2] >> 0) & 3) {
 683         case 0:
 684                 c->guard_interval = GUARD_INTERVAL_1_32;
 685                 break;
 686         case 1:
 687                 c->guard_interval = GUARD_INTERVAL_1_16;
 688                 break;
 689         case 2:
 690                 c->guard_interval = GUARD_INTERVAL_1_8;
 691                 break;
 692         case 3:
 693                 c->guard_interval = GUARD_INTERVAL_1_4;
 694                 break;
 695         }
 696
 697         switch ((buf[0] >> 4) & 7) {
 698         case 0:
 699                 c->hierarchy = HIERARCHY_NONE;
 700                 break;
 701         case 1:
 702                 c->hierarchy = HIERARCHY_1;
 703                 break;
 704         case 2:
 705                 c->hierarchy = HIERARCHY_2;
 706                 break;
 707         case 3:
 708                 c->hierarchy = HIERARCHY_4;
 709                 break;
 710         }
 711
 712         switch ((buf[1] >> 3) & 7) {
 713         case 0:
 714                 c->code_rate_HP = FEC_1_2;
 715                 break;
 716         case 1:
 717                 c->code_rate_HP = FEC_2_3;
 718                 break;
 719         case 2:
 720                 c->code_rate_HP = FEC_3_4;
 721                 break;
 722         case 3:
 723                 c->code_rate_HP = FEC_5_6;
 724                 break;
 725         case 4:
 726                 c->code_rate_HP = FEC_7_8;
 727                 break;
 728         }
 729
 730         switch ((buf[1] >> 0) & 7) {
 731         case 0:
 732                 c->code_rate_LP = FEC_1_2;
 733                 break;
 734         case 1:
 735                 c->code_rate_LP = FEC_2_3;
 736                 break;
 737         case 2:
 738                 c->code_rate_LP = FEC_3_4;
 739                 break;
 740         case 3:
 741                 c->code_rate_LP = FEC_5_6;
 742                 break;
 743         case 4:
 744                 c->code_rate_LP = FEC_7_8;
 745                 break;
 746         }
 747
 748         return 0;
 749 err:
 750         dev_dbg(&client->dev, "failed=%d\n", ret);
 751         return ret;
 752 }
 753
 754 static int rtl2832_read_status(struct dvb_frontend *fe, fe_status_t *status)
 755 {
 756         struct rtl2832_dev *dev = fe->demodulator_priv;
 757         struct i2c_client *client = dev->client;
 758         int ret;
 759         u32 tmp;
 760
 761         dev_dbg(&client->dev, "\n");
 762
 763         *status = 0;
 764         if (dev->sleeping)
 765                 return 0;
 766
 767         ret = rtl2832_rd_demod_reg(dev, DVBT_FSM_STAGE, &tmp);
 768         if (ret)
 769                 goto err;
 770
 771         if (tmp == 11) {
 772                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 773                                 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
 774         }
 775         /* TODO find out if this is also true for rtl2832? */
 776         /*else if (tmp == 10) {
 777                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 778                                 FE_HAS_VITERBI;
 779         }*/
 780
 781         dev->fe_status = *status;
 782         return ret;
 783 err:
 784         dev_dbg(&client->dev, "failed=%d\n", ret);
 785         return ret;
 786 }
 787
 788 static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
 789 {
 790         struct rtl2832_dev *dev = fe->demodulator_priv;
 791         struct i2c_client *client = dev->client;
 792         int ret, hierarchy, constellation;
 793         u8 buf[2], tmp;
 794         u16 tmp16;
 795 #define CONSTELLATION_NUM 3
 796 #define HIERARCHY_NUM 4
 797         static const u32 snr_constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
 798                 { 85387325, 85387325, 85387325, 85387325 },
 799                 { 86676178, 86676178, 87167949, 87795660 },
 800                 { 87659938, 87659938, 87885178, 88241743 },
 801         };
 802
 803         /* reports SNR in resolution of 0.1 dB */
 804
 805         ret = rtl2832_rd_reg(dev, 0x3c, 3, &tmp);
 806         if (ret)
 807                 goto err;
 808
 809         constellation = (tmp >> 2) & 0x03; /* [3:2] */
 810         if (constellation > CONSTELLATION_NUM - 1)
 811                 goto err;
 812
 813         hierarchy = (tmp >> 4) & 0x07; /* [6:4] */
 814         if (hierarchy > HIERARCHY_NUM - 1)
 815                 goto err;
 816
 817         ret = rtl2832_rd_regs(dev, 0x0c, 4, buf, 2);
 818         if (ret)
 819                 goto err;
 820
 821         tmp16 = buf[0] << 8 | buf[1];
 822
 823         if (tmp16)
 824                 *snr = (snr_constant[constellation][hierarchy] -
 825                                 intlog10(tmp16)) / ((1 << 24) / 100);
 826         else
 827                 *snr = 0;
 828
 829         return 0;
 830 err:
 831         dev_dbg(&client->dev, "failed=%d\n", ret);
 832         return ret;
 833 }
 834
 835 static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
 836 {
 837         struct rtl2832_dev *dev = fe->demodulator_priv;
 838         struct i2c_client *client = dev->client;
 839         int ret;
 840         u8 buf[2];
 841
 842         ret = rtl2832_rd_regs(dev, 0x4e, 3, buf, 2);
 843         if (ret)
 844                 goto err;
 845
 846         *ber = buf[0] << 8 | buf[1];
 847
 848         return 0;
 849 err:
 850         dev_dbg(&client->dev, "failed=%d\n", ret);
 851         return ret;
 852 }
 853
 854 static void rtl2832_stat_work(struct work_struct *work)
 855 {
 856         struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, stat_work.work);
 857         struct i2c_client *client = dev->client;
 858         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 859         int ret, tmp;
 860         u8 u8tmp, buf[2];
 861         u16 u16tmp;
 862
 863         dev_dbg(&client->dev, "\n");
 864
 865         /* CNR */
 866         if (dev->fe_status & FE_HAS_VITERBI) {
 867                 unsigned hierarchy, constellation;
 868                 #define CONSTELLATION_NUM 3
 869                 #define HIERARCHY_NUM 4
 870                 static const u32 constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
 871                         {85387325, 85387325, 85387325, 85387325},
 872                         {86676178, 86676178, 87167949, 87795660},
 873                         {87659938, 87659938, 87885178, 88241743},
 874                 };
 875
 876                 ret = rtl2832_bulk_read(client, 0x33c, &u8tmp, 1);
 877                 if (ret)
 878                         goto err;
 879
 880                 constellation = (u8tmp >> 2) & 0x03; /* [3:2] */
 881                 if (constellation > CONSTELLATION_NUM - 1)
 882                         goto err_schedule_delayed_work;
 883
 884                 hierarchy = (u8tmp >> 4) & 0x07; /* [6:4] */
 885                 if (hierarchy > HIERARCHY_NUM - 1)
 886                         goto err_schedule_delayed_work;
 887
 888                 ret = rtl2832_bulk_read(client, 0x40c, buf, 2);
 889                 if (ret)
 890                         goto err;
 891
 892                 u16tmp = buf[0] << 8 | buf[1] << 0;
 893                 if (u16tmp)
 894                         tmp = (constant[constellation][hierarchy] -
 895                                intlog10(u16tmp)) / ((1 << 24) / 10000);
 896                 else
 897                         tmp = 0;
 898
 899                 dev_dbg(&client->dev, "cnr raw=%u\n", u16tmp);
 900
 901                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 902                 c->cnr.stat[0].svalue = tmp;
 903         } else {
 904                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 905         }
 906
 907 err_schedule_delayed_work:
 908         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 909         return;
 910 err:
 911         dev_dbg(&client->dev, "failed=%d\n", ret);
 912 }
 913
 914 /*
 915  * I2C gate/mux/repeater logic
 916  * We must use unlocked __i2c_transfer() here (through regmap) because of I2C
 917  * adapter lock is already taken by tuner driver.
 918  * There is delay mechanism to avoid unneeded I2C gate open / close. Gate close
 919  * is delayed here a little bit in order to see if there is sequence of I2C
 920  * messages sent to same I2C bus.
 921  */
 922 static void rtl2832_i2c_gate_work(struct work_struct *work)
 923 {
 924         struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, i2c_gate_work.work);
 925         struct i2c_client *client = dev->client;
 926         int ret;
 927
 928         /* close gate */
 929         ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
 930         if (ret)
 931                 goto err;
 932
 933         dev->i2c_gate_state = false;
 934
 935         return;
 936 err:
 937         dev_dbg(&client->dev, "failed=%d\n", ret);
 938         return;
 939 }
 940
 941 static int rtl2832_select(struct i2c_adapter *adap, void *mux_priv, u32 chan_id)
 942 {
 943         struct rtl2832_dev *dev = mux_priv;
 944         struct i2c_client *client = dev->client;
 945         int ret;
 946
 947         /* terminate possible gate closing */
 948         cancel_delayed_work(&dev->i2c_gate_work);
 949
 950         if (dev->i2c_gate_state == chan_id)
 951                 return 0;
 952
 953         /*
 954          * chan_id 1 is muxed adapter demod provides and chan_id 0 is demod
 955          * itself. We need open gate when request is for chan_id 1. On that case
 956          * I2C adapter lock is already taken and due to that we will use
 957          * regmap_update_bits() which does not lock again I2C adapter.
 958          */
 959         if (chan_id == 1)
 960                 ret = regmap_update_bits(dev->regmap, 0x101, 0x08, 0x08);
 961         else
 962                 ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
 963         if (ret)
 964                 goto err;
 965
 966         dev->i2c_gate_state = chan_id;
 967
 968         return 0;
 969 err:
 970         dev_dbg(&client->dev, "failed=%d\n", ret);
 971         return ret;
 972 }
 973
 974 static int rtl2832_deselect(struct i2c_adapter *adap, void *mux_priv,
 975                             u32 chan_id)
 976 {
 977         struct rtl2832_dev *dev = mux_priv;
 978
 979         schedule_delayed_work(&dev->i2c_gate_work, usecs_to_jiffies(100));
 980         return 0;
 981 }
 982
 983 static struct dvb_frontend_ops rtl2832_ops = {
 984         .delsys = { SYS_DVBT },
 985         .info = {
 986                 .name = "Realtek RTL2832 (DVB-T)",
 987                 .frequency_min    = 174000000,
 988                 .frequency_max    = 862000000,
 989                 .frequency_stepsize = 166667,
 990                 .caps = FE_CAN_FEC_1_2 |
 991                         FE_CAN_FEC_2_3 |
 992                         FE_CAN_FEC_3_4 |
 993                         FE_CAN_FEC_5_6 |
 994                         FE_CAN_FEC_7_8 |
 995                         FE_CAN_FEC_AUTO |
 996                         FE_CAN_QPSK |
 997                         FE_CAN_QAM_16 |
 998                         FE_CAN_QAM_64 |
 999                         FE_CAN_QAM_AUTO |
1000                         FE_CAN_TRANSMISSION_MODE_AUTO |
1001                         FE_CAN_GUARD_INTERVAL_AUTO |
1002                         FE_CAN_HIERARCHY_AUTO |
1003                         FE_CAN_RECOVER |
1004                         FE_CAN_MUTE_TS
1005          },
1006
1007         .init = rtl2832_init,
1008         .sleep = rtl2832_sleep,
1009
1010         .get_tune_settings = rtl2832_get_tune_settings,
1011
1012         .set_frontend = rtl2832_set_frontend,
1013         .get_frontend = rtl2832_get_frontend,
1014
1015         .read_status = rtl2832_read_status,
1016         .read_snr = rtl2832_read_snr,
1017         .read_ber = rtl2832_read_ber,
1018
1019         .i2c_gate_ctrl = rtl2832_i2c_gate_ctrl,
1020 };
1021
1022 /*
1023  * We implement own I2C access routines for regmap in order to get manual access
1024  * to I2C adapter lock, which is needed for I2C mux adapter.
1025  */
1026 static int rtl2832_regmap_read(void *context, const void *reg_buf,
1027                                size_t reg_size, void *val_buf, size_t val_size)
1028 {
1029         struct i2c_client *client = context;
1030         int ret;
1031         struct i2c_msg msg[2] = {
1032                 {
1033                         .addr = client->addr,
1034                         .flags = 0,
1035                         .len = reg_size,
1036                         .buf = (u8 *)reg_buf,
1037                 }, {
1038                         .addr = client->addr,
1039                         .flags = I2C_M_RD,
1040                         .len = val_size,
1041                         .buf = val_buf,
1042                 }
1043         };
1044
1045         ret = __i2c_transfer(client->adapter, msg, 2);
1046         if (ret != 2) {
1047                 dev_warn(&client->dev, "i2c reg read failed %d\n", ret);
1048                 if (ret >= 0)
1049                         ret = -EREMOTEIO;
1050                 return ret;
1051         }
1052         return 0;
1053 }
1054
1055 static int rtl2832_regmap_write(void *context, const void *data, size_t count)
1056 {
1057         struct i2c_client *client = context;
1058         int ret;
1059         struct i2c_msg msg[1] = {
1060                 {
1061                         .addr = client->addr,
1062                         .flags = 0,
1063                         .len = count,
1064                         .buf = (u8 *)data,
1065                 }
1066         };
1067
1068         ret = __i2c_transfer(client->adapter, msg, 1);
1069         if (ret != 1) {
1070                 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1071                 if (ret >= 0)
1072                         ret = -EREMOTEIO;
1073                 return ret;
1074         }
1075         return 0;
1076 }
1077
1078 static int rtl2832_regmap_gather_write(void *context, const void *reg,
1079                                        size_t reg_len, const void *val,
1080                                        size_t val_len)
1081 {
1082         struct i2c_client *client = context;
1083         int ret;
1084         u8 buf[256];
1085         struct i2c_msg msg[1] = {
1086                 {
1087                         .addr = client->addr,
1088                         .flags = 0,
1089                         .len = 1 + val_len,
1090                         .buf = buf,
1091                 }
1092         };
1093
1094         buf[0] = *(u8 const *)reg;
1095         memcpy(&buf[1], val, val_len);
1096
1097         ret = __i2c_transfer(client->adapter, msg, 1);
1098         if (ret != 1) {
1099                 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1100                 if (ret >= 0)
1101                         ret = -EREMOTEIO;
1102                 return ret;
1103         }
1104         return 0;
1105 }
1106
1107 static struct dvb_frontend *rtl2832_get_dvb_frontend(struct i2c_client *client)
1108 {
1109         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1110
1111         dev_dbg(&client->dev, "\n");
1112         return &dev->fe;
1113 }
1114
1115 static struct i2c_adapter *rtl2832_get_i2c_adapter_(struct i2c_client *client)
1116 {
1117         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1118
1119         dev_dbg(&client->dev, "\n");
1120         return dev->i2c_adapter_tuner;
1121 }
1122
1123 static struct i2c_adapter *rtl2832_get_private_i2c_adapter_(struct i2c_client *client)
1124 {
1125         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1126
1127         dev_dbg(&client->dev, "\n");
1128         return dev->i2c_adapter;
1129 }
1130
1131 static int rtl2832_enable_slave_ts(struct i2c_client *client)
1132 {
1133         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1134         int ret;
1135
1136         dev_dbg(&client->dev, "\n");
1137
1138         ret = rtl2832_wr_regs(dev, 0x0c, 1, "\x5f\xff", 2);
1139         if (ret)
1140                 goto err;
1141
1142         ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
1143         if (ret)
1144                 goto err;
1145
1146         ret = rtl2832_wr_reg(dev, 0xbc, 0, 0x18);
1147         if (ret)
1148                 goto err;
1149
1150         ret = rtl2832_wr_reg(dev, 0x22, 0, 0x01);
1151         if (ret)
1152                 goto err;
1153
1154         ret = rtl2832_wr_reg(dev, 0x26, 0, 0x1f);
1155         if (ret)
1156                 goto err;
1157
1158         ret = rtl2832_wr_reg(dev, 0x27, 0, 0xff);
1159         if (ret)
1160                 goto err;
1161
1162         ret = rtl2832_wr_regs(dev, 0x92, 1, "\x7f\xf7\xff", 3);
1163         if (ret)
1164                 goto err;
1165
1166         /* soft reset */
1167         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
1168         if (ret)
1169                 goto err;
1170
1171         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
1172         if (ret)
1173                 goto err;
1174
1175         return 0;
1176 err:
1177         dev_dbg(&client->dev, "failed=%d\n", ret);
1178         return ret;
1179 }
1180
1181 static int rtl2832_probe(struct i2c_client *client,
1182                 const struct i2c_device_id *id)
1183 {
1184         struct rtl2832_platform_data *pdata = client->dev.platform_data;
1185         struct i2c_adapter *i2c = client->adapter;
1186         struct rtl2832_dev *dev;
1187         int ret;
1188         u8 tmp;
1189         static const struct regmap_bus regmap_bus = {
1190                 .read = rtl2832_regmap_read,
1191                 .write = rtl2832_regmap_write,
1192                 .gather_write = rtl2832_regmap_gather_write,
1193                 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
1194         };
1195         static const struct regmap_range_cfg regmap_range_cfg[] = {
1196                 {
1197                         .selector_reg     = 0x00,
1198                         .selector_mask    = 0xff,
1199                         .selector_shift   = 0,
1200                         .window_start     = 0,
1201                         .window_len       = 0x100,
1202                         .range_min        = 0 * 0x100,
1203                         .range_max        = 5 * 0x100,
1204                 },
1205         };
1206         static const struct regmap_config regmap_config = {
1207                 .reg_bits    =  8,
1208                 .val_bits    =  8,
1209                 .max_register = 5 * 0x100,
1210                 .ranges = regmap_range_cfg,
1211                 .num_ranges = ARRAY_SIZE(regmap_range_cfg),
1212         };
1213
1214         dev_dbg(&client->dev, "\n");
1215
1216         /* allocate memory for the internal state */
1217         dev = kzalloc(sizeof(struct rtl2832_dev), GFP_KERNEL);
1218         if (dev == NULL) {
1219                 ret = -ENOMEM;
1220                 goto err;
1221         }
1222
1223         /* setup the state */
1224         i2c_set_clientdata(client, dev);
1225         dev->client = client;
1226         dev->pdata = client->dev.platform_data;
1227         if (pdata->config) {
1228                 dev->pdata->clk = pdata->config->xtal;
1229                 dev->pdata->tuner = pdata->config->tuner;
1230         }
1231         dev->sleeping = true;
1232         INIT_DELAYED_WORK(&dev->i2c_gate_work, rtl2832_i2c_gate_work);
1233         INIT_DELAYED_WORK(&dev->stat_work, rtl2832_stat_work);
1234         /* create regmap */
1235         dev->regmap = regmap_init(&client->dev, &regmap_bus, client,
1236                                   &regmap_config);
1237         if (IS_ERR(dev->regmap)) {
1238                 ret = PTR_ERR(dev->regmap);
1239                 goto err_kfree;
1240         }
1241         /* create muxed i2c adapter for demod itself */
1242         dev->i2c_adapter = i2c_add_mux_adapter(i2c, &i2c->dev, dev, 0, 0, 0,
1243                         rtl2832_select, NULL);
1244         if (dev->i2c_adapter == NULL) {
1245                 ret = -ENODEV;
1246                 goto err_regmap_exit;
1247         }
1248
1249         /* check if the demod is there */
1250         ret = rtl2832_rd_reg(dev, 0x00, 0x0, &tmp);
1251         if (ret)
1252                 goto err_i2c_del_mux_adapter;
1253
1254         /* create muxed i2c adapter for demod tuner bus */
1255         dev->i2c_adapter_tuner = i2c_add_mux_adapter(i2c, &i2c->dev, dev,
1256                         0, 1, 0, rtl2832_select, rtl2832_deselect);
1257         if (dev->i2c_adapter_tuner == NULL) {
1258                 ret = -ENODEV;
1259                 goto err_i2c_del_mux_adapter;
1260         }
1261
1262         /* create dvb_frontend */
1263         memcpy(&dev->fe.ops, &rtl2832_ops, sizeof(struct dvb_frontend_ops));
1264         dev->fe.demodulator_priv = dev;
1265
1266         /* setup callbacks */
1267         pdata->get_dvb_frontend = rtl2832_get_dvb_frontend;
1268         pdata->get_i2c_adapter = rtl2832_get_i2c_adapter_;
1269         pdata->get_private_i2c_adapter = rtl2832_get_private_i2c_adapter_;
1270         pdata->enable_slave_ts = rtl2832_enable_slave_ts;
1271
1272         dev_info(&client->dev, "Realtek RTL2832 successfully attached\n");
1273         return 0;
1274 err_i2c_del_mux_adapter:
1275         i2c_del_mux_adapter(dev->i2c_adapter);
1276 err_regmap_exit:
1277         regmap_exit(dev->regmap);
1278 err_kfree:
1279         kfree(dev);
1280 err:
1281         dev_dbg(&client->dev, "failed=%d\n", ret);
1282         return ret;
1283 }
1284
1285 static int rtl2832_remove(struct i2c_client *client)
1286 {
1287         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1288
1289         dev_dbg(&client->dev, "\n");
1290
1291         cancel_delayed_work_sync(&dev->i2c_gate_work);
1292
1293         i2c_del_mux_adapter(dev->i2c_adapter_tuner);
1294
1295         i2c_del_mux_adapter(dev->i2c_adapter);
1296
1297         regmap_exit(dev->regmap);
1298
1299         kfree(dev);
1300
1301         return 0;
1302 }
1303
1304 static const struct i2c_device_id rtl2832_id_table[] = {
1305         {"rtl2832", 0},
1306         {}
1307 };
1308 MODULE_DEVICE_TABLE(i2c, rtl2832_id_table);
1309
1310 static struct i2c_driver rtl2832_driver = {
1311         .driver = {
1312                 .owner  = THIS_MODULE,
1313                 .name   = "rtl2832",
1314         },
1315         .probe          = rtl2832_probe,
1316         .remove         = rtl2832_remove,
1317         .id_table       = rtl2832_id_table,
1318 };
1319
1320 module_i2c_driver(rtl2832_driver);
1321
1322 MODULE_AUTHOR("Thomas Mair <mair.thomas86@gmail.com>");
1323 MODULE_DESCRIPTION("Realtek RTL2832 DVB-T demodulator driver");
1324 MODULE_LICENSE("GPL");
1325 MODULE_VERSION("0.5");