2 * adv7180.c Analog Devices ADV7180 video decoder driver
3 * Copyright (c) 2009 Intel Corporation
4 * Copyright (C) 2013 Cogent Embedded, Inc.
5 * Copyright (C) 2013 Renesas Solutions Corp.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/errno.h>
24 #include <linux/kernel.h>
25 #include <linux/interrupt.h>
26 #include <linux/i2c.h>
27 #include <linux/slab.h>
28 #include <media/v4l2-ioctl.h>
29 #include <linux/videodev2.h>
30 #include <media/v4l2-device.h>
31 #include <media/v4l2-ctrls.h>
32 #include <linux/mutex.h>
33 #include <linux/delay.h>
35 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM 0x0
36 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1
37 #define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM 0x2
38 #define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM 0x3
39 #define ADV7180_STD_NTSC_J 0x4
40 #define ADV7180_STD_NTSC_M 0x5
41 #define ADV7180_STD_PAL60 0x6
42 #define ADV7180_STD_NTSC_443 0x7
43 #define ADV7180_STD_PAL_BG 0x8
44 #define ADV7180_STD_PAL_N 0x9
45 #define ADV7180_STD_PAL_M 0xa
46 #define ADV7180_STD_PAL_M_PED 0xb
47 #define ADV7180_STD_PAL_COMB_N 0xc
48 #define ADV7180_STD_PAL_COMB_N_PED 0xd
49 #define ADV7180_STD_PAL_SECAM 0xe
50 #define ADV7180_STD_PAL_SECAM_PED 0xf
52 #define ADV7180_REG_INPUT_CONTROL 0x0000
53 #define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
55 #define ADV7182_REG_INPUT_VIDSEL 0x0002
57 #define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004
58 #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
60 #define ADV7180_REG_AUTODETECT_ENABLE 0x07
61 #define ADV7180_AUTODETECT_DEFAULT 0x7f
63 #define ADV7180_REG_CON 0x0008 /*Unsigned */
64 #define ADV7180_CON_MIN 0
65 #define ADV7180_CON_DEF 128
66 #define ADV7180_CON_MAX 255
68 #define ADV7180_REG_BRI 0x000a /*Signed */
69 #define ADV7180_BRI_MIN -128
70 #define ADV7180_BRI_DEF 0
71 #define ADV7180_BRI_MAX 127
73 #define ADV7180_REG_HUE 0x000b /*Signed, inverted */
74 #define ADV7180_HUE_MIN -127
75 #define ADV7180_HUE_DEF 0
76 #define ADV7180_HUE_MAX 128
78 #define ADV7180_REG_CTRL 0x000e
79 #define ADV7180_CTRL_IRQ_SPACE 0x20
81 #define ADV7180_REG_PWR_MAN 0x0f
82 #define ADV7180_PWR_MAN_ON 0x04
83 #define ADV7180_PWR_MAN_OFF 0x24
84 #define ADV7180_PWR_MAN_RES 0x80
86 #define ADV7180_REG_STATUS1 0x0010
87 #define ADV7180_STATUS1_IN_LOCK 0x01
88 #define ADV7180_STATUS1_AUTOD_MASK 0x70
89 #define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
90 #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
91 #define ADV7180_STATUS1_AUTOD_PAL_M 0x20
92 #define ADV7180_STATUS1_AUTOD_PAL_60 0x30
93 #define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
94 #define ADV7180_STATUS1_AUTOD_SECAM 0x50
95 #define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
96 #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
98 #define ADV7180_REG_IDENT 0x0011
99 #define ADV7180_ID_7180 0x18
101 #define ADV7180_REG_ICONF1 0x0040
102 #define ADV7180_ICONF1_ACTIVE_LOW 0x01
103 #define ADV7180_ICONF1_PSYNC_ONLY 0x10
104 #define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
106 #define ADV7180_REG_SD_SAT_CB 0x00e3 /*Unsigned */
107 #define ADV7180_REG_SD_SAT_CR 0x00e4 /*Unsigned */
108 #define ADV7180_SAT_MIN 0
109 #define ADV7180_SAT_DEF 128
110 #define ADV7180_SAT_MAX 255
112 #define ADV7180_IRQ1_LOCK 0x01
113 #define ADV7180_IRQ1_UNLOCK 0x02
114 #define ADV7180_REG_ISR1 0x0042
115 #define ADV7180_REG_ICR1 0x0043
116 #define ADV7180_REG_IMR1 0x0044
117 #define ADV7180_REG_IMR2 0x0048
118 #define ADV7180_IRQ3_AD_CHANGE 0x08
119 #define ADV7180_REG_ISR3 0x004A
120 #define ADV7180_REG_ICR3 0x004B
121 #define ADV7180_REG_IMR3 0x004C
122 #define ADV7180_REG_IMR4 0x50
124 #define ADV7180_REG_NTSC_V_BIT_END 0x00E6
125 #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
127 #define ADV7180_REG_CSI_SLAVE_ADDR 0xFE
129 #define ADV7180_CSI_REG_PWRDN 0x00
130 #define ADV7180_CSI_PWRDN 0x80
132 #define ADV7180_INPUT_CVBS_AIN1 0x00
133 #define ADV7180_INPUT_CVBS_AIN2 0x01
134 #define ADV7180_INPUT_CVBS_AIN3 0x02
135 #define ADV7180_INPUT_CVBS_AIN4 0x03
136 #define ADV7180_INPUT_CVBS_AIN5 0x04
137 #define ADV7180_INPUT_CVBS_AIN6 0x05
138 #define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
139 #define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
140 #define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
141 #define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
142 #define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
144 #define ADV7182_INPUT_CVBS_AIN1 0x00
145 #define ADV7182_INPUT_CVBS_AIN2 0x01
146 #define ADV7182_INPUT_CVBS_AIN3 0x02
147 #define ADV7182_INPUT_CVBS_AIN4 0x03
148 #define ADV7182_INPUT_CVBS_AIN5 0x04
149 #define ADV7182_INPUT_CVBS_AIN6 0x05
150 #define ADV7182_INPUT_CVBS_AIN7 0x06
151 #define ADV7182_INPUT_CVBS_AIN8 0x07
152 #define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08
153 #define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09
154 #define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a
155 #define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b
156 #define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c
157 #define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d
158 #define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e
159 #define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f
160 #define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10
161 #define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11
163 #define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44
165 struct adv7180_state;
167 #define ADV7180_FLAG_RESET_POWERED BIT(0)
168 #define ADV7180_FLAG_V2 BIT(1)
169 #define ADV7180_FLAG_MIPI_CSI2 BIT(2)
171 struct adv7180_chip_info {
173 unsigned int valid_input_mask;
174 int (*set_std)(struct adv7180_state *st, unsigned int std);
175 int (*select_input)(struct adv7180_state *st, unsigned int input);
176 int (*init)(struct adv7180_state *state);
179 struct adv7180_state {
180 struct v4l2_ctrl_handler ctrl_hdl;
181 struct v4l2_subdev sd;
182 struct media_pad pad;
183 struct mutex mutex; /* mutual excl. when accessing chip */
185 v4l2_std_id curr_norm;
190 struct i2c_client *client;
191 unsigned int register_page;
192 struct i2c_client *csi_client;
193 const struct adv7180_chip_info *chip_info;
195 #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
196 struct adv7180_state, \
199 static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
201 if (state->register_page != page) {
202 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
204 state->register_page = page;
210 static int adv7180_write(struct adv7180_state *state, unsigned int reg,
213 lockdep_assert_held(&state->mutex);
214 adv7180_select_page(state, reg >> 8);
215 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
218 static int adv7180_read(struct adv7180_state *state, unsigned int reg)
220 lockdep_assert_held(&state->mutex);
221 adv7180_select_page(state, reg >> 8);
222 return i2c_smbus_read_byte_data(state->client, reg & 0xff);
225 static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg,
228 return i2c_smbus_write_byte_data(state->csi_client, reg, value);
231 static int adv7180_set_video_standard(struct adv7180_state *state,
234 return state->chip_info->set_std(state, std);
237 static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
239 /* in case V4L2_IN_ST_NO_SIGNAL */
240 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
241 return V4L2_STD_UNKNOWN;
243 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
244 case ADV7180_STATUS1_AUTOD_NTSM_M_J:
245 return V4L2_STD_NTSC;
246 case ADV7180_STATUS1_AUTOD_NTSC_4_43:
247 return V4L2_STD_NTSC_443;
248 case ADV7180_STATUS1_AUTOD_PAL_M:
249 return V4L2_STD_PAL_M;
250 case ADV7180_STATUS1_AUTOD_PAL_60:
251 return V4L2_STD_PAL_60;
252 case ADV7180_STATUS1_AUTOD_PAL_B_G:
254 case ADV7180_STATUS1_AUTOD_SECAM:
255 return V4L2_STD_SECAM;
256 case ADV7180_STATUS1_AUTOD_PAL_COMB:
257 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
258 case ADV7180_STATUS1_AUTOD_SECAM_525:
259 return V4L2_STD_SECAM;
261 return V4L2_STD_UNKNOWN;
265 static int v4l2_std_to_adv7180(v4l2_std_id std)
267 if (std == V4L2_STD_PAL_60)
268 return ADV7180_STD_PAL60;
269 if (std == V4L2_STD_NTSC_443)
270 return ADV7180_STD_NTSC_443;
271 if (std == V4L2_STD_PAL_N)
272 return ADV7180_STD_PAL_N;
273 if (std == V4L2_STD_PAL_M)
274 return ADV7180_STD_PAL_M;
275 if (std == V4L2_STD_PAL_Nc)
276 return ADV7180_STD_PAL_COMB_N;
278 if (std & V4L2_STD_PAL)
279 return ADV7180_STD_PAL_BG;
280 if (std & V4L2_STD_NTSC)
281 return ADV7180_STD_NTSC_M;
282 if (std & V4L2_STD_SECAM)
283 return ADV7180_STD_PAL_SECAM;
288 static u32 adv7180_status_to_v4l2(u8 status1)
290 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
291 return V4L2_IN_ST_NO_SIGNAL;
296 static int __adv7180_status(struct adv7180_state *state, u32 *status,
299 int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
305 *status = adv7180_status_to_v4l2(status1);
307 *std = adv7180_std_to_v4l2(status1);
312 static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
314 return container_of(sd, struct adv7180_state, sd);
317 static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
319 struct adv7180_state *state = to_state(sd);
320 int err = mutex_lock_interruptible(&state->mutex);
324 /* when we are interrupt driven we know the state */
325 if (!state->autodetect || state->irq > 0)
326 *std = state->curr_norm;
328 err = __adv7180_status(state, NULL, std);
330 mutex_unlock(&state->mutex);
334 static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
335 u32 output, u32 config)
337 struct adv7180_state *state = to_state(sd);
338 int ret = mutex_lock_interruptible(&state->mutex);
343 if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
348 ret = state->chip_info->select_input(state, input);
351 state->input = input;
353 mutex_unlock(&state->mutex);
357 static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
359 struct adv7180_state *state = to_state(sd);
360 int ret = mutex_lock_interruptible(&state->mutex);
364 ret = __adv7180_status(state, status, NULL);
365 mutex_unlock(&state->mutex);
369 static int adv7180_program_std(struct adv7180_state *state)
373 if (state->autodetect) {
374 ret = adv7180_set_video_standard(state,
375 ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
379 __adv7180_status(state, NULL, &state->curr_norm);
381 ret = v4l2_std_to_adv7180(state->curr_norm);
385 ret = adv7180_set_video_standard(state, ret);
393 static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
395 struct adv7180_state *state = to_state(sd);
396 int ret = mutex_lock_interruptible(&state->mutex);
401 /* all standards -> autodetect */
402 if (std == V4L2_STD_ALL) {
403 state->autodetect = true;
405 /* Make sure we can support this std */
406 ret = v4l2_std_to_adv7180(std);
410 state->curr_norm = std;
411 state->autodetect = false;
414 ret = adv7180_program_std(state);
416 mutex_unlock(&state->mutex);
420 static int adv7180_set_power(struct adv7180_state *state, bool on)
426 val = ADV7180_PWR_MAN_ON;
428 val = ADV7180_PWR_MAN_OFF;
430 ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val);
434 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
436 adv7180_csi_write(state, 0xDE, 0x02);
437 adv7180_csi_write(state, 0xD2, 0xF7);
438 adv7180_csi_write(state, 0xD8, 0x65);
439 adv7180_csi_write(state, 0xE0, 0x09);
440 adv7180_csi_write(state, 0x2C, 0x00);
441 adv7180_csi_write(state, 0x00, 0x00);
443 adv7180_csi_write(state, 0x00, 0x80);
450 static int adv7180_s_power(struct v4l2_subdev *sd, int on)
452 struct adv7180_state *state = to_state(sd);
455 ret = mutex_lock_interruptible(&state->mutex);
459 ret = adv7180_set_power(state, on);
463 mutex_unlock(&state->mutex);
467 static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
469 struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
470 struct adv7180_state *state = to_state(sd);
471 int ret = mutex_lock_interruptible(&state->mutex);
478 case V4L2_CID_BRIGHTNESS:
479 ret = adv7180_write(state, ADV7180_REG_BRI, val);
482 /*Hue is inverted according to HSL chart */
483 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
485 case V4L2_CID_CONTRAST:
486 ret = adv7180_write(state, ADV7180_REG_CON, val);
488 case V4L2_CID_SATURATION:
490 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
491 *Let's not confuse the user, everybody understands saturation
493 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
496 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
502 mutex_unlock(&state->mutex);
506 static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
507 .s_ctrl = adv7180_s_ctrl,
510 static int adv7180_init_controls(struct adv7180_state *state)
512 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
514 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
515 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
516 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
517 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
518 V4L2_CID_CONTRAST, ADV7180_CON_MIN,
519 ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
520 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
521 V4L2_CID_SATURATION, ADV7180_SAT_MIN,
522 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
523 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
524 V4L2_CID_HUE, ADV7180_HUE_MIN,
525 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
526 state->sd.ctrl_handler = &state->ctrl_hdl;
527 if (state->ctrl_hdl.error) {
528 int err = state->ctrl_hdl.error;
530 v4l2_ctrl_handler_free(&state->ctrl_hdl);
533 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
537 static void adv7180_exit_controls(struct adv7180_state *state)
539 v4l2_ctrl_handler_free(&state->ctrl_hdl);
542 static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
543 struct v4l2_subdev_fh *fh,
544 struct v4l2_subdev_mbus_code_enum *code)
546 if (code->index != 0)
549 code->code = MEDIA_BUS_FMT_YUYV8_2X8;
554 static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
555 struct v4l2_mbus_framefmt *fmt)
557 struct adv7180_state *state = to_state(sd);
559 fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
560 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
561 fmt->field = V4L2_FIELD_INTERLACED;
563 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
568 static int adv7180_get_pad_format(struct v4l2_subdev *sd,
569 struct v4l2_subdev_fh *fh,
570 struct v4l2_subdev_format *format)
572 return adv7180_mbus_fmt(sd, &format->format);
575 static int adv7180_set_pad_format(struct v4l2_subdev *sd,
576 struct v4l2_subdev_fh *fh,
577 struct v4l2_subdev_format *format)
579 return adv7180_mbus_fmt(sd, &format->format);
582 static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
583 struct v4l2_mbus_config *cfg)
585 struct adv7180_state *state = to_state(sd);
587 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
588 cfg->type = V4L2_MBUS_CSI2;
589 cfg->flags = V4L2_MBUS_CSI2_1_LANE |
590 V4L2_MBUS_CSI2_CHANNEL_0 |
591 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
594 * The ADV7180 sensor supports BT.601/656 output modes.
595 * The BT.656 is default and not yet configurable by s/w.
597 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
598 V4L2_MBUS_DATA_ACTIVE_HIGH;
599 cfg->type = V4L2_MBUS_BT656;
605 static const struct v4l2_subdev_video_ops adv7180_video_ops = {
606 .s_std = adv7180_s_std,
607 .querystd = adv7180_querystd,
608 .g_input_status = adv7180_g_input_status,
609 .s_routing = adv7180_s_routing,
610 .g_mbus_config = adv7180_g_mbus_config,
614 static const struct v4l2_subdev_core_ops adv7180_core_ops = {
615 .s_power = adv7180_s_power,
618 static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
619 .enum_mbus_code = adv7180_enum_mbus_code,
620 .set_fmt = adv7180_set_pad_format,
621 .get_fmt = adv7180_get_pad_format,
624 static const struct v4l2_subdev_ops adv7180_ops = {
625 .core = &adv7180_core_ops,
626 .video = &adv7180_video_ops,
627 .pad = &adv7180_pad_ops,
630 static irqreturn_t adv7180_irq(int irq, void *devid)
632 struct adv7180_state *state = devid;
635 mutex_lock(&state->mutex);
636 isr3 = adv7180_read(state, ADV7180_REG_ISR3);
638 adv7180_write(state, ADV7180_REG_ICR3, isr3);
640 if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
641 __adv7180_status(state, NULL, &state->curr_norm);
642 mutex_unlock(&state->mutex);
647 static int adv7180_init(struct adv7180_state *state)
651 /* ITU-R BT.656-4 compatible */
652 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
653 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
657 /* Manually set V bit end position in NTSC mode */
658 return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
659 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
662 static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
664 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
665 (std << 4) | state->input);
668 static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
672 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
676 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
678 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
681 static int adv7182_init(struct adv7180_state *state)
683 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
684 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR,
685 ADV7180_DEFAULT_CSI_I2C_ADDR << 1);
687 if (state->chip_info->flags & ADV7180_FLAG_V2) {
688 /* ADI recommended writes for improved video quality */
689 adv7180_write(state, 0x0080, 0x51);
690 adv7180_write(state, 0x0081, 0x51);
691 adv7180_write(state, 0x0082, 0x68);
694 /* ADI required writes */
695 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
696 adv7180_write(state, 0x0003, 0x4e);
697 adv7180_write(state, 0x0004, 0x57);
698 adv7180_write(state, 0x001d, 0xc0);
700 if (state->chip_info->flags & ADV7180_FLAG_V2)
701 adv7180_write(state, 0x0004, 0x17);
703 adv7180_write(state, 0x0004, 0x07);
704 adv7180_write(state, 0x0003, 0x0c);
705 adv7180_write(state, 0x001d, 0x40);
708 adv7180_write(state, 0x0013, 0x00);
713 static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
715 return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4);
718 enum adv7182_input_type {
719 ADV7182_INPUT_TYPE_CVBS,
720 ADV7182_INPUT_TYPE_DIFF_CVBS,
721 ADV7182_INPUT_TYPE_SVIDEO,
722 ADV7182_INPUT_TYPE_YPBPR,
725 static enum adv7182_input_type adv7182_get_input_type(unsigned int input)
728 case ADV7182_INPUT_CVBS_AIN1:
729 case ADV7182_INPUT_CVBS_AIN2:
730 case ADV7182_INPUT_CVBS_AIN3:
731 case ADV7182_INPUT_CVBS_AIN4:
732 case ADV7182_INPUT_CVBS_AIN5:
733 case ADV7182_INPUT_CVBS_AIN6:
734 case ADV7182_INPUT_CVBS_AIN7:
735 case ADV7182_INPUT_CVBS_AIN8:
736 return ADV7182_INPUT_TYPE_CVBS;
737 case ADV7182_INPUT_SVIDEO_AIN1_AIN2:
738 case ADV7182_INPUT_SVIDEO_AIN3_AIN4:
739 case ADV7182_INPUT_SVIDEO_AIN5_AIN6:
740 case ADV7182_INPUT_SVIDEO_AIN7_AIN8:
741 return ADV7182_INPUT_TYPE_SVIDEO;
742 case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3:
743 case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6:
744 return ADV7182_INPUT_TYPE_YPBPR;
745 case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2:
746 case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4:
747 case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6:
748 case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8:
749 return ADV7182_INPUT_TYPE_DIFF_CVBS;
750 default: /* Will never happen */
755 /* ADI recommended writes to registers 0x52, 0x53, 0x54 */
756 static unsigned int adv7182_lbias_settings[][3] = {
757 [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 },
758 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
759 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
760 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
763 static unsigned int adv7280_lbias_settings[][3] = {
764 [ADV7182_INPUT_TYPE_CVBS] = { 0xCD, 0x4E, 0x80 },
765 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
766 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
767 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
770 static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
772 enum adv7182_input_type input_type;
777 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
781 /* Reset clamp circuitry - ADI recommended writes */
782 adv7180_write(state, 0x809c, 0x00);
783 adv7180_write(state, 0x809c, 0xff);
785 input_type = adv7182_get_input_type(input);
787 switch (input_type) {
788 case ADV7182_INPUT_TYPE_CVBS:
789 case ADV7182_INPUT_TYPE_DIFF_CVBS:
790 /* ADI recommends to use the SH1 filter */
791 adv7180_write(state, 0x0017, 0x41);
794 adv7180_write(state, 0x0017, 0x01);
798 if (state->chip_info->flags & ADV7180_FLAG_V2)
799 lbias = adv7280_lbias_settings[input_type];
801 lbias = adv7182_lbias_settings[input_type];
803 for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++)
804 adv7180_write(state, 0x0052 + i, lbias[i]);
806 if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) {
807 /* ADI required writes to make differential CVBS work */
808 adv7180_write(state, 0x005f, 0xa8);
809 adv7180_write(state, 0x005a, 0x90);
810 adv7180_write(state, 0x0060, 0xb0);
811 adv7180_write(state, 0x80b6, 0x08);
812 adv7180_write(state, 0x80c0, 0xa0);
814 adv7180_write(state, 0x005f, 0xf0);
815 adv7180_write(state, 0x005a, 0xd0);
816 adv7180_write(state, 0x0060, 0x10);
817 adv7180_write(state, 0x80b6, 0x9c);
818 adv7180_write(state, 0x80c0, 0x00);
824 static const struct adv7180_chip_info adv7180_info = {
825 .flags = ADV7180_FLAG_RESET_POWERED,
826 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
827 * all inputs and let the card driver take care of validation
829 .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
830 BIT(ADV7180_INPUT_CVBS_AIN2) |
831 BIT(ADV7180_INPUT_CVBS_AIN3) |
832 BIT(ADV7180_INPUT_CVBS_AIN4) |
833 BIT(ADV7180_INPUT_CVBS_AIN5) |
834 BIT(ADV7180_INPUT_CVBS_AIN6) |
835 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
836 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
837 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
838 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
839 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
840 .init = adv7180_init,
841 .set_std = adv7180_set_std,
842 .select_input = adv7180_select_input,
845 static const struct adv7180_chip_info adv7182_info = {
846 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
847 BIT(ADV7182_INPUT_CVBS_AIN2) |
848 BIT(ADV7182_INPUT_CVBS_AIN3) |
849 BIT(ADV7182_INPUT_CVBS_AIN4) |
850 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
851 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
852 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
853 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
854 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4),
855 .init = adv7182_init,
856 .set_std = adv7182_set_std,
857 .select_input = adv7182_select_input,
860 static const struct adv7180_chip_info adv7280_info = {
861 .flags = ADV7180_FLAG_V2,
862 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
863 BIT(ADV7182_INPUT_CVBS_AIN2) |
864 BIT(ADV7182_INPUT_CVBS_AIN3) |
865 BIT(ADV7182_INPUT_CVBS_AIN4) |
866 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
867 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
868 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3),
869 .init = adv7182_init,
870 .set_std = adv7182_set_std,
871 .select_input = adv7182_select_input,
874 static const struct adv7180_chip_info adv7280_m_info = {
875 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
876 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
877 BIT(ADV7182_INPUT_CVBS_AIN2) |
878 BIT(ADV7182_INPUT_CVBS_AIN3) |
879 BIT(ADV7182_INPUT_CVBS_AIN4) |
880 BIT(ADV7182_INPUT_CVBS_AIN5) |
881 BIT(ADV7182_INPUT_CVBS_AIN6) |
882 BIT(ADV7182_INPUT_CVBS_AIN7) |
883 BIT(ADV7182_INPUT_CVBS_AIN8) |
884 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
885 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
886 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
887 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
888 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
889 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6),
890 .init = adv7182_init,
891 .set_std = adv7182_set_std,
892 .select_input = adv7182_select_input,
895 static const struct adv7180_chip_info adv7281_info = {
896 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
897 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
898 BIT(ADV7182_INPUT_CVBS_AIN2) |
899 BIT(ADV7182_INPUT_CVBS_AIN7) |
900 BIT(ADV7182_INPUT_CVBS_AIN8) |
901 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
902 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
903 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
904 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
905 .init = adv7182_init,
906 .set_std = adv7182_set_std,
907 .select_input = adv7182_select_input,
910 static const struct adv7180_chip_info adv7281_m_info = {
911 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
912 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
913 BIT(ADV7182_INPUT_CVBS_AIN2) |
914 BIT(ADV7182_INPUT_CVBS_AIN3) |
915 BIT(ADV7182_INPUT_CVBS_AIN4) |
916 BIT(ADV7182_INPUT_CVBS_AIN7) |
917 BIT(ADV7182_INPUT_CVBS_AIN8) |
918 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
919 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
920 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
921 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
922 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
923 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
924 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
925 .init = adv7182_init,
926 .set_std = adv7182_set_std,
927 .select_input = adv7182_select_input,
930 static const struct adv7180_chip_info adv7281_ma_info = {
931 .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
932 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
933 BIT(ADV7182_INPUT_CVBS_AIN2) |
934 BIT(ADV7182_INPUT_CVBS_AIN3) |
935 BIT(ADV7182_INPUT_CVBS_AIN4) |
936 BIT(ADV7182_INPUT_CVBS_AIN5) |
937 BIT(ADV7182_INPUT_CVBS_AIN6) |
938 BIT(ADV7182_INPUT_CVBS_AIN7) |
939 BIT(ADV7182_INPUT_CVBS_AIN8) |
940 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
941 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
942 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
943 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
944 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
945 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6) |
946 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
947 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
948 BIT(ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6) |
949 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
950 .init = adv7182_init,
951 .set_std = adv7182_set_std,
952 .select_input = adv7182_select_input,
955 static int init_device(struct adv7180_state *state)
959 mutex_lock(&state->mutex);
961 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
962 usleep_range(2000, 10000);
964 ret = state->chip_info->init(state);
968 ret = adv7180_program_std(state);
972 /* register for interrupts */
973 if (state->irq > 0) {
974 /* config the Interrupt pin to be active low */
975 ret = adv7180_write(state, ADV7180_REG_ICONF1,
976 ADV7180_ICONF1_ACTIVE_LOW |
977 ADV7180_ICONF1_PSYNC_ONLY);
981 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
985 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
989 /* enable AD change interrupts interrupts */
990 ret = adv7180_write(state, ADV7180_REG_IMR3,
991 ADV7180_IRQ3_AD_CHANGE);
995 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
1001 mutex_unlock(&state->mutex);
1006 static int adv7180_probe(struct i2c_client *client,
1007 const struct i2c_device_id *id)
1009 struct adv7180_state *state;
1010 struct v4l2_subdev *sd;
1013 /* Check if the adapter supports the needed features */
1014 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1017 v4l_info(client, "chip found @ 0x%02x (%s)\n",
1018 client->addr, client->adapter->name);
1020 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
1024 state->client = client;
1025 state->chip_info = (struct adv7180_chip_info *)id->driver_data;
1027 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1028 state->csi_client = i2c_new_dummy(client->adapter,
1029 ADV7180_DEFAULT_CSI_I2C_ADDR);
1030 if (!state->csi_client)
1034 state->irq = client->irq;
1035 mutex_init(&state->mutex);
1036 state->autodetect = true;
1037 if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
1038 state->powered = true;
1040 state->powered = false;
1043 v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
1044 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
1046 ret = adv7180_init_controls(state);
1048 goto err_unregister_csi_client;
1050 state->pad.flags = MEDIA_PAD_FL_SOURCE;
1051 sd->entity.flags |= MEDIA_ENT_T_V4L2_SUBDEV_DECODER;
1052 ret = media_entity_init(&sd->entity, 1, &state->pad, 0);
1056 ret = init_device(state);
1058 goto err_media_entity_cleanup;
1061 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
1062 IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
1063 KBUILD_MODNAME, state);
1065 goto err_media_entity_cleanup;
1068 ret = v4l2_async_register_subdev(sd);
1076 free_irq(client->irq, state);
1077 err_media_entity_cleanup:
1078 media_entity_cleanup(&sd->entity);
1080 adv7180_exit_controls(state);
1081 err_unregister_csi_client:
1082 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1083 i2c_unregister_device(state->csi_client);
1084 mutex_destroy(&state->mutex);
1088 static int adv7180_remove(struct i2c_client *client)
1090 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1091 struct adv7180_state *state = to_state(sd);
1093 v4l2_async_unregister_subdev(sd);
1096 free_irq(client->irq, state);
1098 media_entity_cleanup(&sd->entity);
1099 adv7180_exit_controls(state);
1101 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1102 i2c_unregister_device(state->csi_client);
1104 mutex_destroy(&state->mutex);
1109 static const struct i2c_device_id adv7180_id[] = {
1110 { "adv7180", (kernel_ulong_t)&adv7180_info },
1111 { "adv7182", (kernel_ulong_t)&adv7182_info },
1112 { "adv7280", (kernel_ulong_t)&adv7280_info },
1113 { "adv7280-m", (kernel_ulong_t)&adv7280_m_info },
1114 { "adv7281", (kernel_ulong_t)&adv7281_info },
1115 { "adv7281-m", (kernel_ulong_t)&adv7281_m_info },
1116 { "adv7281-ma", (kernel_ulong_t)&adv7281_ma_info },
1117 { "adv7282", (kernel_ulong_t)&adv7281_info },
1118 { "adv7282-m", (kernel_ulong_t)&adv7281_m_info },
1121 MODULE_DEVICE_TABLE(i2c, adv7180_id);
1123 #ifdef CONFIG_PM_SLEEP
1124 static int adv7180_suspend(struct device *dev)
1126 struct i2c_client *client = to_i2c_client(dev);
1127 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1128 struct adv7180_state *state = to_state(sd);
1130 return adv7180_set_power(state, false);
1133 static int adv7180_resume(struct device *dev)
1135 struct i2c_client *client = to_i2c_client(dev);
1136 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1137 struct adv7180_state *state = to_state(sd);
1140 ret = init_device(state);
1144 ret = adv7180_set_power(state, state->powered);
1151 static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
1152 #define ADV7180_PM_OPS (&adv7180_pm_ops)
1155 #define ADV7180_PM_OPS NULL
1158 static struct i2c_driver adv7180_driver = {
1160 .owner = THIS_MODULE,
1161 .name = KBUILD_MODNAME,
1162 .pm = ADV7180_PM_OPS,
1164 .probe = adv7180_probe,
1165 .remove = adv7180_remove,
1166 .id_table = adv7180_id,
1169 module_i2c_driver(adv7180_driver);
1171 MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
1172 MODULE_AUTHOR("Mocean Laboratories");
1173 MODULE_LICENSE("GPL v2");