2 * Copyright (C) 2010 Texas Instruments Inc
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation version 2.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/ctype.h>
17 #include <linux/delay.h>
18 #include <linux/device.h>
19 #include <linux/interrupt.h>
20 #include <linux/platform_device.h>
21 #include <linux/videodev2.h>
22 #include <linux/slab.h>
24 #include <mach/hardware.h>
26 #include <linux/platform_data/i2c-davinci.h>
30 #include <media/davinci/vpbe_types.h>
31 #include <media/davinci/vpbe_venc.h>
32 #include <media/davinci/vpss.h>
33 #include <media/v4l2-device.h>
35 #include "vpbe_venc_regs.h"
37 #define MODULE_NAME "davinci-vpbe-venc"
39 static struct platform_device_id vpbe_venc_devtype[] = {
41 .name = DM644X_VPBE_VENC_SUBDEV_NAME,
42 .driver_data = VPBE_VERSION_1,
44 .name = DM365_VPBE_VENC_SUBDEV_NAME,
45 .driver_data = VPBE_VERSION_2,
47 .name = DM355_VPBE_VENC_SUBDEV_NAME,
48 .driver_data = VPBE_VERSION_3,
55 MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype);
58 module_param(debug, int, 0644);
59 MODULE_PARM_DESC(debug, "Debug level 0-2");
62 struct v4l2_subdev sd;
63 struct venc_callback *callback;
64 struct venc_platform_data *pdata;
69 void __iomem *venc_base;
70 void __iomem *vdaccfg_reg;
71 enum vpbe_version venc_type;
74 static inline struct venc_state *to_state(struct v4l2_subdev *sd)
76 return container_of(sd, struct venc_state, sd);
79 static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
81 struct venc_state *venc = to_state(sd);
83 return readl(venc->venc_base + offset);
86 static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
88 struct venc_state *venc = to_state(sd);
90 writel(val, (venc->venc_base + offset));
95 static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
98 u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
100 venc_write(sd, offset, new_val);
105 static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
107 struct venc_state *venc = to_state(sd);
109 writel(val, venc->vdaccfg_reg);
111 val = readl(venc->vdaccfg_reg);
116 #define VDAC_COMPONENT 0x543
117 #define VDAC_S_VIDEO 0x210
118 /* This function sets the dac of the VPBE for various outputs
120 static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
124 v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
125 venc_write(sd, VENC_DACSEL, 0);
128 v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
129 venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
132 v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
133 venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
142 static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
144 struct venc_state *venc = to_state(sd);
146 v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
149 venc_write(sd, VENC_VMOD, 0);
150 venc_write(sd, VENC_CVBS, 0);
151 venc_write(sd, VENC_LCDOUT, 0);
152 venc_write(sd, VENC_HSPLS, 0);
153 venc_write(sd, VENC_HSTART, 0);
154 venc_write(sd, VENC_HVALID, 0);
155 venc_write(sd, VENC_HINT, 0);
156 venc_write(sd, VENC_VSPLS, 0);
157 venc_write(sd, VENC_VSTART, 0);
158 venc_write(sd, VENC_VVALID, 0);
159 venc_write(sd, VENC_VINT, 0);
160 venc_write(sd, VENC_YCCCTL, 0);
161 venc_write(sd, VENC_DACSEL, 0);
164 venc_write(sd, VENC_VMOD, 0);
165 /* disable VCLK output pin enable */
166 venc_write(sd, VENC_VIDCTL, 0x141);
168 /* Disable output sync pins */
169 venc_write(sd, VENC_SYNCCTL, 0);
172 venc_write(sd, VENC_DCLKCTL, 0);
173 venc_write(sd, VENC_DRGBX1, 0x0000057C);
175 /* Disable LCD output control (accepting default polarity) */
176 venc_write(sd, VENC_LCDOUT, 0);
177 if (venc->venc_type != VPBE_VERSION_3)
178 venc_write(sd, VENC_CMPNT, 0x100);
179 venc_write(sd, VENC_HSPLS, 0);
180 venc_write(sd, VENC_HINT, 0);
181 venc_write(sd, VENC_HSTART, 0);
182 venc_write(sd, VENC_HVALID, 0);
184 venc_write(sd, VENC_VSPLS, 0);
185 venc_write(sd, VENC_VINT, 0);
186 venc_write(sd, VENC_VSTART, 0);
187 venc_write(sd, VENC_VVALID, 0);
189 venc_write(sd, VENC_HSDLY, 0);
190 venc_write(sd, VENC_VSDLY, 0);
192 venc_write(sd, VENC_YCCCTL, 0);
193 venc_write(sd, VENC_VSTARTA, 0);
195 /* Set OSD clock and OSD Sync Adavance registers */
196 venc_write(sd, VENC_OSDCLK0, 1);
197 venc_write(sd, VENC_OSDCLK1, 2);
202 venc_enable_vpss_clock(int venc_type,
203 enum vpbe_enc_timings_type type,
206 if (venc_type == VPBE_VERSION_1)
209 if (venc_type == VPBE_VERSION_2 && (type == VPBE_ENC_STD || (type ==
210 VPBE_ENC_DV_TIMINGS && pclock <= 27000000))) {
211 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
212 vpss_enable_clock(VPSS_VPBE_CLOCK, 1);
216 if (venc_type == VPBE_VERSION_3 && type == VPBE_ENC_STD)
217 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 0);
220 #define VDAC_CONFIG_SD_V3 0x0E21A6B6
221 #define VDAC_CONFIG_SD_V2 0x081141CF
225 static int venc_set_ntsc(struct v4l2_subdev *sd)
228 struct venc_state *venc = to_state(sd);
229 struct venc_platform_data *pdata = venc->pdata;
231 v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
233 /* Setup clock at VPSS & VENC for SD */
234 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
235 if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
238 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_525_60);
239 venc_enabledigitaloutput(sd, 0);
241 if (venc->venc_type == VPBE_VERSION_3) {
242 venc_write(sd, VENC_CLKCTL, 0x01);
243 venc_write(sd, VENC_VIDCTL, 0);
244 val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
245 } else if (venc->venc_type == VPBE_VERSION_2) {
246 venc_write(sd, VENC_CLKCTL, 0x01);
247 venc_write(sd, VENC_VIDCTL, 0);
248 vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
250 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
251 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
252 /* Set REC656 Mode */
253 venc_write(sd, VENC_YCCCTL, 0x1);
254 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
255 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
258 venc_write(sd, VENC_VMOD, 0);
259 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
261 venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
262 venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
264 venc_write(sd, VENC_DACTST, 0x0);
265 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
273 static int venc_set_pal(struct v4l2_subdev *sd)
275 struct venc_state *venc = to_state(sd);
277 v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
279 /* Setup clock at VPSS & VENC for SD */
280 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
281 if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
284 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_625_50);
285 venc_enabledigitaloutput(sd, 0);
287 if (venc->venc_type == VPBE_VERSION_3) {
288 venc_write(sd, VENC_CLKCTL, 0x1);
289 venc_write(sd, VENC_VIDCTL, 0);
290 vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
291 } else if (venc->venc_type == VPBE_VERSION_2) {
292 venc_write(sd, VENC_CLKCTL, 0x1);
293 venc_write(sd, VENC_VIDCTL, 0);
294 vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
296 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
297 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
298 /* Set REC656 Mode */
299 venc_write(sd, VENC_YCCCTL, 0x1);
302 venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
304 venc_write(sd, VENC_VMOD, 0);
305 venc_modify(sd, VENC_VMOD,
306 (1 << VENC_VMOD_VIE_SHIFT),
308 venc_modify(sd, VENC_VMOD,
309 (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
310 venc_modify(sd, VENC_VMOD,
311 (1 << VENC_VMOD_TVTYP_SHIFT),
313 venc_write(sd, VENC_DACTST, 0x0);
314 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
319 #define VDAC_CONFIG_HD_V2 0x081141EF
323 * This function configures the video encoder to EDTV(525p) component setting.
325 static int venc_set_480p59_94(struct v4l2_subdev *sd)
327 struct venc_state *venc = to_state(sd);
328 struct venc_platform_data *pdata = venc->pdata;
330 v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
331 if (venc->venc_type != VPBE_VERSION_1 &&
332 venc->venc_type != VPBE_VERSION_2)
335 /* Setup clock at VPSS & VENC for SD */
336 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
339 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
340 venc_enabledigitaloutput(sd, 0);
342 if (venc->venc_type == VPBE_VERSION_2)
343 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
344 venc_write(sd, VENC_OSDCLK0, 0);
345 venc_write(sd, VENC_OSDCLK1, 1);
347 if (venc->venc_type == VPBE_VERSION_1) {
348 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
350 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
354 venc_write(sd, VENC_VMOD, 0);
355 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
357 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
358 venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
360 venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
361 VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
363 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
371 * This function configures the video encoder to HDTV(625p) component setting
373 static int venc_set_576p50(struct v4l2_subdev *sd)
375 struct venc_state *venc = to_state(sd);
376 struct venc_platform_data *pdata = venc->pdata;
378 v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
380 if (venc->venc_type != VPBE_VERSION_1 &&
381 venc->venc_type != VPBE_VERSION_2)
383 /* Setup clock at VPSS & VENC for SD */
384 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
387 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
388 venc_enabledigitaloutput(sd, 0);
390 if (venc->venc_type == VPBE_VERSION_2)
391 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
393 venc_write(sd, VENC_OSDCLK0, 0);
394 venc_write(sd, VENC_OSDCLK1, 1);
396 if (venc->venc_type == VPBE_VERSION_1) {
397 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
399 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
403 venc_write(sd, VENC_VMOD, 0);
404 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
406 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
407 venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
410 venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
411 VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
412 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
418 * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
420 static int venc_set_720p60_internal(struct v4l2_subdev *sd)
422 struct venc_state *venc = to_state(sd);
423 struct venc_platform_data *pdata = venc->pdata;
425 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
428 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
429 venc_enabledigitaloutput(sd, 0);
431 venc_write(sd, VENC_OSDCLK0, 0);
432 venc_write(sd, VENC_OSDCLK1, 1);
434 venc_write(sd, VENC_VMOD, 0);
435 /* DM365 component HD mode */
436 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
438 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
439 venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
441 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
442 venc_write(sd, VENC_XHINTVL, 0);
447 * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
449 static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
451 struct venc_state *venc = to_state(sd);
452 struct venc_platform_data *pdata = venc->pdata;
454 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
457 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
458 venc_enabledigitaloutput(sd, 0);
460 venc_write(sd, VENC_OSDCLK0, 0);
461 venc_write(sd, VENC_OSDCLK1, 1);
464 venc_write(sd, VENC_VMOD, 0);
465 /* DM365 component HD mode */
466 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
468 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
469 venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
471 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
472 venc_write(sd, VENC_XHINTVL, 0);
476 static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
478 v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
480 if (norm & V4L2_STD_525_60)
481 return venc_set_ntsc(sd);
482 else if (norm & V4L2_STD_625_50)
483 return venc_set_pal(sd);
488 static int venc_s_dv_timings(struct v4l2_subdev *sd,
489 struct v4l2_dv_timings *dv_timings)
491 struct venc_state *venc = to_state(sd);
492 u32 height = dv_timings->bt.height;
495 v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
498 return venc_set_576p50(sd);
499 else if (height == 480)
500 return venc_set_480p59_94(sd);
501 else if ((height == 720) &&
502 (venc->venc_type == VPBE_VERSION_2)) {
503 /* TBD setup internal 720p mode here */
504 ret = venc_set_720p60_internal(sd);
505 /* for DM365 VPBE, there is DAC inside */
506 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
508 } else if ((height == 1080) &&
509 (venc->venc_type == VPBE_VERSION_2)) {
510 /* TBD setup internal 1080i mode here */
511 ret = venc_set_1080i30_internal(sd);
512 /* for DM365 VPBE, there is DAC inside */
513 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
519 static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
522 struct venc_state *venc = to_state(sd);
525 v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
527 ret = venc_set_dac(sd, output);
529 venc->output = output;
534 static long venc_ioctl(struct v4l2_subdev *sd,
542 val = venc_read(sd, VENC_VSTAT);
543 *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
547 v4l2_err(sd, "Wrong IOCTL cmd\n");
554 static const struct v4l2_subdev_core_ops venc_core_ops = {
558 static const struct v4l2_subdev_video_ops venc_video_ops = {
559 .s_routing = venc_s_routing,
560 .s_std_output = venc_s_std_output,
561 .s_dv_timings = venc_s_dv_timings,
564 static const struct v4l2_subdev_ops venc_ops = {
565 .core = &venc_core_ops,
566 .video = &venc_video_ops,
569 static int venc_initialize(struct v4l2_subdev *sd)
571 struct venc_state *venc = to_state(sd);
574 /* Set default to output to composite and std to NTSC */
576 venc->std = V4L2_STD_525_60;
578 ret = venc_s_routing(sd, 0, venc->output, 0);
580 v4l2_err(sd, "Error setting output during init\n");
584 ret = venc_s_std_output(sd, venc->std);
586 v4l2_err(sd, "Error setting std during init\n");
593 static int venc_device_get(struct device *dev, void *data)
595 struct platform_device *pdev = to_platform_device(dev);
596 struct venc_state **venc = data;
598 if (strstr(pdev->name, "vpbe-venc") != NULL)
599 *venc = platform_get_drvdata(pdev);
604 struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
605 const char *venc_name)
607 struct venc_state *venc;
610 err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
615 v4l2_subdev_init(&venc->sd, &venc_ops);
617 strcpy(venc->sd.name, venc_name);
618 if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
620 "vpbe unable to register venc sub device\n");
623 if (venc_initialize(&venc->sd)) {
625 "vpbe venc initialization failed\n");
631 EXPORT_SYMBOL(venc_sub_dev_init);
633 static int venc_probe(struct platform_device *pdev)
635 const struct platform_device_id *pdev_id;
636 struct venc_state *venc;
637 struct resource *res;
639 if (!pdev->dev.platform_data) {
640 dev_err(&pdev->dev, "No platform data for VENC sub device");
644 pdev_id = platform_get_device_id(pdev);
648 venc = devm_kzalloc(&pdev->dev, sizeof(struct venc_state), GFP_KERNEL);
652 venc->venc_type = pdev_id->driver_data;
653 venc->pdev = &pdev->dev;
654 venc->pdata = pdev->dev.platform_data;
656 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
658 venc->venc_base = devm_ioremap_resource(&pdev->dev, res);
659 if (IS_ERR(venc->venc_base))
660 return PTR_ERR(venc->venc_base);
662 if (venc->venc_type != VPBE_VERSION_1) {
663 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
665 venc->vdaccfg_reg = devm_ioremap_resource(&pdev->dev, res);
666 if (IS_ERR(venc->vdaccfg_reg))
667 return PTR_ERR(venc->vdaccfg_reg);
669 spin_lock_init(&venc->lock);
670 platform_set_drvdata(pdev, venc);
671 dev_notice(venc->pdev, "VENC sub device probe success\n");
676 static int venc_remove(struct platform_device *pdev)
681 static struct platform_driver venc_driver = {
683 .remove = venc_remove,
687 .id_table = vpbe_venc_devtype
690 module_platform_driver(venc_driver);
692 MODULE_LICENSE("GPL");
693 MODULE_DESCRIPTION("VPBE VENC Driver");
694 MODULE_AUTHOR("Texas Instruments");