6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/omap-iommu.h>
65 #include <linux/platform_device.h>
66 #include <linux/regulator/consumer.h>
67 #include <linux/slab.h>
68 #include <linux/sched.h>
69 #include <linux/vmalloc.h>
71 #include <media/v4l2-common.h>
72 #include <media/v4l2-device.h>
77 #include "isppreview.h"
78 #include "ispresizer.h"
84 static unsigned int autoidle;
85 module_param(autoidle, int, 0444);
86 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
88 static void isp_save_ctx(struct isp_device *isp);
90 static void isp_restore_ctx(struct isp_device *isp);
92 static const struct isp_res_mapping isp_res_maps[] = {
94 .isp_rev = ISP_REVISION_2_0,
95 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
96 1 << OMAP3_ISP_IOMEM_CCP2 |
97 1 << OMAP3_ISP_IOMEM_CCDC |
98 1 << OMAP3_ISP_IOMEM_HIST |
99 1 << OMAP3_ISP_IOMEM_H3A |
100 1 << OMAP3_ISP_IOMEM_PREV |
101 1 << OMAP3_ISP_IOMEM_RESZ |
102 1 << OMAP3_ISP_IOMEM_SBL |
103 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
104 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
105 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
108 .isp_rev = ISP_REVISION_15_0,
109 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
110 1 << OMAP3_ISP_IOMEM_CCP2 |
111 1 << OMAP3_ISP_IOMEM_CCDC |
112 1 << OMAP3_ISP_IOMEM_HIST |
113 1 << OMAP3_ISP_IOMEM_H3A |
114 1 << OMAP3_ISP_IOMEM_PREV |
115 1 << OMAP3_ISP_IOMEM_RESZ |
116 1 << OMAP3_ISP_IOMEM_SBL |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
118 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
119 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
121 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
122 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
123 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
127 /* Structure for saving/restoring ISP module registers */
128 static struct isp_reg isp_reg_list[] = {
129 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
130 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
131 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
136 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
137 * @isp: OMAP3 ISP device
139 * In order to force posting of pending writes, we need to write and
140 * readback the same register, in this case the revision register.
142 * See this link for reference:
143 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
145 void omap3isp_flush(struct isp_device *isp)
147 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
148 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 * isp_enable_interrupts - Enable ISP interrupts.
153 * @isp: OMAP3 ISP device
155 static void isp_enable_interrupts(struct isp_device *isp)
157 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
158 | IRQ0ENABLE_CSIB_IRQ
159 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
160 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
161 | IRQ0ENABLE_CCDC_VD0_IRQ
162 | IRQ0ENABLE_CCDC_VD1_IRQ
163 | IRQ0ENABLE_HS_VS_IRQ
164 | IRQ0ENABLE_HIST_DONE_IRQ
165 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
166 | IRQ0ENABLE_H3A_AF_DONE_IRQ
167 | IRQ0ENABLE_PRV_DONE_IRQ
168 | IRQ0ENABLE_RSZ_DONE_IRQ;
170 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
171 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
175 * isp_disable_interrupts - Disable ISP interrupts.
176 * @isp: OMAP3 ISP device
178 static void isp_disable_interrupts(struct isp_device *isp)
180 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
184 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
185 * @isp: OMAP3 ISP device
186 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
187 * @xclksel: XCLK to configure (0 = A, 1 = B).
189 * Configures the specified MCLK divisor in the ISP timing control register
190 * (TCTRL_CTRL) to generate the desired xclk clock value.
192 * Divisor = cam_mclk_hz / xclk
194 * Returns the final frequency that is actually being generated
196 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
200 unsigned long mclk_hz;
202 if (!omap3isp_get(isp))
205 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
207 if (xclk >= mclk_hz) {
208 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
209 currentxclk = mclk_hz;
210 } else if (xclk >= 2) {
211 divisor = mclk_hz / xclk;
212 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
213 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
214 currentxclk = mclk_hz / divisor;
222 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
223 ISPTCTRL_CTRL_DIVA_MASK,
224 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
225 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
229 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
230 ISPTCTRL_CTRL_DIVB_MASK,
231 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
232 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
238 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
239 "xclk. Must be 0 (A) or 1 (B).\n");
243 /* Do we go from stable whatever to clock? */
244 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
246 /* Stopping the clock. */
247 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
250 isp->xclk_divisor[xclksel - 1] = divisor;
258 * isp_core_init - ISP core settings
259 * @isp: OMAP3 ISP device
260 * @idle: Consider idle state.
262 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
265 * We need to configure the HS/VS interrupt source before interrupts get
266 * enabled, as the sensor might be free-running and the ISP default setting
267 * (HS edge) would put an unnecessary burden on the CPU.
269 static void isp_core_init(struct isp_device *isp, int idle)
272 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
273 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
274 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
275 ((isp->revision == ISP_REVISION_15_0) ?
276 ISP_SYSCONFIG_AUTOIDLE : 0),
277 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
280 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
281 ISPCTRL_SYNC_DETECT_VSRISE,
282 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
286 * Configure the bridge and lane shifter. Valid inputs are
288 * CCDC_INPUT_PARALLEL: Parallel interface
289 * CCDC_INPUT_CSI2A: CSI2a receiver
290 * CCDC_INPUT_CCP2B: CCP2b receiver
291 * CCDC_INPUT_CSI2C: CSI2c receiver
293 * The bridge and lane shifter are configured according to the selected input
294 * and the ISP platform data.
296 void omap3isp_configure_bridge(struct isp_device *isp,
297 enum ccdc_input_entity input,
298 const struct isp_parallel_platform_data *pdata,
299 unsigned int shift, unsigned int bridge)
303 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
304 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
305 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
306 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
307 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
308 ispctrl_val |= bridge;
311 case CCDC_INPUT_PARALLEL:
312 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
313 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
314 shift += pdata->data_lane_shift * 2;
317 case CCDC_INPUT_CSI2A:
318 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
321 case CCDC_INPUT_CCP2B:
322 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
325 case CCDC_INPUT_CSI2C:
326 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
333 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
335 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
338 void omap3isp_hist_dma_done(struct isp_device *isp)
340 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
341 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
342 /* Histogram cannot be enabled in this frame anymore */
343 atomic_set(&isp->isp_hist.buf_err, 1);
344 dev_dbg(isp->dev, "hist: Out of synchronization with "
345 "CCDC. Ignoring next buffer.\n");
349 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
351 static const char *name[] = {
370 "CCDC_LSC_PREFETCH_COMPLETED",
371 "CCDC_LSC_PREFETCH_ERROR",
387 dev_dbg(isp->dev, "ISP IRQ: ");
389 for (i = 0; i < ARRAY_SIZE(name); i++) {
390 if ((1 << i) & irqstatus)
391 printk(KERN_CONT "%s ", name[i]);
393 printk(KERN_CONT "\n");
396 static void isp_isr_sbl(struct isp_device *isp)
398 struct device *dev = isp->dev;
399 struct isp_pipeline *pipe;
403 * Handle shared buffer logic overflows for video buffers.
404 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
406 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
407 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
408 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
411 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
413 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
414 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
419 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
420 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
425 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
426 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
431 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
432 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
437 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
438 | ISPSBL_PCR_RSZ2_WBL_OVF
439 | ISPSBL_PCR_RSZ3_WBL_OVF
440 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
441 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
446 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
447 omap3isp_stat_sbl_overflow(&isp->isp_af);
449 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
450 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
454 * isp_isr - Interrupt Service Routine for Camera ISP module.
455 * @irq: Not used currently.
456 * @_isp: Pointer to the OMAP3 ISP device
458 * Handles the corresponding callback if plugged in.
460 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
461 * IRQ wasn't handled.
463 static irqreturn_t isp_isr(int irq, void *_isp)
465 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
466 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
467 IRQ0STATUS_CCDC_VD0_IRQ |
468 IRQ0STATUS_CCDC_VD1_IRQ |
469 IRQ0STATUS_HS_VS_IRQ;
470 struct isp_device *isp = _isp;
473 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
474 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
478 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
479 omap3isp_csi2_isr(&isp->isp_csi2a);
481 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
482 omap3isp_ccp2_isr(&isp->isp_ccp2);
484 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
485 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
486 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
487 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
488 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
489 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
490 omap3isp_stat_isr_frame_sync(&isp->isp_af);
491 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
494 if (irqstatus & ccdc_events)
495 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
497 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
498 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
499 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
500 omap3isp_preview_isr(&isp->isp_prev);
503 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
504 omap3isp_resizer_isr(&isp->isp_res);
506 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
507 omap3isp_stat_isr(&isp->isp_aewb);
509 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
510 omap3isp_stat_isr(&isp->isp_af);
512 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
513 omap3isp_stat_isr(&isp->isp_hist);
517 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
518 isp_isr_dbg(isp, irqstatus);
524 /* -----------------------------------------------------------------------------
525 * Pipeline power management
527 * Entities must be powered up when part of a pipeline that contains at least
528 * one open video device node.
530 * To achieve this use the entity use_count field to track the number of users.
531 * For entities corresponding to video device nodes the use_count field stores
532 * the users count of the node. For entities corresponding to subdevs the
533 * use_count field stores the total number of users of all video device nodes
536 * The omap3isp_pipeline_pm_use() function must be called in the open() and
537 * close() handlers of video device nodes. It increments or decrements the use
538 * count of all subdev entities in the pipeline.
540 * To react to link management on powered pipelines, the link setup notification
541 * callback updates the use count of all entities in the source and sink sides
546 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
547 * @entity: The entity
549 * Return the total number of users of all video device nodes in the pipeline.
551 static int isp_pipeline_pm_use_count(struct media_entity *entity)
553 struct media_entity_graph graph;
556 media_entity_graph_walk_start(&graph, entity);
558 while ((entity = media_entity_graph_walk_next(&graph))) {
559 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
560 use += entity->use_count;
567 * isp_pipeline_pm_power_one - Apply power change to an entity
568 * @entity: The entity
569 * @change: Use count change
571 * Change the entity use count by @change. If the entity is a subdev update its
572 * power state by calling the core::s_power operation when the use count goes
573 * from 0 to != 0 or from != 0 to 0.
575 * Return 0 on success or a negative error code on failure.
577 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
579 struct v4l2_subdev *subdev;
582 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
583 ? media_entity_to_v4l2_subdev(entity) : NULL;
585 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
586 ret = v4l2_subdev_call(subdev, core, s_power, 1);
587 if (ret < 0 && ret != -ENOIOCTLCMD)
591 entity->use_count += change;
592 WARN_ON(entity->use_count < 0);
594 if (entity->use_count == 0 && change < 0 && subdev != NULL)
595 v4l2_subdev_call(subdev, core, s_power, 0);
601 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
602 * @entity: The entity
603 * @change: Use count change
605 * Walk the pipeline to update the use count and the power state of all non-node
608 * Return 0 on success or a negative error code on failure.
610 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
612 struct media_entity_graph graph;
613 struct media_entity *first = entity;
619 media_entity_graph_walk_start(&graph, entity);
621 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
622 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
623 ret = isp_pipeline_pm_power_one(entity, change);
628 media_entity_graph_walk_start(&graph, first);
630 while ((first = media_entity_graph_walk_next(&graph))
632 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
633 isp_pipeline_pm_power_one(first, -change);
639 * omap3isp_pipeline_pm_use - Update the use count of an entity
640 * @entity: The entity
641 * @use: Use (1) or stop using (0) the entity
643 * Update the use count of all entities in the pipeline and power entities on or
646 * Return 0 on success or a negative error code on failure. Powering entities
647 * off is assumed to never fail. No failure can occur when the use parameter is
650 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
652 int change = use ? 1 : -1;
655 mutex_lock(&entity->parent->graph_mutex);
657 /* Apply use count to node. */
658 entity->use_count += change;
659 WARN_ON(entity->use_count < 0);
661 /* Apply power change to connected non-nodes. */
662 ret = isp_pipeline_pm_power(entity, change);
664 entity->use_count -= change;
666 mutex_unlock(&entity->parent->graph_mutex);
672 * isp_pipeline_link_notify - Link management notification callback
673 * @source: Pad at the start of the link
674 * @sink: Pad at the end of the link
675 * @flags: New link flags that will be applied
677 * React to link management on powered pipelines by updating the use count of
678 * all entities in the source and sink sides of the link. Entities are powered
679 * on or off accordingly.
681 * Return 0 on success or a negative error code on failure. Powering entities
682 * off is assumed to never fail. This function will not fail for disconnection
685 static int isp_pipeline_link_notify(struct media_pad *source,
686 struct media_pad *sink, u32 flags)
688 int source_use = isp_pipeline_pm_use_count(source->entity);
689 int sink_use = isp_pipeline_pm_use_count(sink->entity);
692 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
693 /* Powering off entities is assumed to never fail. */
694 isp_pipeline_pm_power(source->entity, -sink_use);
695 isp_pipeline_pm_power(sink->entity, -source_use);
699 ret = isp_pipeline_pm_power(source->entity, sink_use);
703 ret = isp_pipeline_pm_power(sink->entity, source_use);
705 isp_pipeline_pm_power(source->entity, -sink_use);
710 /* -----------------------------------------------------------------------------
711 * Pipeline stream management
715 * isp_pipeline_enable - Enable streaming on a pipeline
716 * @pipe: ISP pipeline
717 * @mode: Stream mode (single shot or continuous)
719 * Walk the entities chain starting at the pipeline output video node and start
720 * all modules in the chain in the given mode.
722 * Return 0 if successful, or the return value of the failed video::s_stream
723 * operation otherwise.
725 static int isp_pipeline_enable(struct isp_pipeline *pipe,
726 enum isp_pipeline_stream_state mode)
728 struct isp_device *isp = pipe->output->isp;
729 struct media_entity *entity;
730 struct media_pad *pad;
731 struct v4l2_subdev *subdev;
735 /* If the preview engine crashed it might not respond to read/write
736 * operations on the L4 bus. This would result in a bus fault and a
737 * kernel oops. Refuse to start streaming in that case. This check must
738 * be performed before the loop below to avoid starting entities if the
739 * pipeline won't start anyway (those entities would then likely fail to
740 * stop, making the problem worse).
742 if ((pipe->entities & isp->crashed) &
743 (1U << isp->isp_prev.subdev.entity.id))
746 spin_lock_irqsave(&pipe->lock, flags);
747 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
748 spin_unlock_irqrestore(&pipe->lock, flags);
750 pipe->do_propagation = false;
752 entity = &pipe->output->video.entity;
754 pad = &entity->pads[0];
755 if (!(pad->flags & MEDIA_PAD_FL_SINK))
758 pad = media_entity_remote_source(pad);
760 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
763 entity = pad->entity;
764 subdev = media_entity_to_v4l2_subdev(entity);
766 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
767 if (ret < 0 && ret != -ENOIOCTLCMD)
770 if (subdev == &isp->isp_ccdc.subdev) {
771 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
773 v4l2_subdev_call(&isp->isp_af.subdev, video,
775 v4l2_subdev_call(&isp->isp_hist.subdev, video,
777 pipe->do_propagation = true;
784 static int isp_pipeline_wait_resizer(struct isp_device *isp)
786 return omap3isp_resizer_busy(&isp->isp_res);
789 static int isp_pipeline_wait_preview(struct isp_device *isp)
791 return omap3isp_preview_busy(&isp->isp_prev);
794 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
796 return omap3isp_stat_busy(&isp->isp_af)
797 || omap3isp_stat_busy(&isp->isp_aewb)
798 || omap3isp_stat_busy(&isp->isp_hist)
799 || omap3isp_ccdc_busy(&isp->isp_ccdc);
802 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
804 static int isp_pipeline_wait(struct isp_device *isp,
805 int(*busy)(struct isp_device *isp))
807 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
809 while (!time_after(jiffies, timeout)) {
818 * isp_pipeline_disable - Disable streaming on a pipeline
819 * @pipe: ISP pipeline
821 * Walk the entities chain starting at the pipeline output video node and stop
822 * all modules in the chain. Wait synchronously for the modules to be stopped if
825 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
826 * can't be stopped (in which case a software reset of the ISP is probably
829 static int isp_pipeline_disable(struct isp_pipeline *pipe)
831 struct isp_device *isp = pipe->output->isp;
832 struct media_entity *entity;
833 struct media_pad *pad;
834 struct v4l2_subdev *subdev;
839 * We need to stop all the modules after CCDC first or they'll
840 * never stop since they may not get a full frame from CCDC.
842 entity = &pipe->output->video.entity;
844 pad = &entity->pads[0];
845 if (!(pad->flags & MEDIA_PAD_FL_SINK))
848 pad = media_entity_remote_source(pad);
850 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
853 entity = pad->entity;
854 subdev = media_entity_to_v4l2_subdev(entity);
856 if (subdev == &isp->isp_ccdc.subdev) {
857 v4l2_subdev_call(&isp->isp_aewb.subdev,
859 v4l2_subdev_call(&isp->isp_af.subdev,
861 v4l2_subdev_call(&isp->isp_hist.subdev,
865 v4l2_subdev_call(subdev, video, s_stream, 0);
867 if (subdev == &isp->isp_res.subdev)
868 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
869 else if (subdev == &isp->isp_prev.subdev)
870 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
871 else if (subdev == &isp->isp_ccdc.subdev)
872 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
877 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
878 /* If the entity failed to stopped, assume it has
879 * crashed. Mark it as such, the ISP will be reset when
880 * applications will release it.
882 isp->crashed |= 1U << subdev->entity.id;
883 failure = -ETIMEDOUT;
891 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
892 * @pipe: ISP pipeline
893 * @state: Stream state (stopped, single shot or continuous)
895 * Set the pipeline to the given stream state. Pipelines can be started in
896 * single-shot or continuous mode.
898 * Return 0 if successful, or the return value of the failed video::s_stream
899 * operation otherwise. The pipeline state is not updated when the operation
900 * fails, except when stopping the pipeline.
902 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
903 enum isp_pipeline_stream_state state)
907 if (state == ISP_PIPELINE_STREAM_STOPPED)
908 ret = isp_pipeline_disable(pipe);
910 ret = isp_pipeline_enable(pipe, state);
912 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
913 pipe->stream_state = state;
919 * isp_pipeline_resume - Resume streaming on a pipeline
920 * @pipe: ISP pipeline
922 * Resume video output and input and re-enable pipeline.
924 static void isp_pipeline_resume(struct isp_pipeline *pipe)
926 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
928 omap3isp_video_resume(pipe->output, !singleshot);
930 omap3isp_video_resume(pipe->input, 0);
931 isp_pipeline_enable(pipe, pipe->stream_state);
935 * isp_pipeline_suspend - Suspend streaming on a pipeline
936 * @pipe: ISP pipeline
940 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
942 isp_pipeline_disable(pipe);
946 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
948 * @me: ISP module's media entity
950 * Returns 1 if the entity has an enabled link to the output video node or 0
951 * otherwise. It's true only while pipeline can have no more than one output
954 static int isp_pipeline_is_last(struct media_entity *me)
956 struct isp_pipeline *pipe;
957 struct media_pad *pad;
961 pipe = to_isp_pipeline(me);
962 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
964 pad = media_entity_remote_source(&pipe->output->pad);
965 return pad->entity == me;
969 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
970 * @me: ISP module's media entity
972 * Suspend the whole pipeline if module's entity has an enabled link to the
973 * output video node. It works only while pipeline can have no more than one
976 static void isp_suspend_module_pipeline(struct media_entity *me)
978 if (isp_pipeline_is_last(me))
979 isp_pipeline_suspend(to_isp_pipeline(me));
983 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
984 * @me: ISP module's media entity
986 * Resume the whole pipeline if module's entity has an enabled link to the
987 * output video node. It works only while pipeline can have no more than one
990 static void isp_resume_module_pipeline(struct media_entity *me)
992 if (isp_pipeline_is_last(me))
993 isp_pipeline_resume(to_isp_pipeline(me));
997 * isp_suspend_modules - Suspend ISP submodules.
998 * @isp: OMAP3 ISP device
1000 * Returns 0 if suspend left in idle state all the submodules properly,
1001 * or returns 1 if a general Reset is required to suspend the submodules.
1003 static int isp_suspend_modules(struct isp_device *isp)
1005 unsigned long timeout;
1007 omap3isp_stat_suspend(&isp->isp_aewb);
1008 omap3isp_stat_suspend(&isp->isp_af);
1009 omap3isp_stat_suspend(&isp->isp_hist);
1010 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1011 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1012 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1013 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1014 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1016 timeout = jiffies + ISP_STOP_TIMEOUT;
1017 while (omap3isp_stat_busy(&isp->isp_af)
1018 || omap3isp_stat_busy(&isp->isp_aewb)
1019 || omap3isp_stat_busy(&isp->isp_hist)
1020 || omap3isp_preview_busy(&isp->isp_prev)
1021 || omap3isp_resizer_busy(&isp->isp_res)
1022 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1023 if (time_after(jiffies, timeout)) {
1024 dev_info(isp->dev, "can't stop modules.\n");
1034 * isp_resume_modules - Resume ISP submodules.
1035 * @isp: OMAP3 ISP device
1037 static void isp_resume_modules(struct isp_device *isp)
1039 omap3isp_stat_resume(&isp->isp_aewb);
1040 omap3isp_stat_resume(&isp->isp_af);
1041 omap3isp_stat_resume(&isp->isp_hist);
1042 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1043 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1044 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1045 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1046 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1050 * isp_reset - Reset ISP with a timeout wait for idle.
1051 * @isp: OMAP3 ISP device
1053 static int isp_reset(struct isp_device *isp)
1055 unsigned long timeout = 0;
1058 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1059 | ISP_SYSCONFIG_SOFTRESET,
1060 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1061 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1062 ISP_SYSSTATUS) & 0x1)) {
1063 if (timeout++ > 10000) {
1064 dev_alert(isp->dev, "cannot reset ISP\n");
1075 * isp_save_context - Saves the values of the ISP module registers.
1076 * @isp: OMAP3 ISP device
1077 * @reg_list: Structure containing pairs of register address and value to
1081 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1083 struct isp_reg *next = reg_list;
1085 for (; next->reg != ISP_TOK_TERM; next++)
1086 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1090 * isp_restore_context - Restores the values of the ISP module registers.
1091 * @isp: OMAP3 ISP device
1092 * @reg_list: Structure containing pairs of register address and value to
1096 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1098 struct isp_reg *next = reg_list;
1100 for (; next->reg != ISP_TOK_TERM; next++)
1101 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1105 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1106 * @isp: OMAP3 ISP device
1108 * Routine for saving the context of each module in the ISP.
1109 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1111 static void isp_save_ctx(struct isp_device *isp)
1113 isp_save_context(isp, isp_reg_list);
1114 omap_iommu_save_ctx(isp->dev);
1118 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1119 * @isp: OMAP3 ISP device
1121 * Routine for restoring the context of each module in the ISP.
1122 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1124 static void isp_restore_ctx(struct isp_device *isp)
1126 isp_restore_context(isp, isp_reg_list);
1127 omap_iommu_restore_ctx(isp->dev);
1128 omap3isp_ccdc_restore_context(isp);
1129 omap3isp_preview_restore_context(isp);
1132 /* -----------------------------------------------------------------------------
1133 * SBL resources management
1135 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1136 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1137 OMAP3_ISP_SBL_PREVIEW_READ | \
1138 OMAP3_ISP_SBL_RESIZER_READ)
1139 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1140 OMAP3_ISP_SBL_CSI2A_WRITE | \
1141 OMAP3_ISP_SBL_CSI2C_WRITE | \
1142 OMAP3_ISP_SBL_CCDC_WRITE | \
1143 OMAP3_ISP_SBL_PREVIEW_WRITE)
1145 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1149 isp->sbl_resources |= res;
1151 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1152 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1154 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1155 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1157 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1158 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1160 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1161 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1163 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1164 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1166 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1167 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1169 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1172 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1176 isp->sbl_resources &= ~res;
1178 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1179 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1181 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1182 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1184 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1185 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1187 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1188 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1190 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1191 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1193 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1194 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1196 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1200 * isp_module_sync_idle - Helper to sync module with its idle state
1201 * @me: ISP submodule's media entity
1202 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1203 * @stopping: flag which tells module wants to stop
1205 * This function checks if ISP submodule needs to wait for next interrupt. If
1206 * yes, makes the caller to sleep while waiting for such event.
1208 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1211 struct isp_pipeline *pipe = to_isp_pipeline(me);
1213 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1214 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1215 !isp_pipeline_ready(pipe)))
1219 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1220 * scenario. We'll call it here to avoid race conditions.
1222 atomic_set(stopping, 1);
1226 * If module is the last one, it's writing to memory. In this case,
1227 * it's necessary to check if the module is already paused due to
1228 * DMA queue underrun or if it has to wait for next interrupt to be
1230 * If it isn't the last one, the function won't sleep but *stopping
1231 * will still be set to warn next submodule caller's interrupt the
1232 * module wants to be idle.
1234 if (isp_pipeline_is_last(me)) {
1235 struct isp_video *video = pipe->output;
1236 unsigned long flags;
1237 spin_lock_irqsave(&video->queue->irqlock, flags);
1238 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1239 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1240 atomic_set(stopping, 0);
1244 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1245 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1246 msecs_to_jiffies(1000))) {
1247 atomic_set(stopping, 0);
1257 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1258 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1259 * @stopping: flag which tells module wants to stop
1261 * This function checks if ISP submodule was stopping. In case of yes, it
1262 * notices the caller by setting stopping to 0 and waking up the wait queue.
1263 * Returns 1 if it was stopping or 0 otherwise.
1265 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1268 if (atomic_cmpxchg(stopping, 1, 0)) {
1276 /* --------------------------------------------------------------------------
1280 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1281 ISPCTRL_HIST_CLK_EN | \
1282 ISPCTRL_RSZ_CLK_EN | \
1283 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1284 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1286 static void __isp_subclk_update(struct isp_device *isp)
1290 /* AEWB and AF share the same clock. */
1291 if (isp->subclk_resources &
1292 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1293 clk |= ISPCTRL_H3A_CLK_EN;
1295 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1296 clk |= ISPCTRL_HIST_CLK_EN;
1298 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1299 clk |= ISPCTRL_RSZ_CLK_EN;
1301 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1304 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1305 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1307 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1308 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1310 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1311 ISPCTRL_CLKS_MASK, clk);
1314 void omap3isp_subclk_enable(struct isp_device *isp,
1315 enum isp_subclk_resource res)
1317 isp->subclk_resources |= res;
1319 __isp_subclk_update(isp);
1322 void omap3isp_subclk_disable(struct isp_device *isp,
1323 enum isp_subclk_resource res)
1325 isp->subclk_resources &= ~res;
1327 __isp_subclk_update(isp);
1331 * isp_enable_clocks - Enable ISP clocks
1332 * @isp: OMAP3 ISP device
1334 * Return 0 if successful, or clk_prepare_enable return value if any of them
1337 static int isp_enable_clocks(struct isp_device *isp)
1344 * cam_mclk clock chain:
1345 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1347 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1348 * set to the same value. Hence the rate set for dpll4_m5
1349 * has to be twice of what is set on OMAP3430 to get
1350 * the required value for cam_mclk
1352 divisor = isp->revision == ISP_REVISION_15_0 ? 1 : 2;
1354 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1356 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1357 goto out_clk_enable_ick;
1359 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1360 CM_CAM_MCLK_HZ/divisor);
1362 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1363 goto out_clk_enable_mclk;
1365 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1367 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1368 goto out_clk_enable_mclk;
1370 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1371 if (rate != CM_CAM_MCLK_HZ)
1372 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1374 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1375 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1377 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1378 goto out_clk_enable_csi2_fclk;
1382 out_clk_enable_csi2_fclk:
1383 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1384 out_clk_enable_mclk:
1385 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1391 * isp_disable_clocks - Disable ISP clocks
1392 * @isp: OMAP3 ISP device
1394 static void isp_disable_clocks(struct isp_device *isp)
1396 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1397 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1398 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1401 static const char *isp_clocks[] = {
1409 static void isp_put_clocks(struct isp_device *isp)
1413 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1414 if (isp->clock[i]) {
1415 clk_put(isp->clock[i]);
1416 isp->clock[i] = NULL;
1421 static int isp_get_clocks(struct isp_device *isp)
1426 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1427 clk = clk_get(isp->dev, isp_clocks[i]);
1429 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1430 isp_put_clocks(isp);
1431 return PTR_ERR(clk);
1434 isp->clock[i] = clk;
1441 * omap3isp_get - Acquire the ISP resource.
1443 * Initializes the clocks for the first acquire.
1445 * Increment the reference count on the ISP. If the first reference is taken,
1446 * enable clocks and power-up all submodules.
1448 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1450 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1452 struct isp_device *__isp = isp;
1457 mutex_lock(&isp->isp_mutex);
1458 if (isp->ref_count > 0)
1461 if (isp_enable_clocks(isp) < 0) {
1466 /* We don't want to restore context before saving it! */
1467 if (isp->has_context)
1468 isp_restore_ctx(isp);
1471 isp_enable_interrupts(isp);
1476 mutex_unlock(&isp->isp_mutex);
1481 struct isp_device *omap3isp_get(struct isp_device *isp)
1483 return __omap3isp_get(isp, true);
1487 * omap3isp_put - Release the ISP
1489 * Decrement the reference count on the ISP. If the last reference is released,
1490 * power-down all submodules, disable clocks and free temporary buffers.
1492 void omap3isp_put(struct isp_device *isp)
1497 mutex_lock(&isp->isp_mutex);
1498 BUG_ON(isp->ref_count == 0);
1499 if (--isp->ref_count == 0) {
1500 isp_disable_interrupts(isp);
1503 isp->has_context = 1;
1505 /* Reset the ISP if an entity has failed to stop. This is the
1506 * only way to recover from such conditions.
1510 isp_disable_clocks(isp);
1512 mutex_unlock(&isp->isp_mutex);
1515 /* --------------------------------------------------------------------------
1516 * Platform device driver
1520 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1521 * @isp: OMAP3 ISP device
1523 #define ISP_PRINT_REGISTER(isp, name)\
1524 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1525 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1526 #define SBL_PRINT_REGISTER(isp, name)\
1527 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1528 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1530 void omap3isp_print_status(struct isp_device *isp)
1532 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1534 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1535 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1536 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1537 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1538 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1539 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1540 ISP_PRINT_REGISTER(isp, CTRL);
1541 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1542 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1543 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1544 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1545 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1546 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1547 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1548 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1550 SBL_PRINT_REGISTER(isp, PCR);
1551 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1553 dev_dbg(isp->dev, "--------------------------------------------\n");
1559 * Power management support.
1561 * As the ISP can't properly handle an input video stream interruption on a non
1562 * frame boundary, the ISP pipelines need to be stopped before sensors get
1563 * suspended. However, as suspending the sensors can require a running clock,
1564 * which can be provided by the ISP, the ISP can't be completely suspended
1565 * before the sensor.
1567 * To solve this problem power management support is split into prepare/complete
1568 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1569 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1570 * resume(), and the the pipelines are restarted in complete().
1572 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1575 static int isp_pm_prepare(struct device *dev)
1577 struct isp_device *isp = dev_get_drvdata(dev);
1580 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1582 if (isp->ref_count == 0)
1585 reset = isp_suspend_modules(isp);
1586 isp_disable_interrupts(isp);
1594 static int isp_pm_suspend(struct device *dev)
1596 struct isp_device *isp = dev_get_drvdata(dev);
1598 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1601 isp_disable_clocks(isp);
1606 static int isp_pm_resume(struct device *dev)
1608 struct isp_device *isp = dev_get_drvdata(dev);
1610 if (isp->ref_count == 0)
1613 return isp_enable_clocks(isp);
1616 static void isp_pm_complete(struct device *dev)
1618 struct isp_device *isp = dev_get_drvdata(dev);
1620 if (isp->ref_count == 0)
1623 isp_restore_ctx(isp);
1624 isp_enable_interrupts(isp);
1625 isp_resume_modules(isp);
1630 #define isp_pm_prepare NULL
1631 #define isp_pm_suspend NULL
1632 #define isp_pm_resume NULL
1633 #define isp_pm_complete NULL
1635 #endif /* CONFIG_PM */
1637 static void isp_unregister_entities(struct isp_device *isp)
1639 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1640 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1641 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1642 omap3isp_preview_unregister_entities(&isp->isp_prev);
1643 omap3isp_resizer_unregister_entities(&isp->isp_res);
1644 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1645 omap3isp_stat_unregister_entities(&isp->isp_af);
1646 omap3isp_stat_unregister_entities(&isp->isp_hist);
1648 v4l2_device_unregister(&isp->v4l2_dev);
1649 media_device_unregister(&isp->media_dev);
1653 * isp_register_subdev_group - Register a group of subdevices
1654 * @isp: OMAP3 ISP device
1655 * @board_info: I2C subdevs board information array
1657 * Register all I2C subdevices in the board_info array. The array must be
1658 * terminated by a NULL entry, and the first entry must be the sensor.
1660 * Return a pointer to the sensor media entity if it has been successfully
1661 * registered, or NULL otherwise.
1663 static struct v4l2_subdev *
1664 isp_register_subdev_group(struct isp_device *isp,
1665 struct isp_subdev_i2c_board_info *board_info)
1667 struct v4l2_subdev *sensor = NULL;
1670 if (board_info->board_info == NULL)
1673 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1674 struct v4l2_subdev *subdev;
1675 struct i2c_adapter *adapter;
1677 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1678 if (adapter == NULL) {
1679 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
1680 "device %s\n", __func__,
1681 board_info->i2c_adapter_id,
1682 board_info->board_info->type);
1686 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1687 board_info->board_info, NULL);
1688 if (subdev == NULL) {
1689 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
1690 __func__, board_info->board_info->type);
1701 static int isp_register_entities(struct isp_device *isp)
1703 struct isp_platform_data *pdata = isp->pdata;
1704 struct isp_v4l2_subdevs_group *subdevs;
1707 isp->media_dev.dev = isp->dev;
1708 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1709 sizeof(isp->media_dev.model));
1710 isp->media_dev.hw_revision = isp->revision;
1711 isp->media_dev.link_notify = isp_pipeline_link_notify;
1712 ret = media_device_register(&isp->media_dev);
1714 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1719 isp->v4l2_dev.mdev = &isp->media_dev;
1720 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1722 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1727 /* Register internal entities */
1728 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1732 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1736 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1740 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1745 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1749 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1753 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1757 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1761 /* Register external entities */
1762 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1763 struct v4l2_subdev *sensor;
1764 struct media_entity *input;
1769 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1773 sensor->host_priv = subdevs;
1775 /* Connect the sensor to the correct interface module. Parallel
1776 * sensors are connected directly to the CCDC, while serial
1777 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1778 * through CSIPHY1 or CSIPHY2.
1780 switch (subdevs->interface) {
1781 case ISP_INTERFACE_PARALLEL:
1782 input = &isp->isp_ccdc.subdev.entity;
1783 pad = CCDC_PAD_SINK;
1787 case ISP_INTERFACE_CSI2A_PHY2:
1788 input = &isp->isp_csi2a.subdev.entity;
1789 pad = CSI2_PAD_SINK;
1790 flags = MEDIA_LNK_FL_IMMUTABLE
1791 | MEDIA_LNK_FL_ENABLED;
1794 case ISP_INTERFACE_CCP2B_PHY1:
1795 case ISP_INTERFACE_CCP2B_PHY2:
1796 input = &isp->isp_ccp2.subdev.entity;
1797 pad = CCP2_PAD_SINK;
1801 case ISP_INTERFACE_CSI2C_PHY1:
1802 input = &isp->isp_csi2c.subdev.entity;
1803 pad = CSI2_PAD_SINK;
1804 flags = MEDIA_LNK_FL_IMMUTABLE
1805 | MEDIA_LNK_FL_ENABLED;
1809 dev_err(isp->dev, "%s: invalid interface type %u\n",
1810 __func__, subdevs->interface);
1815 for (i = 0; i < sensor->entity.num_pads; i++) {
1816 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1819 if (i == sensor->entity.num_pads) {
1821 "%s: no source pad in external entity\n",
1827 ret = media_entity_create_link(&sensor->entity, i, input, pad,
1833 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1837 isp_unregister_entities(isp);
1842 static void isp_cleanup_modules(struct isp_device *isp)
1844 omap3isp_h3a_aewb_cleanup(isp);
1845 omap3isp_h3a_af_cleanup(isp);
1846 omap3isp_hist_cleanup(isp);
1847 omap3isp_resizer_cleanup(isp);
1848 omap3isp_preview_cleanup(isp);
1849 omap3isp_ccdc_cleanup(isp);
1850 omap3isp_ccp2_cleanup(isp);
1851 omap3isp_csi2_cleanup(isp);
1854 static int isp_initialize_modules(struct isp_device *isp)
1858 ret = omap3isp_csiphy_init(isp);
1860 dev_err(isp->dev, "CSI PHY initialization failed\n");
1864 ret = omap3isp_csi2_init(isp);
1866 dev_err(isp->dev, "CSI2 initialization failed\n");
1870 ret = omap3isp_ccp2_init(isp);
1872 dev_err(isp->dev, "CCP2 initialization failed\n");
1876 ret = omap3isp_ccdc_init(isp);
1878 dev_err(isp->dev, "CCDC initialization failed\n");
1882 ret = omap3isp_preview_init(isp);
1884 dev_err(isp->dev, "Preview initialization failed\n");
1888 ret = omap3isp_resizer_init(isp);
1890 dev_err(isp->dev, "Resizer initialization failed\n");
1894 ret = omap3isp_hist_init(isp);
1896 dev_err(isp->dev, "Histogram initialization failed\n");
1900 ret = omap3isp_h3a_aewb_init(isp);
1902 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1903 goto error_h3a_aewb;
1906 ret = omap3isp_h3a_af_init(isp);
1908 dev_err(isp->dev, "H3A AF initialization failed\n");
1912 /* Connect the submodules. */
1913 ret = media_entity_create_link(
1914 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1915 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1919 ret = media_entity_create_link(
1920 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1921 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1925 ret = media_entity_create_link(
1926 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1927 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1931 ret = media_entity_create_link(
1932 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1933 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1937 ret = media_entity_create_link(
1938 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1939 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1943 ret = media_entity_create_link(
1944 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1945 &isp->isp_aewb.subdev.entity, 0,
1946 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1950 ret = media_entity_create_link(
1951 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1952 &isp->isp_af.subdev.entity, 0,
1953 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1957 ret = media_entity_create_link(
1958 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1959 &isp->isp_hist.subdev.entity, 0,
1960 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1967 omap3isp_h3a_af_cleanup(isp);
1969 omap3isp_h3a_aewb_cleanup(isp);
1971 omap3isp_hist_cleanup(isp);
1973 omap3isp_resizer_cleanup(isp);
1975 omap3isp_preview_cleanup(isp);
1977 omap3isp_ccdc_cleanup(isp);
1979 omap3isp_ccp2_cleanup(isp);
1981 omap3isp_csi2_cleanup(isp);
1988 * isp_remove - Remove ISP platform device
1989 * @pdev: Pointer to ISP platform device
1993 static int isp_remove(struct platform_device *pdev)
1995 struct isp_device *isp = platform_get_drvdata(pdev);
1998 isp_unregister_entities(isp);
1999 isp_cleanup_modules(isp);
2001 __omap3isp_get(isp, false);
2002 iommu_detach_device(isp->domain, &pdev->dev);
2003 iommu_domain_free(isp->domain);
2007 free_irq(isp->irq_num, isp);
2008 isp_put_clocks(isp);
2010 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2011 if (isp->mmio_base[i]) {
2012 iounmap(isp->mmio_base[i]);
2013 isp->mmio_base[i] = NULL;
2016 if (isp->mmio_base_phys[i]) {
2017 release_mem_region(isp->mmio_base_phys[i],
2019 isp->mmio_base_phys[i] = 0;
2023 regulator_put(isp->isp_csiphy1.vdd);
2024 regulator_put(isp->isp_csiphy2.vdd);
2030 static int isp_map_mem_resource(struct platform_device *pdev,
2031 struct isp_device *isp,
2032 enum isp_mem_resources res)
2034 struct resource *mem;
2036 /* request the mem region for the camera registers */
2038 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2040 dev_err(isp->dev, "no mem resource?\n");
2044 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2046 "cannot reserve camera register I/O region\n");
2049 isp->mmio_base_phys[res] = mem->start;
2050 isp->mmio_size[res] = resource_size(mem);
2052 /* map the region */
2053 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2054 isp->mmio_size[res]);
2055 if (!isp->mmio_base[res]) {
2056 dev_err(isp->dev, "cannot map camera register I/O region\n");
2064 * isp_probe - Probe ISP platform device
2065 * @pdev: Pointer to ISP platform device
2067 * Returns 0 if successful,
2068 * -ENOMEM if no memory available,
2069 * -ENODEV if no platform device resources found
2070 * or no space for remapping registers,
2071 * -EINVAL if couldn't install ISR,
2072 * or clk_get return error value.
2074 static int isp_probe(struct platform_device *pdev)
2076 struct isp_platform_data *pdata = pdev->dev.platform_data;
2077 struct isp_device *isp;
2084 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2086 dev_err(&pdev->dev, "could not allocate memory\n");
2090 isp->autoidle = autoidle;
2091 isp->platform_cb.set_xclk = isp_set_xclk;
2093 mutex_init(&isp->isp_mutex);
2094 spin_lock_init(&isp->stat_lock);
2096 isp->dev = &pdev->dev;
2100 isp->raw_dmamask = DMA_BIT_MASK(32);
2101 isp->dev->dma_mask = &isp->raw_dmamask;
2102 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2104 platform_set_drvdata(pdev, isp);
2107 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2108 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2112 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2113 * manually to read the revision before calling __omap3isp_get().
2115 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2119 ret = isp_get_clocks(isp);
2123 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2127 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2128 dev_info(isp->dev, "Revision %d.%d found\n",
2129 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2131 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2133 if (__omap3isp_get(isp, false) == NULL) {
2138 ret = isp_reset(isp);
2142 /* Memory resources */
2143 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2144 if (isp->revision == isp_res_maps[m].isp_rev)
2147 if (m == ARRAY_SIZE(isp_res_maps)) {
2148 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2149 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2154 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2155 if (isp_res_maps[m].map & 1 << i) {
2156 ret = isp_map_mem_resource(pdev, isp, i);
2162 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2164 dev_err(isp->dev, "can't alloc iommu domain\n");
2169 ret = iommu_attach_device(isp->domain, &pdev->dev);
2171 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2176 isp->irq_num = platform_get_irq(pdev, 0);
2177 if (isp->irq_num <= 0) {
2178 dev_err(isp->dev, "No IRQ resource\n");
2183 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2184 dev_err(isp->dev, "Unable to request IRQ\n");
2190 ret = isp_initialize_modules(isp);
2194 ret = isp_register_entities(isp);
2198 isp_core_init(isp, 1);
2204 isp_cleanup_modules(isp);
2206 free_irq(isp->irq_num, isp);
2208 iommu_detach_device(isp->domain, &pdev->dev);
2210 iommu_domain_free(isp->domain);
2214 isp_put_clocks(isp);
2216 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2217 if (isp->mmio_base[i]) {
2218 iounmap(isp->mmio_base[i]);
2219 isp->mmio_base[i] = NULL;
2222 if (isp->mmio_base_phys[i]) {
2223 release_mem_region(isp->mmio_base_phys[i],
2225 isp->mmio_base_phys[i] = 0;
2228 regulator_put(isp->isp_csiphy2.vdd);
2229 regulator_put(isp->isp_csiphy1.vdd);
2230 platform_set_drvdata(pdev, NULL);
2232 mutex_destroy(&isp->isp_mutex);
2238 static const struct dev_pm_ops omap3isp_pm_ops = {
2239 .prepare = isp_pm_prepare,
2240 .suspend = isp_pm_suspend,
2241 .resume = isp_pm_resume,
2242 .complete = isp_pm_complete,
2245 static struct platform_device_id omap3isp_id_table[] = {
2249 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2251 static struct platform_driver omap3isp_driver = {
2253 .remove = isp_remove,
2254 .id_table = omap3isp_id_table,
2256 .owner = THIS_MODULE,
2258 .pm = &omap3isp_pm_ops,
2262 module_platform_driver(omap3isp_driver);
2264 MODULE_AUTHOR("Nokia Corporation");
2265 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2266 MODULE_LICENSE("GPL");
2267 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);