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V4L/DVB: cx25840: support new vbi ops to set/get VBI format
[karo-tx-linux.git] / drivers / media / video / cx25840 / cx25840-core.c
1 /* cx25840 - Conexant CX25840 audio/video decoder driver
2  *
3  * Copyright (C) 2004 Ulf Eklund
4  *
5  * Based on the saa7115 driver and on the first verison of Chris Kennedy's
6  * cx25840 driver.
7  *
8  * Changes by Tyler Trafford <tatrafford@comcast.net>
9  *    - cleanup/rewrite for V4L2 API (2005)
10  *
11  * VBI support by Hans Verkuil <hverkuil@xs4all.nl>.
12  *
13  * NTSC sliced VBI support by Christopher Neufeld <television@cneufeld.ca>
14  * with additional fixes by Hans Verkuil <hverkuil@xs4all.nl>.
15  *
16  * CX23885 support by Steven Toth <stoth@linuxtv.org>.
17  *
18  * This program is free software; you can redistribute it and/or
19  * modify it under the terms of the GNU General Public License
20  * as published by the Free Software Foundation; either version 2
21  * of the License, or (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
31  */
32
33
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/slab.h>
37 #include <linux/videodev2.h>
38 #include <linux/i2c.h>
39 #include <linux/delay.h>
40 #include <media/v4l2-common.h>
41 #include <media/v4l2-chip-ident.h>
42 #include <media/v4l2-i2c-drv.h>
43 #include <media/cx25840.h>
44
45 #include "cx25840-core.h"
46
47 MODULE_DESCRIPTION("Conexant CX25840 audio/video decoder driver");
48 MODULE_AUTHOR("Ulf Eklund, Chris Kennedy, Hans Verkuil, Tyler Trafford");
49 MODULE_LICENSE("GPL");
50
51 static int cx25840_debug;
52
53 module_param_named(debug,cx25840_debug, int, 0644);
54
55 MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
56
57
58 /* ----------------------------------------------------------------------- */
59
60 int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
61 {
62         u8 buffer[3];
63         buffer[0] = addr >> 8;
64         buffer[1] = addr & 0xff;
65         buffer[2] = value;
66         return i2c_master_send(client, buffer, 3);
67 }
68
69 int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
70 {
71         u8 buffer[6];
72         buffer[0] = addr >> 8;
73         buffer[1] = addr & 0xff;
74         buffer[2] = value & 0xff;
75         buffer[3] = (value >> 8) & 0xff;
76         buffer[4] = (value >> 16) & 0xff;
77         buffer[5] = value >> 24;
78         return i2c_master_send(client, buffer, 6);
79 }
80
81 u8 cx25840_read(struct i2c_client * client, u16 addr)
82 {
83         u8 buffer[2];
84         buffer[0] = addr >> 8;
85         buffer[1] = addr & 0xff;
86
87         if (i2c_master_send(client, buffer, 2) < 2)
88                 return 0;
89
90         if (i2c_master_recv(client, buffer, 1) < 1)
91                 return 0;
92
93         return buffer[0];
94 }
95
96 u32 cx25840_read4(struct i2c_client * client, u16 addr)
97 {
98         u8 buffer[4];
99         buffer[0] = addr >> 8;
100         buffer[1] = addr & 0xff;
101
102         if (i2c_master_send(client, buffer, 2) < 2)
103                 return 0;
104
105         if (i2c_master_recv(client, buffer, 4) < 4)
106                 return 0;
107
108         return (buffer[3] << 24) | (buffer[2] << 16) |
109             (buffer[1] << 8) | buffer[0];
110 }
111
112 int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned and_mask,
113                    u8 or_value)
114 {
115         return cx25840_write(client, addr,
116                              (cx25840_read(client, addr) & and_mask) |
117                              or_value);
118 }
119
120 /* ----------------------------------------------------------------------- */
121
122 static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
123                                                 enum cx25840_audio_input aud_input);
124
125 /* ----------------------------------------------------------------------- */
126
127 static void init_dll1(struct i2c_client *client)
128 {
129         /* This is the Hauppauge sequence used to
130          * initialize the Delay Lock Loop 1 (ADC DLL). */
131         cx25840_write(client, 0x159, 0x23);
132         cx25840_write(client, 0x15a, 0x87);
133         cx25840_write(client, 0x15b, 0x06);
134         udelay(10);
135         cx25840_write(client, 0x159, 0xe1);
136         udelay(10);
137         cx25840_write(client, 0x15a, 0x86);
138         cx25840_write(client, 0x159, 0xe0);
139         cx25840_write(client, 0x159, 0xe1);
140         cx25840_write(client, 0x15b, 0x10);
141 }
142
143 static void init_dll2(struct i2c_client *client)
144 {
145         /* This is the Hauppauge sequence used to
146          * initialize the Delay Lock Loop 2 (ADC DLL). */
147         cx25840_write(client, 0x15d, 0xe3);
148         cx25840_write(client, 0x15e, 0x86);
149         cx25840_write(client, 0x15f, 0x06);
150         udelay(10);
151         cx25840_write(client, 0x15d, 0xe1);
152         cx25840_write(client, 0x15d, 0xe0);
153         cx25840_write(client, 0x15d, 0xe1);
154 }
155
156 static void cx25836_initialize(struct i2c_client *client)
157 {
158         /* reset configuration is described on page 3-77 of the CX25836 datasheet */
159         /* 2. */
160         cx25840_and_or(client, 0x000, ~0x01, 0x01);
161         cx25840_and_or(client, 0x000, ~0x01, 0x00);
162         /* 3a. */
163         cx25840_and_or(client, 0x15a, ~0x70, 0x00);
164         /* 3b. */
165         cx25840_and_or(client, 0x15b, ~0x1e, 0x06);
166         /* 3c. */
167         cx25840_and_or(client, 0x159, ~0x02, 0x02);
168         /* 3d. */
169         udelay(10);
170         /* 3e. */
171         cx25840_and_or(client, 0x159, ~0x02, 0x00);
172         /* 3f. */
173         cx25840_and_or(client, 0x159, ~0xc0, 0xc0);
174         /* 3g. */
175         cx25840_and_or(client, 0x159, ~0x01, 0x00);
176         cx25840_and_or(client, 0x159, ~0x01, 0x01);
177         /* 3h. */
178         cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
179 }
180
181 static void cx25840_work_handler(struct work_struct *work)
182 {
183         struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
184         cx25840_loadfw(state->c);
185         wake_up(&state->fw_wait);
186 }
187
188 static void cx25840_initialize(struct i2c_client *client)
189 {
190         DEFINE_WAIT(wait);
191         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
192         struct workqueue_struct *q;
193
194         /* datasheet startup in numbered steps, refer to page 3-77 */
195         /* 2. */
196         cx25840_and_or(client, 0x803, ~0x10, 0x00);
197         /* The default of this register should be 4, but I get 0 instead.
198          * Set this register to 4 manually. */
199         cx25840_write(client, 0x000, 0x04);
200         /* 3. */
201         init_dll1(client);
202         init_dll2(client);
203         cx25840_write(client, 0x136, 0x0a);
204         /* 4. */
205         cx25840_write(client, 0x13c, 0x01);
206         cx25840_write(client, 0x13c, 0x00);
207         /* 5. */
208         /* Do the firmware load in a work handler to prevent.
209            Otherwise the kernel is blocked waiting for the
210            bit-banging i2c interface to finish uploading the
211            firmware. */
212         INIT_WORK(&state->fw_work, cx25840_work_handler);
213         init_waitqueue_head(&state->fw_wait);
214         q = create_singlethread_workqueue("cx25840_fw");
215         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
216         queue_work(q, &state->fw_work);
217         schedule();
218         finish_wait(&state->fw_wait, &wait);
219         destroy_workqueue(q);
220
221         /* 6. */
222         cx25840_write(client, 0x115, 0x8c);
223         cx25840_write(client, 0x116, 0x07);
224         cx25840_write(client, 0x118, 0x02);
225         /* 7. */
226         cx25840_write(client, 0x4a5, 0x80);
227         cx25840_write(client, 0x4a5, 0x00);
228         cx25840_write(client, 0x402, 0x00);
229         /* 8. */
230         cx25840_and_or(client, 0x401, ~0x18, 0);
231         cx25840_and_or(client, 0x4a2, ~0x10, 0x10);
232         /* steps 8c and 8d are done in change_input() */
233         /* 10. */
234         cx25840_write(client, 0x8d3, 0x1f);
235         cx25840_write(client, 0x8e3, 0x03);
236
237         cx25840_std_setup(client);
238
239         /* trial and error says these are needed to get audio */
240         cx25840_write(client, 0x914, 0xa0);
241         cx25840_write(client, 0x918, 0xa0);
242         cx25840_write(client, 0x919, 0x01);
243
244         /* stereo prefered */
245         cx25840_write(client, 0x809, 0x04);
246         /* AC97 shift */
247         cx25840_write(client, 0x8cf, 0x0f);
248
249         /* (re)set input */
250         set_input(client, state->vid_input, state->aud_input);
251
252         /* start microcontroller */
253         cx25840_and_or(client, 0x803, ~0x10, 0x10);
254 }
255
256 static void cx23885_initialize(struct i2c_client *client)
257 {
258         DEFINE_WAIT(wait);
259         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
260         struct workqueue_struct *q;
261
262         /*
263          * Come out of digital power down
264          * The CX23888, at least, needs this, otherwise registers aside from
265          * 0x0-0x2 can't be read or written.
266          */
267         cx25840_write(client, 0x000, 0);
268
269         /* Internal Reset */
270         cx25840_and_or(client, 0x102, ~0x01, 0x01);
271         cx25840_and_or(client, 0x102, ~0x01, 0x00);
272
273         /* Stop microcontroller */
274         cx25840_and_or(client, 0x803, ~0x10, 0x00);
275
276         /* DIF in reset? */
277         cx25840_write(client, 0x398, 0);
278
279         /*
280          * Trust the default xtal, no division
281          * '885: 28.636363... MHz
282          * '887: 25.000000 MHz
283          * '888: 50.000000 MHz
284          */
285         cx25840_write(client, 0x2, 0x76);
286
287         /* Power up all the PLL's and DLL */
288         cx25840_write(client, 0x1, 0x40);
289
290         /* Sys PLL */
291         switch (state->id) {
292         case V4L2_IDENT_CX23888_AV:
293                 /*
294                  * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
295                  * 572.73 MHz before post divide
296                  */
297                 cx25840_write4(client, 0x11c, 0x00e8ba26);
298                 cx25840_write4(client, 0x118, 0x0000040b);
299                 break;
300         case V4L2_IDENT_CX23887_AV:
301                 /*
302                  * 25.0 MHz * (0x16 + 0x1d1744c/0x2000000)/4 = 5 * 28.636363 MHz
303                  * 572.73 MHz before post divide
304                  */
305                 cx25840_write4(client, 0x11c, 0x01d1744c);
306                 cx25840_write4(client, 0x118, 0x00000416);
307                 break;
308         case V4L2_IDENT_CX23885_AV:
309         default:
310                 /*
311                  * 28.636363 MHz * (0x14 + 0x0/0x2000000)/4 = 5 * 28.636363 MHz
312                  * 572.73 MHz before post divide
313                  */
314                 cx25840_write4(client, 0x11c, 0x00000000);
315                 cx25840_write4(client, 0x118, 0x00000414);
316                 break;
317         }
318
319         /* Disable DIF bypass */
320         cx25840_write4(client, 0x33c, 0x00000001);
321
322         /* DIF Src phase inc */
323         cx25840_write4(client, 0x340, 0x0df7df83);
324
325         /*
326          * Vid PLL
327          * Setup for a BT.656 pixel clock of 13.5 Mpixels/second
328          *
329          * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz
330          * 432.0 MHz before post divide
331          */
332         cx25840_write4(client, 0x10c, 0x002be2c9);
333         cx25840_write4(client, 0x108, 0x0000040f);
334
335         /* Luma */
336         cx25840_write4(client, 0x414, 0x00107d12);
337
338         /* Chroma */
339         cx25840_write4(client, 0x420, 0x3d008282);
340
341         /*
342          * Aux PLL
343          * Initial setup for audio sample clock:
344          * 48 ksps, 16 bits/sample, x160 multiplier = 122.88 MHz
345          * Intial I2S output/master clock(?):
346          * 48 ksps, 16 bits/sample, x16 multiplier = 12.288 MHz
347          */
348         switch (state->id) {
349         case V4L2_IDENT_CX23888_AV:
350                 /*
351                  * 50.0 MHz * (0x7 + 0x0bedfa4/0x2000000)/3 = 122.88 MHz
352                  * 368.64 MHz before post divide
353                  * 122.88 MHz / 0xa = 12.288 MHz
354                  */
355                 cx25840_write4(client, 0x114, 0x00bedfa4);
356                 cx25840_write4(client, 0x110, 0x000a0307);
357                 break;
358         case V4L2_IDENT_CX23887_AV:
359                 /*
360                  * 25.0 MHz * (0xe + 0x17dbf48/0x2000000)/3 = 122.88 MHz
361                  * 368.64 MHz before post divide
362                  * 122.88 MHz / 0xa = 12.288 MHz
363                  */
364                 cx25840_write4(client, 0x114, 0x017dbf48);
365                 cx25840_write4(client, 0x110, 0x000a030e);
366                 break;
367         case V4L2_IDENT_CX23885_AV:
368         default:
369                 /*
370                  * 28.636363 MHz * (0xc + 0x1bf0c9e/0x2000000)/3 = 122.88 MHz
371                  * 368.64 MHz before post divide
372                  * 122.88 MHz / 0xa = 12.288 MHz
373                  */
374                 cx25840_write4(client, 0x114, 0x01bf0c9e);
375                 cx25840_write4(client, 0x110, 0x000a030c);
376                 break;
377         };
378
379         /* ADC2 input select */
380         cx25840_write(client, 0x102, 0x10);
381
382         /* VIN1 & VIN5 */
383         cx25840_write(client, 0x103, 0x11);
384
385         /* Enable format auto detect */
386         cx25840_write(client, 0x400, 0);
387         /* Fast subchroma lock */
388         /* White crush, Chroma AGC & Chroma Killer enabled */
389         cx25840_write(client, 0x401, 0xe8);
390
391         /* Select AFE clock pad output source */
392         cx25840_write(client, 0x144, 0x05);
393
394         /* Drive GPIO2 direction and values for HVR1700
395          * where an onboard mux selects the output of demodulator
396          * vs the 417. Failure to set this results in no DTV.
397          * It's safe to set this across all Hauppauge boards
398          * currently, regardless of the board type.
399          */
400         cx25840_write(client, 0x160, 0x1d);
401         cx25840_write(client, 0x164, 0x00);
402
403         /* Do the firmware load in a work handler to prevent.
404            Otherwise the kernel is blocked waiting for the
405            bit-banging i2c interface to finish uploading the
406            firmware. */
407         INIT_WORK(&state->fw_work, cx25840_work_handler);
408         init_waitqueue_head(&state->fw_wait);
409         q = create_singlethread_workqueue("cx25840_fw");
410         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
411         queue_work(q, &state->fw_work);
412         schedule();
413         finish_wait(&state->fw_wait, &wait);
414         destroy_workqueue(q);
415
416         cx25840_std_setup(client);
417
418         /* (re)set input */
419         set_input(client, state->vid_input, state->aud_input);
420
421         /* start microcontroller */
422         cx25840_and_or(client, 0x803, ~0x10, 0x10);
423 }
424
425 /* ----------------------------------------------------------------------- */
426
427 static void cx231xx_initialize(struct i2c_client *client)
428 {
429         DEFINE_WAIT(wait);
430         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
431         struct workqueue_struct *q;
432
433         /* Internal Reset */
434         cx25840_and_or(client, 0x102, ~0x01, 0x01);
435         cx25840_and_or(client, 0x102, ~0x01, 0x00);
436
437         /* Stop microcontroller */
438         cx25840_and_or(client, 0x803, ~0x10, 0x00);
439
440         /* DIF in reset? */
441         cx25840_write(client, 0x398, 0);
442
443         /* Trust the default xtal, no division */
444         /* This changes for the cx23888 products */
445         cx25840_write(client, 0x2, 0x76);
446
447         /* Bring down the regulator for AUX clk */
448         cx25840_write(client, 0x1, 0x40);
449
450         /* Disable DIF bypass */
451         cx25840_write4(client, 0x33c, 0x00000001);
452
453         /* DIF Src phase inc */
454         cx25840_write4(client, 0x340, 0x0df7df83);
455
456         /* Luma */
457         cx25840_write4(client, 0x414, 0x00107d12);
458
459         /* Chroma */
460         cx25840_write4(client, 0x420, 0x3d008282);
461
462         /* ADC2 input select */
463         cx25840_write(client, 0x102, 0x10);
464
465         /* VIN1 & VIN5 */
466         cx25840_write(client, 0x103, 0x11);
467
468         /* Enable format auto detect */
469         cx25840_write(client, 0x400, 0);
470         /* Fast subchroma lock */
471         /* White crush, Chroma AGC & Chroma Killer enabled */
472         cx25840_write(client, 0x401, 0xe8);
473
474         /* Do the firmware load in a work handler to prevent.
475            Otherwise the kernel is blocked waiting for the
476            bit-banging i2c interface to finish uploading the
477            firmware. */
478         INIT_WORK(&state->fw_work, cx25840_work_handler);
479         init_waitqueue_head(&state->fw_wait);
480         q = create_singlethread_workqueue("cx25840_fw");
481         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
482         queue_work(q, &state->fw_work);
483         schedule();
484         finish_wait(&state->fw_wait, &wait);
485         destroy_workqueue(q);
486
487         cx25840_std_setup(client);
488
489         /* (re)set input */
490         set_input(client, state->vid_input, state->aud_input);
491
492         /* start microcontroller */
493         cx25840_and_or(client, 0x803, ~0x10, 0x10);
494 }
495
496 /* ----------------------------------------------------------------------- */
497
498 void cx25840_std_setup(struct i2c_client *client)
499 {
500         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
501         v4l2_std_id std = state->std;
502         int hblank, hactive, burst, vblank, vactive, sc;
503         int vblank656, src_decimation;
504         int luma_lpf, uv_lpf, comb;
505         u32 pll_int, pll_frac, pll_post;
506
507         /* datasheet startup, step 8d */
508         if (std & ~V4L2_STD_NTSC)
509                 cx25840_write(client, 0x49f, 0x11);
510         else
511                 cx25840_write(client, 0x49f, 0x14);
512
513         if (std & V4L2_STD_625_50) {
514                 hblank = 132;
515                 hactive = 720;
516                 burst = 93;
517                 vblank = 36;
518                 vactive = 580;
519                 vblank656 = 40;
520                 src_decimation = 0x21f;
521                 luma_lpf = 2;
522
523                 if (std & V4L2_STD_SECAM) {
524                         uv_lpf = 0;
525                         comb = 0;
526                         sc = 0x0a425f;
527                 } else if (std == V4L2_STD_PAL_Nc) {
528                         uv_lpf = 1;
529                         comb = 0x20;
530                         sc = 556453;
531                 } else {
532                         uv_lpf = 1;
533                         comb = 0x20;
534                         sc = 688739;
535                 }
536         } else {
537                 hactive = 720;
538                 hblank = 122;
539                 vactive = 487;
540                 luma_lpf = 1;
541                 uv_lpf = 1;
542
543                 src_decimation = 0x21f;
544                 if (std == V4L2_STD_PAL_60) {
545                         vblank = 26;
546                         vblank656 = 26;
547                         burst = 0x5b;
548                         luma_lpf = 2;
549                         comb = 0x20;
550                         sc = 688739;
551                 } else if (std == V4L2_STD_PAL_M) {
552                         vblank = 20;
553                         vblank656 = 24;
554                         burst = 0x61;
555                         comb = 0x20;
556                         sc = 555452;
557                 } else {
558                         vblank = 26;
559                         vblank656 = 26;
560                         burst = 0x5b;
561                         comb = 0x66;
562                         sc = 556063;
563                 }
564         }
565
566         /* DEBUG: Displays configured PLL frequency */
567         if (!is_cx231xx(state)) {
568                 pll_int = cx25840_read(client, 0x108);
569                 pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
570                 pll_post = cx25840_read(client, 0x109);
571                 v4l_dbg(1, cx25840_debug, client,
572                         "PLL regs = int: %u, frac: %u, post: %u\n",
573                         pll_int, pll_frac, pll_post);
574
575                 if (pll_post) {
576                         int fin, fsc;
577                         int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
578
579                         pll /= pll_post;
580                         v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
581                                         pll / 1000000, pll % 1000000);
582                         v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
583                                         pll / 8000000, (pll / 8) % 1000000);
584
585                         fin = ((u64)src_decimation * pll) >> 12;
586                         v4l_dbg(1, cx25840_debug, client,
587                                         "ADC Sampling freq = %d.%06d MHz\n",
588                                         fin / 1000000, fin % 1000000);
589
590                         fsc = (((u64)sc) * pll) >> 24L;
591                         v4l_dbg(1, cx25840_debug, client,
592                                         "Chroma sub-carrier freq = %d.%06d MHz\n",
593                                         fsc / 1000000, fsc % 1000000);
594
595                         v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
596                                 "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
597                                 "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
598                                 "sc 0x%06x\n",
599                                 hblank, hactive, vblank, vactive, vblank656,
600                                 src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
601                 }
602         }
603
604         /* Sets horizontal blanking delay and active lines */
605         cx25840_write(client, 0x470, hblank);
606         cx25840_write(client, 0x471,
607                         0xff & (((hblank >> 8) & 0x3) | (hactive << 4)));
608         cx25840_write(client, 0x472, hactive >> 4);
609
610         /* Sets burst gate delay */
611         cx25840_write(client, 0x473, burst);
612
613         /* Sets vertical blanking delay and active duration */
614         cx25840_write(client, 0x474, vblank);
615         cx25840_write(client, 0x475,
616                         0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));
617         cx25840_write(client, 0x476, vactive >> 4);
618         cx25840_write(client, 0x477, vblank656);
619
620         /* Sets src decimation rate */
621         cx25840_write(client, 0x478, 0xff & src_decimation);
622         cx25840_write(client, 0x479, 0xff & (src_decimation >> 8));
623
624         /* Sets Luma and UV Low pass filters */
625         cx25840_write(client, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
626
627         /* Enables comb filters */
628         cx25840_write(client, 0x47b, comb);
629
630         /* Sets SC Step*/
631         cx25840_write(client, 0x47c, sc);
632         cx25840_write(client, 0x47d, 0xff & sc >> 8);
633         cx25840_write(client, 0x47e, 0xff & sc >> 16);
634
635         /* Sets VBI parameters */
636         if (std & V4L2_STD_625_50) {
637                 cx25840_write(client, 0x47f, 0x01);
638                 state->vbi_line_offset = 5;
639         } else {
640                 cx25840_write(client, 0x47f, 0x00);
641                 state->vbi_line_offset = 8;
642         }
643 }
644
645 /* ----------------------------------------------------------------------- */
646
647 static void input_change(struct i2c_client *client)
648 {
649         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
650         v4l2_std_id std = state->std;
651
652         /* Follow step 8c and 8d of section 3.16 in the cx25840 datasheet */
653         if (std & V4L2_STD_SECAM) {
654                 cx25840_write(client, 0x402, 0);
655         }
656         else {
657                 cx25840_write(client, 0x402, 0x04);
658                 cx25840_write(client, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
659         }
660         cx25840_and_or(client, 0x401, ~0x60, 0);
661         cx25840_and_or(client, 0x401, ~0x60, 0x60);
662         cx25840_and_or(client, 0x810, ~0x01, 1);
663
664         if (state->radio) {
665                 cx25840_write(client, 0x808, 0xf9);
666                 cx25840_write(client, 0x80b, 0x00);
667         }
668         else if (std & V4L2_STD_525_60) {
669                 /* Certain Hauppauge PVR150 models have a hardware bug
670                    that causes audio to drop out. For these models the
671                    audio standard must be set explicitly.
672                    To be precise: it affects cards with tuner models
673                    85, 99 and 112 (model numbers from tveeprom). */
674                 int hw_fix = state->pvr150_workaround;
675
676                 if (std == V4L2_STD_NTSC_M_JP) {
677                         /* Japan uses EIAJ audio standard */
678                         cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7);
679                 } else if (std == V4L2_STD_NTSC_M_KR) {
680                         /* South Korea uses A2 audio standard */
681                         cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8);
682                 } else {
683                         /* Others use the BTSC audio standard */
684                         cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6);
685                 }
686                 cx25840_write(client, 0x80b, 0x00);
687         } else if (std & V4L2_STD_PAL) {
688                 /* Autodetect audio standard and audio system */
689                 cx25840_write(client, 0x808, 0xff);
690                 /* Since system PAL-L is pretty much non-existant and
691                    not used by any public broadcast network, force
692                    6.5 MHz carrier to be interpreted as System DK,
693                    this avoids DK audio detection instability */
694                cx25840_write(client, 0x80b, 0x00);
695         } else if (std & V4L2_STD_SECAM) {
696                 /* Autodetect audio standard and audio system */
697                 cx25840_write(client, 0x808, 0xff);
698                 /* If only one of SECAM-DK / SECAM-L is required, then force
699                   6.5MHz carrier, else autodetect it */
700                 if ((std & V4L2_STD_SECAM_DK) &&
701                     !(std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
702                         /* 6.5 MHz carrier to be interpreted as System DK */
703                         cx25840_write(client, 0x80b, 0x00);
704                } else if (!(std & V4L2_STD_SECAM_DK) &&
705                           (std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
706                         /* 6.5 MHz carrier to be interpreted as System L */
707                         cx25840_write(client, 0x80b, 0x08);
708                } else {
709                         /* 6.5 MHz carrier to be autodetected */
710                         cx25840_write(client, 0x80b, 0x10);
711                }
712         }
713
714         cx25840_and_or(client, 0x810, ~0x01, 0);
715 }
716
717 static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
718                                                 enum cx25840_audio_input aud_input)
719 {
720         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
721         u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
722                            vid_input <= CX25840_COMPOSITE8);
723         u8 is_component = (vid_input & CX25840_COMPONENT_ON) ==
724                         CX25840_COMPONENT_ON;
725         int luma = vid_input & 0xf0;
726         int chroma = vid_input & 0xf00;
727         u8 reg;
728
729         v4l_dbg(1, cx25840_debug, client,
730                 "decoder set video input %d, audio input %d\n",
731                 vid_input, aud_input);
732
733         if (vid_input >= CX25840_VIN1_CH1) {
734                 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
735                         vid_input);
736                 reg = vid_input & 0xff;
737                 is_composite = !is_component &&
738                         ((vid_input & CX25840_SVIDEO_ON) != CX25840_SVIDEO_ON);
739
740                 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
741                         reg, is_composite);
742         } else if (is_composite) {
743                 reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
744         } else {
745                 if ((vid_input & ~0xff0) ||
746                     luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
747                     chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
748                         v4l_err(client, "0x%04x is not a valid video input!\n",
749                                 vid_input);
750                         return -EINVAL;
751                 }
752                 reg = 0xf0 + ((luma - CX25840_SVIDEO_LUMA1) >> 4);
753                 if (chroma >= CX25840_SVIDEO_CHROMA7) {
754                         reg &= 0x3f;
755                         reg |= (chroma - CX25840_SVIDEO_CHROMA7) >> 2;
756                 } else {
757                         reg &= 0xcf;
758                         reg |= (chroma - CX25840_SVIDEO_CHROMA4) >> 4;
759                 }
760         }
761
762         /* The caller has previously prepared the correct routing
763          * configuration in reg (for the cx23885) so we have no
764          * need to attempt to flip bits for earlier av decoders.
765          */
766         if (!is_cx2388x(state) && !is_cx231xx(state)) {
767                 switch (aud_input) {
768                 case CX25840_AUDIO_SERIAL:
769                         /* do nothing, use serial audio input */
770                         break;
771                 case CX25840_AUDIO4: reg &= ~0x30; break;
772                 case CX25840_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
773                 case CX25840_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
774                 case CX25840_AUDIO7: reg &= ~0xc0; break;
775                 case CX25840_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
776
777                 default:
778                         v4l_err(client, "0x%04x is not a valid audio input!\n",
779                                 aud_input);
780                         return -EINVAL;
781                 }
782         }
783
784         cx25840_write(client, 0x103, reg);
785
786         /* Set INPUT_MODE to Composite, S-Video or Component */
787         if (is_component)
788                 cx25840_and_or(client, 0x401, ~0x6, 0x6);
789         else
790                 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
791
792         if (!is_cx2388x(state) && !is_cx231xx(state)) {
793                 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
794                 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
795                 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
796                 if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
797                         cx25840_and_or(client, 0x102, ~0x4, 4);
798                 else
799                         cx25840_and_or(client, 0x102, ~0x4, 0);
800         } else {
801                 /* Set DUAL_MODE_ADC2 to 1 if component*/
802                 cx25840_and_or(client, 0x102, ~0x4, is_component ? 0x4 : 0x0);
803                 if (is_composite) {
804                         /* ADC2 input select channel 2 */
805                         cx25840_and_or(client, 0x102, ~0x2, 0);
806                 } else if (!is_component) {
807                         /* S-Video */
808                         if (chroma >= CX25840_SVIDEO_CHROMA7) {
809                                 /* ADC2 input select channel 3 */
810                                 cx25840_and_or(client, 0x102, ~0x2, 2);
811                         } else {
812                                 /* ADC2 input select channel 2 */
813                                 cx25840_and_or(client, 0x102, ~0x2, 0);
814                         }
815                 }
816         }
817
818         state->vid_input = vid_input;
819         state->aud_input = aud_input;
820         if (!is_cx2583x(state)) {
821                 cx25840_audio_set_path(client);
822                 input_change(client);
823         }
824
825         if (is_cx2388x(state)) {
826                 /* Audio channel 1 src : Parallel 1 */
827                 cx25840_write(client, 0x124, 0x03);
828
829                 /* Select AFE clock pad output source */
830                 cx25840_write(client, 0x144, 0x05);
831
832                 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
833                 cx25840_write(client, 0x914, 0xa0);
834
835                 /* I2S_OUT_CTL:
836                  * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
837                  * I2S_OUT_MASTER_MODE = Master
838                  */
839                 cx25840_write(client, 0x918, 0xa0);
840                 cx25840_write(client, 0x919, 0x01);
841         } else if (is_cx231xx(state)) {
842                 /* Audio channel 1 src : Parallel 1 */
843                 cx25840_write(client, 0x124, 0x03);
844
845                 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
846                 cx25840_write(client, 0x914, 0xa0);
847
848                 /* I2S_OUT_CTL:
849                  * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
850                  * I2S_OUT_MASTER_MODE = Master
851                  */
852                 cx25840_write(client, 0x918, 0xa0);
853                 cx25840_write(client, 0x919, 0x01);
854         }
855
856         return 0;
857 }
858
859 /* ----------------------------------------------------------------------- */
860
861 static int set_v4lstd(struct i2c_client *client)
862 {
863         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
864         u8 fmt = 0;     /* zero is autodetect */
865         u8 pal_m = 0;
866
867         /* First tests should be against specific std */
868         if (state->std == V4L2_STD_NTSC_M_JP) {
869                 fmt = 0x2;
870         } else if (state->std == V4L2_STD_NTSC_443) {
871                 fmt = 0x3;
872         } else if (state->std == V4L2_STD_PAL_M) {
873                 pal_m = 1;
874                 fmt = 0x5;
875         } else if (state->std == V4L2_STD_PAL_N) {
876                 fmt = 0x6;
877         } else if (state->std == V4L2_STD_PAL_Nc) {
878                 fmt = 0x7;
879         } else if (state->std == V4L2_STD_PAL_60) {
880                 fmt = 0x8;
881         } else {
882                 /* Then, test against generic ones */
883                 if (state->std & V4L2_STD_NTSC)
884                         fmt = 0x1;
885                 else if (state->std & V4L2_STD_PAL)
886                         fmt = 0x4;
887                 else if (state->std & V4L2_STD_SECAM)
888                         fmt = 0xc;
889         }
890
891         v4l_dbg(1, cx25840_debug, client, "changing video std to fmt %i\n",fmt);
892
893         /* Follow step 9 of section 3.16 in the cx25840 datasheet.
894            Without this PAL may display a vertical ghosting effect.
895            This happens for example with the Yuan MPC622. */
896         if (fmt >= 4 && fmt < 8) {
897                 /* Set format to NTSC-M */
898                 cx25840_and_or(client, 0x400, ~0xf, 1);
899                 /* Turn off LCOMB */
900                 cx25840_and_or(client, 0x47b, ~6, 0);
901         }
902         cx25840_and_or(client, 0x400, ~0xf, fmt);
903         cx25840_and_or(client, 0x403, ~0x3, pal_m);
904         cx25840_std_setup(client);
905         if (!is_cx2583x(state))
906                 input_change(client);
907         return 0;
908 }
909
910 /* ----------------------------------------------------------------------- */
911
912 static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
913 {
914         struct cx25840_state *state = to_state(sd);
915         struct i2c_client *client = v4l2_get_subdevdata(sd);
916
917         switch (ctrl->id) {
918         case CX25840_CID_ENABLE_PVR150_WORKAROUND:
919                 state->pvr150_workaround = ctrl->value;
920                 set_input(client, state->vid_input, state->aud_input);
921                 break;
922
923         case V4L2_CID_BRIGHTNESS:
924                 if (ctrl->value < 0 || ctrl->value > 255) {
925                         v4l_err(client, "invalid brightness setting %d\n",
926                                     ctrl->value);
927                         return -ERANGE;
928                 }
929
930                 cx25840_write(client, 0x414, ctrl->value - 128);
931                 break;
932
933         case V4L2_CID_CONTRAST:
934                 if (ctrl->value < 0 || ctrl->value > 127) {
935                         v4l_err(client, "invalid contrast setting %d\n",
936                                     ctrl->value);
937                         return -ERANGE;
938                 }
939
940                 cx25840_write(client, 0x415, ctrl->value << 1);
941                 break;
942
943         case V4L2_CID_SATURATION:
944                 if (ctrl->value < 0 || ctrl->value > 127) {
945                         v4l_err(client, "invalid saturation setting %d\n",
946                                     ctrl->value);
947                         return -ERANGE;
948                 }
949
950                 cx25840_write(client, 0x420, ctrl->value << 1);
951                 cx25840_write(client, 0x421, ctrl->value << 1);
952                 break;
953
954         case V4L2_CID_HUE:
955                 if (ctrl->value < -128 || ctrl->value > 127) {
956                         v4l_err(client, "invalid hue setting %d\n", ctrl->value);
957                         return -ERANGE;
958                 }
959
960                 cx25840_write(client, 0x422, ctrl->value);
961                 break;
962
963         case V4L2_CID_AUDIO_VOLUME:
964         case V4L2_CID_AUDIO_BASS:
965         case V4L2_CID_AUDIO_TREBLE:
966         case V4L2_CID_AUDIO_BALANCE:
967         case V4L2_CID_AUDIO_MUTE:
968                 if (is_cx2583x(state))
969                         return -EINVAL;
970                 return cx25840_audio_s_ctrl(sd, ctrl);
971
972         default:
973                 return -EINVAL;
974         }
975
976         return 0;
977 }
978
979 static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
980 {
981         struct cx25840_state *state = to_state(sd);
982         struct i2c_client *client = v4l2_get_subdevdata(sd);
983
984         switch (ctrl->id) {
985         case CX25840_CID_ENABLE_PVR150_WORKAROUND:
986                 ctrl->value = state->pvr150_workaround;
987                 break;
988         case V4L2_CID_BRIGHTNESS:
989                 ctrl->value = (s8)cx25840_read(client, 0x414) + 128;
990                 break;
991         case V4L2_CID_CONTRAST:
992                 ctrl->value = cx25840_read(client, 0x415) >> 1;
993                 break;
994         case V4L2_CID_SATURATION:
995                 ctrl->value = cx25840_read(client, 0x420) >> 1;
996                 break;
997         case V4L2_CID_HUE:
998                 ctrl->value = (s8)cx25840_read(client, 0x422);
999                 break;
1000         case V4L2_CID_AUDIO_VOLUME:
1001         case V4L2_CID_AUDIO_BASS:
1002         case V4L2_CID_AUDIO_TREBLE:
1003         case V4L2_CID_AUDIO_BALANCE:
1004         case V4L2_CID_AUDIO_MUTE:
1005                 if (is_cx2583x(state))
1006                         return -EINVAL;
1007                 return cx25840_audio_g_ctrl(sd, ctrl);
1008         default:
1009                 return -EINVAL;
1010         }
1011
1012         return 0;
1013 }
1014
1015 /* ----------------------------------------------------------------------- */
1016
1017 static int cx25840_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
1018 {
1019         switch (fmt->type) {
1020         case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
1021                 return cx25840_g_sliced_fmt(sd, &fmt->fmt.sliced);
1022         default:
1023                 return -EINVAL;
1024         }
1025         return 0;
1026 }
1027
1028 static int cx25840_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
1029 {
1030         struct cx25840_state *state = to_state(sd);
1031         struct i2c_client *client = v4l2_get_subdevdata(sd);
1032         struct v4l2_pix_format *pix;
1033         int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
1034         int is_50Hz = !(state->std & V4L2_STD_525_60);
1035
1036         switch (fmt->type) {
1037         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1038                 pix = &(fmt->fmt.pix);
1039
1040                 Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4;
1041                 Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4;
1042
1043                 Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4;
1044                 Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
1045
1046                 Vlines = pix->height + (is_50Hz ? 4 : 7);
1047
1048                 if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
1049                     (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
1050                         v4l_err(client, "%dx%d is not a valid size!\n",
1051                                     pix->width, pix->height);
1052                         return -ERANGE;
1053                 }
1054
1055                 HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
1056                 VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
1057                 VSC &= 0x1fff;
1058
1059                 if (pix->width >= 385)
1060                         filter = 0;
1061                 else if (pix->width > 192)
1062                         filter = 1;
1063                 else if (pix->width > 96)
1064                         filter = 2;
1065                 else
1066                         filter = 3;
1067
1068                 v4l_dbg(1, cx25840_debug, client, "decoder set size %dx%d -> scale  %ux%u\n",
1069                             pix->width, pix->height, HSC, VSC);
1070
1071                 /* HSCALE=HSC */
1072                 cx25840_write(client, 0x418, HSC & 0xff);
1073                 cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
1074                 cx25840_write(client, 0x41a, HSC >> 16);
1075                 /* VSCALE=VSC */
1076                 cx25840_write(client, 0x41c, VSC & 0xff);
1077                 cx25840_write(client, 0x41d, VSC >> 8);
1078                 /* VS_INTRLACE=1 VFILT=filter */
1079                 cx25840_write(client, 0x41e, 0x8 | filter);
1080                 break;
1081
1082         case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
1083                 return cx25840_s_sliced_fmt(sd, &fmt->fmt.sliced);
1084
1085         case V4L2_BUF_TYPE_VBI_CAPTURE:
1086                 return cx25840_s_raw_fmt(sd, &fmt->fmt.vbi);
1087
1088         default:
1089                 return -EINVAL;
1090         }
1091
1092         return 0;
1093 }
1094
1095 /* ----------------------------------------------------------------------- */
1096
1097 static void log_video_status(struct i2c_client *client)
1098 {
1099         static const char *const fmt_strs[] = {
1100                 "0x0",
1101                 "NTSC-M", "NTSC-J", "NTSC-4.43",
1102                 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
1103                 "0x9", "0xA", "0xB",
1104                 "SECAM",
1105                 "0xD", "0xE", "0xF"
1106         };
1107
1108         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1109         u8 vidfmt_sel = cx25840_read(client, 0x400) & 0xf;
1110         u8 gen_stat1 = cx25840_read(client, 0x40d);
1111         u8 gen_stat2 = cx25840_read(client, 0x40e);
1112         int vid_input = state->vid_input;
1113
1114         v4l_info(client, "Video signal:              %spresent\n",
1115                     (gen_stat2 & 0x20) ? "" : "not ");
1116         v4l_info(client, "Detected format:           %s\n",
1117                     fmt_strs[gen_stat1 & 0xf]);
1118
1119         v4l_info(client, "Specified standard:        %s\n",
1120                     vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
1121
1122         if (vid_input >= CX25840_COMPOSITE1 &&
1123             vid_input <= CX25840_COMPOSITE8) {
1124                 v4l_info(client, "Specified video input:     Composite %d\n",
1125                         vid_input - CX25840_COMPOSITE1 + 1);
1126         } else {
1127                 v4l_info(client, "Specified video input:     S-Video (Luma In%d, Chroma In%d)\n",
1128                         (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
1129         }
1130
1131         v4l_info(client, "Specified audioclock freq: %d Hz\n", state->audclk_freq);
1132 }
1133
1134 /* ----------------------------------------------------------------------- */
1135
1136 static void log_audio_status(struct i2c_client *client)
1137 {
1138         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1139         u8 download_ctl = cx25840_read(client, 0x803);
1140         u8 mod_det_stat0 = cx25840_read(client, 0x804);
1141         u8 mod_det_stat1 = cx25840_read(client, 0x805);
1142         u8 audio_config = cx25840_read(client, 0x808);
1143         u8 pref_mode = cx25840_read(client, 0x809);
1144         u8 afc0 = cx25840_read(client, 0x80b);
1145         u8 mute_ctl = cx25840_read(client, 0x8d3);
1146         int aud_input = state->aud_input;
1147         char *p;
1148
1149         switch (mod_det_stat0) {
1150         case 0x00: p = "mono"; break;
1151         case 0x01: p = "stereo"; break;
1152         case 0x02: p = "dual"; break;
1153         case 0x04: p = "tri"; break;
1154         case 0x10: p = "mono with SAP"; break;
1155         case 0x11: p = "stereo with SAP"; break;
1156         case 0x12: p = "dual with SAP"; break;
1157         case 0x14: p = "tri with SAP"; break;
1158         case 0xfe: p = "forced mode"; break;
1159         default: p = "not defined";
1160         }
1161         v4l_info(client, "Detected audio mode:       %s\n", p);
1162
1163         switch (mod_det_stat1) {
1164         case 0x00: p = "not defined"; break;
1165         case 0x01: p = "EIAJ"; break;
1166         case 0x02: p = "A2-M"; break;
1167         case 0x03: p = "A2-BG"; break;
1168         case 0x04: p = "A2-DK1"; break;
1169         case 0x05: p = "A2-DK2"; break;
1170         case 0x06: p = "A2-DK3"; break;
1171         case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
1172         case 0x08: p = "AM-L"; break;
1173         case 0x09: p = "NICAM-BG"; break;
1174         case 0x0a: p = "NICAM-DK"; break;
1175         case 0x0b: p = "NICAM-I"; break;
1176         case 0x0c: p = "NICAM-L"; break;
1177         case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
1178         case 0x0e: p = "IF FM Radio"; break;
1179         case 0x0f: p = "BTSC"; break;
1180         case 0x10: p = "high-deviation FM"; break;
1181         case 0x11: p = "very high-deviation FM"; break;
1182         case 0xfd: p = "unknown audio standard"; break;
1183         case 0xfe: p = "forced audio standard"; break;
1184         case 0xff: p = "no detected audio standard"; break;
1185         default: p = "not defined";
1186         }
1187         v4l_info(client, "Detected audio standard:   %s\n", p);
1188         v4l_info(client, "Audio muted:               %s\n",
1189                     (state->unmute_volume >= 0) ? "yes" : "no");
1190         v4l_info(client, "Audio microcontroller:     %s\n",
1191                     (download_ctl & 0x10) ?
1192                                 ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1193
1194         switch (audio_config >> 4) {
1195         case 0x00: p = "undefined"; break;
1196         case 0x01: p = "BTSC"; break;
1197         case 0x02: p = "EIAJ"; break;
1198         case 0x03: p = "A2-M"; break;
1199         case 0x04: p = "A2-BG"; break;
1200         case 0x05: p = "A2-DK1"; break;
1201         case 0x06: p = "A2-DK2"; break;
1202         case 0x07: p = "A2-DK3"; break;
1203         case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1204         case 0x09: p = "AM-L"; break;
1205         case 0x0a: p = "NICAM-BG"; break;
1206         case 0x0b: p = "NICAM-DK"; break;
1207         case 0x0c: p = "NICAM-I"; break;
1208         case 0x0d: p = "NICAM-L"; break;
1209         case 0x0e: p = "FM radio"; break;
1210         case 0x0f: p = "automatic detection"; break;
1211         default: p = "undefined";
1212         }
1213         v4l_info(client, "Configured audio standard: %s\n", p);
1214
1215         if ((audio_config >> 4) < 0xF) {
1216                 switch (audio_config & 0xF) {
1217                 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1218                 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1219                 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1220                 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1221                 case 0x04: p = "STEREO"; break;
1222                 case 0x05: p = "DUAL1 (AB)"; break;
1223                 case 0x06: p = "DUAL2 (AC) (FM)"; break;
1224                 case 0x07: p = "DUAL3 (BC) (FM)"; break;
1225                 case 0x08: p = "DUAL4 (AC) (AM)"; break;
1226                 case 0x09: p = "DUAL5 (BC) (AM)"; break;
1227                 case 0x0a: p = "SAP"; break;
1228                 default: p = "undefined";
1229                 }
1230                 v4l_info(client, "Configured audio mode:     %s\n", p);
1231         } else {
1232                 switch (audio_config & 0xF) {
1233                 case 0x00: p = "BG"; break;
1234                 case 0x01: p = "DK1"; break;
1235                 case 0x02: p = "DK2"; break;
1236                 case 0x03: p = "DK3"; break;
1237                 case 0x04: p = "I"; break;
1238                 case 0x05: p = "L"; break;
1239                 case 0x06: p = "BTSC"; break;
1240                 case 0x07: p = "EIAJ"; break;
1241                 case 0x08: p = "A2-M"; break;
1242                 case 0x09: p = "FM Radio"; break;
1243                 case 0x0f: p = "automatic standard and mode detection"; break;
1244                 default: p = "undefined";
1245                 }
1246                 v4l_info(client, "Configured audio system:   %s\n", p);
1247         }
1248
1249         if (aud_input) {
1250                 v4l_info(client, "Specified audio input:     Tuner (In%d)\n", aud_input);
1251         } else {
1252                 v4l_info(client, "Specified audio input:     External\n");
1253         }
1254
1255         switch (pref_mode & 0xf) {
1256         case 0: p = "mono/language A"; break;
1257         case 1: p = "language B"; break;
1258         case 2: p = "language C"; break;
1259         case 3: p = "analog fallback"; break;
1260         case 4: p = "stereo"; break;
1261         case 5: p = "language AC"; break;
1262         case 6: p = "language BC"; break;
1263         case 7: p = "language AB"; break;
1264         default: p = "undefined";
1265         }
1266         v4l_info(client, "Preferred audio mode:      %s\n", p);
1267
1268         if ((audio_config & 0xf) == 0xf) {
1269                 switch ((afc0 >> 3) & 0x3) {
1270                 case 0: p = "system DK"; break;
1271                 case 1: p = "system L"; break;
1272                 case 2: p = "autodetect"; break;
1273                 default: p = "undefined";
1274                 }
1275                 v4l_info(client, "Selected 65 MHz format:    %s\n", p);
1276
1277                 switch (afc0 & 0x7) {
1278                 case 0: p = "chroma"; break;
1279                 case 1: p = "BTSC"; break;
1280                 case 2: p = "EIAJ"; break;
1281                 case 3: p = "A2-M"; break;
1282                 case 4: p = "autodetect"; break;
1283                 default: p = "undefined";
1284                 }
1285                 v4l_info(client, "Selected 45 MHz format:    %s\n", p);
1286         }
1287 }
1288
1289 /* ----------------------------------------------------------------------- */
1290
1291 /* This load_fw operation must be called to load the driver's firmware.
1292    Without this the audio standard detection will fail and you will
1293    only get mono.
1294
1295    Since loading the firmware is often problematic when the driver is
1296    compiled into the kernel I recommend postponing calling this function
1297    until the first open of the video device. Another reason for
1298    postponing it is that loading this firmware takes a long time (seconds)
1299    due to the slow i2c bus speed. So it will speed up the boot process if
1300    you can avoid loading the fw as long as the video device isn't used.  */
1301 static int cx25840_load_fw(struct v4l2_subdev *sd)
1302 {
1303         struct cx25840_state *state = to_state(sd);
1304         struct i2c_client *client = v4l2_get_subdevdata(sd);
1305
1306         if (!state->is_initialized) {
1307                 /* initialize and load firmware */
1308                 state->is_initialized = 1;
1309                 if (is_cx2583x(state))
1310                         cx25836_initialize(client);
1311                 else if (is_cx2388x(state))
1312                         cx23885_initialize(client);
1313                 else if (is_cx231xx(state))
1314                         cx231xx_initialize(client);
1315                 else
1316                         cx25840_initialize(client);
1317         }
1318         return 0;
1319 }
1320
1321 #ifdef CONFIG_VIDEO_ADV_DEBUG
1322 static int cx25840_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1323 {
1324         struct i2c_client *client = v4l2_get_subdevdata(sd);
1325
1326         if (!v4l2_chip_match_i2c_client(client, &reg->match))
1327                 return -EINVAL;
1328         if (!capable(CAP_SYS_ADMIN))
1329                 return -EPERM;
1330         reg->size = 1;
1331         reg->val = cx25840_read(client, reg->reg & 0x0fff);
1332         return 0;
1333 }
1334
1335 static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1336 {
1337         struct i2c_client *client = v4l2_get_subdevdata(sd);
1338
1339         if (!v4l2_chip_match_i2c_client(client, &reg->match))
1340                 return -EINVAL;
1341         if (!capable(CAP_SYS_ADMIN))
1342                 return -EPERM;
1343         cx25840_write(client, reg->reg & 0x0fff, reg->val & 0xff);
1344         return 0;
1345 }
1346 #endif
1347
1348 static int cx25840_s_audio_stream(struct v4l2_subdev *sd, int enable)
1349 {
1350         struct cx25840_state *state = to_state(sd);
1351         struct i2c_client *client = v4l2_get_subdevdata(sd);
1352         u8 v;
1353
1354         if (is_cx2583x(state) || is_cx2388x(state) || is_cx231xx(state))
1355                 return 0;
1356
1357         v4l_dbg(1, cx25840_debug, client, "%s audio output\n",
1358                         enable ? "enable" : "disable");
1359
1360         if (enable) {
1361                 v = cx25840_read(client, 0x115) | 0x80;
1362                 cx25840_write(client, 0x115, v);
1363                 v = cx25840_read(client, 0x116) | 0x03;
1364                 cx25840_write(client, 0x116, v);
1365         } else {
1366                 v = cx25840_read(client, 0x115) & ~(0x80);
1367                 cx25840_write(client, 0x115, v);
1368                 v = cx25840_read(client, 0x116) & ~(0x03);
1369                 cx25840_write(client, 0x116, v);
1370         }
1371         return 0;
1372 }
1373
1374 static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1375 {
1376         struct cx25840_state *state = to_state(sd);
1377         struct i2c_client *client = v4l2_get_subdevdata(sd);
1378         u8 v;
1379
1380         v4l_dbg(1, cx25840_debug, client, "%s video output\n",
1381                         enable ? "enable" : "disable");
1382         if (enable) {
1383                 if (is_cx2388x(state) || is_cx231xx(state)) {
1384                         v = cx25840_read(client, 0x421) | 0x0b;
1385                         cx25840_write(client, 0x421, v);
1386                 } else {
1387                         v = cx25840_read(client, 0x115) | 0x0c;
1388                         cx25840_write(client, 0x115, v);
1389                         v = cx25840_read(client, 0x116) | 0x04;
1390                         cx25840_write(client, 0x116, v);
1391                 }
1392         } else {
1393                 if (is_cx2388x(state) || is_cx231xx(state)) {
1394                         v = cx25840_read(client, 0x421) & ~(0x0b);
1395                         cx25840_write(client, 0x421, v);
1396                 } else {
1397                         v = cx25840_read(client, 0x115) & ~(0x0c);
1398                         cx25840_write(client, 0x115, v);
1399                         v = cx25840_read(client, 0x116) & ~(0x04);
1400                         cx25840_write(client, 0x116, v);
1401                 }
1402         }
1403         return 0;
1404 }
1405
1406 static int cx25840_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1407 {
1408         struct cx25840_state *state = to_state(sd);
1409
1410         switch (qc->id) {
1411         case V4L2_CID_BRIGHTNESS:
1412                 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
1413         case V4L2_CID_CONTRAST:
1414         case V4L2_CID_SATURATION:
1415                 return v4l2_ctrl_query_fill(qc, 0, 127, 1, 64);
1416         case V4L2_CID_HUE:
1417                 return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
1418         default:
1419                 break;
1420         }
1421         if (is_cx2583x(state))
1422                 return -EINVAL;
1423
1424         switch (qc->id) {
1425         case V4L2_CID_AUDIO_VOLUME:
1426                 return v4l2_ctrl_query_fill(qc, 0, 65535,
1427                                 65535 / 100, state->default_volume);
1428         case V4L2_CID_AUDIO_MUTE:
1429                 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1430         case V4L2_CID_AUDIO_BALANCE:
1431         case V4L2_CID_AUDIO_BASS:
1432         case V4L2_CID_AUDIO_TREBLE:
1433                 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1434         default:
1435                 return -EINVAL;
1436         }
1437         return -EINVAL;
1438 }
1439
1440 static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1441 {
1442         struct cx25840_state *state = to_state(sd);
1443         struct i2c_client *client = v4l2_get_subdevdata(sd);
1444
1445         if (state->radio == 0 && state->std == std)
1446                 return 0;
1447         state->radio = 0;
1448         state->std = std;
1449         return set_v4lstd(client);
1450 }
1451
1452 static int cx25840_s_radio(struct v4l2_subdev *sd)
1453 {
1454         struct cx25840_state *state = to_state(sd);
1455
1456         state->radio = 1;
1457         return 0;
1458 }
1459
1460 static int cx25840_s_video_routing(struct v4l2_subdev *sd,
1461                                    u32 input, u32 output, u32 config)
1462 {
1463         struct cx25840_state *state = to_state(sd);
1464         struct i2c_client *client = v4l2_get_subdevdata(sd);
1465
1466         return set_input(client, input, state->aud_input);
1467 }
1468
1469 static int cx25840_s_audio_routing(struct v4l2_subdev *sd,
1470                                    u32 input, u32 output, u32 config)
1471 {
1472         struct cx25840_state *state = to_state(sd);
1473         struct i2c_client *client = v4l2_get_subdevdata(sd);
1474
1475         if (is_cx2583x(state))
1476                 return -EINVAL;
1477         return set_input(client, state->vid_input, input);
1478 }
1479
1480 static int cx25840_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1481 {
1482         struct cx25840_state *state = to_state(sd);
1483         struct i2c_client *client = v4l2_get_subdevdata(sd);
1484
1485         if (!is_cx2583x(state))
1486                 input_change(client);
1487         return 0;
1488 }
1489
1490 static int cx25840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1491 {
1492         struct cx25840_state *state = to_state(sd);
1493         struct i2c_client *client = v4l2_get_subdevdata(sd);
1494         u8 vpres = cx25840_read(client, 0x40e) & 0x20;
1495         u8 mode;
1496         int val = 0;
1497
1498         if (state->radio)
1499                 return 0;
1500
1501         vt->signal = vpres ? 0xffff : 0x0;
1502         if (is_cx2583x(state))
1503                 return 0;
1504
1505         vt->capability |=
1506                 V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
1507                 V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
1508
1509         mode = cx25840_read(client, 0x804);
1510
1511         /* get rxsubchans and audmode */
1512         if ((mode & 0xf) == 1)
1513                 val |= V4L2_TUNER_SUB_STEREO;
1514         else
1515                 val |= V4L2_TUNER_SUB_MONO;
1516
1517         if (mode == 2 || mode == 4)
1518                 val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1519
1520         if (mode & 0x10)
1521                 val |= V4L2_TUNER_SUB_SAP;
1522
1523         vt->rxsubchans = val;
1524         vt->audmode = state->audmode;
1525         return 0;
1526 }
1527
1528 static int cx25840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1529 {
1530         struct cx25840_state *state = to_state(sd);
1531         struct i2c_client *client = v4l2_get_subdevdata(sd);
1532
1533         if (state->radio || is_cx2583x(state))
1534                 return 0;
1535
1536         switch (vt->audmode) {
1537                 case V4L2_TUNER_MODE_MONO:
1538                         /* mono      -> mono
1539                            stereo    -> mono
1540                            bilingual -> lang1 */
1541                         cx25840_and_or(client, 0x809, ~0xf, 0x00);
1542                         break;
1543                 case V4L2_TUNER_MODE_STEREO:
1544                 case V4L2_TUNER_MODE_LANG1:
1545                         /* mono      -> mono
1546                            stereo    -> stereo
1547                            bilingual -> lang1 */
1548                         cx25840_and_or(client, 0x809, ~0xf, 0x04);
1549                         break;
1550                 case V4L2_TUNER_MODE_LANG1_LANG2:
1551                         /* mono      -> mono
1552                            stereo    -> stereo
1553                            bilingual -> lang1/lang2 */
1554                         cx25840_and_or(client, 0x809, ~0xf, 0x07);
1555                         break;
1556                 case V4L2_TUNER_MODE_LANG2:
1557                         /* mono      -> mono
1558                            stereo    -> stereo
1559                            bilingual -> lang2 */
1560                         cx25840_and_or(client, 0x809, ~0xf, 0x01);
1561                         break;
1562                 default:
1563                         return -EINVAL;
1564         }
1565         state->audmode = vt->audmode;
1566         return 0;
1567 }
1568
1569 static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
1570 {
1571         struct cx25840_state *state = to_state(sd);
1572         struct i2c_client *client = v4l2_get_subdevdata(sd);
1573
1574         if (is_cx2583x(state))
1575                 cx25836_initialize(client);
1576         else if (is_cx2388x(state))
1577                 cx23885_initialize(client);
1578         else if (is_cx231xx(state))
1579                 cx231xx_initialize(client);
1580         else
1581                 cx25840_initialize(client);
1582         return 0;
1583 }
1584
1585 static int cx25840_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1586 {
1587         struct cx25840_state *state = to_state(sd);
1588         struct i2c_client *client = v4l2_get_subdevdata(sd);
1589
1590         return v4l2_chip_ident_i2c_client(client, chip, state->id, state->rev);
1591 }
1592
1593 static int cx25840_log_status(struct v4l2_subdev *sd)
1594 {
1595         struct cx25840_state *state = to_state(sd);
1596         struct i2c_client *client = v4l2_get_subdevdata(sd);
1597
1598         log_video_status(client);
1599         if (!is_cx2583x(state))
1600                 log_audio_status(client);
1601         return 0;
1602 }
1603
1604 /* ----------------------------------------------------------------------- */
1605
1606 static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1607         .log_status = cx25840_log_status,
1608         .g_chip_ident = cx25840_g_chip_ident,
1609         .g_ctrl = cx25840_g_ctrl,
1610         .s_ctrl = cx25840_s_ctrl,
1611         .queryctrl = cx25840_queryctrl,
1612         .s_std = cx25840_s_std,
1613         .reset = cx25840_reset,
1614         .load_fw = cx25840_load_fw,
1615 #ifdef CONFIG_VIDEO_ADV_DEBUG
1616         .g_register = cx25840_g_register,
1617         .s_register = cx25840_s_register,
1618 #endif
1619 };
1620
1621 static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
1622         .s_frequency = cx25840_s_frequency,
1623         .s_radio = cx25840_s_radio,
1624         .g_tuner = cx25840_g_tuner,
1625         .s_tuner = cx25840_s_tuner,
1626 };
1627
1628 static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
1629         .s_clock_freq = cx25840_s_clock_freq,
1630         .s_routing = cx25840_s_audio_routing,
1631         .s_stream = cx25840_s_audio_stream,
1632 };
1633
1634 static const struct v4l2_subdev_video_ops cx25840_video_ops = {
1635         .s_routing = cx25840_s_video_routing,
1636         .g_fmt = cx25840_g_fmt,
1637         .s_fmt = cx25840_s_fmt,
1638         .s_stream = cx25840_s_stream,
1639 };
1640
1641 static const struct v4l2_subdev_vbi_ops cx25840_vbi_ops = {
1642         .decode_vbi_line = cx25840_decode_vbi_line,
1643         .s_raw_fmt = cx25840_s_raw_fmt,
1644         .s_sliced_fmt = cx25840_s_sliced_fmt,
1645         .g_sliced_fmt = cx25840_g_sliced_fmt,
1646 };
1647
1648 static const struct v4l2_subdev_ops cx25840_ops = {
1649         .core = &cx25840_core_ops,
1650         .tuner = &cx25840_tuner_ops,
1651         .audio = &cx25840_audio_ops,
1652         .video = &cx25840_video_ops,
1653         .vbi = &cx25840_vbi_ops,
1654 };
1655
1656 /* ----------------------------------------------------------------------- */
1657
1658 static u32 get_cx2388x_ident(struct i2c_client *client)
1659 {
1660         u32 ret;
1661
1662         /* Come out of digital power down */
1663         cx25840_write(client, 0x000, 0);
1664
1665         /* Detecting whether the part is cx23885/7/8 is more
1666          * difficult than it needs to be. No ID register. Instead we
1667          * probe certain registers indicated in the datasheets to look
1668          * for specific defaults that differ between the silicon designs. */
1669
1670         /* It's either 885/7 if the IR Tx Clk Divider register exists */
1671         if (cx25840_read4(client, 0x204) & 0xffff) {
1672                 /* CX23885 returns bogus repetitive byte values for the DIF,
1673                  * which doesn't exist for it. (Ex. 8a8a8a8a or 31313131) */
1674                 ret = cx25840_read4(client, 0x300);
1675                 if (((ret & 0xffff0000) >> 16) == (ret & 0xffff)) {
1676                         /* No DIF */
1677                         ret = V4L2_IDENT_CX23885_AV;
1678                 } else {
1679                         /* CX23887 has a broken DIF, but the registers
1680                          * appear valid (but unsed), good enough to detect. */
1681                         ret = V4L2_IDENT_CX23887_AV;
1682                 }
1683         } else if (cx25840_read4(client, 0x300) & 0x0fffffff) {
1684                 /* DIF PLL Freq Word reg exists; chip must be a CX23888 */
1685                 ret = V4L2_IDENT_CX23888_AV;
1686         } else {
1687                 v4l_err(client, "Unable to detect h/w, assuming cx23887\n");
1688                 ret = V4L2_IDENT_CX23887_AV;
1689         }
1690
1691         /* Back into digital power down */
1692         cx25840_write(client, 0x000, 2);
1693         return ret;
1694 }
1695
1696 static int cx25840_probe(struct i2c_client *client,
1697                          const struct i2c_device_id *did)
1698 {
1699         struct cx25840_state *state;
1700         struct v4l2_subdev *sd;
1701         u32 id = V4L2_IDENT_NONE;
1702         u16 device_id;
1703
1704         /* Check if the adapter supports the needed features */
1705         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1706                 return -EIO;
1707
1708         v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
1709
1710         device_id = cx25840_read(client, 0x101) << 8;
1711         device_id |= cx25840_read(client, 0x100);
1712         v4l_dbg(1, cx25840_debug, client, "device_id = 0x%04x\n", device_id);
1713
1714         /* The high byte of the device ID should be
1715          * 0x83 for the cx2583x and 0x84 for the cx2584x */
1716         if ((device_id & 0xff00) == 0x8300) {
1717                 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
1718         } else if ((device_id & 0xff00) == 0x8400) {
1719                 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
1720         } else if (device_id == 0x0000) {
1721                 id = get_cx2388x_ident(client);
1722         } else if ((device_id & 0xfff0) == 0x5A30) {
1723                 /* The CX23100 (0x5A3C = 23100) doesn't have an A/V decoder */
1724                 id = V4L2_IDENT_CX2310X_AV;
1725         } else if ((device_id & 0xff) == (device_id >> 8)) {
1726                 v4l_err(client,
1727                         "likely a confused/unresponsive cx2388[578] A/V decoder"
1728                         " found @ 0x%x (%s)\n",
1729                         client->addr << 1, client->adapter->name);
1730                 v4l_err(client, "A method to reset it from the cx25840 driver"
1731                         " software is not known at this time\n");
1732                 return -ENODEV;
1733         } else {
1734                 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
1735                 return -ENODEV;
1736         }
1737
1738         state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
1739         if (state == NULL)
1740                 return -ENOMEM;
1741
1742         sd = &state->sd;
1743         v4l2_i2c_subdev_init(sd, client, &cx25840_ops);
1744         switch (id) {
1745         case V4L2_IDENT_CX23885_AV:
1746                 v4l_info(client, "cx23885 A/V decoder found @ 0x%x (%s)\n",
1747                          client->addr << 1, client->adapter->name);
1748                 break;
1749         case V4L2_IDENT_CX23887_AV:
1750                 v4l_info(client, "cx23887 A/V decoder found @ 0x%x (%s)\n",
1751                          client->addr << 1, client->adapter->name);
1752                 break;
1753         case V4L2_IDENT_CX23888_AV:
1754                 v4l_info(client, "cx23888 A/V decoder found @ 0x%x (%s)\n",
1755                          client->addr << 1, client->adapter->name);
1756                 break;
1757         case V4L2_IDENT_CX2310X_AV:
1758                 v4l_info(client, "cx%d A/V decoder found @ 0x%x (%s)\n",
1759                          device_id, client->addr << 1, client->adapter->name);
1760                 break;
1761         case V4L2_IDENT_CX25840:
1762         case V4L2_IDENT_CX25841:
1763         case V4L2_IDENT_CX25842:
1764         case V4L2_IDENT_CX25843:
1765                 /* Note: revision '(device_id & 0x0f) == 2' was never built. The
1766                    marking skips from 0x1 == 22 to 0x3 == 23. */
1767                 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
1768                          (device_id & 0xfff0) >> 4,
1769                          (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1
1770                                                 : (device_id & 0x0f),
1771                          client->addr << 1, client->adapter->name);
1772                 break;
1773         case V4L2_IDENT_CX25836:
1774         case V4L2_IDENT_CX25837:
1775         default:
1776                 v4l_info(client, "cx25%3x-%x found @ 0x%x (%s)\n",
1777                          (device_id & 0xfff0) >> 4, device_id & 0x0f,
1778                          client->addr << 1, client->adapter->name);
1779                 break;
1780         }
1781
1782         state->c = client;
1783         state->vid_input = CX25840_COMPOSITE7;
1784         state->aud_input = CX25840_AUDIO8;
1785         state->audclk_freq = 48000;
1786         state->pvr150_workaround = 0;
1787         state->audmode = V4L2_TUNER_MODE_LANG1;
1788         state->unmute_volume = -1;
1789         state->default_volume = 228 - cx25840_read(client, 0x8d4);
1790         state->default_volume = ((state->default_volume / 2) + 23) << 9;
1791         state->vbi_line_offset = 8;
1792         state->id = id;
1793         state->rev = device_id;
1794
1795         return 0;
1796 }
1797
1798 static int cx25840_remove(struct i2c_client *client)
1799 {
1800         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1801
1802         v4l2_device_unregister_subdev(sd);
1803         kfree(to_state(sd));
1804         return 0;
1805 }
1806
1807 static const struct i2c_device_id cx25840_id[] = {
1808         { "cx25840", 0 },
1809         { }
1810 };
1811 MODULE_DEVICE_TABLE(i2c, cx25840_id);
1812
1813 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1814         .name = "cx25840",
1815         .probe = cx25840_probe,
1816         .remove = cx25840_remove,
1817         .id_table = cx25840_id,
1818 };