]> git.kernelconcepts.de Git - karo-tx-linux.git/blob - drivers/media/video/cx88/cx88-dvb.c
Merge head 'drm-3264' of master.kernel.org:/pub/scm/linux/kernel/git/airlied/drm-2.6
[karo-tx-linux.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2  * $Id: cx88-dvb.c,v 1.39 2005/07/02 20:00:46 mkrufky Exp $
3  *
4  * device driver for Conexant 2388x based TV cards
5  * MPEG Transport Stream (DVB) routines
6  *
7  * (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
8  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9  *
10  *  This program is free software; you can redistribute it and/or modify
11  *  it under the terms of the GNU General Public License as published by
12  *  the Free Software Foundation; either version 2 of the License, or
13  *  (at your option) any later version.
14  *
15  *  This program is distributed in the hope that it will be useful,
16  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  *  GNU General Public License for more details.
19  *
20  *  You should have received a copy of the GNU General Public License
21  *  along with this program; if not, write to the Free Software
22  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/device.h>
28 #include <linux/fs.h>
29 #include <linux/kthread.h>
30 #include <linux/file.h>
31 #include <linux/suspend.h>
32
33 /* these three frontends need merging via linuxtv cvs ... */
34 #define HAVE_CX22702 1
35 #define HAVE_OR51132 1
36 #define HAVE_LGDT3302 1
37
38 #include "cx88.h"
39 #include "dvb-pll.h"
40 #include "mt352.h"
41 #include "mt352_priv.h"
42 #if HAVE_CX22702
43 # include "cx22702.h"
44 #endif
45 #if HAVE_OR51132
46 # include "or51132.h"
47 #endif
48 #if HAVE_LGDT3302
49 # include "lgdt3302.h"
50 #endif
51
52 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
53 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
54 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
55 MODULE_LICENSE("GPL");
56
57 static unsigned int debug = 0;
58 module_param(debug, int, 0644);
59 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
60
61 #define dprintk(level,fmt, arg...)      if (debug >= level) \
62         printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
63
64 /* ------------------------------------------------------------------ */
65
66 static int dvb_buf_setup(struct videobuf_queue *q,
67                          unsigned int *count, unsigned int *size)
68 {
69         struct cx8802_dev *dev = q->priv_data;
70
71         dev->ts_packet_size  = 188 * 4;
72         dev->ts_packet_count = 32;
73
74         *size  = dev->ts_packet_size * dev->ts_packet_count;
75         *count = 32;
76         return 0;
77 }
78
79 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
80                            enum v4l2_field field)
81 {
82         struct cx8802_dev *dev = q->priv_data;
83         return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb);
84 }
85
86 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
87 {
88         struct cx8802_dev *dev = q->priv_data;
89         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
90 }
91
92 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
93 {
94         struct cx8802_dev *dev = q->priv_data;
95         cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
96 }
97
98 static struct videobuf_queue_ops dvb_qops = {
99         .buf_setup    = dvb_buf_setup,
100         .buf_prepare  = dvb_buf_prepare,
101         .buf_queue    = dvb_buf_queue,
102         .buf_release  = dvb_buf_release,
103 };
104
105 /* ------------------------------------------------------------------ */
106
107 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
108 {
109         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
110         static u8 reset []         = { RESET,      0x80 };
111         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
112         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
113         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
114         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
115
116         mt352_write(fe, clock_config,   sizeof(clock_config));
117         udelay(200);
118         mt352_write(fe, reset,          sizeof(reset));
119         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
120
121         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
122         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
123         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
124         return 0;
125 }
126
127 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
128 {
129         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
130         static u8 reset []         = { 0x50, 0x80 };
131         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
132         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
133                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
134         static u8 dntv_extra[]     = { 0xB5, 0x7A };
135         static u8 capt_range_cfg[] = { 0x75, 0x32 };
136
137         mt352_write(fe, clock_config,   sizeof(clock_config));
138         udelay(2000);
139         mt352_write(fe, reset,          sizeof(reset));
140         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
141
142         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
143         udelay(2000);
144         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
145         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
146
147         return 0;
148 }
149
150 static int mt352_pll_set(struct dvb_frontend* fe,
151                          struct dvb_frontend_parameters* params,
152                          u8* pllbuf)
153 {
154         struct cx8802_dev *dev= fe->dvb->priv;
155
156         pllbuf[0] = dev->core->pll_addr << 1;
157         dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
158                           params->frequency,
159                           params->u.ofdm.bandwidth);
160         return 0;
161 }
162
163 static struct mt352_config dvico_fusionhdtv = {
164         .demod_address = 0x0F,
165         .demod_init    = dvico_fusionhdtv_demod_init,
166         .pll_set       = mt352_pll_set,
167 };
168
169 static struct mt352_config dntv_live_dvbt_config = {
170         .demod_address = 0x0f,
171         .demod_init    = dntv_live_dvbt_demod_init,
172         .pll_set       = mt352_pll_set,
173 };
174
175 #if HAVE_CX22702
176 static struct cx22702_config connexant_refboard_config = {
177         .demod_address = 0x43,
178         .pll_address   = 0x60,
179         .pll_desc      = &dvb_pll_thomson_dtt7579,
180 };
181
182 static struct cx22702_config hauppauge_novat_config = {
183         .demod_address = 0x43,
184         .pll_address   = 0x61,
185         .pll_desc      = &dvb_pll_thomson_dtt759x,
186 };
187 #endif
188
189 #if HAVE_OR51132
190 static int or51132_set_ts_param(struct dvb_frontend* fe,
191                                 int is_punctured)
192 {
193         struct cx8802_dev *dev= fe->dvb->priv;
194         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
195         return 0;
196 }
197
198 static struct or51132_config pchdtv_hd3000 = {
199         .demod_address    = 0x15,
200         .pll_address      = 0x61,
201         .pll_desc         = &dvb_pll_thomson_dtt7610,
202         .set_ts_params    = or51132_set_ts_param,
203 };
204 #endif
205
206 #if HAVE_LGDT3302
207 static int lgdt3302_set_ts_param(struct dvb_frontend* fe, int is_punctured)
208 {
209         struct cx8802_dev *dev= fe->dvb->priv;
210         if (is_punctured)
211                 dev->ts_gen_cntrl |= 0x04;
212         else
213                 dev->ts_gen_cntrl &= ~0x04;
214         return 0;
215 }
216
217 static struct lgdt3302_config fusionhdtv_3_gold_q = {
218         .demod_address    = 0x0e,
219         .pll_address      = 0x61,
220         .pll_desc         = &dvb_pll_microtune_4042,
221         .set_ts_params    = lgdt3302_set_ts_param,
222 };
223
224 static struct lgdt3302_config fusionhdtv_3_gold_t = {
225         .demod_address    = 0x0e,
226         .pll_address      = 0x61,
227         .pll_desc         = &dvb_pll_thomson_dtt7611,
228         .set_ts_params    = lgdt3302_set_ts_param,
229 };
230 #endif
231
232 static int dvb_register(struct cx8802_dev *dev)
233 {
234         /* init struct videobuf_dvb */
235         dev->dvb.name = dev->core->name;
236         dev->ts_gen_cntrl = 0x0c;
237
238         /* init frontend */
239         switch (dev->core->board) {
240 #if HAVE_CX22702
241         case CX88_BOARD_HAUPPAUGE_DVB_T1:
242                 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
243                                                    &dev->core->i2c_adap);
244                 break;
245         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
246         case CX88_BOARD_CONEXANT_DVB_T1:
247                 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
248                                                    &dev->core->i2c_adap);
249                 break;
250 #endif
251         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
252                 dev->core->pll_addr = 0x61;
253                 dev->core->pll_desc = &dvb_pll_lg_z201;
254                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
255                                                  &dev->core->i2c_adap);
256                 break;
257         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
258                 dev->core->pll_addr = 0x60;
259                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
260                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
261                                                  &dev->core->i2c_adap);
262                 break;
263         case CX88_BOARD_KWORLD_DVB_T:
264         case CX88_BOARD_DNTV_LIVE_DVB_T:
265         case CX88_BOARD_ADSTECH_DVB_T_PCI:
266                 dev->core->pll_addr = 0x61;
267                 dev->core->pll_desc = &dvb_pll_unknown_1;
268                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
269                                                  &dev->core->i2c_adap);
270                 break;
271 #if HAVE_OR51132
272         case CX88_BOARD_PCHDTV_HD3000:
273                 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
274                                                  &dev->core->i2c_adap);
275                 break;
276 #endif
277 #if HAVE_LGDT3302
278         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
279                 dev->ts_gen_cntrl = 0x08;
280                 {
281                 /* Do a hardware reset of chip before using it. */
282                 struct cx88_core *core = dev->core;
283
284                 cx_clear(MO_GP0_IO, 1);
285                 mdelay(100);
286                 cx_set(MO_GP0_IO, 9); // ANT connector too FIXME
287                 mdelay(200);
288                 dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold_q,
289                                                     &dev->core->i2c_adap);
290                 }
291                 break;
292         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
293                 dev->ts_gen_cntrl = 0x08;
294                 {
295                 /* Do a hardware reset of chip before using it. */
296                 struct cx88_core *core = dev->core;
297
298                 cx_clear(MO_GP0_IO, 1);
299                 mdelay(100);
300                 cx_set(MO_GP0_IO, 9); /* ANT connector too FIXME */
301                 mdelay(200);
302                 dev->dvb.frontend = lgdt3302_attach(&fusionhdtv_3_gold_t,
303                                                     &dev->core->i2c_adap);
304                 }
305                 break;
306 #endif
307         default:
308                 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
309                        dev->core->name);
310                 break;
311         }
312         if (NULL == dev->dvb.frontend) {
313                 printk("%s: frontend initialization failed\n",dev->core->name);
314                 return -1;
315         }
316
317         if (dev->core->pll_desc) {
318                 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
319                 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
320         }
321
322         /* Copy the board name into the DVB structure */
323         strlcpy(dev->dvb.frontend->ops->info.name,
324                 cx88_boards[dev->core->board].name,
325                 sizeof(dev->dvb.frontend->ops->info.name));
326
327         /* register everything */
328         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
329 }
330
331 /* ----------------------------------------------------------- */
332
333 static int __devinit dvb_probe(struct pci_dev *pci_dev,
334                                const struct pci_device_id *pci_id)
335 {
336         struct cx8802_dev *dev;
337         struct cx88_core  *core;
338         int err;
339
340         /* general setup */
341         core = cx88_core_get(pci_dev);
342         if (NULL == core)
343                 return -EINVAL;
344
345         err = -ENODEV;
346         if (!cx88_boards[core->board].dvb)
347                 goto fail_core;
348
349         err = -ENOMEM;
350         dev = kmalloc(sizeof(*dev),GFP_KERNEL);
351         if (NULL == dev)
352                 goto fail_core;
353         memset(dev,0,sizeof(*dev));
354         dev->pci = pci_dev;
355         dev->core = core;
356
357         err = cx8802_init_common(dev);
358         if (0 != err)
359                 goto fail_free;
360
361         /* dvb stuff */
362         printk("%s/2: cx2388x based dvb card\n", core->name);
363         videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
364                             dev->pci, &dev->slock,
365                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
366                             V4L2_FIELD_TOP,
367                             sizeof(struct cx88_buffer),
368                             dev);
369         err = dvb_register(dev);
370         if (0 != err)
371                 goto fail_fini;
372         return 0;
373
374  fail_fini:
375         cx8802_fini_common(dev);
376  fail_free:
377         kfree(dev);
378  fail_core:
379         cx88_core_put(core,pci_dev);
380         return err;
381 }
382
383 static void __devexit dvb_remove(struct pci_dev *pci_dev)
384 {
385         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
386
387         /* dvb */
388         videobuf_dvb_unregister(&dev->dvb);
389
390         /* common */
391         cx8802_fini_common(dev);
392         cx88_core_put(dev->core,dev->pci);
393         kfree(dev);
394 }
395
396 static struct pci_device_id cx8802_pci_tbl[] = {
397         {
398                 .vendor       = 0x14f1,
399                 .device       = 0x8802,
400                 .subvendor    = PCI_ANY_ID,
401                 .subdevice    = PCI_ANY_ID,
402         },{
403                 /* --- end of list --- */
404         }
405 };
406 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
407
408 static struct pci_driver dvb_pci_driver = {
409         .name     = "cx88-dvb",
410         .id_table = cx8802_pci_tbl,
411         .probe    = dvb_probe,
412         .remove   = __devexit_p(dvb_remove),
413         .suspend  = cx8802_suspend_common,
414         .resume   = cx8802_resume_common,
415 };
416
417 static int dvb_init(void)
418 {
419         printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
420                (CX88_VERSION_CODE >> 16) & 0xff,
421                (CX88_VERSION_CODE >>  8) & 0xff,
422                CX88_VERSION_CODE & 0xff);
423 #ifdef SNAPSHOT
424         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
425                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
426 #endif
427         return pci_register_driver(&dvb_pci_driver);
428 }
429
430 static void dvb_fini(void)
431 {
432         pci_unregister_driver(&dvb_pci_driver);
433 }
434
435 module_init(dvb_init);
436 module_exit(dvb_fini);
437
438 /*
439  * Local variables:
440  * c-basic-offset: 8
441  * compile-command: "make DVB=1"
442  * End:
443  */