4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
24 #include <linux/mfd/arizona/core.h>
25 #include <linux/mfd/arizona/registers.h>
29 static const char *wm5102_core_supplies[] = {
34 int arizona_clk32k_enable(struct arizona *arizona)
38 mutex_lock(&arizona->clk_lock);
40 arizona->clk32k_ref++;
42 if (arizona->clk32k_ref == 1)
43 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
48 arizona->clk32k_ref--;
50 mutex_unlock(&arizona->clk_lock);
54 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
56 int arizona_clk32k_disable(struct arizona *arizona)
60 mutex_lock(&arizona->clk_lock);
62 BUG_ON(arizona->clk32k_ref <= 0);
64 arizona->clk32k_ref--;
66 if (arizona->clk32k_ref == 0)
67 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
68 ARIZONA_CLK_32K_ENA, 0);
70 mutex_unlock(&arizona->clk_lock);
74 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
76 static irqreturn_t arizona_clkgen_err(int irq, void *data)
78 struct arizona *arizona = data;
80 dev_err(arizona->dev, "CLKGEN error\n");
85 static irqreturn_t arizona_underclocked(int irq, void *data)
87 struct arizona *arizona = data;
91 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
94 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
99 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
100 dev_err(arizona->dev, "AIF3 underclocked\n");
101 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
102 dev_err(arizona->dev, "AIF2 underclocked\n");
103 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
104 dev_err(arizona->dev, "AIF1 underclocked\n");
105 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
106 dev_err(arizona->dev, "ISRC2 underclocked\n");
107 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
108 dev_err(arizona->dev, "ISRC1 underclocked\n");
109 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
110 dev_err(arizona->dev, "FX underclocked\n");
111 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
112 dev_err(arizona->dev, "ASRC underclocked\n");
113 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
114 dev_err(arizona->dev, "DAC underclocked\n");
115 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
116 dev_err(arizona->dev, "ADC underclocked\n");
117 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
118 dev_err(arizona->dev, "Mixer underclocked\n");
123 static irqreturn_t arizona_overclocked(int irq, void *data)
125 struct arizona *arizona = data;
129 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
132 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
137 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
138 dev_err(arizona->dev, "PWM overclocked\n");
139 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
140 dev_err(arizona->dev, "FX core overclocked\n");
141 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
142 dev_err(arizona->dev, "DAC SYS overclocked\n");
143 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
144 dev_err(arizona->dev, "DAC WARP overclocked\n");
145 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
146 dev_err(arizona->dev, "ADC overclocked\n");
147 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
148 dev_err(arizona->dev, "Mixer overclocked\n");
149 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
150 dev_err(arizona->dev, "AIF3 overclocked\n");
151 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
152 dev_err(arizona->dev, "AIF2 overclocked\n");
153 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
154 dev_err(arizona->dev, "AIF1 overclocked\n");
155 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
156 dev_err(arizona->dev, "Pad control overclocked\n");
158 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
160 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "Slimbus async overclocked\n");
162 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "Slimbus sync overclocked\n");
164 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "ASRC async system overclocked\n");
166 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
168 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ASRC sync system overclocked\n");
170 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
172 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "DSP1 overclocked\n");
174 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "ISRC2 overclocked\n");
176 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "ISRC1 overclocked\n");
182 static int arizona_wait_for_boot(struct arizona *arizona)
188 * We can't use an interrupt as we need to runtime resume to do so,
189 * we won't race with the interrupt handler as it'll be blocked on
192 for (i = 0; i < 5; i++) {
195 ret = regmap_read(arizona->regmap,
196 ARIZONA_INTERRUPT_RAW_STATUS_5, ®);
198 dev_err(arizona->dev, "Failed to read boot state: %d\n",
203 if (reg & ARIZONA_BOOT_DONE_STS)
207 if (reg & ARIZONA_BOOT_DONE_STS) {
208 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
209 ARIZONA_BOOT_DONE_STS);
211 dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
215 pm_runtime_mark_last_busy(arizona->dev);
220 #ifdef CONFIG_PM_RUNTIME
221 static int arizona_runtime_resume(struct device *dev)
223 struct arizona *arizona = dev_get_drvdata(dev);
226 dev_dbg(arizona->dev, "Leaving AoD mode\n");
228 ret = regulator_enable(arizona->dcvdd);
230 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
234 regcache_cache_only(arizona->regmap, false);
236 ret = arizona_wait_for_boot(arizona);
238 regulator_disable(arizona->dcvdd);
242 ret = regcache_sync(arizona->regmap);
244 dev_err(arizona->dev, "Failed to restore register cache\n");
245 regulator_disable(arizona->dcvdd);
252 static int arizona_runtime_suspend(struct device *dev)
254 struct arizona *arizona = dev_get_drvdata(dev);
256 dev_dbg(arizona->dev, "Entering AoD mode\n");
258 regulator_disable(arizona->dcvdd);
259 regcache_cache_only(arizona->regmap, true);
260 regcache_mark_dirty(arizona->regmap);
266 const struct dev_pm_ops arizona_pm_ops = {
267 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
268 arizona_runtime_resume,
271 EXPORT_SYMBOL_GPL(arizona_pm_ops);
273 static struct mfd_cell early_devs[] = {
274 { .name = "arizona-ldo1" },
277 static struct mfd_cell wm5102_devs[] = {
278 { .name = "arizona-extcon" },
279 { .name = "arizona-gpio" },
280 { .name = "arizona-haptics" },
281 { .name = "arizona-micsupp" },
282 { .name = "arizona-pwm" },
283 { .name = "wm5102-codec" },
286 static struct mfd_cell wm5110_devs[] = {
287 { .name = "arizona-extcon" },
288 { .name = "arizona-gpio" },
289 { .name = "arizona-haptics" },
290 { .name = "arizona-micsupp" },
291 { .name = "arizona-pwm" },
292 { .name = "wm5110-codec" },
295 int arizona_dev_init(struct arizona *arizona)
297 struct device *dev = arizona->dev;
298 const char *type_name;
299 unsigned int reg, val;
300 int (*apply_patch)(struct arizona *) = NULL;
303 dev_set_drvdata(arizona->dev, arizona);
304 mutex_init(&arizona->clk_lock);
306 if (dev_get_platdata(arizona->dev))
307 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
308 sizeof(arizona->pdata));
310 regcache_cache_only(arizona->regmap, true);
312 switch (arizona->type) {
315 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
316 arizona->core_supplies[i].supply
317 = wm5102_core_supplies[i];
318 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
321 dev_err(arizona->dev, "Unknown device type %d\n",
326 ret = mfd_add_devices(arizona->dev, -1, early_devs,
327 ARRAY_SIZE(early_devs), NULL, 0, NULL);
329 dev_err(dev, "Failed to add early children: %d\n", ret);
333 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
334 arizona->core_supplies);
336 dev_err(dev, "Failed to request core supplies: %d\n",
341 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
342 if (IS_ERR(arizona->dcvdd)) {
343 ret = PTR_ERR(arizona->dcvdd);
344 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
348 ret = regulator_bulk_enable(arizona->num_core_supplies,
349 arizona->core_supplies);
351 dev_err(dev, "Failed to enable core supplies: %d\n",
356 ret = regulator_enable(arizona->dcvdd);
358 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
362 if (arizona->pdata.reset) {
363 /* Start out with /RESET low to put the chip into reset */
364 ret = gpio_request_one(arizona->pdata.reset,
365 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
368 dev_err(dev, "Failed to request /RESET: %d\n", ret);
372 gpio_set_value_cansleep(arizona->pdata.reset, 1);
375 regcache_cache_only(arizona->regmap, false);
377 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
379 dev_err(dev, "Failed to read ID register: %d\n", ret);
383 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
386 dev_err(dev, "Failed to read revision register: %d\n", ret);
389 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
392 #ifdef CONFIG_MFD_WM5102
394 type_name = "WM5102";
395 if (arizona->type != WM5102) {
396 dev_err(arizona->dev, "WM5102 registered as %d\n",
398 arizona->type = WM5102;
400 apply_patch = wm5102_patch;
403 #ifdef CONFIG_MFD_WM5110
405 type_name = "WM5110";
406 if (arizona->type != WM5110) {
407 dev_err(arizona->dev, "WM5110 registered as %d\n",
409 arizona->type = WM5110;
411 apply_patch = wm5110_patch;
415 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
419 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
421 /* If we have a /RESET GPIO we'll already be reset */
422 if (!arizona->pdata.reset) {
423 regcache_mark_dirty(arizona->regmap);
425 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
427 dev_err(dev, "Failed to reset device: %d\n", ret);
431 ret = regcache_sync(arizona->regmap);
433 dev_err(dev, "Failed to sync device: %d\n", ret);
438 ret = arizona_wait_for_boot(arizona);
440 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
445 ret = apply_patch(arizona);
447 dev_err(arizona->dev, "Failed to apply patch: %d\n",
453 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
454 if (!arizona->pdata.gpio_defaults[i])
457 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
458 arizona->pdata.gpio_defaults[i]);
461 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
462 pm_runtime_use_autosuspend(arizona->dev);
463 pm_runtime_enable(arizona->dev);
466 if (!arizona->pdata.clk32k_src)
467 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
469 switch (arizona->pdata.clk32k_src) {
470 case ARIZONA_32KZ_MCLK1:
471 case ARIZONA_32KZ_MCLK2:
472 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
473 ARIZONA_CLK_32K_SRC_MASK,
474 arizona->pdata.clk32k_src - 1);
476 case ARIZONA_32KZ_NONE:
477 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
478 ARIZONA_CLK_32K_SRC_MASK, 2);
481 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
482 arizona->pdata.clk32k_src);
487 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
488 /* Default for both is 0 so noop with defaults */
489 val = arizona->pdata.dmic_ref[i]
490 << ARIZONA_IN1_DMIC_SUP_SHIFT;
491 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
493 regmap_update_bits(arizona->regmap,
494 ARIZONA_IN1L_CONTROL + (i * 8),
495 ARIZONA_IN1_DMIC_SUP_MASK |
496 ARIZONA_IN1_MODE_MASK, val);
499 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
500 /* Default is 0 so noop with defaults */
501 if (arizona->pdata.out_mono[i])
502 val = ARIZONA_OUT1_MONO;
506 regmap_update_bits(arizona->regmap,
507 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
508 ARIZONA_OUT1_MONO, val);
511 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
512 if (arizona->pdata.spk_mute[i])
513 regmap_update_bits(arizona->regmap,
514 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
515 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
516 ARIZONA_SPK1_MUTE_SEQ1_MASK,
517 arizona->pdata.spk_mute[i]);
519 if (arizona->pdata.spk_fmt[i])
520 regmap_update_bits(arizona->regmap,
521 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
522 ARIZONA_SPK1_FMT_MASK,
523 arizona->pdata.spk_fmt[i]);
526 /* Set up for interrupts */
527 ret = arizona_irq_init(arizona);
531 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
532 arizona_clkgen_err, arizona);
533 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
534 arizona_overclocked, arizona);
535 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
536 arizona_underclocked, arizona);
538 switch (arizona->type) {
540 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
541 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
544 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
545 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
550 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
554 #ifdef CONFIG_PM_RUNTIME
555 regulator_disable(arizona->dcvdd);
561 arizona_irq_exit(arizona);
563 if (arizona->pdata.reset) {
564 gpio_set_value_cansleep(arizona->pdata.reset, 1);
565 gpio_free(arizona->pdata.reset);
568 regulator_disable(arizona->dcvdd);
570 regulator_bulk_disable(arizona->num_core_supplies,
571 arizona->core_supplies);
573 mfd_remove_devices(dev);
576 EXPORT_SYMBOL_GPL(arizona_dev_init);
578 int arizona_dev_exit(struct arizona *arizona)
580 mfd_remove_devices(arizona->dev);
581 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
582 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
583 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
584 pm_runtime_disable(arizona->dev);
585 arizona_irq_exit(arizona);
588 EXPORT_SYMBOL_GPL(arizona_dev_exit);