drivers/mmc/host/atmel-mci.c

   1 /*
   2  * Atmel MultiMedia Card Interface driver
   3  *
   4  * Copyright (C) 2004-2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/blkdev.h>
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/err.h>
  17 #include <linux/gpio.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/ioport.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/scatterlist.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/slab.h>
  26 #include <linux/stat.h>
  27 #include <linux/types.h>
  28
  29 #include <linux/mmc/host.h>
  30 #include <linux/mmc/sdio.h>
  31
  32 #include <mach/atmel-mci.h>
  33 #include <linux/atmel-mci.h>
  34 #include <linux/atmel_pdc.h>
  35
  36 #include <asm/io.h>
  37 #include <asm/unaligned.h>
  38
  39 #include <mach/cpu.h>
  40 #include <mach/board.h>
  41
  42 #include "atmel-mci-regs.h"
  43
  44 #define ATMCI_DATA_ERROR_FLAGS  (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
  45 #define ATMCI_DMA_THRESHOLD     16
  46
  47 enum {
  48         EVENT_CMD_RDY = 0,
  49         EVENT_XFER_COMPLETE,
  50         EVENT_NOTBUSY,
  51         EVENT_DATA_ERROR,
  52 };
  53
  54 enum atmel_mci_state {
  55         STATE_IDLE = 0,
  56         STATE_SENDING_CMD,
  57         STATE_DATA_XFER,
  58         STATE_WAITING_NOTBUSY,
  59         STATE_SENDING_STOP,
  60         STATE_END_REQUEST,
  61 };
  62
  63 enum atmci_xfer_dir {
  64         XFER_RECEIVE = 0,
  65         XFER_TRANSMIT,
  66 };
  67
  68 enum atmci_pdc_buf {
  69         PDC_FIRST_BUF = 0,
  70         PDC_SECOND_BUF,
  71 };
  72
  73 struct atmel_mci_caps {
  74         bool    has_dma;
  75         bool    has_pdc;
  76         bool    has_cfg_reg;
  77         bool    has_cstor_reg;
  78         bool    has_highspeed;
  79         bool    has_rwproof;
  80         bool    has_odd_clk_div;
  81         bool    has_bad_data_ordering;
  82         bool    need_reset_after_xfer;
  83         bool    need_blksz_mul_4;
  84 };
  85
  86 struct atmel_mci_dma {
  87         struct dma_chan                 *chan;
  88         struct dma_async_tx_descriptor  *data_desc;
  89 };
  90
  91 /**
  92  * struct atmel_mci - MMC controller state shared between all slots
  93  * @lock: Spinlock protecting the queue and associated data.
  94  * @regs: Pointer to MMIO registers.
  95  * @sg: Scatterlist entry currently being processed by PIO or PDC code.
  96  * @pio_offset: Offset into the current scatterlist entry.
  97  * @buffer: Buffer used if we don't have the r/w proof capability. We
  98  *      don't have the time to switch pdc buffers so we have to use only
  99  *      one buffer for the full transaction.
 100  * @buf_size: size of the buffer.
 101  * @phys_buf_addr: buffer address needed for pdc.
 102  * @cur_slot: The slot which is currently using the controller.
 103  * @mrq: The request currently being processed on @cur_slot,
 104  *      or NULL if the controller is idle.
 105  * @cmd: The command currently being sent to the card, or NULL.
 106  * @data: The data currently being transferred, or NULL if no data
 107  *      transfer is in progress.
 108  * @data_size: just data->blocks * data->blksz.
 109  * @dma: DMA client state.
 110  * @data_chan: DMA channel being used for the current data transfer.
 111  * @cmd_status: Snapshot of SR taken upon completion of the current
 112  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
 113  * @data_status: Snapshot of SR taken upon completion of the current
 114  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
 115  *      EVENT_DATA_ERROR is pending.
 116  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
 117  *      to be sent.
 118  * @tasklet: Tasklet running the request state machine.
 119  * @pending_events: Bitmask of events flagged by the interrupt handler
 120  *      to be processed by the tasklet.
 121  * @completed_events: Bitmask of events which the state machine has
 122  *      processed.
 123  * @state: Tasklet state.
 124  * @queue: List of slots waiting for access to the controller.
 125  * @need_clock_update: Update the clock rate before the next request.
 126  * @need_reset: Reset controller before next request.
 127  * @timer: Timer to balance the data timeout error flag which cannot rise.
 128  * @mode_reg: Value of the MR register.
 129  * @cfg_reg: Value of the CFG register.
 130  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
 131  *      rate and timeout calculations.
 132  * @mapbase: Physical address of the MMIO registers.
 133  * @mck: The peripheral bus clock hooked up to the MMC controller.
 134  * @pdev: Platform device associated with the MMC controller.
 135  * @slot: Slots sharing this MMC controller.
 136  * @caps: MCI capabilities depending on MCI version.
 137  * @prepare_data: function to setup MCI before data transfer which
 138  * depends on MCI capabilities.
 139  * @submit_data: function to start data transfer which depends on MCI
 140  * capabilities.
 141  * @stop_transfer: function to stop data transfer which depends on MCI
 142  * capabilities.
 143  *
 144  * Locking
 145  * =======
 146  *
 147  * @lock is a softirq-safe spinlock protecting @queue as well as
 148  * @cur_slot, @mrq and @state. These must always be updated
 149  * at the same time while holding @lock.
 150  *
 151  * @lock also protects mode_reg and need_clock_update since these are
 152  * used to synchronize mode register updates with the queue
 153  * processing.
 154  *
 155  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
 156  * and must always be written at the same time as the slot is added to
 157  * @queue.
 158  *
 159  * @pending_events and @completed_events are accessed using atomic bit
 160  * operations, so they don't need any locking.
 161  *
 162  * None of the fields touched by the interrupt handler need any
 163  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
 164  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
 165  * interrupts must be disabled and @data_status updated with a
 166  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
 167  * CMDRDY interrupt must be disabled and @cmd_status updated with a
 168  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
 169  * bytes_xfered field of @data must be written. This is ensured by
 170  * using barriers.
 171  */
 172 struct atmel_mci {
 173         spinlock_t              lock;
 174         void __iomem            *regs;
 175
 176         struct scatterlist      *sg;
 177         unsigned int            pio_offset;
 178         unsigned int            *buffer;
 179         unsigned int            buf_size;
 180         dma_addr_t              buf_phys_addr;
 181
 182         struct atmel_mci_slot   *cur_slot;
 183         struct mmc_request      *mrq;
 184         struct mmc_command      *cmd;
 185         struct mmc_data         *data;
 186         unsigned int            data_size;
 187
 188         struct atmel_mci_dma    dma;
 189         struct dma_chan         *data_chan;
 190         struct dma_slave_config dma_conf;
 191
 192         u32                     cmd_status;
 193         u32                     data_status;
 194         u32                     stop_cmdr;
 195
 196         struct tasklet_struct   tasklet;
 197         unsigned long           pending_events;
 198         unsigned long           completed_events;
 199         enum atmel_mci_state    state;
 200         struct list_head        queue;
 201
 202         bool                    need_clock_update;
 203         bool                    need_reset;
 204         struct timer_list       timer;
 205         u32                     mode_reg;
 206         u32                     cfg_reg;
 207         unsigned long           bus_hz;
 208         unsigned long           mapbase;
 209         struct clk              *mck;
 210         struct platform_device  *pdev;
 211
 212         struct atmel_mci_slot   *slot[ATMCI_MAX_NR_SLOTS];
 213
 214         struct atmel_mci_caps   caps;
 215
 216         u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data);
 217         void (*submit_data)(struct atmel_mci *host, struct mmc_data *data);
 218         void (*stop_transfer)(struct atmel_mci *host);
 219 };
 220
 221 /**
 222  * struct atmel_mci_slot - MMC slot state
 223  * @mmc: The mmc_host representing this slot.
 224  * @host: The MMC controller this slot is using.
 225  * @sdc_reg: Value of SDCR to be written before using this slot.
 226  * @sdio_irq: SDIO irq mask for this slot.
 227  * @mrq: mmc_request currently being processed or waiting to be
 228  *      processed, or NULL when the slot is idle.
 229  * @queue_node: List node for placing this node in the @queue list of
 230  *      &struct atmel_mci.
 231  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
 232  * @flags: Random state bits associated with the slot.
 233  * @detect_pin: GPIO pin used for card detection, or negative if not
 234  *      available.
 235  * @wp_pin: GPIO pin used for card write protect sending, or negative
 236  *      if not available.
 237  * @detect_is_active_high: The state of the detect pin when it is active.
 238  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
 239  */
 240 struct atmel_mci_slot {
 241         struct mmc_host         *mmc;
 242         struct atmel_mci        *host;
 243
 244         u32                     sdc_reg;
 245         u32                     sdio_irq;
 246
 247         struct mmc_request      *mrq;
 248         struct list_head        queue_node;
 249
 250         unsigned int            clock;
 251         unsigned long           flags;
 252 #define ATMCI_CARD_PRESENT      0
 253 #define ATMCI_CARD_NEED_INIT    1
 254 #define ATMCI_SHUTDOWN          2
 255 #define ATMCI_SUSPENDED         3
 256
 257         int                     detect_pin;
 258         int                     wp_pin;
 259         bool                    detect_is_active_high;
 260
 261         struct timer_list       detect_timer;
 262 };
 263
 264 #define atmci_test_and_clear_pending(host, event)               \
 265         test_and_clear_bit(event, &host->pending_events)
 266 #define atmci_set_completed(host, event)                        \
 267         set_bit(event, &host->completed_events)
 268 #define atmci_set_pending(host, event)                          \
 269         set_bit(event, &host->pending_events)
 270
 271 /*
 272  * The debugfs stuff below is mostly optimized away when
 273  * CONFIG_DEBUG_FS is not set.
 274  */
 275 static int atmci_req_show(struct seq_file *s, void *v)
 276 {
 277         struct atmel_mci_slot   *slot = s->private;
 278         struct mmc_request      *mrq;
 279         struct mmc_command      *cmd;
 280         struct mmc_command      *stop;
 281         struct mmc_data         *data;
 282
 283         /* Make sure we get a consistent snapshot */
 284         spin_lock_bh(&slot->host->lock);
 285         mrq = slot->mrq;
 286
 287         if (mrq) {
 288                 cmd = mrq->cmd;
 289                 data = mrq->data;
 290                 stop = mrq->stop;
 291
 292                 if (cmd)
 293                         seq_printf(s,
 294                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 295                                 cmd->opcode, cmd->arg, cmd->flags,
 296                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
 297                                 cmd->resp[3], cmd->error);
 298                 if (data)
 299                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
 300                                 data->bytes_xfered, data->blocks,
 301                                 data->blksz, data->flags, data->error);
 302                 if (stop)
 303                         seq_printf(s,
 304                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 305                                 stop->opcode, stop->arg, stop->flags,
 306                                 stop->resp[0], stop->resp[1], stop->resp[2],
 307                                 stop->resp[3], stop->error);
 308         }
 309
 310         spin_unlock_bh(&slot->host->lock);
 311
 312         return 0;
 313 }
 314
 315 static int atmci_req_open(struct inode *inode, struct file *file)
 316 {
 317         return single_open(file, atmci_req_show, inode->i_private);
 318 }
 319
 320 static const struct file_operations atmci_req_fops = {
 321         .owner          = THIS_MODULE,
 322         .open           = atmci_req_open,
 323         .read           = seq_read,
 324         .llseek         = seq_lseek,
 325         .release        = single_release,
 326 };
 327
 328 static void atmci_show_status_reg(struct seq_file *s,
 329                 const char *regname, u32 value)
 330 {
 331         static const char       *sr_bit[] = {
 332                 [0]     = "CMDRDY",
 333                 [1]     = "RXRDY",
 334                 [2]     = "TXRDY",
 335                 [3]     = "BLKE",
 336                 [4]     = "DTIP",
 337                 [5]     = "NOTBUSY",
 338                 [6]     = "ENDRX",
 339                 [7]     = "ENDTX",
 340                 [8]     = "SDIOIRQA",
 341                 [9]     = "SDIOIRQB",
 342                 [12]    = "SDIOWAIT",
 343                 [14]    = "RXBUFF",
 344                 [15]    = "TXBUFE",
 345                 [16]    = "RINDE",
 346                 [17]    = "RDIRE",
 347                 [18]    = "RCRCE",
 348                 [19]    = "RENDE",
 349                 [20]    = "RTOE",
 350                 [21]    = "DCRCE",
 351                 [22]    = "DTOE",
 352                 [23]    = "CSTOE",
 353                 [24]    = "BLKOVRE",
 354                 [25]    = "DMADONE",
 355                 [26]    = "FIFOEMPTY",
 356                 [27]    = "XFRDONE",
 357                 [30]    = "OVRE",
 358                 [31]    = "UNRE",
 359         };
 360         unsigned int            i;
 361
 362         seq_printf(s, "%s:\t0x%08x", regname, value);
 363         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
 364                 if (value & (1 << i)) {
 365                         if (sr_bit[i])
 366                                 seq_printf(s, " %s", sr_bit[i]);
 367                         else
 368                                 seq_puts(s, " UNKNOWN");
 369                 }
 370         }
 371         seq_putc(s, '\n');
 372 }
 373
 374 static int atmci_regs_show(struct seq_file *s, void *v)
 375 {
 376         struct atmel_mci        *host = s->private;
 377         u32                     *buf;
 378
 379         buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL);
 380         if (!buf)
 381                 return -ENOMEM;
 382
 383         /*
 384          * Grab a more or less consistent snapshot. Note that we're
 385          * not disabling interrupts, so IMR and SR may not be
 386          * consistent.
 387          */
 388         spin_lock_bh(&host->lock);
 389         clk_enable(host->mck);
 390         memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE);
 391         clk_disable(host->mck);
 392         spin_unlock_bh(&host->lock);
 393
 394         seq_printf(s, "MR:\t0x%08x%s%s ",
 395                         buf[ATMCI_MR / 4],
 396                         buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "",
 397                         buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "");
 398         if (host->caps.has_odd_clk_div)
 399                 seq_printf(s, "{CLKDIV,CLKODD}=%u\n",
 400                                 ((buf[ATMCI_MR / 4] & 0xff) << 1)
 401                                 | ((buf[ATMCI_MR / 4] >> 16) & 1));
 402         else
 403                 seq_printf(s, "CLKDIV=%u\n",
 404                                 (buf[ATMCI_MR / 4] & 0xff));
 405         seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]);
 406         seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]);
 407         seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]);
 408         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
 409                         buf[ATMCI_BLKR / 4],
 410                         buf[ATMCI_BLKR / 4] & 0xffff,
 411                         (buf[ATMCI_BLKR / 4] >> 16) & 0xffff);
 412         if (host->caps.has_cstor_reg)
 413                 seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]);
 414
 415         /* Don't read RSPR and RDR; it will consume the data there */
 416
 417         atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]);
 418         atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]);
 419
 420         if (host->caps.has_dma) {
 421                 u32 val;
 422
 423                 val = buf[ATMCI_DMA / 4];
 424                 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
 425                                 val, val & 3,
 426                                 ((val >> 4) & 3) ?
 427                                         1 << (((val >> 4) & 3) + 1) : 1,
 428                                 val & ATMCI_DMAEN ? " DMAEN" : "");
 429         }
 430         if (host->caps.has_cfg_reg) {
 431                 u32 val;
 432
 433                 val = buf[ATMCI_CFG / 4];
 434                 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
 435                                 val,
 436                                 val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
 437                                 val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
 438                                 val & ATMCI_CFG_HSMODE ? " HSMODE" : "",
 439                                 val & ATMCI_CFG_LSYNC ? " LSYNC" : "");
 440         }
 441
 442         kfree(buf);
 443
 444         return 0;
 445 }
 446
 447 static int atmci_regs_open(struct inode *inode, struct file *file)
 448 {
 449         return single_open(file, atmci_regs_show, inode->i_private);
 450 }
 451
 452 static const struct file_operations atmci_regs_fops = {
 453         .owner          = THIS_MODULE,
 454         .open           = atmci_regs_open,
 455         .read           = seq_read,
 456         .llseek         = seq_lseek,
 457         .release        = single_release,
 458 };
 459
 460 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
 461 {
 462         struct mmc_host         *mmc = slot->mmc;
 463         struct atmel_mci        *host = slot->host;
 464         struct dentry           *root;
 465         struct dentry           *node;
 466
 467         root = mmc->debugfs_root;
 468         if (!root)
 469                 return;
 470
 471         node = debugfs_create_file("regs", S_IRUSR, root, host,
 472                         &atmci_regs_fops);
 473         if (IS_ERR(node))
 474                 return;
 475         if (!node)
 476                 goto err;
 477
 478         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
 479         if (!node)
 480                 goto err;
 481
 482         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
 483         if (!node)
 484                 goto err;
 485
 486         node = debugfs_create_x32("pending_events", S_IRUSR, root,
 487                                      (u32 *)&host->pending_events);
 488         if (!node)
 489                 goto err;
 490
 491         node = debugfs_create_x32("completed_events", S_IRUSR, root,
 492                                      (u32 *)&host->completed_events);
 493         if (!node)
 494                 goto err;
 495
 496         return;
 497
 498 err:
 499         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
 500 }
 501
 502 static inline unsigned int atmci_get_version(struct atmel_mci *host)
 503 {
 504         return atmci_readl(host, ATMCI_VERSION) & 0x00000fff;
 505 }
 506
 507 static void atmci_timeout_timer(unsigned long data)
 508 {
 509         struct atmel_mci *host;
 510
 511         host = (struct atmel_mci *)data;
 512
 513         dev_dbg(&host->pdev->dev, "software timeout\n");
 514
 515         if (host->mrq->cmd->data) {
 516                 host->mrq->cmd->data->error = -ETIMEDOUT;
 517                 host->data = NULL;
 518         } else {
 519                 host->mrq->cmd->error = -ETIMEDOUT;
 520                 host->cmd = NULL;
 521         }
 522         host->need_reset = 1;
 523         host->state = STATE_END_REQUEST;
 524         smp_wmb();
 525         tasklet_schedule(&host->tasklet);
 526 }
 527
 528 static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
 529                                         unsigned int ns)
 530 {
 531         /*
 532          * It is easier here to use us instead of ns for the timeout,
 533          * it prevents from overflows during calculation.
 534          */
 535         unsigned int us = DIV_ROUND_UP(ns, 1000);
 536
 537         /* Maximum clock frequency is host->bus_hz/2 */
 538         return us * (DIV_ROUND_UP(host->bus_hz, 2000000));
 539 }
 540
 541 static void atmci_set_timeout(struct atmel_mci *host,
 542                 struct atmel_mci_slot *slot, struct mmc_data *data)
 543 {
 544         static unsigned dtomul_to_shift[] = {
 545                 0, 4, 7, 8, 10, 12, 16, 20
 546         };
 547         unsigned        timeout;
 548         unsigned        dtocyc;
 549         unsigned        dtomul;
 550
 551         timeout = atmci_ns_to_clocks(host, data->timeout_ns)
 552                 + data->timeout_clks;
 553
 554         for (dtomul = 0; dtomul < 8; dtomul++) {
 555                 unsigned shift = dtomul_to_shift[dtomul];
 556                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
 557                 if (dtocyc < 15)
 558                         break;
 559         }
 560
 561         if (dtomul >= 8) {
 562                 dtomul = 7;
 563                 dtocyc = 15;
 564         }
 565
 566         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
 567                         dtocyc << dtomul_to_shift[dtomul]);
 568         atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc)));
 569 }
 570
 571 /*
 572  * Return mask with command flags to be enabled for this command.
 573  */
 574 static u32 atmci_prepare_command(struct mmc_host *mmc,
 575                                  struct mmc_command *cmd)
 576 {
 577         struct mmc_data *data;
 578         u32             cmdr;
 579
 580         cmd->error = -EINPROGRESS;
 581
 582         cmdr = ATMCI_CMDR_CMDNB(cmd->opcode);
 583
 584         if (cmd->flags & MMC_RSP_PRESENT) {
 585                 if (cmd->flags & MMC_RSP_136)
 586                         cmdr |= ATMCI_CMDR_RSPTYP_136BIT;
 587                 else
 588                         cmdr |= ATMCI_CMDR_RSPTYP_48BIT;
 589         }
 590
 591         /*
 592          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
 593          * it's too difficult to determine whether this is an ACMD or
 594          * not. Better make it 64.
 595          */
 596         cmdr |= ATMCI_CMDR_MAXLAT_64CYC;
 597
 598         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
 599                 cmdr |= ATMCI_CMDR_OPDCMD;
 600
 601         data = cmd->data;
 602         if (data) {
 603                 cmdr |= ATMCI_CMDR_START_XFER;
 604
 605                 if (cmd->opcode == SD_IO_RW_EXTENDED) {
 606                         cmdr |= ATMCI_CMDR_SDIO_BLOCK;
 607                 } else {
 608                         if (data->flags & MMC_DATA_STREAM)
 609                                 cmdr |= ATMCI_CMDR_STREAM;
 610                         else if (data->blocks > 1)
 611                                 cmdr |= ATMCI_CMDR_MULTI_BLOCK;
 612                         else
 613                                 cmdr |= ATMCI_CMDR_BLOCK;
 614                 }
 615
 616                 if (data->flags & MMC_DATA_READ)
 617                         cmdr |= ATMCI_CMDR_TRDIR_READ;
 618         }
 619
 620         return cmdr;
 621 }
 622
 623 static void atmci_send_command(struct atmel_mci *host,
 624                 struct mmc_command *cmd, u32 cmd_flags)
 625 {
 626         WARN_ON(host->cmd);
 627         host->cmd = cmd;
 628
 629         dev_vdbg(&host->pdev->dev,
 630                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
 631                         cmd->arg, cmd_flags);
 632
 633         atmci_writel(host, ATMCI_ARGR, cmd->arg);
 634         atmci_writel(host, ATMCI_CMDR, cmd_flags);
 635 }
 636
 637 static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
 638 {
 639         dev_dbg(&host->pdev->dev, "send stop command\n");
 640         atmci_send_command(host, data->stop, host->stop_cmdr);
 641         atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
 642 }
 643
 644 /*
 645  * Configure given PDC buffer taking care of alignement issues.
 646  * Update host->data_size and host->sg.
 647  */
 648 static void atmci_pdc_set_single_buf(struct atmel_mci *host,
 649         enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb)
 650 {
 651         u32 pointer_reg, counter_reg;
 652         unsigned int buf_size;
 653
 654         if (dir == XFER_RECEIVE) {
 655                 pointer_reg = ATMEL_PDC_RPR;
 656                 counter_reg = ATMEL_PDC_RCR;
 657         } else {
 658                 pointer_reg = ATMEL_PDC_TPR;
 659                 counter_reg = ATMEL_PDC_TCR;
 660         }
 661
 662         if (buf_nb == PDC_SECOND_BUF) {
 663                 pointer_reg += ATMEL_PDC_SCND_BUF_OFF;
 664                 counter_reg += ATMEL_PDC_SCND_BUF_OFF;
 665         }
 666
 667         if (!host->caps.has_rwproof) {
 668                 buf_size = host->buf_size;
 669                 atmci_writel(host, pointer_reg, host->buf_phys_addr);
 670         } else {
 671                 buf_size = sg_dma_len(host->sg);
 672                 atmci_writel(host, pointer_reg, sg_dma_address(host->sg));
 673         }
 674
 675         if (host->data_size <= buf_size) {
 676                 if (host->data_size & 0x3) {
 677                         /* If size is different from modulo 4, transfer bytes */
 678                         atmci_writel(host, counter_reg, host->data_size);
 679                         atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE);
 680                 } else {
 681                         /* Else transfer 32-bits words */
 682                         atmci_writel(host, counter_reg, host->data_size / 4);
 683                 }
 684                 host->data_size = 0;
 685         } else {
 686                 /* We assume the size of a page is 32-bits aligned */
 687                 atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4);
 688                 host->data_size -= sg_dma_len(host->sg);
 689                 if (host->data_size)
 690                         host->sg = sg_next(host->sg);
 691         }
 692 }
 693
 694 /*
 695  * Configure PDC buffer according to the data size ie configuring one or two
 696  * buffers. Don't use this function if you want to configure only the second
 697  * buffer. In this case, use atmci_pdc_set_single_buf.
 698  */
 699 static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir)
 700 {
 701         atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF);
 702         if (host->data_size)
 703                 atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF);
 704 }
 705
 706 /*
 707  * Unmap sg lists, called when transfer is finished.
 708  */
 709 static void atmci_pdc_cleanup(struct atmel_mci *host)
 710 {
 711         struct mmc_data         *data = host->data;
 712
 713         if (data)
 714                 dma_unmap_sg(&host->pdev->dev,
 715                                 data->sg, data->sg_len,
 716                                 ((data->flags & MMC_DATA_WRITE)
 717                                  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 718 }
 719
 720 /*
 721  * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after
 722  * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY
 723  * interrupt needed for both transfer directions.
 724  */
 725 static void atmci_pdc_complete(struct atmel_mci *host)
 726 {
 727         int transfer_size = host->data->blocks * host->data->blksz;
 728         int i;
 729
 730         atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
 731
 732         if ((!host->caps.has_rwproof)
 733             && (host->data->flags & MMC_DATA_READ)) {
 734                 if (host->caps.has_bad_data_ordering)
 735                         for (i = 0; i < transfer_size; i++)
 736                                 host->buffer[i] = swab32(host->buffer[i]);
 737                 sg_copy_from_buffer(host->data->sg, host->data->sg_len,
 738                                     host->buffer, transfer_size);
 739         }
 740
 741         atmci_pdc_cleanup(host);
 742
 743         /*
 744          * If the card was removed, data will be NULL. No point trying
 745          * to send the stop command or waiting for NBUSY in this case.
 746          */
 747         if (host->data) {
 748                 dev_dbg(&host->pdev->dev,
 749                         "(%s) set pending xfer complete\n", __func__);
 750                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 751                 tasklet_schedule(&host->tasklet);
 752         }
 753 }
 754
 755 static void atmci_dma_cleanup(struct atmel_mci *host)
 756 {
 757         struct mmc_data                 *data = host->data;
 758
 759         if (data)
 760                 dma_unmap_sg(host->dma.chan->device->dev,
 761                                 data->sg, data->sg_len,
 762                                 ((data->flags & MMC_DATA_WRITE)
 763                                  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 764 }
 765
 766 /*
 767  * This function is called by the DMA driver from tasklet context.
 768  */
 769 static void atmci_dma_complete(void *arg)
 770 {
 771         struct atmel_mci        *host = arg;
 772         struct mmc_data         *data = host->data;
 773
 774         dev_vdbg(&host->pdev->dev, "DMA complete\n");
 775
 776         if (host->caps.has_dma)
 777                 /* Disable DMA hardware handshaking on MCI */
 778                 atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN);
 779
 780         atmci_dma_cleanup(host);
 781
 782         /*
 783          * If the card was removed, data will be NULL. No point trying
 784          * to send the stop command or waiting for NBUSY in this case.
 785          */
 786         if (data) {
 787                 dev_dbg(&host->pdev->dev,
 788                         "(%s) set pending xfer complete\n", __func__);
 789                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 790                 tasklet_schedule(&host->tasklet);
 791
 792                 /*
 793                  * Regardless of what the documentation says, we have
 794                  * to wait for NOTBUSY even after block read
 795                  * operations.
 796                  *
 797                  * When the DMA transfer is complete, the controller
 798                  * may still be reading the CRC from the card, i.e.
 799                  * the data transfer is still in progress and we
 800                  * haven't seen all the potential error bits yet.
 801                  *
 802                  * The interrupt handler will schedule a different
 803                  * tasklet to finish things up when the data transfer
 804                  * is completely done.
 805                  *
 806                  * We may not complete the mmc request here anyway
 807                  * because the mmc layer may call back and cause us to
 808                  * violate the "don't submit new operations from the
 809                  * completion callback" rule of the dma engine
 810                  * framework.
 811                  */
 812                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 813         }
 814 }
 815
 816 /*
 817  * Returns a mask of interrupt flags to be enabled after the whole
 818  * request has been prepared.
 819  */
 820 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
 821 {
 822         u32 iflags;
 823
 824         data->error = -EINPROGRESS;
 825
 826         host->sg = data->sg;
 827         host->data = data;
 828         host->data_chan = NULL;
 829
 830         iflags = ATMCI_DATA_ERROR_FLAGS;
 831
 832         /*
 833          * Errata: MMC data write operation with less than 12
 834          * bytes is impossible.
 835          *
 836          * Errata: MCI Transmit Data Register (TDR) FIFO
 837          * corruption when length is not multiple of 4.
 838          */
 839         if (data->blocks * data->blksz < 12
 840                         || (data->blocks * data->blksz) & 3)
 841                 host->need_reset = true;
 842
 843         host->pio_offset = 0;
 844         if (data->flags & MMC_DATA_READ)
 845                 iflags |= ATMCI_RXRDY;
 846         else
 847                 iflags |= ATMCI_TXRDY;
 848
 849         return iflags;
 850 }
 851
 852 /*
 853  * Set interrupt flags and set block length into the MCI mode register even
 854  * if this value is also accessible in the MCI block register. It seems to be
 855  * necessary before the High Speed MCI version. It also map sg and configure
 856  * PDC registers.
 857  */
 858 static u32
 859 atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)
 860 {
 861         u32 iflags, tmp;
 862         unsigned int sg_len;
 863         enum dma_data_direction dir;
 864         int i;
 865
 866         data->error = -EINPROGRESS;
 867
 868         host->data = data;
 869         host->sg = data->sg;
 870         iflags = ATMCI_DATA_ERROR_FLAGS;
 871
 872         /* Enable pdc mode */
 873         atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE);
 874
 875         if (data->flags & MMC_DATA_READ) {
 876                 dir = DMA_FROM_DEVICE;
 877                 iflags |= ATMCI_ENDRX | ATMCI_RXBUFF;
 878         } else {
 879                 dir = DMA_TO_DEVICE;
 880                 iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE;
 881         }
 882
 883         /* Set BLKLEN */
 884         tmp = atmci_readl(host, ATMCI_MR);
 885         tmp &= 0x0000ffff;
 886         tmp |= ATMCI_BLKLEN(data->blksz);
 887         atmci_writel(host, ATMCI_MR, tmp);
 888
 889         /* Configure PDC */
 890         host->data_size = data->blocks * data->blksz;
 891         sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
 892
 893         if ((!host->caps.has_rwproof)
 894             && (host->data->flags & MMC_DATA_WRITE)) {
 895                 sg_copy_to_buffer(host->data->sg, host->data->sg_len,
 896                                   host->buffer, host->data_size);
 897                 if (host->caps.has_bad_data_ordering)
 898                         for (i = 0; i < host->data_size; i++)
 899                                 host->buffer[i] = swab32(host->buffer[i]);
 900         }
 901
 902         if (host->data_size)
 903                 atmci_pdc_set_both_buf(host,
 904                         ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT));
 905
 906         return iflags;
 907 }
 908
 909 static u32
 910 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 911 {
 912         struct dma_chan                 *chan;
 913         struct dma_async_tx_descriptor  *desc;
 914         struct scatterlist              *sg;
 915         unsigned int                    i;
 916         enum dma_data_direction         direction;
 917         enum dma_transfer_direction     slave_dirn;
 918         unsigned int                    sglen;
 919         u32                             maxburst;
 920         u32 iflags;
 921
 922         data->error = -EINPROGRESS;
 923
 924         WARN_ON(host->data);
 925         host->sg = NULL;
 926         host->data = data;
 927
 928         iflags = ATMCI_DATA_ERROR_FLAGS;
 929
 930         /*
 931          * We don't do DMA on "complex" transfers, i.e. with
 932          * non-word-aligned buffers or lengths. Also, we don't bother
 933          * with all the DMA setup overhead for short transfers.
 934          */
 935         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
 936                 return atmci_prepare_data(host, data);
 937         if (data->blksz & 3)
 938                 return atmci_prepare_data(host, data);
 939
 940         for_each_sg(data->sg, sg, data->sg_len, i) {
 941                 if (sg->offset & 3 || sg->length & 3)
 942                         return atmci_prepare_data(host, data);
 943         }
 944
 945         /* If we don't have a channel, we can't do DMA */
 946         chan = host->dma.chan;
 947         if (chan)
 948                 host->data_chan = chan;
 949
 950         if (!chan)
 951                 return -ENODEV;
 952
 953         if (data->flags & MMC_DATA_READ) {
 954                 direction = DMA_FROM_DEVICE;
 955                 host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM;
 956                 maxburst = atmci_convert_chksize(host->dma_conf.src_maxburst);
 957         } else {
 958                 direction = DMA_TO_DEVICE;
 959                 host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV;
 960                 maxburst = atmci_convert_chksize(host->dma_conf.dst_maxburst);
 961         }
 962
 963         atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(maxburst) | ATMCI_DMAEN);
 964
 965         sglen = dma_map_sg(chan->device->dev, data->sg,
 966                         data->sg_len, direction);
 967
 968         dmaengine_slave_config(chan, &host->dma_conf);
 969         desc = dmaengine_prep_slave_sg(chan,
 970                         data->sg, sglen, slave_dirn,
 971                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 972         if (!desc)
 973                 goto unmap_exit;
 974
 975         host->dma.data_desc = desc;
 976         desc->callback = atmci_dma_complete;
 977         desc->callback_param = host;
 978
 979         return iflags;
 980 unmap_exit:
 981         dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
 982         return -ENOMEM;
 983 }
 984
 985 static void
 986 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
 987 {
 988         return;
 989 }
 990
 991 /*
 992  * Start PDC according to transfer direction.
 993  */
 994 static void
 995 atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data)
 996 {
 997         if (data->flags & MMC_DATA_READ)
 998                 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
 999         else
1000                 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
1001 }
1002
1003 static void
1004 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
1005 {
1006         struct dma_chan                 *chan = host->data_chan;
1007         struct dma_async_tx_descriptor  *desc = host->dma.data_desc;
1008
1009         if (chan) {
1010                 dmaengine_submit(desc);
1011                 dma_async_issue_pending(chan);
1012         }
1013 }
1014
1015 static void atmci_stop_transfer(struct atmel_mci *host)
1016 {
1017         dev_dbg(&host->pdev->dev,
1018                 "(%s) set pending xfer complete\n", __func__);
1019         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1020         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1021 }
1022
1023 /*
1024  * Stop data transfer because error(s) occured.
1025  */
1026 static void atmci_stop_transfer_pdc(struct atmel_mci *host)
1027 {
1028         atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
1029 }
1030
1031 static void atmci_stop_transfer_dma(struct atmel_mci *host)
1032 {
1033         struct dma_chan *chan = host->data_chan;
1034
1035         if (chan) {
1036                 dmaengine_terminate_all(chan);
1037                 atmci_dma_cleanup(host);
1038         } else {
1039                 /* Data transfer was stopped by the interrupt handler */
1040                 dev_dbg(&host->pdev->dev,
1041                         "(%s) set pending xfer complete\n", __func__);
1042                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1043                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1044         }
1045 }
1046
1047 /*
1048  * Start a request: prepare data if needed, prepare the command and activate
1049  * interrupts.
1050  */
1051 static void atmci_start_request(struct atmel_mci *host,
1052                 struct atmel_mci_slot *slot)
1053 {
1054         struct mmc_request      *mrq;
1055         struct mmc_command      *cmd;
1056         struct mmc_data         *data;
1057         u32                     iflags;
1058         u32                     cmdflags;
1059
1060         mrq = slot->mrq;
1061         host->cur_slot = slot;
1062         host->mrq = mrq;
1063
1064         host->pending_events = 0;
1065         host->completed_events = 0;
1066         host->cmd_status = 0;
1067         host->data_status = 0;
1068
1069         dev_dbg(&host->pdev->dev, "start request: cmd %u\n", mrq->cmd->opcode);
1070
1071         if (host->need_reset || host->caps.need_reset_after_xfer) {
1072                 iflags = atmci_readl(host, ATMCI_IMR);
1073                 iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB);
1074                 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1075                 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1076                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1077                 if (host->caps.has_cfg_reg)
1078                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1079                 atmci_writel(host, ATMCI_IER, iflags);
1080                 host->need_reset = false;
1081         }
1082         atmci_writel(host, ATMCI_SDCR, slot->sdc_reg);
1083
1084         iflags = atmci_readl(host, ATMCI_IMR);
1085         if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
1086                 dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
1087                                 iflags);
1088
1089         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
1090                 /* Send init sequence (74 clock cycles) */
1091                 atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT);
1092                 while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY))
1093                         cpu_relax();
1094         }
1095         iflags = 0;
1096         data = mrq->data;
1097         if (data) {
1098                 atmci_set_timeout(host, slot, data);
1099
1100                 /* Must set block count/size before sending command */
1101                 atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks)
1102                                 | ATMCI_BLKLEN(data->blksz));
1103                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
1104                         ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz));
1105
1106                 iflags |= host->prepare_data(host, data);
1107         }
1108
1109         iflags |= ATMCI_CMDRDY;
1110         cmd = mrq->cmd;
1111         cmdflags = atmci_prepare_command(slot->mmc, cmd);
1112         atmci_send_command(host, cmd, cmdflags);
1113
1114         if (data)
1115                 host->submit_data(host, data);
1116
1117         if (mrq->stop) {
1118                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
1119                 host->stop_cmdr |= ATMCI_CMDR_STOP_XFER;
1120                 if (!(data->flags & MMC_DATA_WRITE))
1121                         host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ;
1122                 if (data->flags & MMC_DATA_STREAM)
1123                         host->stop_cmdr |= ATMCI_CMDR_STREAM;
1124                 else
1125                         host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK;
1126         }
1127
1128         /*
1129          * We could have enabled interrupts earlier, but I suspect
1130          * that would open up a nice can of interesting race
1131          * conditions (e.g. command and data complete, but stop not
1132          * prepared yet.)
1133          */
1134         atmci_writel(host, ATMCI_IER, iflags);
1135
1136         mod_timer(&host->timer, jiffies +  msecs_to_jiffies(2000));
1137 }
1138
1139 static void atmci_queue_request(struct atmel_mci *host,
1140                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
1141 {
1142         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
1143                         host->state);
1144
1145         spin_lock_bh(&host->lock);
1146         slot->mrq = mrq;
1147         if (host->state == STATE_IDLE) {
1148                 host->state = STATE_SENDING_CMD;
1149                 atmci_start_request(host, slot);
1150         } else {
1151                 dev_dbg(&host->pdev->dev, "queue request\n");
1152                 list_add_tail(&slot->queue_node, &host->queue);
1153         }
1154         spin_unlock_bh(&host->lock);
1155 }
1156
1157 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1158 {
1159         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1160         struct atmel_mci        *host = slot->host;
1161         struct mmc_data         *data;
1162
1163         WARN_ON(slot->mrq);
1164         dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode);
1165
1166         /*
1167          * We may "know" the card is gone even though there's still an
1168          * electrical connection. If so, we really need to communicate
1169          * this to the MMC core since there won't be any more
1170          * interrupts as the card is completely removed. Otherwise,
1171          * the MMC core might believe the card is still there even
1172          * though the card was just removed very slowly.
1173          */
1174         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
1175                 mrq->cmd->error = -ENOMEDIUM;
1176                 mmc_request_done(mmc, mrq);
1177                 return;
1178         }
1179
1180         /* We don't support multiple blocks of weird lengths. */
1181         data = mrq->data;
1182         if (data && data->blocks > 1 && data->blksz & 3) {
1183                 mrq->cmd->error = -EINVAL;
1184                 mmc_request_done(mmc, mrq);
1185         }
1186
1187         atmci_queue_request(host, slot, mrq);
1188 }
1189
1190 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1191 {
1192         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1193         struct atmel_mci        *host = slot->host;
1194         unsigned int            i;
1195
1196         slot->sdc_reg &= ~ATMCI_SDCBUS_MASK;
1197         switch (ios->bus_width) {
1198         case MMC_BUS_WIDTH_1:
1199                 slot->sdc_reg |= ATMCI_SDCBUS_1BIT;
1200                 break;
1201         case MMC_BUS_WIDTH_4:
1202                 slot->sdc_reg |= ATMCI_SDCBUS_4BIT;
1203                 break;
1204         }
1205
1206         if (ios->clock) {
1207                 unsigned int clock_min = ~0U;
1208                 u32 clkdiv;
1209
1210                 spin_lock_bh(&host->lock);
1211                 if (!host->mode_reg) {
1212                         clk_enable(host->mck);
1213                         atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1214                         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1215                         if (host->caps.has_cfg_reg)
1216                                 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1217                 }
1218
1219                 /*
1220                  * Use mirror of ios->clock to prevent race with mmc
1221                  * core ios update when finding the minimum.
1222                  */
1223                 slot->clock = ios->clock;
1224                 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1225                         if (host->slot[i] && host->slot[i]->clock
1226                                         && host->slot[i]->clock < clock_min)
1227                                 clock_min = host->slot[i]->clock;
1228                 }
1229
1230                 /* Calculate clock divider */
1231                 if (host->caps.has_odd_clk_div) {
1232                         clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2;
1233                         if (clkdiv > 511) {
1234                                 dev_warn(&mmc->class_dev,
1235                                          "clock %u too slow; using %lu\n",
1236                                          clock_min, host->bus_hz / (511 + 2));
1237                                 clkdiv = 511;
1238                         }
1239                         host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1)
1240                                          | ATMCI_MR_CLKODD(clkdiv & 1);
1241                 } else {
1242                         clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
1243                         if (clkdiv > 255) {
1244                                 dev_warn(&mmc->class_dev,
1245                                          "clock %u too slow; using %lu\n",
1246                                          clock_min, host->bus_hz / (2 * 256));
1247                                 clkdiv = 255;
1248                         }
1249                         host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
1250                 }
1251
1252                 /*
1253                  * WRPROOF and RDPROOF prevent overruns/underruns by
1254                  * stopping the clock when the FIFO is full/empty.
1255                  * This state is not expected to last for long.
1256                  */
1257                 if (host->caps.has_rwproof)
1258                         host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF);
1259
1260                 if (host->caps.has_cfg_reg) {
1261                         /* setup High Speed mode in relation with card capacity */
1262                         if (ios->timing == MMC_TIMING_SD_HS)
1263                                 host->cfg_reg |= ATMCI_CFG_HSMODE;
1264                         else
1265                                 host->cfg_reg &= ~ATMCI_CFG_HSMODE;
1266                 }
1267
1268                 if (list_empty(&host->queue)) {
1269                         atmci_writel(host, ATMCI_MR, host->mode_reg);
1270                         if (host->caps.has_cfg_reg)
1271                                 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1272                 } else {
1273                         host->need_clock_update = true;
1274                 }
1275
1276                 spin_unlock_bh(&host->lock);
1277         } else {
1278                 bool any_slot_active = false;
1279
1280                 spin_lock_bh(&host->lock);
1281                 slot->clock = 0;
1282                 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1283                         if (host->slot[i] && host->slot[i]->clock) {
1284                                 any_slot_active = true;
1285                                 break;
1286                         }
1287                 }
1288                 if (!any_slot_active) {
1289                         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
1290                         if (host->mode_reg) {
1291                                 atmci_readl(host, ATMCI_MR);
1292                                 clk_disable(host->mck);
1293                         }
1294                         host->mode_reg = 0;
1295                 }
1296                 spin_unlock_bh(&host->lock);
1297         }
1298
1299         switch (ios->power_mode) {
1300         case MMC_POWER_UP:
1301                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1302                 break;
1303         default:
1304                 /*
1305                  * TODO: None of the currently available AVR32-based
1306                  * boards allow MMC power to be turned off. Implement
1307                  * power control when this can be tested properly.
1308                  *
1309                  * We also need to hook this into the clock management
1310                  * somehow so that newly inserted cards aren't
1311                  * subjected to a fast clock before we have a chance
1312                  * to figure out what the maximum rate is. Currently,
1313                  * there's no way to avoid this, and there never will
1314                  * be for boards that don't support power control.
1315                  */
1316                 break;
1317         }
1318 }
1319
1320 static int atmci_get_ro(struct mmc_host *mmc)
1321 {
1322         int                     read_only = -ENOSYS;
1323         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1324
1325         if (gpio_is_valid(slot->wp_pin)) {
1326                 read_only = gpio_get_value(slot->wp_pin);
1327                 dev_dbg(&mmc->class_dev, "card is %s\n",
1328                                 read_only ? "read-only" : "read-write");
1329         }
1330
1331         return read_only;
1332 }
1333
1334 static int atmci_get_cd(struct mmc_host *mmc)
1335 {
1336         int                     present = -ENOSYS;
1337         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1338
1339         if (gpio_is_valid(slot->detect_pin)) {
1340                 present = !(gpio_get_value(slot->detect_pin) ^
1341                             slot->detect_is_active_high);
1342                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1343                                 present ? "" : "not ");
1344         }
1345
1346         return present;
1347 }
1348
1349 static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1350 {
1351         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1352         struct atmel_mci        *host = slot->host;
1353
1354         if (enable)
1355                 atmci_writel(host, ATMCI_IER, slot->sdio_irq);
1356         else
1357                 atmci_writel(host, ATMCI_IDR, slot->sdio_irq);
1358 }
1359
1360 static const struct mmc_host_ops atmci_ops = {
1361         .request        = atmci_request,
1362         .set_ios        = atmci_set_ios,
1363         .get_ro         = atmci_get_ro,
1364         .get_cd         = atmci_get_cd,
1365         .enable_sdio_irq = atmci_enable_sdio_irq,
1366 };
1367
1368 /* Called with host->lock held */
1369 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1370         __releases(&host->lock)
1371         __acquires(&host->lock)
1372 {
1373         struct atmel_mci_slot   *slot = NULL;
1374         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
1375
1376         WARN_ON(host->cmd || host->data);
1377
1378         /*
1379          * Update the MMC clock rate if necessary. This may be
1380          * necessary if set_ios() is called when a different slot is
1381          * busy transferring data.
1382          */
1383         if (host->need_clock_update) {
1384                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1385                 if (host->caps.has_cfg_reg)
1386                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1387         }
1388
1389         host->cur_slot->mrq = NULL;
1390         host->mrq = NULL;
1391         if (!list_empty(&host->queue)) {
1392                 slot = list_entry(host->queue.next,
1393                                 struct atmel_mci_slot, queue_node);
1394                 list_del(&slot->queue_node);
1395                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1396                                 mmc_hostname(slot->mmc));
1397                 host->state = STATE_SENDING_CMD;
1398                 atmci_start_request(host, slot);
1399         } else {
1400                 dev_vdbg(&host->pdev->dev, "list empty\n");
1401                 host->state = STATE_IDLE;
1402         }
1403
1404         del_timer(&host->timer);
1405
1406         spin_unlock(&host->lock);
1407         mmc_request_done(prev_mmc, mrq);
1408         spin_lock(&host->lock);
1409 }
1410
1411 static void atmci_command_complete(struct atmel_mci *host,
1412                         struct mmc_command *cmd)
1413 {
1414         u32             status = host->cmd_status;
1415
1416         /* Read the response from the card (up to 16 bytes) */
1417         cmd->resp[0] = atmci_readl(host, ATMCI_RSPR);
1418         cmd->resp[1] = atmci_readl(host, ATMCI_RSPR);
1419         cmd->resp[2] = atmci_readl(host, ATMCI_RSPR);
1420         cmd->resp[3] = atmci_readl(host, ATMCI_RSPR);
1421
1422         if (status & ATMCI_RTOE)
1423                 cmd->error = -ETIMEDOUT;
1424         else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE))
1425                 cmd->error = -EILSEQ;
1426         else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE))
1427                 cmd->error = -EIO;
1428         else if (host->mrq->data && (host->mrq->data->blksz & 3)) {
1429                 if (host->caps.need_blksz_mul_4) {
1430                         cmd->error = -EINVAL;
1431                         host->need_reset = 1;
1432                 }
1433         } else
1434                 cmd->error = 0;
1435 }
1436
1437 static void atmci_detect_change(unsigned long data)
1438 {
1439         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1440         bool                    present;
1441         bool                    present_old;
1442
1443         /*
1444          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1445          * freeing the interrupt. We must not re-enable the interrupt
1446          * if it has been freed, and if we're shutting down, it
1447          * doesn't really matter whether the card is present or not.
1448          */
1449         smp_rmb();
1450         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1451                 return;
1452
1453         enable_irq(gpio_to_irq(slot->detect_pin));
1454         present = !(gpio_get_value(slot->detect_pin) ^
1455                     slot->detect_is_active_high);
1456         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1457
1458         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1459                         present, present_old);
1460
1461         if (present != present_old) {
1462                 struct atmel_mci        *host = slot->host;
1463                 struct mmc_request      *mrq;
1464
1465                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1466                         present ? "inserted" : "removed");
1467
1468                 spin_lock(&host->lock);
1469
1470                 if (!present)
1471                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1472                 else
1473                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1474
1475                 /* Clean up queue if present */
1476                 mrq = slot->mrq;
1477                 if (mrq) {
1478                         if (mrq == host->mrq) {
1479                                 /*
1480                                  * Reset controller to terminate any ongoing
1481                                  * commands or data transfers.
1482                                  */
1483                                 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1484                                 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1485                                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1486                                 if (host->caps.has_cfg_reg)
1487                                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1488
1489                                 host->data = NULL;
1490                                 host->cmd = NULL;
1491
1492                                 switch (host->state) {
1493                                 case STATE_IDLE:
1494                                         break;
1495                                 case STATE_SENDING_CMD:
1496                                         mrq->cmd->error = -ENOMEDIUM;
1497                                         if (mrq->data)
1498                                                 host->stop_transfer(host);
1499                                         break;
1500                                 case STATE_DATA_XFER:
1501                                         mrq->data->error = -ENOMEDIUM;
1502                                         host->stop_transfer(host);
1503                                         break;
1504                                 case STATE_WAITING_NOTBUSY:
1505                                         mrq->data->error = -ENOMEDIUM;
1506                                         break;
1507                                 case STATE_SENDING_STOP:
1508                                         mrq->stop->error = -ENOMEDIUM;
1509                                         break;
1510                                 case STATE_END_REQUEST:
1511                                         break;
1512                                 }
1513
1514                                 atmci_request_end(host, mrq);
1515                         } else {
1516                                 list_del(&slot->queue_node);
1517                                 mrq->cmd->error = -ENOMEDIUM;
1518                                 if (mrq->data)
1519                                         mrq->data->error = -ENOMEDIUM;
1520                                 if (mrq->stop)
1521                                         mrq->stop->error = -ENOMEDIUM;
1522
1523                                 spin_unlock(&host->lock);
1524                                 mmc_request_done(slot->mmc, mrq);
1525                                 spin_lock(&host->lock);
1526                         }
1527                 }
1528                 spin_unlock(&host->lock);
1529
1530                 mmc_detect_change(slot->mmc, 0);
1531         }
1532 }
1533
1534 static void atmci_tasklet_func(unsigned long priv)
1535 {
1536         struct atmel_mci        *host = (struct atmel_mci *)priv;
1537         struct mmc_request      *mrq = host->mrq;
1538         struct mmc_data         *data = host->data;
1539         enum atmel_mci_state    state = host->state;
1540         enum atmel_mci_state    prev_state;
1541         u32                     status;
1542
1543         spin_lock(&host->lock);
1544
1545         state = host->state;
1546
1547         dev_vdbg(&host->pdev->dev,
1548                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1549                 state, host->pending_events, host->completed_events,
1550                 atmci_readl(host, ATMCI_IMR));
1551
1552         do {
1553                 prev_state = state;
1554                 dev_dbg(&host->pdev->dev, "FSM: state=%d\n", state);
1555
1556                 switch (state) {
1557                 case STATE_IDLE:
1558                         break;
1559
1560                 case STATE_SENDING_CMD:
1561                         /*
1562                          * Command has been sent, we are waiting for command
1563                          * ready. Then we have three next states possible:
1564                          * END_REQUEST by default, WAITING_NOTBUSY if it's a
1565                          * command needing it or DATA_XFER if there is data.
1566                          */
1567                         dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n");
1568                         if (!atmci_test_and_clear_pending(host,
1569                                                 EVENT_CMD_RDY))
1570                                 break;
1571
1572                         dev_dbg(&host->pdev->dev, "set completed cmd ready\n");
1573                         host->cmd = NULL;
1574                         atmci_set_completed(host, EVENT_CMD_RDY);
1575                         atmci_command_complete(host, mrq->cmd);
1576                         if (mrq->data) {
1577                                 dev_dbg(&host->pdev->dev,
1578                                         "command with data transfer");
1579                                 /*
1580                                  * If there is a command error don't start
1581                                  * data transfer.
1582                                  */
1583                                 if (mrq->cmd->error) {
1584                                         host->stop_transfer(host);
1585                                         host->data = NULL;
1586                                         atmci_writel(host, ATMCI_IDR,
1587                                                      ATMCI_TXRDY | ATMCI_RXRDY
1588                                                      | ATMCI_DATA_ERROR_FLAGS);
1589                                         state = STATE_END_REQUEST;
1590                                 } else
1591                                         state = STATE_DATA_XFER;
1592                         } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) {
1593                                 dev_dbg(&host->pdev->dev,
1594                                         "command response need waiting notbusy");
1595                                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1596                                 state = STATE_WAITING_NOTBUSY;
1597                         } else
1598                                 state = STATE_END_REQUEST;
1599
1600                         break;
1601
1602                 case STATE_DATA_XFER:
1603                         if (atmci_test_and_clear_pending(host,
1604                                                 EVENT_DATA_ERROR)) {
1605                                 dev_dbg(&host->pdev->dev, "set completed data error\n");
1606                                 atmci_set_completed(host, EVENT_DATA_ERROR);
1607                                 state = STATE_END_REQUEST;
1608                                 break;
1609                         }
1610
1611                         /*
1612                          * A data transfer is in progress. The event expected
1613                          * to move to the next state depends of data transfer
1614                          * type (PDC or DMA). Once transfer done we can move
1615                          * to the next step which is WAITING_NOTBUSY in write
1616                          * case and directly SENDING_STOP in read case.
1617                          */
1618                         dev_dbg(&host->pdev->dev, "FSM: xfer complete?\n");
1619                         if (!atmci_test_and_clear_pending(host,
1620                                                 EVENT_XFER_COMPLETE))
1621                                 break;
1622
1623                         dev_dbg(&host->pdev->dev,
1624                                 "(%s) set completed xfer complete\n",
1625                                 __func__);
1626                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1627
1628                         if (host->data->flags & MMC_DATA_WRITE) {
1629                                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1630                                 state = STATE_WAITING_NOTBUSY;
1631                         } else if (host->mrq->stop) {
1632                                 atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
1633                                 atmci_send_stop_cmd(host, data);
1634                                 state = STATE_SENDING_STOP;
1635                         } else {
1636                                 host->data = NULL;
1637                                 data->bytes_xfered = data->blocks * data->blksz;
1638                                 data->error = 0;
1639                                 state = STATE_END_REQUEST;
1640                         }
1641                         break;
1642
1643                 case STATE_WAITING_NOTBUSY:
1644                         /*
1645                          * We can be in the state for two reasons: a command
1646                          * requiring waiting not busy signal (stop command
1647                          * included) or a write operation. In the latest case,
1648                          * we need to send a stop command.
1649                          */
1650                         dev_dbg(&host->pdev->dev, "FSM: not busy?\n");
1651                         if (!atmci_test_and_clear_pending(host,
1652                                                 EVENT_NOTBUSY))
1653                                 break;
1654
1655                         dev_dbg(&host->pdev->dev, "set completed not busy\n");
1656                         atmci_set_completed(host, EVENT_NOTBUSY);
1657
1658                         if (host->data) {
1659                                 /*
1660                                  * For some commands such as CMD53, even if
1661                                  * there is data transfer, there is no stop
1662                                  * command to send.
1663                                  */
1664                                 if (host->mrq->stop) {
1665                                         atmci_writel(host, ATMCI_IER,
1666                                                      ATMCI_CMDRDY);
1667                                         atmci_send_stop_cmd(host, data);
1668                                         state = STATE_SENDING_STOP;
1669                                 } else {
1670                                         host->data = NULL;
1671                                         data->bytes_xfered = data->blocks
1672                                                              * data->blksz;
1673                                         data->error = 0;
1674                                         state = STATE_END_REQUEST;
1675                                 }
1676                         } else
1677                                 state = STATE_END_REQUEST;
1678                         break;
1679
1680                 case STATE_SENDING_STOP:
1681                         /*
1682                          * In this state, it is important to set host->data to
1683                          * NULL (which is tested in the waiting notbusy state)
1684                          * in order to go to the end request state instead of
1685                          * sending stop again.
1686                          */
1687                         dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n");
1688                         if (!atmci_test_and_clear_pending(host,
1689                                                 EVENT_CMD_RDY))
1690                                 break;
1691
1692                         dev_dbg(&host->pdev->dev, "FSM: cmd ready\n");
1693                         host->cmd = NULL;
1694                         data->bytes_xfered = data->blocks * data->blksz;
1695                         data->error = 0;
1696                         atmci_command_complete(host, mrq->stop);
1697                         if (mrq->stop->error) {
1698                                 host->stop_transfer(host);
1699                                 atmci_writel(host, ATMCI_IDR,
1700                                              ATMCI_TXRDY | ATMCI_RXRDY
1701                                              | ATMCI_DATA_ERROR_FLAGS);
1702                                 state = STATE_END_REQUEST;
1703                         } else {
1704                                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1705                                 state = STATE_WAITING_NOTBUSY;
1706                         }
1707                         host->data = NULL;
1708                         break;
1709
1710                 case STATE_END_REQUEST:
1711                         atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY
1712                                            | ATMCI_DATA_ERROR_FLAGS);
1713                         status = host->data_status;
1714                         if (unlikely(status)) {
1715                                 host->stop_transfer(host);
1716                                 host->data = NULL;
1717                                 if (status & ATMCI_DTOE) {
1718                                         data->error = -ETIMEDOUT;
1719                                 } else if (status & ATMCI_DCRCE) {
1720                                         data->error = -EILSEQ;
1721                                 } else {
1722                                         data->error = -EIO;
1723                                 }
1724                         }
1725
1726                         atmci_request_end(host, host->mrq);
1727                         state = STATE_IDLE;
1728                         break;
1729                 }
1730         } while (state != prev_state);
1731
1732         host->state = state;
1733
1734         spin_unlock(&host->lock);
1735 }
1736
1737 static void atmci_read_data_pio(struct atmel_mci *host)
1738 {
1739         struct scatterlist      *sg = host->sg;
1740         void                    *buf = sg_virt(sg);
1741         unsigned int            offset = host->pio_offset;
1742         struct mmc_data         *data = host->data;
1743         u32                     value;
1744         u32                     status;
1745         unsigned int            nbytes = 0;
1746
1747         do {
1748                 value = atmci_readl(host, ATMCI_RDR);
1749                 if (likely(offset + 4 <= sg->length)) {
1750                         put_unaligned(value, (u32 *)(buf + offset));
1751
1752                         offset += 4;
1753                         nbytes += 4;
1754
1755                         if (offset == sg->length) {
1756                                 flush_dcache_page(sg_page(sg));
1757                                 host->sg = sg = sg_next(sg);
1758                                 if (!sg)
1759                                         goto done;
1760
1761                                 offset = 0;
1762                                 buf = sg_virt(sg);
1763                         }
1764                 } else {
1765                         unsigned int remaining = sg->length - offset;
1766                         memcpy(buf + offset, &value, remaining);
1767                         nbytes += remaining;
1768
1769                         flush_dcache_page(sg_page(sg));
1770                         host->sg = sg = sg_next(sg);
1771                         if (!sg)
1772                                 goto done;
1773
1774                         offset = 4 - remaining;
1775                         buf = sg_virt(sg);
1776                         memcpy(buf, (u8 *)&value + remaining, offset);
1777                         nbytes += offset;
1778                 }
1779
1780                 status = atmci_readl(host, ATMCI_SR);
1781                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1782                         atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY
1783                                                 | ATMCI_DATA_ERROR_FLAGS));
1784                         host->data_status = status;
1785                         data->bytes_xfered += nbytes;
1786                         return;
1787                 }
1788         } while (status & ATMCI_RXRDY);
1789
1790         host->pio_offset = offset;
1791         data->bytes_xfered += nbytes;
1792
1793         return;
1794
1795 done:
1796         atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY);
1797         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1798         data->bytes_xfered += nbytes;
1799         smp_wmb();
1800         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1801 }
1802
1803 static void atmci_write_data_pio(struct atmel_mci *host)
1804 {
1805         struct scatterlist      *sg = host->sg;
1806         void                    *buf = sg_virt(sg);
1807         unsigned int            offset = host->pio_offset;
1808         struct mmc_data         *data = host->data;
1809         u32                     value;
1810         u32                     status;
1811         unsigned int            nbytes = 0;
1812
1813         do {
1814                 if (likely(offset + 4 <= sg->length)) {
1815                         value = get_unaligned((u32 *)(buf + offset));
1816                         atmci_writel(host, ATMCI_TDR, value);
1817
1818                         offset += 4;
1819                         nbytes += 4;
1820                         if (offset == sg->length) {
1821                                 host->sg = sg = sg_next(sg);
1822                                 if (!sg)
1823                                         goto done;
1824
1825                                 offset = 0;
1826                                 buf = sg_virt(sg);
1827                         }
1828                 } else {
1829                         unsigned int remaining = sg->length - offset;
1830
1831                         value = 0;
1832                         memcpy(&value, buf + offset, remaining);
1833                         nbytes += remaining;
1834
1835                         host->sg = sg = sg_next(sg);
1836                         if (!sg) {
1837                                 atmci_writel(host, ATMCI_TDR, value);
1838                                 goto done;
1839                         }
1840
1841                         offset = 4 - remaining;
1842                         buf = sg_virt(sg);
1843                         memcpy((u8 *)&value + remaining, buf, offset);
1844                         atmci_writel(host, ATMCI_TDR, value);
1845                         nbytes += offset;
1846                 }
1847
1848                 status = atmci_readl(host, ATMCI_SR);
1849                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1850                         atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY
1851                                                 | ATMCI_DATA_ERROR_FLAGS));
1852                         host->data_status = status;
1853                         data->bytes_xfered += nbytes;
1854                         return;
1855                 }
1856         } while (status & ATMCI_TXRDY);
1857
1858         host->pio_offset = offset;
1859         data->bytes_xfered += nbytes;
1860
1861         return;
1862
1863 done:
1864         atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY);
1865         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1866         data->bytes_xfered += nbytes;
1867         smp_wmb();
1868         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1869 }
1870
1871 static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1872 {
1873         int     i;
1874
1875         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1876                 struct atmel_mci_slot *slot = host->slot[i];
1877                 if (slot && (status & slot->sdio_irq)) {
1878                         mmc_signal_sdio_irq(slot->mmc);
1879                 }
1880         }
1881 }
1882
1883
1884 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1885 {
1886         struct atmel_mci        *host = dev_id;
1887         u32                     status, mask, pending;
1888         unsigned int            pass_count = 0;
1889
1890         do {
1891                 status = atmci_readl(host, ATMCI_SR);
1892                 mask = atmci_readl(host, ATMCI_IMR);
1893                 pending = status & mask;
1894                 if (!pending)
1895                         break;
1896
1897                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1898                         dev_dbg(&host->pdev->dev, "IRQ: data error\n");
1899                         atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS
1900                                         | ATMCI_RXRDY | ATMCI_TXRDY
1901                                         | ATMCI_ENDRX | ATMCI_ENDTX
1902                                         | ATMCI_RXBUFF | ATMCI_TXBUFE);
1903
1904                         host->data_status = status;
1905                         dev_dbg(&host->pdev->dev, "set pending data error\n");
1906                         smp_wmb();
1907                         atmci_set_pending(host, EVENT_DATA_ERROR);
1908                         tasklet_schedule(&host->tasklet);
1909                 }
1910
1911                 if (pending & ATMCI_TXBUFE) {
1912                         dev_dbg(&host->pdev->dev, "IRQ: tx buffer empty\n");
1913                         atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
1914                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1915                         /*
1916                          * We can receive this interruption before having configured
1917                          * the second pdc buffer, so we need to reconfigure first and
1918                          * second buffers again
1919                          */
1920                         if (host->data_size) {
1921                                 atmci_pdc_set_both_buf(host, XFER_TRANSMIT);
1922                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1923                                 atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE);
1924                         } else {
1925                                 atmci_pdc_complete(host);
1926                         }
1927                 } else if (pending & ATMCI_ENDTX) {
1928                         dev_dbg(&host->pdev->dev, "IRQ: end of tx buffer\n");
1929                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1930
1931                         if (host->data_size) {
1932                                 atmci_pdc_set_single_buf(host,
1933                                                 XFER_TRANSMIT, PDC_SECOND_BUF);
1934                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1935                         }
1936                 }
1937
1938                 if (pending & ATMCI_RXBUFF) {
1939                         dev_dbg(&host->pdev->dev, "IRQ: rx buffer full\n");
1940                         atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF);
1941                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1942                         /*
1943                          * We can receive this interruption before having configured
1944                          * the second pdc buffer, so we need to reconfigure first and
1945                          * second buffers again
1946                          */
1947                         if (host->data_size) {
1948                                 atmci_pdc_set_both_buf(host, XFER_RECEIVE);
1949                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1950                                 atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF);
1951                         } else {
1952                                 atmci_pdc_complete(host);
1953                         }
1954                 } else if (pending & ATMCI_ENDRX) {
1955                         dev_dbg(&host->pdev->dev, "IRQ: end of rx buffer\n");
1956                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1957
1958                         if (host->data_size) {
1959                                 atmci_pdc_set_single_buf(host,
1960                                                 XFER_RECEIVE, PDC_SECOND_BUF);
1961                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1962                         }
1963                 }
1964
1965                 /*
1966                  * First mci IPs, so mainly the ones having pdc, have some
1967                  * issues with the notbusy signal. You can't get it after
1968                  * data transmission if you have not sent a stop command.
1969                  * The appropriate workaround is to use the BLKE signal.
1970                  */
1971                 if (pending & ATMCI_BLKE) {
1972                         dev_dbg(&host->pdev->dev, "IRQ: blke\n");
1973                         atmci_writel(host, ATMCI_IDR, ATMCI_BLKE);
1974                         smp_wmb();
1975                         dev_dbg(&host->pdev->dev, "set pending notbusy\n");
1976                         atmci_set_pending(host, EVENT_NOTBUSY);
1977                         tasklet_schedule(&host->tasklet);
1978                 }
1979
1980                 if (pending & ATMCI_NOTBUSY) {
1981                         dev_dbg(&host->pdev->dev, "IRQ: not_busy\n");
1982                         atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY);
1983                         smp_wmb();
1984                         dev_dbg(&host->pdev->dev, "set pending notbusy\n");
1985                         atmci_set_pending(host, EVENT_NOTBUSY);
1986                         tasklet_schedule(&host->tasklet);
1987                 }
1988
1989                 if (pending & ATMCI_RXRDY)
1990                         atmci_read_data_pio(host);
1991                 if (pending & ATMCI_TXRDY)
1992                         atmci_write_data_pio(host);
1993
1994                 if (pending & ATMCI_CMDRDY) {
1995                         dev_dbg(&host->pdev->dev, "IRQ: cmd ready\n");
1996                         atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
1997                         host->cmd_status = status;
1998                         smp_wmb();
1999                         dev_dbg(&host->pdev->dev, "set pending cmd rdy\n");
2000                         atmci_set_pending(host, EVENT_CMD_RDY);
2001                         tasklet_schedule(&host->tasklet);
2002                 }
2003
2004                 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
2005                         atmci_sdio_interrupt(host, status);
2006
2007         } while (pass_count++ < 5);
2008
2009         return pass_count ? IRQ_HANDLED : IRQ_NONE;
2010 }
2011
2012 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
2013 {
2014         struct atmel_mci_slot   *slot = dev_id;
2015
2016         /*
2017          * Disable interrupts until the pin has stabilized and check
2018          * the state then. Use mod_timer() since we may be in the
2019          * middle of the timer routine when this interrupt triggers.
2020          */
2021         disable_irq_nosync(irq);
2022         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
2023
2024         return IRQ_HANDLED;
2025 }
2026
2027 static int __init atmci_init_slot(struct atmel_mci *host,
2028                 struct mci_slot_pdata *slot_data, unsigned int id,
2029                 u32 sdc_reg, u32 sdio_irq)
2030 {
2031         struct mmc_host                 *mmc;
2032         struct atmel_mci_slot           *slot;
2033
2034         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
2035         if (!mmc)
2036                 return -ENOMEM;
2037
2038         slot = mmc_priv(mmc);
2039         slot->mmc = mmc;
2040         slot->host = host;
2041         slot->detect_pin = slot_data->detect_pin;
2042         slot->wp_pin = slot_data->wp_pin;
2043         slot->detect_is_active_high = slot_data->detect_is_active_high;
2044         slot->sdc_reg = sdc_reg;
2045         slot->sdio_irq = sdio_irq;
2046
2047         mmc->ops = &atmci_ops;
2048         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
2049         mmc->f_max = host->bus_hz / 2;
2050         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
2051         if (sdio_irq)
2052                 mmc->caps |= MMC_CAP_SDIO_IRQ;
2053         if (host->caps.has_highspeed)
2054                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
2055         /*
2056          * Without the read/write proof capability, it is strongly suggested to
2057          * use only one bit for data to prevent fifo underruns and overruns
2058          * which will corrupt data.
2059          */
2060         if ((slot_data->bus_width >= 4) && host->caps.has_rwproof)
2061                 mmc->caps |= MMC_CAP_4_BIT_DATA;
2062
2063         if (atmci_get_version(host) < 0x200) {
2064                 mmc->max_segs = 256;
2065                 mmc->max_blk_size = 4095;
2066                 mmc->max_blk_count = 256;
2067                 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
2068                 mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs;
2069         } else {
2070                 mmc->max_segs = 64;
2071                 mmc->max_req_size = 32768 * 512;
2072                 mmc->max_blk_size = 32768;
2073                 mmc->max_blk_count = 512;
2074         }
2075
2076         /* Assume card is present initially */
2077         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
2078         if (gpio_is_valid(slot->detect_pin)) {
2079                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
2080                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
2081                         slot->detect_pin = -EBUSY;
2082                 } else if (gpio_get_value(slot->detect_pin) ^
2083                                 slot->detect_is_active_high) {
2084                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
2085                 }
2086         }
2087
2088         if (!gpio_is_valid(slot->detect_pin))
2089                 mmc->caps |= MMC_CAP_NEEDS_POLL;
2090
2091         if (gpio_is_valid(slot->wp_pin)) {
2092                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
2093                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
2094                         slot->wp_pin = -EBUSY;
2095                 }
2096         }
2097
2098         host->slot[id] = slot;
2099         mmc_add_host(mmc);
2100
2101         if (gpio_is_valid(slot->detect_pin)) {
2102                 int ret;
2103
2104                 setup_timer(&slot->detect_timer, atmci_detect_change,
2105                                 (unsigned long)slot);
2106
2107                 ret = request_irq(gpio_to_irq(slot->detect_pin),
2108                                 atmci_detect_interrupt,
2109                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
2110                                 "mmc-detect", slot);
2111                 if (ret) {
2112                         dev_dbg(&mmc->class_dev,
2113                                 "could not request IRQ %d for detect pin\n",
2114                                 gpio_to_irq(slot->detect_pin));
2115                         gpio_free(slot->detect_pin);
2116                         slot->detect_pin = -EBUSY;
2117                 }
2118         }
2119
2120         atmci_init_debugfs(slot);
2121
2122         return 0;
2123 }
2124
2125 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
2126                 unsigned int id)
2127 {
2128         /* Debugfs stuff is cleaned up by mmc core */
2129
2130         set_bit(ATMCI_SHUTDOWN, &slot->flags);
2131         smp_wmb();
2132
2133         mmc_remove_host(slot->mmc);
2134
2135         if (gpio_is_valid(slot->detect_pin)) {
2136                 int pin = slot->detect_pin;
2137
2138                 free_irq(gpio_to_irq(pin), slot);
2139                 del_timer_sync(&slot->detect_timer);
2140                 gpio_free(pin);
2141         }
2142         if (gpio_is_valid(slot->wp_pin))
2143                 gpio_free(slot->wp_pin);
2144
2145         slot->host->slot[id] = NULL;
2146         mmc_free_host(slot->mmc);
2147 }
2148
2149 static bool atmci_filter(struct dma_chan *chan, void *slave)
2150 {
2151         struct mci_dma_data     *sl = slave;
2152
2153         if (sl && find_slave_dev(sl) == chan->device->dev) {
2154                 chan->private = slave_data_ptr(sl);
2155                 return true;
2156         } else {
2157                 return false;
2158         }
2159 }
2160
2161 static bool atmci_configure_dma(struct atmel_mci *host)
2162 {
2163         struct mci_platform_data        *pdata;
2164
2165         if (host == NULL)
2166                 return false;
2167
2168         pdata = host->pdev->dev.platform_data;
2169
2170         if (pdata && find_slave_dev(pdata->dma_slave)) {
2171                 dma_cap_mask_t mask;
2172
2173                 /* Try to grab a DMA channel */
2174                 dma_cap_zero(mask);
2175                 dma_cap_set(DMA_SLAVE, mask);
2176                 host->dma.chan =
2177                         dma_request_channel(mask, atmci_filter, pdata->dma_slave);
2178         }
2179         if (!host->dma.chan) {
2180                 dev_warn(&host->pdev->dev, "no DMA channel available\n");
2181                 return false;
2182         } else {
2183                 dev_info(&host->pdev->dev,
2184                                         "using %s for DMA transfers\n",
2185                                         dma_chan_name(host->dma.chan));
2186
2187                 host->dma_conf.src_addr = host->mapbase + ATMCI_RDR;
2188                 host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2189                 host->dma_conf.src_maxburst = 1;
2190                 host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR;
2191                 host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2192                 host->dma_conf.dst_maxburst = 1;
2193                 host->dma_conf.device_fc = false;
2194                 return true;
2195         }
2196 }
2197
2198 /*
2199  * HSMCI (High Speed MCI) module is not fully compatible with MCI module.
2200  * HSMCI provides DMA support and a new config register but no more supports
2201  * PDC.
2202  */
2203 static void __init atmci_get_cap(struct atmel_mci *host)
2204 {
2205         unsigned int version;
2206
2207         version = atmci_get_version(host);
2208         dev_info(&host->pdev->dev,
2209                         "version: 0x%x\n", version);
2210
2211         host->caps.has_dma = 0;
2212         host->caps.has_pdc = 1;
2213         host->caps.has_cfg_reg = 0;
2214         host->caps.has_cstor_reg = 0;
2215         host->caps.has_highspeed = 0;
2216         host->caps.has_rwproof = 0;
2217         host->caps.has_odd_clk_div = 0;
2218         host->caps.has_bad_data_ordering = 1;
2219         host->caps.need_reset_after_xfer = 1;
2220         host->caps.need_blksz_mul_4 = 1;
2221
2222         /* keep only major version number */
2223         switch (version & 0xf00) {
2224         case 0x500:
2225                 host->caps.has_odd_clk_div = 1;
2226         case 0x400:
2227         case 0x300:
2228 #ifdef CONFIG_AT_HDMAC
2229                 host->caps.has_dma = 1;
2230 #else
2231                 dev_info(&host->pdev->dev,
2232                         "has dma capability but dma engine is not selected, then use pio\n");
2233 #endif
2234                 host->caps.has_pdc = 0;
2235                 host->caps.has_cfg_reg = 1;
2236                 host->caps.has_cstor_reg = 1;
2237                 host->caps.has_highspeed = 1;
2238         case 0x200:
2239                 host->caps.has_rwproof = 1;
2240                 host->caps.need_blksz_mul_4 = 0;
2241         case 0x100:
2242                 host->caps.has_bad_data_ordering = 0;
2243                 host->caps.need_reset_after_xfer = 0;
2244         case 0x0:
2245                 break;
2246         default:
2247                 host->caps.has_pdc = 0;
2248                 dev_warn(&host->pdev->dev,
2249                                 "Unmanaged mci version, set minimum capabilities\n");
2250                 break;
2251         }
2252 }
2253
2254 static int __init atmci_probe(struct platform_device *pdev)
2255 {
2256         struct mci_platform_data        *pdata;
2257         struct atmel_mci                *host;
2258         struct resource                 *regs;
2259         unsigned int                    nr_slots;
2260         int                             irq;
2261         int                             ret;
2262
2263         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2264         if (!regs)
2265                 return -ENXIO;
2266         pdata = pdev->dev.platform_data;
2267         if (!pdata)
2268                 return -ENXIO;
2269         irq = platform_get_irq(pdev, 0);
2270         if (irq < 0)
2271                 return irq;
2272
2273         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
2274         if (!host)
2275                 return -ENOMEM;
2276
2277         host->pdev = pdev;
2278         spin_lock_init(&host->lock);
2279         INIT_LIST_HEAD(&host->queue);
2280
2281         host->mck = clk_get(&pdev->dev, "mci_clk");
2282         if (IS_ERR(host->mck)) {
2283                 ret = PTR_ERR(host->mck);
2284                 goto err_clk_get;
2285         }
2286
2287         ret = -ENOMEM;
2288         host->regs = ioremap(regs->start, resource_size(regs));
2289         if (!host->regs)
2290                 goto err_ioremap;
2291
2292         clk_enable(host->mck);
2293         atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
2294         host->bus_hz = clk_get_rate(host->mck);
2295         clk_disable(host->mck);
2296
2297         host->mapbase = regs->start;
2298
2299         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
2300
2301         ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
2302         if (ret)
2303                 goto err_request_irq;
2304
2305         /* Get MCI capabilities and set operations according to it */
2306         atmci_get_cap(host);
2307         if (host->caps.has_dma && atmci_configure_dma(host)) {
2308                 host->prepare_data = &atmci_prepare_data_dma;
2309                 host->submit_data = &atmci_submit_data_dma;
2310                 host->stop_transfer = &atmci_stop_transfer_dma;
2311         } else if (host->caps.has_pdc) {
2312                 dev_info(&pdev->dev, "using PDC\n");
2313                 host->prepare_data = &atmci_prepare_data_pdc;
2314                 host->submit_data = &atmci_submit_data_pdc;
2315                 host->stop_transfer = &atmci_stop_transfer_pdc;
2316         } else {
2317                 dev_info(&pdev->dev, "using PIO\n");
2318                 host->prepare_data = &atmci_prepare_data;
2319                 host->submit_data = &atmci_submit_data;
2320                 host->stop_transfer = &atmci_stop_transfer;
2321         }
2322
2323         platform_set_drvdata(pdev, host);
2324
2325         setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host);
2326
2327         /* We need at least one slot to succeed */
2328         nr_slots = 0;
2329         ret = -ENODEV;
2330         if (pdata->slot[0].bus_width) {
2331                 ret = atmci_init_slot(host, &pdata->slot[0],
2332                                 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA);
2333                 if (!ret) {
2334                         nr_slots++;
2335                         host->buf_size = host->slot[0]->mmc->max_req_size;
2336                 }
2337         }
2338         if (pdata->slot[1].bus_width) {
2339                 ret = atmci_init_slot(host, &pdata->slot[1],
2340                                 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB);
2341                 if (!ret) {
2342                         nr_slots++;
2343                         if (host->slot[1]->mmc->max_req_size > host->buf_size)
2344                                 host->buf_size =
2345                                         host->slot[1]->mmc->max_req_size;
2346                 }
2347         }
2348
2349         if (!nr_slots) {
2350                 dev_err(&pdev->dev, "init failed: no slot defined\n");
2351                 goto err_init_slot;
2352         }
2353
2354         if (!host->caps.has_rwproof) {
2355                 host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size,
2356                                                   &host->buf_phys_addr,
2357                                                   GFP_KERNEL);
2358                 if (!host->buffer) {
2359                         ret = -ENOMEM;
2360                         dev_err(&pdev->dev, "buffer allocation failed\n");
2361                         goto err_init_slot;
2362                 }
2363         }
2364
2365         dev_info(&pdev->dev,
2366                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
2367                         host->mapbase, irq, nr_slots);
2368
2369         return 0;
2370
2371 err_init_slot:
2372         if (host->dma.chan)
2373                 dma_release_channel(host->dma.chan);
2374         free_irq(irq, host);
2375 err_request_irq:
2376         iounmap(host->regs);
2377 err_ioremap:
2378         clk_put(host->mck);
2379 err_clk_get:
2380         kfree(host);
2381         return ret;
2382 }
2383
2384 static int __exit atmci_remove(struct platform_device *pdev)
2385 {
2386         struct atmel_mci        *host = platform_get_drvdata(pdev);
2387         unsigned int            i;
2388
2389         platform_set_drvdata(pdev, NULL);
2390
2391         if (host->buffer)
2392                 dma_free_coherent(&pdev->dev, host->buf_size,
2393                                   host->buffer, host->buf_phys_addr);
2394
2395         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2396                 if (host->slot[i])
2397                         atmci_cleanup_slot(host->slot[i], i);
2398         }
2399
2400         clk_enable(host->mck);
2401         atmci_writel(host, ATMCI_IDR, ~0UL);
2402         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
2403         atmci_readl(host, ATMCI_SR);
2404         clk_disable(host->mck);
2405
2406 #ifdef CONFIG_MMC_ATMELMCI_DMA
2407         if (host->dma.chan)
2408                 dma_release_channel(host->dma.chan);
2409 #endif
2410
2411         free_irq(platform_get_irq(pdev, 0), host);
2412         iounmap(host->regs);
2413
2414         clk_put(host->mck);
2415         kfree(host);
2416
2417         return 0;
2418 }
2419
2420 #ifdef CONFIG_PM
2421 static int atmci_suspend(struct device *dev)
2422 {
2423         struct atmel_mci *host = dev_get_drvdata(dev);
2424         int i;
2425
2426          for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2427                 struct atmel_mci_slot *slot = host->slot[i];
2428                 int ret;
2429
2430                 if (!slot)
2431                         continue;
2432                 ret = mmc_suspend_host(slot->mmc);
2433                 if (ret < 0) {
2434                         while (--i >= 0) {
2435                                 slot = host->slot[i];
2436                                 if (slot
2437                                 && test_bit(ATMCI_SUSPENDED, &slot->flags)) {
2438                                         mmc_resume_host(host->slot[i]->mmc);
2439                                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
2440                                 }
2441                         }
2442                         return ret;
2443                 } else {
2444                         set_bit(ATMCI_SUSPENDED, &slot->flags);
2445                 }
2446         }
2447
2448         return 0;
2449 }
2450
2451 static int atmci_resume(struct device *dev)
2452 {
2453         struct atmel_mci *host = dev_get_drvdata(dev);
2454         int i;
2455         int ret = 0;
2456
2457         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2458                 struct atmel_mci_slot *slot = host->slot[i];
2459                 int err;
2460
2461                 slot = host->slot[i];
2462                 if (!slot)
2463                         continue;
2464                 if (!test_bit(ATMCI_SUSPENDED, &slot->flags))
2465                         continue;
2466                 err = mmc_resume_host(slot->mmc);
2467                 if (err < 0)
2468                         ret = err;
2469                 else
2470                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
2471         }
2472
2473         return ret;
2474 }
2475 static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume);
2476 #define ATMCI_PM_OPS    (&atmci_pm)
2477 #else
2478 #define ATMCI_PM_OPS    NULL
2479 #endif
2480
2481 static struct platform_driver atmci_driver = {
2482         .remove         = __exit_p(atmci_remove),
2483         .driver         = {
2484                 .name           = "atmel_mci",
2485                 .pm             = ATMCI_PM_OPS,
2486         },
2487 };
2488
2489 static int __init atmci_init(void)
2490 {
2491         return platform_driver_probe(&atmci_driver, atmci_probe);
2492 }
2493
2494 static void __exit atmci_exit(void)
2495 {
2496         platform_driver_unregister(&atmci_driver);
2497 }
2498
2499 late_initcall(atmci_init); /* try to load after dma driver when built-in */
2500 module_exit(atmci_exit);
2501
2502 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
2503 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2504 MODULE_LICENSE("GPL v2");