2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #include <mtd/cfi_flash.h>
45 * This file implements a Common Flash Interface (CFI) driver for
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST
66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
70 static uint flash_verbose = 1;
72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
82 * Check if chip width is defined. If not, start detecting with 8bit.
84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
88 static phys_addr_t __cfi_flash_bank_addr(int i)
90 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
92 phys_addr_t cfi_flash_bank_addr(int i)
93 __attribute__((weak, alias("__cfi_flash_bank_addr")));
95 static void __flash_write8(u8 value, void *addr)
97 __raw_writeb(value, addr);
100 static void __flash_write16(u16 value, void *addr)
102 __raw_writew(value, addr);
105 static void __flash_write32(u32 value, void *addr)
107 __raw_writel(value, addr);
110 static void __flash_write64(u64 value, void *addr)
112 /* No architectures currently implement __raw_writeq() */
113 *(volatile u64 *)addr = value;
116 static u8 __flash_read8(void *addr)
118 return __raw_readb(addr);
121 static u16 __flash_read16(void *addr)
123 return __raw_readw(addr);
126 static u32 __flash_read32(void *addr)
128 return __raw_readl(addr);
131 static u64 __flash_read64(void *addr)
133 /* No architectures currently implement __raw_readq() */
134 return *(volatile u64 *)addr;
137 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
138 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
139 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
140 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
141 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
142 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
143 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
144 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
145 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
147 #define flash_write8 __flash_write8
148 #define flash_write16 __flash_write16
149 #define flash_write32 __flash_write32
150 #define flash_write64 __flash_write64
151 #define flash_read8 __flash_read8
152 #define flash_read16 __flash_read16
153 #define flash_read32 __flash_read32
154 #define flash_read64 __flash_read64
157 /*-----------------------------------------------------------------------
159 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
160 flash_info_t *flash_get_info(ulong base)
163 flash_info_t *info = NULL;
165 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
166 info = & flash_info[i];
167 if (info->size && info->start[0] <= base &&
168 base <= info->start[0] + info->size - 1)
176 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
178 if (sect != (info->sector_count - 1))
179 return info->start[sect + 1] - info->start[sect];
181 return info->start[0] + info->size - info->start[sect];
184 /*-----------------------------------------------------------------------
185 * create an address based on the offset and the port width
188 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
190 unsigned int byte_offset = offset * info->portwidth;
192 return (void *)(info->start[sect] + byte_offset);
195 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
196 unsigned int offset, void *addr)
200 /*-----------------------------------------------------------------------
201 * make a proper sized command based on the port and chip widths
203 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
208 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
209 u32 cmd_le = cpu_to_le32(cmd);
212 uchar *cp = (uchar *) cmdbuf;
214 for (i = info->portwidth; i > 0; i--){
215 cword_offset = (info->portwidth-i)%info->chipwidth;
216 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
217 cp_offset = info->portwidth - i;
218 val = *((uchar*)&cmd_le + cword_offset);
221 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
223 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
228 /*-----------------------------------------------------------------------
231 static void print_longlong (char *str, unsigned long long data)
237 for (i = 0; i < 8; i++)
238 sprintf (&str[i * 2], "%2.2x", *cp++);
241 static void flash_printqry (struct cfi_qry *qry)
246 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
248 for (y = 0; y < 16; y++)
249 debug("%2.2x ", p[x + y]);
251 for (y = 0; y < 16; y++) {
252 unsigned char c = p[x + y];
253 if (c >= 0x20 && c <= 0x7e)
264 /*-----------------------------------------------------------------------
265 * read a character at a port width address
267 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
272 cp = flash_map (info, 0, offset);
273 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
274 retval = flash_read8(cp);
276 retval = flash_read8(cp + info->portwidth - 1);
278 flash_unmap (info, 0, offset, cp);
282 /*-----------------------------------------------------------------------
283 * read a word at a port width address, assume 16bit bus
285 static inline ushort flash_read_word (flash_info_t * info, uint offset)
287 ushort *addr, retval;
289 addr = flash_map (info, 0, offset);
290 retval = flash_read16 (addr);
291 flash_unmap (info, 0, offset, addr);
296 /*-----------------------------------------------------------------------
297 * read a long word by picking the least significant byte of each maximum
298 * port size word. Swap for ppc format.
300 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
309 addr = flash_map (info, sect, offset);
312 debug ("long addr is at %p info->portwidth = %d\n", addr,
314 for (x = 0; x < 4 * info->portwidth; x++) {
315 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
318 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
319 retval = ((flash_read8(addr) << 16) |
320 (flash_read8(addr + info->portwidth) << 24) |
321 (flash_read8(addr + 2 * info->portwidth)) |
322 (flash_read8(addr + 3 * info->portwidth) << 8));
324 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
325 (flash_read8(addr + info->portwidth - 1) << 16) |
326 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
327 (flash_read8(addr + 3 * info->portwidth - 1)));
329 flash_unmap(info, sect, offset, addr);
335 * Write a proper sized command to the correct address
337 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
338 uint offset, u32 cmd)
344 addr = flash_map (info, sect, offset);
345 flash_make_cmd (info, cmd, &cword);
346 switch (info->portwidth) {
348 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
349 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
350 flash_write8(cword.c, addr);
352 case FLASH_CFI_16BIT:
353 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
355 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
356 flash_write16(cword.w, addr);
358 case FLASH_CFI_32BIT:
359 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
361 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
362 flash_write32(cword.l, addr);
364 case FLASH_CFI_64BIT:
369 print_longlong (str, cword.ll);
371 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
373 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
376 flash_write64(cword.ll, addr);
380 /* Ensure all the instructions are fully finished */
383 flash_unmap(info, sect, offset, addr);
386 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
388 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
389 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
392 /*-----------------------------------------------------------------------
394 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
395 uint offset, uchar cmd)
401 addr = flash_map (info, sect, offset);
402 flash_make_cmd (info, cmd, &cword);
404 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
405 switch (info->portwidth) {
407 debug ("is= %x %x\n", flash_read8(addr), cword.c);
408 retval = (flash_read8(addr) == cword.c);
410 case FLASH_CFI_16BIT:
411 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
412 retval = (flash_read16(addr) == cword.w);
414 case FLASH_CFI_32BIT:
415 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
416 retval = (flash_read32(addr) == cword.l);
418 case FLASH_CFI_64BIT:
424 print_longlong (str1, flash_read64(addr));
425 print_longlong (str2, cword.ll);
426 debug ("is= %s %s\n", str1, str2);
429 retval = (flash_read64(addr) == cword.ll);
435 flash_unmap(info, sect, offset, addr);
440 /*-----------------------------------------------------------------------
442 static int flash_isset (flash_info_t * info, flash_sect_t sect,
443 uint offset, uchar cmd)
449 addr = flash_map (info, sect, offset);
450 flash_make_cmd (info, cmd, &cword);
451 switch (info->portwidth) {
453 retval = ((flash_read8(addr) & cword.c) == cword.c);
455 case FLASH_CFI_16BIT:
456 retval = ((flash_read16(addr) & cword.w) == cword.w);
458 case FLASH_CFI_32BIT:
459 retval = ((flash_read32(addr) & cword.l) == cword.l);
461 case FLASH_CFI_64BIT:
462 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
468 flash_unmap(info, sect, offset, addr);
473 /*-----------------------------------------------------------------------
475 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
476 uint offset, uchar cmd)
482 addr = flash_map (info, sect, offset);
483 flash_make_cmd (info, cmd, &cword);
484 switch (info->portwidth) {
486 retval = flash_read8(addr) != flash_read8(addr);
488 case FLASH_CFI_16BIT:
489 retval = flash_read16(addr) != flash_read16(addr);
491 case FLASH_CFI_32BIT:
492 retval = flash_read32(addr) != flash_read32(addr);
494 case FLASH_CFI_64BIT:
495 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
496 (flash_read32(addr+4) != flash_read32(addr+4)) );
502 flash_unmap(info, sect, offset, addr);
508 * flash_is_busy - check to see if the flash is busy
510 * This routine checks the status of the chip and returns true if the
513 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
517 switch (info->vendor) {
518 case CFI_CMDSET_INTEL_PROG_REGIONS:
519 case CFI_CMDSET_INTEL_STANDARD:
520 case CFI_CMDSET_INTEL_EXTENDED:
521 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
523 case CFI_CMDSET_AMD_STANDARD:
524 case CFI_CMDSET_AMD_EXTENDED:
525 #ifdef CONFIG_FLASH_CFI_LEGACY
526 case CFI_CMDSET_AMD_LEGACY:
528 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
533 debug ("flash_is_busy: %d\n", retval);
537 /*-----------------------------------------------------------------------
538 * wait for XSR.7 to be set. Time out with an error if it does not.
539 * This routine does not set the flash to read-array mode.
541 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
542 ulong tout, char *prompt)
546 #if CONFIG_SYS_HZ != 1000
547 if ((ulong)CONFIG_SYS_HZ > 100000)
548 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
550 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
553 /* Wait for command completion */
555 start = get_timer (0);
556 while (flash_is_busy (info, sector)) {
557 if (get_timer (start) > tout) {
558 printf ("Flash %s timeout at address %lx data %lx\n",
559 prompt, info->start[sector],
560 flash_read_long (info, sector, 0));
561 flash_write_cmd (info, sector, 0, info->cmd_reset);
564 udelay (1); /* also triggers watchdog */
569 /*-----------------------------------------------------------------------
570 * Wait for XSR.7 to be set, if it times out print an error, otherwise
571 * do a full status check.
573 * This routine sets the flash to read-array mode.
575 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
576 ulong tout, char *prompt)
580 retcode = flash_status_check (info, sector, tout, prompt);
581 switch (info->vendor) {
582 case CFI_CMDSET_INTEL_PROG_REGIONS:
583 case CFI_CMDSET_INTEL_EXTENDED:
584 case CFI_CMDSET_INTEL_STANDARD:
585 if ((retcode != ERR_OK)
586 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
588 printf ("Flash %s error at address %lx\n", prompt,
589 info->start[sector]);
590 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
591 FLASH_STATUS_PSLBS)) {
592 puts ("Command Sequence Error.\n");
593 } else if (flash_isset (info, sector, 0,
594 FLASH_STATUS_ECLBS)) {
595 puts ("Block Erase Error.\n");
596 retcode = ERR_NOT_ERASED;
597 } else if (flash_isset (info, sector, 0,
598 FLASH_STATUS_PSLBS)) {
599 puts ("Locking Error\n");
601 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
602 puts ("Block locked.\n");
603 retcode = ERR_PROTECTED;
605 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
606 puts ("Vpp Low Error.\n");
608 flash_write_cmd (info, sector, 0, info->cmd_reset);
616 static int use_flash_status_poll(flash_info_t *info)
618 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
619 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
620 info->vendor == CFI_CMDSET_AMD_STANDARD)
626 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
627 ulong tout, char *prompt)
629 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
633 #if CONFIG_SYS_HZ != 1000
634 if ((ulong)CONFIG_SYS_HZ > 100000)
635 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
637 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
640 /* Wait for command completion */
642 start = get_timer(0);
644 switch (info->portwidth) {
646 ready = flash_read8(dst) == flash_read8(src);
648 case FLASH_CFI_16BIT:
649 ready = flash_read16(dst) == flash_read16(src);
651 case FLASH_CFI_32BIT:
652 ready = flash_read32(dst) == flash_read32(src);
654 case FLASH_CFI_64BIT:
655 ready = flash_read64(dst) == flash_read64(src);
663 if (get_timer(start) > tout) {
664 printf("Flash %s timeout at address %lx data %lx\n",
665 prompt, (ulong)dst, (ulong)flash_read8(dst));
668 udelay(1); /* also triggers watchdog */
670 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
674 /*-----------------------------------------------------------------------
676 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
678 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
681 unsigned long long ll;
684 switch (info->portwidth) {
688 case FLASH_CFI_16BIT:
689 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
692 cword->w = (cword->w >> 8) | w;
694 cword->w = (cword->w << 8) | c;
697 case FLASH_CFI_32BIT:
698 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
701 cword->l = (cword->l >> 8) | l;
703 cword->l = (cword->l << 8) | c;
706 case FLASH_CFI_64BIT:
707 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
710 cword->ll = (cword->ll >> 8) | ll;
712 cword->ll = (cword->ll << 8) | c;
719 * Loop through the sector table starting from the previously found sector.
720 * Searches forwards or backwards, dependent on the passed address.
722 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
724 static flash_sect_t saved_sector = 0; /* previously found sector */
725 flash_sect_t sector = saved_sector;
727 while ((info->start[sector] < addr)
728 && (sector < info->sector_count - 1))
730 while ((info->start[sector] > addr) && (sector > 0))
732 * also decrements the sector in case of an overshot
737 saved_sector = sector;
741 /*-----------------------------------------------------------------------
743 static int flash_write_cfiword (flash_info_t * info, ulong dest,
746 void *dstaddr = (void *)dest;
748 flash_sect_t sect = 0;
751 /* Check if Flash is (sufficiently) erased */
752 switch (info->portwidth) {
754 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
756 case FLASH_CFI_16BIT:
757 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
759 case FLASH_CFI_32BIT:
760 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
762 case FLASH_CFI_64BIT:
763 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
770 return ERR_NOT_ERASED;
772 /* Disable interrupts which might cause a timeout here */
773 flag = disable_interrupts ();
775 switch (info->vendor) {
776 case CFI_CMDSET_INTEL_PROG_REGIONS:
777 case CFI_CMDSET_INTEL_EXTENDED:
778 case CFI_CMDSET_INTEL_STANDARD:
779 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
780 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
782 case CFI_CMDSET_AMD_EXTENDED:
783 case CFI_CMDSET_AMD_STANDARD:
784 sect = find_sector(info, dest);
785 flash_unlock_seq (info, sect);
786 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
789 #ifdef CONFIG_FLASH_CFI_LEGACY
790 case CFI_CMDSET_AMD_LEGACY:
791 sect = find_sector(info, dest);
792 flash_unlock_seq (info, 0);
793 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
799 switch (info->portwidth) {
801 flash_write8(cword.c, dstaddr);
803 case FLASH_CFI_16BIT:
804 flash_write16(cword.w, dstaddr);
806 case FLASH_CFI_32BIT:
807 flash_write32(cword.l, dstaddr);
809 case FLASH_CFI_64BIT:
810 flash_write64(cword.ll, dstaddr);
814 /* re-enable interrupts if necessary */
816 enable_interrupts ();
819 sect = find_sector (info, dest);
821 if (use_flash_status_poll(info))
822 return flash_status_poll(info, &cword, dstaddr,
823 info->write_tout, "write");
825 return flash_full_status_check(info, sect,
826 info->write_tout, "write");
829 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
831 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
838 void *dst = (void *)dest;
845 switch (info->portwidth) {
849 case FLASH_CFI_16BIT:
852 case FLASH_CFI_32BIT:
855 case FLASH_CFI_64BIT:
865 while ((cnt-- > 0) && (flag == 0)) {
866 switch (info->portwidth) {
868 flag = ((flash_read8(dst2) & flash_read8(src)) ==
872 case FLASH_CFI_16BIT:
873 flag = ((flash_read16(dst2) & flash_read16(src)) ==
877 case FLASH_CFI_32BIT:
878 flag = ((flash_read32(dst2) & flash_read32(src)) ==
882 case FLASH_CFI_64BIT:
883 flag = ((flash_read64(dst2) & flash_read64(src)) ==
890 retcode = ERR_NOT_ERASED;
895 sector = find_sector (info, dest);
897 switch (info->vendor) {
898 case CFI_CMDSET_INTEL_PROG_REGIONS:
899 case CFI_CMDSET_INTEL_STANDARD:
900 case CFI_CMDSET_INTEL_EXTENDED:
901 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
902 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
903 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
904 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
905 flash_write_cmd (info, sector, 0, write_cmd);
906 retcode = flash_status_check (info, sector,
907 info->buffer_write_tout,
909 if (retcode == ERR_OK) {
910 /* reduce the number of loops by the width of
913 flash_write_cmd (info, sector, 0, cnt - 1);
915 switch (info->portwidth) {
917 flash_write8(flash_read8(src), dst);
920 case FLASH_CFI_16BIT:
921 flash_write16(flash_read16(src), dst);
924 case FLASH_CFI_32BIT:
925 flash_write32(flash_read32(src), dst);
928 case FLASH_CFI_64BIT:
929 flash_write64(flash_read64(src), dst);
937 flash_write_cmd (info, sector, 0,
938 FLASH_CMD_WRITE_BUFFER_CONFIRM);
939 retcode = flash_full_status_check (
940 info, sector, info->buffer_write_tout,
946 case CFI_CMDSET_AMD_STANDARD:
947 case CFI_CMDSET_AMD_EXTENDED:
948 flash_unlock_seq(info,0);
950 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
951 offset = ((unsigned long)dst - info->start[sector]) >> shift;
953 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
955 flash_write_cmd(info, sector, offset, cnt - 1);
957 switch (info->portwidth) {
960 flash_write8(flash_read8(src), dst);
964 case FLASH_CFI_16BIT:
966 flash_write16(flash_read16(src), dst);
970 case FLASH_CFI_32BIT:
972 flash_write32(flash_read32(src), dst);
976 case FLASH_CFI_64BIT:
978 flash_write64(flash_read64(src), dst);
987 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
988 if (use_flash_status_poll(info))
989 retcode = flash_status_poll(info, src - (1 << shift),
991 info->buffer_write_tout,
994 retcode = flash_full_status_check(info, sector,
995 info->buffer_write_tout,
1000 debug ("Unknown Command Set\n");
1001 retcode = ERR_INVAL;
1008 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1011 /*-----------------------------------------------------------------------
1013 int flash_erase (flash_info_t * info, int s_first, int s_last)
1020 if (info->flash_id != FLASH_MAN_CFI) {
1021 puts ("Can't erase unknown flash type - aborted\n");
1024 if ((s_first < 0) || (s_first > s_last)) {
1025 puts ("- no sectors to erase\n");
1030 for (sect = s_first; sect <= s_last; ++sect) {
1031 if (info->protect[sect]) {
1036 printf ("- Warning: %d protected sectors will not be erased!\n",
1038 } else if (flash_verbose) {
1043 for (sect = s_first; sect <= s_last; sect++) {
1044 if (info->protect[sect] == 0) { /* not protected */
1045 switch (info->vendor) {
1046 case CFI_CMDSET_INTEL_PROG_REGIONS:
1047 case CFI_CMDSET_INTEL_STANDARD:
1048 case CFI_CMDSET_INTEL_EXTENDED:
1049 flash_write_cmd (info, sect, 0,
1050 FLASH_CMD_CLEAR_STATUS);
1051 flash_write_cmd (info, sect, 0,
1052 FLASH_CMD_BLOCK_ERASE);
1053 flash_write_cmd (info, sect, 0,
1054 FLASH_CMD_ERASE_CONFIRM);
1056 case CFI_CMDSET_AMD_STANDARD:
1057 case CFI_CMDSET_AMD_EXTENDED:
1058 flash_unlock_seq (info, sect);
1059 flash_write_cmd (info, sect,
1061 AMD_CMD_ERASE_START);
1062 flash_unlock_seq (info, sect);
1063 flash_write_cmd (info, sect, 0,
1064 AMD_CMD_ERASE_SECTOR);
1066 #ifdef CONFIG_FLASH_CFI_LEGACY
1067 case CFI_CMDSET_AMD_LEGACY:
1068 flash_unlock_seq (info, 0);
1069 flash_write_cmd (info, 0, info->addr_unlock1,
1070 AMD_CMD_ERASE_START);
1071 flash_unlock_seq (info, 0);
1072 flash_write_cmd (info, sect, 0,
1073 AMD_CMD_ERASE_SECTOR);
1077 debug ("Unkown flash vendor %d\n",
1082 if (use_flash_status_poll(info)) {
1083 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1085 dest = flash_map(info, sect, 0);
1086 st = flash_status_poll(info, &cword, dest,
1087 info->erase_blk_tout, "erase");
1088 flash_unmap(info, sect, 0, dest);
1090 st = flash_full_status_check(info, sect,
1091 info->erase_blk_tout,
1095 else if (flash_verbose)
1106 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1107 static int sector_erased(flash_info_t *info, int i)
1111 volatile unsigned long *flash;
1114 * Check if whole sector is erased
1116 size = flash_sector_size(info, i);
1117 flash = (volatile unsigned long *) info->start[i];
1118 /* divide by 4 for longword access */
1121 for (k = 0; k < size; k++) {
1122 if (*flash++ != 0xffffffff)
1123 return 0; /* not erased */
1126 return 1; /* erased */
1128 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1130 void flash_print_info (flash_info_t * info)
1134 if (info->flash_id != FLASH_MAN_CFI) {
1135 puts ("missing or unknown FLASH type\n");
1139 printf ("%s FLASH (%d x %d)",
1141 (info->portwidth << 3), (info->chipwidth << 3));
1142 if (info->size < 1024*1024)
1143 printf (" Size: %ld kB in %d Sectors\n",
1144 info->size >> 10, info->sector_count);
1146 printf (" Size: %ld MB in %d Sectors\n",
1147 info->size >> 20, info->sector_count);
1149 switch (info->vendor) {
1150 case CFI_CMDSET_INTEL_PROG_REGIONS:
1151 printf ("Intel Prog Regions");
1153 case CFI_CMDSET_INTEL_STANDARD:
1154 printf ("Intel Standard");
1156 case CFI_CMDSET_INTEL_EXTENDED:
1157 printf ("Intel Extended");
1159 case CFI_CMDSET_AMD_STANDARD:
1160 printf ("AMD Standard");
1162 case CFI_CMDSET_AMD_EXTENDED:
1163 printf ("AMD Extended");
1165 #ifdef CONFIG_FLASH_CFI_LEGACY
1166 case CFI_CMDSET_AMD_LEGACY:
1167 printf ("AMD Legacy");
1171 printf ("Unknown (%d)", info->vendor);
1174 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1175 info->manufacturer_id);
1176 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1178 if (info->device_id == 0x7E) {
1179 printf("%04X", info->device_id2);
1181 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1182 info->erase_blk_tout,
1184 if (info->buffer_size > 1) {
1185 printf (" Buffer write timeout: %ld ms, "
1186 "buffer size: %d bytes\n",
1187 info->buffer_write_tout,
1191 puts ("\n Sector Start Addresses:");
1192 for (i = 0; i < info->sector_count; ++i) {
1197 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1198 /* print empty and read-only info */
1199 printf (" %08lX %c %s ",
1201 sector_erased(info, i) ? 'E' : ' ',
1202 info->protect[i] ? "RO" : " ");
1203 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1204 printf (" %08lX %s ",
1206 info->protect[i] ? "RO" : " ");
1213 /*-----------------------------------------------------------------------
1214 * This is used in a few places in write_buf() to show programming
1215 * progress. Making it a function is nasty because it needs to do side
1216 * effect updates to digit and dots. Repeated code is nasty too, so
1217 * we define it once here.
1219 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1220 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1221 if (flash_verbose) { \
1223 if ((scale > 0) && (dots <= 0)) { \
1224 if ((digit % 5) == 0) \
1225 printf ("%d", digit / 5); \
1233 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1236 /*-----------------------------------------------------------------------
1237 * Copy memory to flash, returns:
1240 * 2 - Flash not erased
1242 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1249 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1252 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1253 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1258 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1260 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1261 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1262 CONFIG_FLASH_SHOW_PROGRESS);
1266 /* get lower aligned address */
1267 wp = (addr & ~(info->portwidth - 1));
1269 /* handle unaligned start */
1270 if ((aln = addr - wp) != 0) {
1273 for (i = 0; i < aln; ++i)
1274 flash_add_byte (info, &cword, flash_read8(p + i));
1276 for (; (i < info->portwidth) && (cnt > 0); i++) {
1277 flash_add_byte (info, &cword, *src++);
1280 for (; (cnt == 0) && (i < info->portwidth); ++i)
1281 flash_add_byte (info, &cword, flash_read8(p + i));
1283 rc = flash_write_cfiword (info, wp, cword);
1288 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1291 /* handle the aligned part */
1292 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1293 buffered_size = (info->portwidth / info->chipwidth);
1294 buffered_size *= info->buffer_size;
1295 while (cnt >= info->portwidth) {
1296 /* prohibit buffer write when buffer_size is 1 */
1297 if (info->buffer_size == 1) {
1299 for (i = 0; i < info->portwidth; i++)
1300 flash_add_byte (info, &cword, *src++);
1301 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1303 wp += info->portwidth;
1304 cnt -= info->portwidth;
1308 /* write buffer until next buffered_size aligned boundary */
1309 i = buffered_size - (wp % buffered_size);
1312 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1314 i -= i & (info->portwidth - 1);
1318 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1321 while (cnt >= info->portwidth) {
1323 for (i = 0; i < info->portwidth; i++) {
1324 flash_add_byte (info, &cword, *src++);
1326 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1328 wp += info->portwidth;
1329 cnt -= info->portwidth;
1330 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1332 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1339 * handle unaligned tail bytes
1343 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1344 flash_add_byte (info, &cword, *src++);
1347 for (; i < info->portwidth; ++i)
1348 flash_add_byte (info, &cword, flash_read8(p + i));
1350 return flash_write_cfiword (info, wp, cword);
1353 /*-----------------------------------------------------------------------
1355 #ifdef CONFIG_SYS_FLASH_PROTECTION
1357 int flash_real_protect (flash_info_t * info, long sector, int prot)
1361 switch (info->vendor) {
1362 case CFI_CMDSET_INTEL_PROG_REGIONS:
1363 case CFI_CMDSET_INTEL_STANDARD:
1364 case CFI_CMDSET_INTEL_EXTENDED:
1367 * "Numonyx Axcell P33/P30 Specification Update" :)
1369 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1370 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1373 * cmd must come before FLASH_CMD_PROTECT + 20us
1374 * Disable interrupts which might cause a timeout here.
1376 int flag = disable_interrupts ();
1380 cmd = FLASH_CMD_PROTECT_SET;
1382 cmd = FLASH_CMD_PROTECT_CLEAR;
1384 flash_write_cmd (info, sector, 0,
1386 flash_write_cmd (info, sector, 0, cmd);
1387 /* re-enable interrupts if necessary */
1389 enable_interrupts ();
1392 case CFI_CMDSET_AMD_EXTENDED:
1393 case CFI_CMDSET_AMD_STANDARD:
1394 /* U-Boot only checks the first byte */
1395 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1397 flash_unlock_seq (info, 0);
1398 flash_write_cmd (info, 0,
1400 ATM_CMD_SOFTLOCK_START);
1401 flash_unlock_seq (info, 0);
1402 flash_write_cmd (info, sector, 0,
1405 flash_write_cmd (info, 0,
1407 AMD_CMD_UNLOCK_START);
1408 if (info->device_id == ATM_ID_BV6416)
1409 flash_write_cmd (info, sector,
1410 0, ATM_CMD_UNLOCK_SECT);
1414 #ifdef CONFIG_FLASH_CFI_LEGACY
1415 case CFI_CMDSET_AMD_LEGACY:
1416 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1417 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1419 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1421 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1426 flash_full_status_check (info, sector, info->erase_blk_tout,
1427 prot ? "protect" : "unprotect")) == 0) {
1429 info->protect[sector] = prot;
1432 * On some of Intel's flash chips (marked via legacy_unlock)
1433 * unprotect unprotects all locking.
1435 if ((prot == 0) && (info->legacy_unlock)) {
1438 for (i = 0; i < info->sector_count; i++) {
1439 if (info->protect[i])
1440 flash_real_protect (info, i, 1);
1447 /*-----------------------------------------------------------------------
1448 * flash_read_user_serial - read the OneTimeProgramming cells
1450 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1457 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1458 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1459 memcpy (dst, src + offset, len);
1460 flash_write_cmd (info, 0, 0, info->cmd_reset);
1461 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1465 * flash_read_factory_serial - read the device Id from the protection area
1467 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1472 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1473 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1474 memcpy (buffer, src + offset, len);
1475 flash_write_cmd (info, 0, 0, info->cmd_reset);
1476 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1479 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1481 /*-----------------------------------------------------------------------
1482 * Reverse the order of the erase regions in the CFI QRY structure.
1483 * This is needed for chips that are either a) correctly detected as
1484 * top-boot, or b) buggy.
1486 static void cfi_reverse_geometry(struct cfi_qry *qry)
1491 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1492 tmp = qry->erase_region_info[i];
1493 qry->erase_region_info[i] = qry->erase_region_info[j];
1494 qry->erase_region_info[j] = tmp;
1498 /*-----------------------------------------------------------------------
1499 * read jedec ids from device and set corresponding fields in info struct
1501 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1504 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1506 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1507 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1508 udelay(1000); /* some flash are slow to respond */
1509 info->manufacturer_id = flash_read_uchar (info,
1510 FLASH_OFFSET_MANUFACTURER_ID);
1511 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1512 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1513 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1514 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1517 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1519 info->cmd_reset = FLASH_CMD_RESET;
1521 cmdset_intel_read_jedec_ids(info);
1522 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1524 #ifdef CONFIG_SYS_FLASH_PROTECTION
1525 /* read legacy lock/unlock bit from intel flash */
1526 if (info->ext_addr) {
1527 info->legacy_unlock = flash_read_uchar (info,
1528 info->ext_addr + 5) & 0x08;
1535 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1540 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1541 flash_unlock_seq(info, 0);
1542 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1543 udelay(1000); /* some flash are slow to respond */
1545 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1546 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1547 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1549 manuId = flash_read_uchar (info,
1550 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1552 info->manufacturer_id = manuId;
1554 switch (info->chipwidth){
1555 case FLASH_CFI_8BIT:
1556 info->device_id = flash_read_uchar (info,
1557 FLASH_OFFSET_DEVICE_ID);
1558 if (info->device_id == 0x7E) {
1559 /* AMD 3-byte (expanded) device ids */
1560 info->device_id2 = flash_read_uchar (info,
1561 FLASH_OFFSET_DEVICE_ID2);
1562 info->device_id2 <<= 8;
1563 info->device_id2 |= flash_read_uchar (info,
1564 FLASH_OFFSET_DEVICE_ID3);
1567 case FLASH_CFI_16BIT:
1568 info->device_id = flash_read_word (info,
1569 FLASH_OFFSET_DEVICE_ID);
1574 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1577 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1579 info->cmd_reset = AMD_CMD_RESET;
1581 cmdset_amd_read_jedec_ids(info);
1582 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1587 #ifdef CONFIG_FLASH_CFI_LEGACY
1588 static void flash_read_jedec_ids (flash_info_t * info)
1590 info->manufacturer_id = 0;
1591 info->device_id = 0;
1592 info->device_id2 = 0;
1594 switch (info->vendor) {
1595 case CFI_CMDSET_INTEL_PROG_REGIONS:
1596 case CFI_CMDSET_INTEL_STANDARD:
1597 case CFI_CMDSET_INTEL_EXTENDED:
1598 cmdset_intel_read_jedec_ids(info);
1600 case CFI_CMDSET_AMD_STANDARD:
1601 case CFI_CMDSET_AMD_EXTENDED:
1602 cmdset_amd_read_jedec_ids(info);
1609 /*-----------------------------------------------------------------------
1610 * Call board code to request info about non-CFI flash.
1611 * board_flash_get_legacy needs to fill in at least:
1612 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1614 static int flash_detect_legacy(phys_addr_t base, int banknum)
1616 flash_info_t *info = &flash_info[banknum];
1618 if (board_flash_get_legacy(base, banknum, info)) {
1619 /* board code may have filled info completely. If not, we
1620 use JEDEC ID probing. */
1621 if (!info->vendor) {
1623 CFI_CMDSET_AMD_STANDARD,
1624 CFI_CMDSET_INTEL_STANDARD
1628 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1629 info->vendor = modes[i];
1631 (ulong)map_physmem(base,
1634 if (info->portwidth == FLASH_CFI_8BIT
1635 && info->interface == FLASH_CFI_X8X16) {
1636 info->addr_unlock1 = 0x2AAA;
1637 info->addr_unlock2 = 0x5555;
1639 info->addr_unlock1 = 0x5555;
1640 info->addr_unlock2 = 0x2AAA;
1642 flash_read_jedec_ids(info);
1643 debug("JEDEC PROBE: ID %x %x %x\n",
1644 info->manufacturer_id,
1647 if (jedec_flash_match(info, info->start[0]))
1650 unmap_physmem((void *)info->start[0],
1655 switch(info->vendor) {
1656 case CFI_CMDSET_INTEL_PROG_REGIONS:
1657 case CFI_CMDSET_INTEL_STANDARD:
1658 case CFI_CMDSET_INTEL_EXTENDED:
1659 info->cmd_reset = FLASH_CMD_RESET;
1661 case CFI_CMDSET_AMD_STANDARD:
1662 case CFI_CMDSET_AMD_EXTENDED:
1663 case CFI_CMDSET_AMD_LEGACY:
1664 info->cmd_reset = AMD_CMD_RESET;
1667 info->flash_id = FLASH_MAN_CFI;
1670 return 0; /* use CFI */
1673 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1675 return 0; /* use CFI */
1679 /*-----------------------------------------------------------------------
1680 * detect if flash is compatible with the Common Flash Interface (CFI)
1681 * http://www.jedec.org/download/search/jesd68.pdf
1683 static void flash_read_cfi (flash_info_t *info, void *buf,
1684 unsigned int start, size_t len)
1689 for (i = 0; i < len; i++)
1690 p[i] = flash_read_uchar(info, start + i);
1693 void __flash_cmd_reset(flash_info_t *info)
1696 * We do not yet know what kind of commandset to use, so we issue
1697 * the reset command in both Intel and AMD variants, in the hope
1698 * that AMD flash roms ignore the Intel command.
1700 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1701 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1703 void flash_cmd_reset(flash_info_t *info)
1704 __attribute__((weak,alias("__flash_cmd_reset")));
1706 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1710 /* Issue FLASH reset command */
1711 flash_cmd_reset(info);
1714 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1716 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1718 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1719 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1720 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1721 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1722 sizeof(struct cfi_qry));
1723 info->interface = le16_to_cpu(qry->interface_desc);
1725 info->cfi_offset = flash_offset_cfi[cfi_offset];
1726 debug ("device interface is %d\n",
1728 debug ("found port %d chip %d ",
1729 info->portwidth, info->chipwidth);
1730 debug ("port %d bits chip %d bits\n",
1731 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1732 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1734 /* calculate command offsets as in the Linux driver */
1735 info->addr_unlock1 = 0x555;
1736 info->addr_unlock2 = 0x2aa;
1739 * modify the unlock address if we are
1740 * in compatibility mode
1742 if ( /* x8/x16 in x8 mode */
1743 ((info->chipwidth == FLASH_CFI_BY8) &&
1744 (info->interface == FLASH_CFI_X8X16)) ||
1745 /* x16/x32 in x16 mode */
1746 ((info->chipwidth == FLASH_CFI_BY16) &&
1747 (info->interface == FLASH_CFI_X16X32)))
1749 info->addr_unlock1 = 0xaaa;
1750 info->addr_unlock2 = 0x555;
1753 info->name = "CFI conformant";
1761 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1763 debug ("flash detect cfi\n");
1765 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1766 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1767 for (info->chipwidth = FLASH_CFI_BY8;
1768 info->chipwidth <= info->portwidth;
1769 info->chipwidth <<= 1)
1770 if (__flash_detect_cfi(info, qry))
1773 debug ("not found\n");
1778 * Manufacturer-specific quirks. Add workarounds for geometry
1779 * reversal, etc. here.
1781 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1783 /* check if flash geometry needs reversal */
1784 if (qry->num_erase_regions > 1) {
1785 /* reverse geometry if top boot part */
1786 if (info->cfi_version < 0x3131) {
1787 /* CFI < 1.1, try to guess from device id */
1788 if ((info->device_id & 0x80) != 0)
1789 cfi_reverse_geometry(qry);
1790 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1791 /* CFI >= 1.1, deduct from top/bottom flag */
1792 /* note: ext_addr is valid since cfi_version > 0 */
1793 cfi_reverse_geometry(qry);
1798 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1800 int reverse_geometry = 0;
1802 /* Check the "top boot" bit in the PRI */
1803 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1804 reverse_geometry = 1;
1806 /* AT49BV6416(T) list the erase regions in the wrong order.
1807 * However, the device ID is identical with the non-broken
1808 * AT49BV642D they differ in the high byte.
1810 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1811 reverse_geometry = !reverse_geometry;
1813 if (reverse_geometry)
1814 cfi_reverse_geometry(qry);
1817 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1819 /* check if flash geometry needs reversal */
1820 if (qry->num_erase_regions > 1) {
1821 /* reverse geometry if top boot part */
1822 if (info->cfi_version < 0x3131) {
1823 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1824 if (info->device_id == 0x22CA ||
1825 info->device_id == 0x2256) {
1826 cfi_reverse_geometry(qry);
1833 * The following code cannot be run from FLASH!
1836 ulong flash_get_size (phys_addr_t base, int banknum)
1838 flash_info_t *info = &flash_info[banknum];
1840 flash_sect_t sect_cnt;
1844 uchar num_erase_regions;
1845 int erase_region_size;
1846 int erase_region_count;
1849 memset(&qry, 0, sizeof(qry));
1852 info->cfi_version = 0;
1853 #ifdef CONFIG_SYS_FLASH_PROTECTION
1854 info->legacy_unlock = 0;
1857 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1859 if (flash_detect_cfi (info, &qry)) {
1860 info->vendor = le16_to_cpu(qry.p_id);
1861 info->ext_addr = le16_to_cpu(qry.p_adr);
1862 num_erase_regions = qry.num_erase_regions;
1864 if (info->ext_addr) {
1865 info->cfi_version = (ushort) flash_read_uchar (info,
1866 info->ext_addr + 3) << 8;
1867 info->cfi_version |= (ushort) flash_read_uchar (info,
1868 info->ext_addr + 4);
1872 flash_printqry (&qry);
1875 switch (info->vendor) {
1876 case CFI_CMDSET_INTEL_PROG_REGIONS:
1877 case CFI_CMDSET_INTEL_STANDARD:
1878 case CFI_CMDSET_INTEL_EXTENDED:
1879 cmdset_intel_init(info, &qry);
1881 case CFI_CMDSET_AMD_STANDARD:
1882 case CFI_CMDSET_AMD_EXTENDED:
1883 cmdset_amd_init(info, &qry);
1886 printf("CFI: Unknown command set 0x%x\n",
1889 * Unfortunately, this means we don't know how
1890 * to get the chip back to Read mode. Might
1891 * as well try an Intel-style reset...
1893 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1897 /* Do manufacturer-specific fixups */
1898 switch (info->manufacturer_id) {
1900 flash_fixup_amd(info, &qry);
1903 flash_fixup_atmel(info, &qry);
1906 flash_fixup_stm(info, &qry);
1910 debug ("manufacturer is %d\n", info->vendor);
1911 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1912 debug ("device id is 0x%x\n", info->device_id);
1913 debug ("device id2 is 0x%x\n", info->device_id2);
1914 debug ("cfi version is 0x%04x\n", info->cfi_version);
1916 size_ratio = info->portwidth / info->chipwidth;
1917 /* if the chip is x8/x16 reduce the ratio by half */
1918 if ((info->interface == FLASH_CFI_X8X16)
1919 && (info->chipwidth == FLASH_CFI_BY8)) {
1922 debug ("size_ratio %d port %d bits chip %d bits\n",
1923 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1924 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1925 debug ("found %d erase regions\n", num_erase_regions);
1928 for (i = 0; i < num_erase_regions; i++) {
1929 if (i > NUM_ERASE_REGIONS) {
1930 printf ("%d erase regions found, only %d used\n",
1931 num_erase_regions, NUM_ERASE_REGIONS);
1935 tmp = le32_to_cpu(qry.erase_region_info[i]);
1936 debug("erase region %u: 0x%08lx\n", i, tmp);
1938 erase_region_count = (tmp & 0xffff) + 1;
1941 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1942 debug ("erase_region_count = %d erase_region_size = %d\n",
1943 erase_region_count, erase_region_size);
1944 for (j = 0; j < erase_region_count; j++) {
1945 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1946 printf("ERROR: too many flash sectors\n");
1949 info->start[sect_cnt] =
1950 (ulong)map_physmem(sector,
1953 sector += (erase_region_size * size_ratio);
1956 * Only read protection status from
1957 * supported devices (intel...)
1959 switch (info->vendor) {
1960 case CFI_CMDSET_INTEL_PROG_REGIONS:
1961 case CFI_CMDSET_INTEL_EXTENDED:
1962 case CFI_CMDSET_INTEL_STANDARD:
1963 info->protect[sect_cnt] =
1964 flash_isset (info, sect_cnt,
1965 FLASH_OFFSET_PROTECT,
1966 FLASH_STATUS_PROTECT);
1969 /* default: not protected */
1970 info->protect[sect_cnt] = 0;
1977 info->sector_count = sect_cnt;
1978 info->size = 1 << qry.dev_size;
1979 /* multiply the size by the number of chips */
1980 info->size *= size_ratio;
1981 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1982 tmp = 1 << qry.block_erase_timeout_typ;
1983 info->erase_blk_tout = tmp *
1984 (1 << qry.block_erase_timeout_max);
1985 tmp = (1 << qry.buf_write_timeout_typ) *
1986 (1 << qry.buf_write_timeout_max);
1988 /* round up when converting to ms */
1989 info->buffer_write_tout = (tmp + 999) / 1000;
1990 tmp = (1 << qry.word_write_timeout_typ) *
1991 (1 << qry.word_write_timeout_max);
1992 /* round up when converting to ms */
1993 info->write_tout = (tmp + 999) / 1000;
1994 info->flash_id = FLASH_MAN_CFI;
1995 if ((info->interface == FLASH_CFI_X8X16) &&
1996 (info->chipwidth == FLASH_CFI_BY8)) {
1997 /* XXX - Need to test on x8/x16 in parallel. */
1998 info->portwidth >>= 1;
2001 flash_write_cmd (info, 0, 0, info->cmd_reset);
2004 return (info->size);
2007 void flash_set_verbose(uint v)
2012 /*-----------------------------------------------------------------------
2014 unsigned long flash_init (void)
2016 unsigned long size = 0;
2018 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2022 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2025 #ifdef CONFIG_SYS_FLASH_PROTECTION
2026 /* read environment from EEPROM */
2028 getenv_f("unlock", s, sizeof(s));
2031 /* Init: no FLASHes known */
2032 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2033 flash_info[i].flash_id = FLASH_UNKNOWN;
2035 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2036 flash_get_size(cfi_flash_bank_addr(i), i);
2037 size += flash_info[i].size;
2038 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2039 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2040 printf ("## Unknown FLASH on Bank %d "
2041 "- Size = 0x%08lx = %ld MB\n",
2042 i+1, flash_info[i].size,
2043 flash_info[i].size << 20);
2044 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2046 #ifdef CONFIG_SYS_FLASH_PROTECTION
2047 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2049 * Only the U-Boot image and it's environment
2050 * is protected, all other sectors are
2051 * unprotected (unlocked) if flash hardware
2052 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2053 * and the environment variable "unlock" is
2056 if (flash_info[i].legacy_unlock) {
2060 * Disable legacy_unlock temporarily,
2061 * since flash_real_protect would
2062 * relock all other sectors again
2065 flash_info[i].legacy_unlock = 0;
2068 * Legacy unlocking (e.g. Intel J3) ->
2069 * unlock only one sector. This will
2070 * unlock all sectors.
2072 flash_real_protect (&flash_info[i], 0, 0);
2074 flash_info[i].legacy_unlock = 1;
2077 * Manually mark other sectors as
2078 * unlocked (unprotected)
2080 for (k = 1; k < flash_info[i].sector_count; k++)
2081 flash_info[i].protect[k] = 0;
2084 * No legancy unlocking -> unlock all sectors
2086 flash_protect (FLAG_PROTECT_CLEAR,
2087 flash_info[i].start[0],
2088 flash_info[i].start[0]
2089 + flash_info[i].size - 1,
2093 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2096 /* Monitor protection ON by default */
2097 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2098 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2099 flash_protect (FLAG_PROTECT_SET,
2100 CONFIG_SYS_MONITOR_BASE,
2101 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2102 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2105 /* Environment protection ON by default */
2106 #ifdef CONFIG_ENV_IS_IN_FLASH
2107 flash_protect (FLAG_PROTECT_SET,
2109 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2110 flash_get_info(CONFIG_ENV_ADDR));
2113 /* Redundant environment protection ON by default */
2114 #ifdef CONFIG_ENV_ADDR_REDUND
2115 flash_protect (FLAG_PROTECT_SET,
2116 CONFIG_ENV_ADDR_REDUND,
2117 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2118 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2121 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2122 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2123 debug("autoprotecting from %08x to %08x\n",
2124 apl[i].start, apl[i].start + apl[i].size - 1);
2125 flash_protect (FLAG_PROTECT_SET,
2127 apl[i].start + apl[i].size - 1,
2128 flash_get_info(apl[i].start));
2132 #ifdef CONFIG_FLASH_CFI_MTD