3 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs
26 * with an interface identical to SPI flash devices.
27 * However since they behave like RAM there are no delays or
28 * busy polls required. They can sustain read or write at the
29 * allowed SPI bus speed, which can be 40 MHz for some devices.
31 * Unfortunately some RAMTRON devices do not have a means of
32 * identifying them. They will leave the SO line undriven when
33 * the READ-ID command is issued. It is therefore mandatory
34 * that the MISO line has a proper pull-up, so that READ-ID
35 * will return a row of 0xff. This 0xff pseudo-id will cause
36 * probes by all vendor specific functions that are designed
37 * to handle it. If the MISO line is not pulled up, READ-ID
38 * could return any random noise, even mimicking another
41 * We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
42 * to define which device will be assumed after a simple status
43 * register verify. This method is prone to false positive
44 * detection and should therefore be the last to be tried.
45 * Enter it in the last position in the table in spi_flash.c!
47 * The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates
48 * compilation of the special handler and defines the device
54 #include <spi_flash.h>
55 #include "spi_flash_internal.h"
58 * Properties of supported FRAMs
59 * Note: speed is currently not used because we have no method to deliver that
60 * value to the upper layers
62 struct ramtron_spi_fram_params {
63 u32 size; /* size in bytes */
64 u8 addr_len; /* number of address bytes */
65 u8 merge_cmd; /* some address bits are in the command byte */
66 u8 id1; /* device ID 1 (family, density) */
67 u8 id2; /* device ID 2 (sub, rev, rsvd) */
68 u32 speed; /* max. SPI clock in Hz */
69 const char *name; /* name for display and/or matching */
72 struct ramtron_spi_fram {
73 struct spi_flash flash;
74 const struct ramtron_spi_fram_params *params;
77 static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash
80 return container_of(flash, struct ramtron_spi_fram, flash);
84 * table describing supported FRAM chips:
85 * chips without RDID command must have the values 0xff for id1 and id2
87 static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = {
142 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
155 static int ramtron_common(struct spi_flash *flash,
156 u32 offset, size_t len, void *buf, u8 command)
158 struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash);
163 if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) {
165 cmd[1] = offset >> 16;
166 cmd[2] = offset >> 8;
169 } else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) {
171 cmd[1] = offset >> 8;
175 printf("SF: unsupported addr_len or merge_cmd\n");
180 ret = spi_claim_bus(flash->spi);
182 debug("SF: Unable to claim SPI bus\n");
186 if (command == CMD_PAGE_PROGRAM) {
188 ret = spi_flash_cmd_write_enable(flash);
190 debug("SF: Enabling Write failed\n");
195 /* do the transaction */
196 if (command == CMD_PAGE_PROGRAM)
197 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len);
199 ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len);
201 debug("SF: Transaction failed\n");
204 /* release the bus */
205 spi_release_bus(flash->spi);
209 static int ramtron_read(struct spi_flash *flash,
210 u32 offset, size_t len, void *buf)
212 return ramtron_common(flash, offset, len, buf,
213 CMD_READ_ARRAY_SLOW);
216 static int ramtron_write(struct spi_flash *flash,
217 u32 offset, size_t len, const void *buf)
219 return ramtron_common(flash, offset, len, (void *)buf,
223 static int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len)
225 debug("SF: Erase of RAMTRON FRAMs is pointless\n");
230 * nore: we are called here with idcode pointing to the first non-0x7f byte
233 struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode)
235 const struct ramtron_spi_fram_params *params;
236 struct ramtron_spi_fram *sn;
238 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
243 /* NOTE: the bus has been claimed before this function is called! */
246 /* JEDEC conformant RAMTRON id */
247 for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
248 params = &ramtron_spi_fram_table[i];
249 if (idcode[1] == params->id1 && idcode[2] == params->id2)
253 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
256 * probably open MISO line, pulled up.
257 * We COULD have a non JEDEC conformant FRAM here,
258 * read the status register to verify
260 ret = spi_flash_cmd(spi, CMD_READ_STATUS, &sr, 1);
264 /* Bits 5,4,0 are fixed 0 for all devices */
265 if ((sr & 0x31) != 0x00)
267 /* now find the device */
268 for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
269 params = &ramtron_spi_fram_table[i];
270 if (!strcmp(params->name, CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC))
273 debug("SF: Unsupported non-JEDEC RAMTRON device "
274 CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n");
281 /* arriving here means no method has found a device we can handle */
282 debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n",
283 idcode[0], idcode[1], idcode[2]);
287 sn = malloc(sizeof(*sn));
289 debug("SF: Failed to allocate memory\n");
295 sn->flash.name = params->name;
297 sn->flash.write = ramtron_write;
298 sn->flash.read = ramtron_read;
299 sn->flash.erase = ramtron_erase;
300 sn->flash.size = params->size;