drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         if (priv->rx_chk_en)
 130                 reg |= RXCHK_EN;
 131         else
 132                 reg &= ~RXCHK_EN;
 133
 134         /* If UniMAC forwards CRC, we need to skip over it to get
 135          * a valid CHK bit to be set in the per-packet status word
 136          */
 137         if (priv->rx_chk_en && priv->crc_fwd)
 138                 reg |= RXCHK_SKIP_FCS;
 139         else
 140                 reg &= ~RXCHK_SKIP_FCS;
 141
 142         /* If Broadcom tags are enabled (e.g: using a switch), make
 143          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 144          * tag after the Ethernet MAC Source Address.
 145          */
 146         if (netdev_uses_dsa(dev))
 147                 reg |= RXCHK_BRCM_TAG_EN;
 148         else
 149                 reg &= ~RXCHK_BRCM_TAG_EN;
 150
 151         rxchk_writel(priv, reg, RXCHK_CONTROL);
 152
 153         return 0;
 154 }
 155
 156 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 157                                    netdev_features_t wanted)
 158 {
 159         struct bcm_sysport_priv *priv = netdev_priv(dev);
 160         u32 reg;
 161
 162         /* Hardware transmit checksum requires us to enable the Transmit status
 163          * block prepended to the packet contents
 164          */
 165         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 166         reg = tdma_readl(priv, TDMA_CONTROL);
 167         if (priv->tsb_en)
 168                 reg |= TSB_EN;
 169         else
 170                 reg &= ~TSB_EN;
 171         tdma_writel(priv, reg, TDMA_CONTROL);
 172
 173         return 0;
 174 }
 175
 176 static int bcm_sysport_set_features(struct net_device *dev,
 177                                     netdev_features_t features)
 178 {
 179         netdev_features_t changed = features ^ dev->features;
 180         netdev_features_t wanted = dev->wanted_features;
 181         int ret = 0;
 182
 183         if (changed & NETIF_F_RXCSUM)
 184                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 185         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 186                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 187
 188         return ret;
 189 }
 190
 191 /* Hardware counters must be kept in sync because the order/offset
 192  * is important here (order in structure declaration = order in hardware)
 193  */
 194 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 195         /* general stats */
 196         STAT_NETDEV(rx_packets),
 197         STAT_NETDEV(tx_packets),
 198         STAT_NETDEV(rx_bytes),
 199         STAT_NETDEV(tx_bytes),
 200         STAT_NETDEV(rx_errors),
 201         STAT_NETDEV(tx_errors),
 202         STAT_NETDEV(rx_dropped),
 203         STAT_NETDEV(tx_dropped),
 204         STAT_NETDEV(multicast),
 205         /* UniMAC RSV counters */
 206         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 207         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 208         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 209         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 210         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 211         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 212         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 213         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 214         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 215         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 216         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 217         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 218         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 219         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 220         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 221         STAT_MIB_RX("rx_control", mib.rx.cf),
 222         STAT_MIB_RX("rx_pause", mib.rx.pf),
 223         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 224         STAT_MIB_RX("rx_align", mib.rx.aln),
 225         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 226         STAT_MIB_RX("rx_code", mib.rx.cde),
 227         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 228         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 229         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 230         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 231         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 232         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 233         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 234         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 235         /* UniMAC TSV counters */
 236         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 237         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 238         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 239         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 240         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 241         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 242         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 243         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 244         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 245         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 246         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 247         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 248         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 249         STAT_MIB_TX("tx_pause", mib.tx.pf),
 250         STAT_MIB_TX("tx_control", mib.tx.cf),
 251         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 252         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 253         STAT_MIB_TX("tx_defer", mib.tx.drf),
 254         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 255         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 256         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 257         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 258         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 259         STAT_MIB_TX("tx_frags", mib.tx.frg),
 260         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 261         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 262         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 263         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 264         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 265         /* UniMAC RUNT counters */
 266         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 267         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 268         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 269         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 270         /* RXCHK misc statistics */
 271         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 272         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 273                    RXCHK_OTHER_DISC_CNTR),
 274         /* RBUF misc statistics */
 275         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 276         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 277 };
 278
 279 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 280
 281 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 282                                     struct ethtool_drvinfo *info)
 283 {
 284         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 285         strlcpy(info->version, "0.1", sizeof(info->version));
 286         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 287         info->n_stats = BCM_SYSPORT_STATS_LEN;
 288 }
 289
 290 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 291 {
 292         struct bcm_sysport_priv *priv = netdev_priv(dev);
 293
 294         return priv->msg_enable;
 295 }
 296
 297 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 298 {
 299         struct bcm_sysport_priv *priv = netdev_priv(dev);
 300
 301         priv->msg_enable = enable;
 302 }
 303
 304 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 305 {
 306         switch (string_set) {
 307         case ETH_SS_STATS:
 308                 return BCM_SYSPORT_STATS_LEN;
 309         default:
 310                 return -EOPNOTSUPP;
 311         }
 312 }
 313
 314 static void bcm_sysport_get_strings(struct net_device *dev,
 315                                     u32 stringset, u8 *data)
 316 {
 317         int i;
 318
 319         switch (stringset) {
 320         case ETH_SS_STATS:
 321                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 322                         memcpy(data + i * ETH_GSTRING_LEN,
 323                                bcm_sysport_gstrings_stats[i].stat_string,
 324                                ETH_GSTRING_LEN);
 325                 }
 326                 break;
 327         default:
 328                 break;
 329         }
 330 }
 331
 332 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 333 {
 334         int i, j = 0;
 335
 336         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 337                 const struct bcm_sysport_stats *s;
 338                 u8 offset = 0;
 339                 u32 val = 0;
 340                 char *p;
 341
 342                 s = &bcm_sysport_gstrings_stats[i];
 343                 switch (s->type) {
 344                 case BCM_SYSPORT_STAT_NETDEV:
 345                         continue;
 346                 case BCM_SYSPORT_STAT_MIB_RX:
 347                 case BCM_SYSPORT_STAT_MIB_TX:
 348                 case BCM_SYSPORT_STAT_RUNT:
 349                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 350                                 offset = UMAC_MIB_STAT_OFFSET;
 351                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 352                         break;
 353                 case BCM_SYSPORT_STAT_RXCHK:
 354                         val = rxchk_readl(priv, s->reg_offset);
 355                         if (val == ~0)
 356                                 rxchk_writel(priv, 0, s->reg_offset);
 357                         break;
 358                 case BCM_SYSPORT_STAT_RBUF:
 359                         val = rbuf_readl(priv, s->reg_offset);
 360                         if (val == ~0)
 361                                 rbuf_writel(priv, 0, s->reg_offset);
 362                         break;
 363                 }
 364
 365                 j += s->stat_sizeof;
 366                 p = (char *)priv + s->stat_offset;
 367                 *(u32 *)p = val;
 368         }
 369
 370         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 371 }
 372
 373 static void bcm_sysport_get_stats(struct net_device *dev,
 374                                   struct ethtool_stats *stats, u64 *data)
 375 {
 376         struct bcm_sysport_priv *priv = netdev_priv(dev);
 377         int i;
 378
 379         if (netif_running(dev))
 380                 bcm_sysport_update_mib_counters(priv);
 381
 382         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 383                 const struct bcm_sysport_stats *s;
 384                 char *p;
 385
 386                 s = &bcm_sysport_gstrings_stats[i];
 387                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 388                         p = (char *)&dev->stats;
 389                 else
 390                         p = (char *)priv;
 391                 p += s->stat_offset;
 392                 data[i] = *(u32 *)p;
 393         }
 394 }
 395
 396 static void bcm_sysport_get_wol(struct net_device *dev,
 397                                 struct ethtool_wolinfo *wol)
 398 {
 399         struct bcm_sysport_priv *priv = netdev_priv(dev);
 400         u32 reg;
 401
 402         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 403         wol->wolopts = priv->wolopts;
 404
 405         if (!(priv->wolopts & WAKE_MAGICSECURE))
 406                 return;
 407
 408         /* Return the programmed SecureOn password */
 409         reg = umac_readl(priv, UMAC_PSW_MS);
 410         put_unaligned_be16(reg, &wol->sopass[0]);
 411         reg = umac_readl(priv, UMAC_PSW_LS);
 412         put_unaligned_be32(reg, &wol->sopass[2]);
 413 }
 414
 415 static int bcm_sysport_set_wol(struct net_device *dev,
 416                                struct ethtool_wolinfo *wol)
 417 {
 418         struct bcm_sysport_priv *priv = netdev_priv(dev);
 419         struct device *kdev = &priv->pdev->dev;
 420         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 421
 422         if (!device_can_wakeup(kdev))
 423                 return -ENOTSUPP;
 424
 425         if (wol->wolopts & ~supported)
 426                 return -EINVAL;
 427
 428         /* Program the SecureOn password */
 429         if (wol->wolopts & WAKE_MAGICSECURE) {
 430                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 431                             UMAC_PSW_MS);
 432                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 433                             UMAC_PSW_LS);
 434         }
 435
 436         /* Flag the device and relevant IRQ as wakeup capable */
 437         if (wol->wolopts) {
 438                 device_set_wakeup_enable(kdev, 1);
 439                 enable_irq_wake(priv->wol_irq);
 440                 priv->wol_irq_disabled = 0;
 441         } else {
 442                 device_set_wakeup_enable(kdev, 0);
 443                 /* Avoid unbalanced disable_irq_wake calls */
 444                 if (!priv->wol_irq_disabled)
 445                         disable_irq_wake(priv->wol_irq);
 446                 priv->wol_irq_disabled = 1;
 447         }
 448
 449         priv->wolopts = wol->wolopts;
 450
 451         return 0;
 452 }
 453
 454 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 455 {
 456         dev_kfree_skb_any(cb->skb);
 457         cb->skb = NULL;
 458         dma_unmap_addr_set(cb, dma_addr, 0);
 459 }
 460
 461 static int bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 462                                  struct bcm_sysport_cb *cb)
 463 {
 464         struct device *kdev = &priv->pdev->dev;
 465         struct net_device *ndev = priv->netdev;
 466         dma_addr_t mapping;
 467         int ret;
 468
 469         cb->skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 470         if (!cb->skb) {
 471                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 472                 return -ENOMEM;
 473         }
 474
 475         mapping = dma_map_single(kdev, cb->skb->data,
 476                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 477         ret = dma_mapping_error(kdev, mapping);
 478         if (ret) {
 479                 bcm_sysport_free_cb(cb);
 480                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 481                 return ret;
 482         }
 483
 484         dma_unmap_addr_set(cb, dma_addr, mapping);
 485         dma_desc_set_addr(priv, priv->rx_bd_assign_ptr, mapping);
 486
 487         priv->rx_bd_assign_index++;
 488         priv->rx_bd_assign_index &= (priv->num_rx_bds - 1);
 489         priv->rx_bd_assign_ptr = priv->rx_bds +
 490                 (priv->rx_bd_assign_index * DESC_SIZE);
 491
 492         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 493
 494         return 0;
 495 }
 496
 497 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 498 {
 499         struct bcm_sysport_cb *cb;
 500         int ret = 0;
 501         unsigned int i;
 502
 503         for (i = 0; i < priv->num_rx_bds; i++) {
 504                 cb = &priv->rx_cbs[priv->rx_bd_assign_index];
 505                 if (cb->skb)
 506                         continue;
 507
 508                 ret = bcm_sysport_rx_refill(priv, cb);
 509                 if (ret)
 510                         break;
 511         }
 512
 513         return ret;
 514 }
 515
 516 /* Poll the hardware for up to budget packets to process */
 517 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 518                                         unsigned int budget)
 519 {
 520         struct device *kdev = &priv->pdev->dev;
 521         struct net_device *ndev = priv->netdev;
 522         unsigned int processed = 0, to_process;
 523         struct bcm_sysport_cb *cb;
 524         struct sk_buff *skb;
 525         unsigned int p_index;
 526         u16 len, status;
 527         struct bcm_rsb *rsb;
 528
 529         /* Determine how much we should process since last call */
 530         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 531         p_index &= RDMA_PROD_INDEX_MASK;
 532
 533         if (p_index < priv->rx_c_index)
 534                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 535                         priv->rx_c_index + p_index;
 536         else
 537                 to_process = p_index - priv->rx_c_index;
 538
 539         netif_dbg(priv, rx_status, ndev,
 540                   "p_index=%d rx_c_index=%d to_process=%d\n",
 541                   p_index, priv->rx_c_index, to_process);
 542
 543         while ((processed < to_process) && (processed < budget)) {
 544                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 545                 skb = cb->skb;
 546                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 547                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 548
 549                 /* Extract the Receive Status Block prepended */
 550                 rsb = (struct bcm_rsb *)skb->data;
 551                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 552                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 553                           DESC_STATUS_MASK;
 554
 555                 processed++;
 556                 priv->rx_read_ptr++;
 557                 if (priv->rx_read_ptr == priv->num_rx_bds)
 558                         priv->rx_read_ptr = 0;
 559
 560                 netif_dbg(priv, rx_status, ndev,
 561                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 562                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 563                           len, status);
 564
 565                 if (unlikely(!skb)) {
 566                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 567                         ndev->stats.rx_dropped++;
 568                         ndev->stats.rx_errors++;
 569                         goto refill;
 570                 }
 571
 572                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 573                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 574                         ndev->stats.rx_dropped++;
 575                         ndev->stats.rx_errors++;
 576                         bcm_sysport_free_cb(cb);
 577                         goto refill;
 578                 }
 579
 580                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 581                         netif_err(priv, rx_err, ndev, "error packet\n");
 582                         if (status & RX_STATUS_OVFLOW)
 583                                 ndev->stats.rx_over_errors++;
 584                         ndev->stats.rx_dropped++;
 585                         ndev->stats.rx_errors++;
 586                         bcm_sysport_free_cb(cb);
 587                         goto refill;
 588                 }
 589
 590                 skb_put(skb, len);
 591
 592                 /* Hardware validated our checksum */
 593                 if (likely(status & DESC_L4_CSUM))
 594                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 595
 596                 /* Hardware pre-pends packets with 2bytes before Ethernet
 597                  * header plus we have the Receive Status Block, strip off all
 598                  * of this from the SKB.
 599                  */
 600                 skb_pull(skb, sizeof(*rsb) + 2);
 601                 len -= (sizeof(*rsb) + 2);
 602
 603                 /* UniMAC may forward CRC */
 604                 if (priv->crc_fwd) {
 605                         skb_trim(skb, len - ETH_FCS_LEN);
 606                         len -= ETH_FCS_LEN;
 607                 }
 608
 609                 skb->protocol = eth_type_trans(skb, ndev);
 610                 ndev->stats.rx_packets++;
 611                 ndev->stats.rx_bytes += len;
 612
 613                 napi_gro_receive(&priv->napi, skb);
 614 refill:
 615                 bcm_sysport_rx_refill(priv, cb);
 616         }
 617
 618         return processed;
 619 }
 620
 621 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 622                                        struct bcm_sysport_cb *cb,
 623                                        unsigned int *bytes_compl,
 624                                        unsigned int *pkts_compl)
 625 {
 626         struct device *kdev = &priv->pdev->dev;
 627         struct net_device *ndev = priv->netdev;
 628
 629         if (cb->skb) {
 630                 ndev->stats.tx_bytes += cb->skb->len;
 631                 *bytes_compl += cb->skb->len;
 632                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 633                                  dma_unmap_len(cb, dma_len),
 634                                  DMA_TO_DEVICE);
 635                 ndev->stats.tx_packets++;
 636                 (*pkts_compl)++;
 637                 bcm_sysport_free_cb(cb);
 638         /* SKB fragment */
 639         } else if (dma_unmap_addr(cb, dma_addr)) {
 640                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 641                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 642                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 643                 dma_unmap_addr_set(cb, dma_addr, 0);
 644         }
 645 }
 646
 647 /* Reclaim queued SKBs for transmission completion, lockless version */
 648 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 649                                              struct bcm_sysport_tx_ring *ring)
 650 {
 651         struct net_device *ndev = priv->netdev;
 652         unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
 653         unsigned int pkts_compl = 0, bytes_compl = 0;
 654         struct bcm_sysport_cb *cb;
 655         struct netdev_queue *txq;
 656         u32 hw_ind;
 657
 658         txq = netdev_get_tx_queue(ndev, ring->index);
 659
 660         /* Compute how many descriptors have been processed since last call */
 661         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 662         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 663         ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
 664
 665         last_c_index = ring->c_index;
 666         num_tx_cbs = ring->size;
 667
 668         c_index &= (num_tx_cbs - 1);
 669
 670         if (c_index >= last_c_index)
 671                 last_tx_cn = c_index - last_c_index;
 672         else
 673                 last_tx_cn = num_tx_cbs - last_c_index + c_index;
 674
 675         netif_dbg(priv, tx_done, ndev,
 676                   "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
 677                   ring->index, c_index, last_tx_cn, last_c_index);
 678
 679         while (last_tx_cn-- > 0) {
 680                 cb = ring->cbs + last_c_index;
 681                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 682
 683                 ring->desc_count++;
 684                 last_c_index++;
 685                 last_c_index &= (num_tx_cbs - 1);
 686         }
 687
 688         ring->c_index = c_index;
 689
 690         if (netif_tx_queue_stopped(txq) && pkts_compl)
 691                 netif_tx_wake_queue(txq);
 692
 693         netif_dbg(priv, tx_done, ndev,
 694                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 695                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 696
 697         return pkts_compl;
 698 }
 699
 700 /* Locked version of the per-ring TX reclaim routine */
 701 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 702                                            struct bcm_sysport_tx_ring *ring)
 703 {
 704         unsigned int released;
 705         unsigned long flags;
 706
 707         spin_lock_irqsave(&ring->lock, flags);
 708         released = __bcm_sysport_tx_reclaim(priv, ring);
 709         spin_unlock_irqrestore(&ring->lock, flags);
 710
 711         return released;
 712 }
 713
 714 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 715 {
 716         struct bcm_sysport_tx_ring *ring =
 717                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 718         unsigned int work_done = 0;
 719
 720         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 721
 722         if (work_done == 0) {
 723                 napi_complete(napi);
 724                 /* re-enable TX interrupt */
 725                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 726         }
 727
 728         return 0;
 729 }
 730
 731 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 732 {
 733         unsigned int q;
 734
 735         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 736                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 737 }
 738
 739 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 740 {
 741         struct bcm_sysport_priv *priv =
 742                 container_of(napi, struct bcm_sysport_priv, napi);
 743         unsigned int work_done = 0;
 744
 745         work_done = bcm_sysport_desc_rx(priv, budget);
 746
 747         priv->rx_c_index += work_done;
 748         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 749         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 750
 751         if (work_done < budget) {
 752                 napi_complete(napi);
 753                 /* re-enable RX interrupts */
 754                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 755         }
 756
 757         return work_done;
 758 }
 759
 760 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 761 {
 762         u32 reg;
 763
 764         /* Stop monitoring MPD interrupt */
 765         intrl2_0_mask_set(priv, INTRL2_0_MPD);
 766
 767         /* Clear the MagicPacket detection logic */
 768         reg = umac_readl(priv, UMAC_MPD_CTRL);
 769         reg &= ~MPD_EN;
 770         umac_writel(priv, reg, UMAC_MPD_CTRL);
 771
 772         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 773 }
 774
 775 /* RX and misc interrupt routine */
 776 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 777 {
 778         struct net_device *dev = dev_id;
 779         struct bcm_sysport_priv *priv = netdev_priv(dev);
 780
 781         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 782                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 783         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 784
 785         if (unlikely(priv->irq0_stat == 0)) {
 786                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 787                 return IRQ_NONE;
 788         }
 789
 790         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 791                 if (likely(napi_schedule_prep(&priv->napi))) {
 792                         /* disable RX interrupts */
 793                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 794                         __napi_schedule(&priv->napi);
 795                 }
 796         }
 797
 798         /* TX ring is full, perform a full reclaim since we do not know
 799          * which one would trigger this interrupt
 800          */
 801         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 802                 bcm_sysport_tx_reclaim_all(priv);
 803
 804         if (priv->irq0_stat & INTRL2_0_MPD) {
 805                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
 806                 bcm_sysport_resume_from_wol(priv);
 807         }
 808
 809         return IRQ_HANDLED;
 810 }
 811
 812 /* TX interrupt service routine */
 813 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 814 {
 815         struct net_device *dev = dev_id;
 816         struct bcm_sysport_priv *priv = netdev_priv(dev);
 817         struct bcm_sysport_tx_ring *txr;
 818         unsigned int ring;
 819
 820         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 821                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 822         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 823
 824         if (unlikely(priv->irq1_stat == 0)) {
 825                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 826                 return IRQ_NONE;
 827         }
 828
 829         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 830                 if (!(priv->irq1_stat & BIT(ring)))
 831                         continue;
 832
 833                 txr = &priv->tx_rings[ring];
 834
 835                 if (likely(napi_schedule_prep(&txr->napi))) {
 836                         intrl2_1_mask_set(priv, BIT(ring));
 837                         __napi_schedule(&txr->napi);
 838                 }
 839         }
 840
 841         return IRQ_HANDLED;
 842 }
 843
 844 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 845 {
 846         struct bcm_sysport_priv *priv = dev_id;
 847
 848         pm_wakeup_event(&priv->pdev->dev, 0);
 849
 850         return IRQ_HANDLED;
 851 }
 852
 853 static int bcm_sysport_insert_tsb(struct sk_buff *skb, struct net_device *dev)
 854 {
 855         struct sk_buff *nskb;
 856         struct bcm_tsb *tsb;
 857         u32 csum_info;
 858         u8 ip_proto;
 859         u16 csum_start;
 860         u16 ip_ver;
 861
 862         /* Re-allocate SKB if needed */
 863         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 864                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 865                 dev_kfree_skb(skb);
 866                 if (!nskb) {
 867                         dev->stats.tx_errors++;
 868                         dev->stats.tx_dropped++;
 869                         return -ENOMEM;
 870                 }
 871                 skb = nskb;
 872         }
 873
 874         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 875         /* Zero-out TSB by default */
 876         memset(tsb, 0, sizeof(*tsb));
 877
 878         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 879                 ip_ver = htons(skb->protocol);
 880                 switch (ip_ver) {
 881                 case ETH_P_IP:
 882                         ip_proto = ip_hdr(skb)->protocol;
 883                         break;
 884                 case ETH_P_IPV6:
 885                         ip_proto = ipv6_hdr(skb)->nexthdr;
 886                         break;
 887                 default:
 888                         return 0;
 889                 }
 890
 891                 /* Get the checksum offset and the L4 (transport) offset */
 892                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 893                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 894                 csum_info |= (csum_start << L4_PTR_SHIFT);
 895
 896                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
 897                         csum_info |= L4_LENGTH_VALID;
 898                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
 899                                 csum_info |= L4_UDP;
 900                 } else {
 901                         csum_info = 0;
 902                 }
 903
 904                 tsb->l4_ptr_dest_map = csum_info;
 905         }
 906
 907         return 0;
 908 }
 909
 910 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
 911                                     struct net_device *dev)
 912 {
 913         struct bcm_sysport_priv *priv = netdev_priv(dev);
 914         struct device *kdev = &priv->pdev->dev;
 915         struct bcm_sysport_tx_ring *ring;
 916         struct bcm_sysport_cb *cb;
 917         struct netdev_queue *txq;
 918         struct dma_desc *desc;
 919         unsigned int skb_len;
 920         unsigned long flags;
 921         dma_addr_t mapping;
 922         u32 len_status;
 923         u16 queue;
 924         int ret;
 925
 926         queue = skb_get_queue_mapping(skb);
 927         txq = netdev_get_tx_queue(dev, queue);
 928         ring = &priv->tx_rings[queue];
 929
 930         /* lock against tx reclaim in BH context and TX ring full interrupt */
 931         spin_lock_irqsave(&ring->lock, flags);
 932         if (unlikely(ring->desc_count == 0)) {
 933                 netif_tx_stop_queue(txq);
 934                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
 935                 ret = NETDEV_TX_BUSY;
 936                 goto out;
 937         }
 938
 939         /* Insert TSB and checksum infos */
 940         if (priv->tsb_en) {
 941                 ret = bcm_sysport_insert_tsb(skb, dev);
 942                 if (ret) {
 943                         ret = NETDEV_TX_OK;
 944                         goto out;
 945                 }
 946         }
 947
 948         /* The Ethernet switch we are interfaced with needs packets to be at
 949          * least 64 bytes (including FCS) otherwise they will be discarded when
 950          * they enter the switch port logic. When Broadcom tags are enabled, we
 951          * need to make sure that packets are at least 68 bytes
 952          * (including FCS and tag) because the length verification is done after
 953          * the Broadcom tag is stripped off the ingress packet.
 954          */
 955         if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
 956                 ret = NETDEV_TX_OK;
 957                 goto out;
 958         }
 959
 960         skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
 961                         ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
 962
 963         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
 964         if (dma_mapping_error(kdev, mapping)) {
 965                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
 966                           skb->data, skb_len);
 967                 ret = NETDEV_TX_OK;
 968                 goto out;
 969         }
 970
 971         /* Remember the SKB for future freeing */
 972         cb = &ring->cbs[ring->curr_desc];
 973         cb->skb = skb;
 974         dma_unmap_addr_set(cb, dma_addr, mapping);
 975         dma_unmap_len_set(cb, dma_len, skb_len);
 976
 977         /* Fetch a descriptor entry from our pool */
 978         desc = ring->desc_cpu;
 979
 980         desc->addr_lo = lower_32_bits(mapping);
 981         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
 982         len_status |= (skb_len << DESC_LEN_SHIFT);
 983         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
 984                        DESC_STATUS_SHIFT;
 985         if (skb->ip_summed == CHECKSUM_PARTIAL)
 986                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
 987
 988         ring->curr_desc++;
 989         if (ring->curr_desc == ring->size)
 990                 ring->curr_desc = 0;
 991         ring->desc_count--;
 992
 993         /* Ensure write completion of the descriptor status/length
 994          * in DRAM before the System Port WRITE_PORT register latches
 995          * the value
 996          */
 997         wmb();
 998         desc->addr_status_len = len_status;
 999         wmb();
1000
1001         /* Write this descriptor address to the RING write port */
1002         tdma_port_write_desc_addr(priv, desc, ring->index);
1003
1004         /* Check ring space and update SW control flow */
1005         if (ring->desc_count == 0)
1006                 netif_tx_stop_queue(txq);
1007
1008         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1009                   ring->index, ring->desc_count, ring->curr_desc);
1010
1011         ret = NETDEV_TX_OK;
1012 out:
1013         spin_unlock_irqrestore(&ring->lock, flags);
1014         return ret;
1015 }
1016
1017 static void bcm_sysport_tx_timeout(struct net_device *dev)
1018 {
1019         netdev_warn(dev, "transmit timeout!\n");
1020
1021         dev->trans_start = jiffies;
1022         dev->stats.tx_errors++;
1023
1024         netif_tx_wake_all_queues(dev);
1025 }
1026
1027 /* phylib adjust link callback */
1028 static void bcm_sysport_adj_link(struct net_device *dev)
1029 {
1030         struct bcm_sysport_priv *priv = netdev_priv(dev);
1031         struct phy_device *phydev = priv->phydev;
1032         unsigned int changed = 0;
1033         u32 cmd_bits = 0, reg;
1034
1035         if (priv->old_link != phydev->link) {
1036                 changed = 1;
1037                 priv->old_link = phydev->link;
1038         }
1039
1040         if (priv->old_duplex != phydev->duplex) {
1041                 changed = 1;
1042                 priv->old_duplex = phydev->duplex;
1043         }
1044
1045         switch (phydev->speed) {
1046         case SPEED_2500:
1047                 cmd_bits = CMD_SPEED_2500;
1048                 break;
1049         case SPEED_1000:
1050                 cmd_bits = CMD_SPEED_1000;
1051                 break;
1052         case SPEED_100:
1053                 cmd_bits = CMD_SPEED_100;
1054                 break;
1055         case SPEED_10:
1056                 cmd_bits = CMD_SPEED_10;
1057                 break;
1058         default:
1059                 break;
1060         }
1061         cmd_bits <<= CMD_SPEED_SHIFT;
1062
1063         if (phydev->duplex == DUPLEX_HALF)
1064                 cmd_bits |= CMD_HD_EN;
1065
1066         if (priv->old_pause != phydev->pause) {
1067                 changed = 1;
1068                 priv->old_pause = phydev->pause;
1069         }
1070
1071         if (!phydev->pause)
1072                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1073
1074         if (!changed)
1075                 return;
1076
1077         if (phydev->link) {
1078                 reg = umac_readl(priv, UMAC_CMD);
1079                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1080                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1081                         CMD_TX_PAUSE_IGNORE);
1082                 reg |= cmd_bits;
1083                 umac_writel(priv, reg, UMAC_CMD);
1084         }
1085
1086         phy_print_status(priv->phydev);
1087 }
1088
1089 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1090                                     unsigned int index)
1091 {
1092         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1093         struct device *kdev = &priv->pdev->dev;
1094         size_t size;
1095         void *p;
1096         u32 reg;
1097
1098         /* Simple descriptors partitioning for now */
1099         size = 256;
1100
1101         /* We just need one DMA descriptor which is DMA-able, since writing to
1102          * the port will allocate a new descriptor in its internal linked-list
1103          */
1104         p = dma_zalloc_coherent(kdev, 1, &ring->desc_dma, GFP_KERNEL);
1105         if (!p) {
1106                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1107                 return -ENOMEM;
1108         }
1109
1110         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1111         if (!ring->cbs) {
1112                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1113                 return -ENOMEM;
1114         }
1115
1116         /* Initialize SW view of the ring */
1117         spin_lock_init(&ring->lock);
1118         ring->priv = priv;
1119         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1120         ring->index = index;
1121         ring->size = size;
1122         ring->alloc_size = ring->size;
1123         ring->desc_cpu = p;
1124         ring->desc_count = ring->size;
1125         ring->curr_desc = 0;
1126
1127         /* Initialize HW ring */
1128         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1129         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1130         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1131         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1132         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1133         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1134
1135         /* Program the number of descriptors as MAX_THRESHOLD and half of
1136          * its size for the hysteresis trigger
1137          */
1138         tdma_writel(priv, ring->size |
1139                         1 << RING_HYST_THRESH_SHIFT,
1140                         TDMA_DESC_RING_MAX_HYST(index));
1141
1142         /* Enable the ring queue in the arbiter */
1143         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1144         reg |= (1 << index);
1145         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1146
1147         napi_enable(&ring->napi);
1148
1149         netif_dbg(priv, hw, priv->netdev,
1150                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1151                   ring->size, ring->desc_cpu);
1152
1153         return 0;
1154 }
1155
1156 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1157                                      unsigned int index)
1158 {
1159         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1160         struct device *kdev = &priv->pdev->dev;
1161         u32 reg;
1162
1163         /* Caller should stop the TDMA engine */
1164         reg = tdma_readl(priv, TDMA_STATUS);
1165         if (!(reg & TDMA_DISABLED))
1166                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1167
1168         napi_disable(&ring->napi);
1169         netif_napi_del(&ring->napi);
1170
1171         bcm_sysport_tx_reclaim(priv, ring);
1172
1173         kfree(ring->cbs);
1174         ring->cbs = NULL;
1175
1176         if (ring->desc_dma) {
1177                 dma_free_coherent(kdev, 1, ring->desc_cpu, ring->desc_dma);
1178                 ring->desc_dma = 0;
1179         }
1180         ring->size = 0;
1181         ring->alloc_size = 0;
1182
1183         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1184 }
1185
1186 /* RDMA helper */
1187 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1188                                   unsigned int enable)
1189 {
1190         unsigned int timeout = 1000;
1191         u32 reg;
1192
1193         reg = rdma_readl(priv, RDMA_CONTROL);
1194         if (enable)
1195                 reg |= RDMA_EN;
1196         else
1197                 reg &= ~RDMA_EN;
1198         rdma_writel(priv, reg, RDMA_CONTROL);
1199
1200         /* Poll for RMDA disabling completion */
1201         do {
1202                 reg = rdma_readl(priv, RDMA_STATUS);
1203                 if (!!(reg & RDMA_DISABLED) == !enable)
1204                         return 0;
1205                 usleep_range(1000, 2000);
1206         } while (timeout-- > 0);
1207
1208         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1209
1210         return -ETIMEDOUT;
1211 }
1212
1213 /* TDMA helper */
1214 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1215                                   unsigned int enable)
1216 {
1217         unsigned int timeout = 1000;
1218         u32 reg;
1219
1220         reg = tdma_readl(priv, TDMA_CONTROL);
1221         if (enable)
1222                 reg |= TDMA_EN;
1223         else
1224                 reg &= ~TDMA_EN;
1225         tdma_writel(priv, reg, TDMA_CONTROL);
1226
1227         /* Poll for TMDA disabling completion */
1228         do {
1229                 reg = tdma_readl(priv, TDMA_STATUS);
1230                 if (!!(reg & TDMA_DISABLED) == !enable)
1231                         return 0;
1232
1233                 usleep_range(1000, 2000);
1234         } while (timeout-- > 0);
1235
1236         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1237
1238         return -ETIMEDOUT;
1239 }
1240
1241 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1242 {
1243         u32 reg;
1244         int ret;
1245
1246         /* Initialize SW view of the RX ring */
1247         priv->num_rx_bds = NUM_RX_DESC;
1248         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1249         priv->rx_bd_assign_ptr = priv->rx_bds;
1250         priv->rx_bd_assign_index = 0;
1251         priv->rx_c_index = 0;
1252         priv->rx_read_ptr = 0;
1253         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1254                                 GFP_KERNEL);
1255         if (!priv->rx_cbs) {
1256                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1257                 return -ENOMEM;
1258         }
1259
1260         ret = bcm_sysport_alloc_rx_bufs(priv);
1261         if (ret) {
1262                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1263                 return ret;
1264         }
1265
1266         /* Initialize HW, ensure RDMA is disabled */
1267         reg = rdma_readl(priv, RDMA_STATUS);
1268         if (!(reg & RDMA_DISABLED))
1269                 rdma_enable_set(priv, 0);
1270
1271         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1272         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1273         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1274         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1275         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1276                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1277         /* Operate the queue in ring mode */
1278         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1279         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1280         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1281         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1282
1283         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1284
1285         netif_dbg(priv, hw, priv->netdev,
1286                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1287                   priv->num_rx_bds, priv->rx_bds);
1288
1289         return 0;
1290 }
1291
1292 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1293 {
1294         struct bcm_sysport_cb *cb;
1295         unsigned int i;
1296         u32 reg;
1297
1298         /* Caller should ensure RDMA is disabled */
1299         reg = rdma_readl(priv, RDMA_STATUS);
1300         if (!(reg & RDMA_DISABLED))
1301                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1302
1303         for (i = 0; i < priv->num_rx_bds; i++) {
1304                 cb = &priv->rx_cbs[i];
1305                 if (dma_unmap_addr(cb, dma_addr))
1306                         dma_unmap_single(&priv->pdev->dev,
1307                                          dma_unmap_addr(cb, dma_addr),
1308                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1309                 bcm_sysport_free_cb(cb);
1310         }
1311
1312         kfree(priv->rx_cbs);
1313         priv->rx_cbs = NULL;
1314
1315         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1316 }
1317
1318 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1319 {
1320         struct bcm_sysport_priv *priv = netdev_priv(dev);
1321         u32 reg;
1322
1323         reg = umac_readl(priv, UMAC_CMD);
1324         if (dev->flags & IFF_PROMISC)
1325                 reg |= CMD_PROMISC;
1326         else
1327                 reg &= ~CMD_PROMISC;
1328         umac_writel(priv, reg, UMAC_CMD);
1329
1330         /* No support for ALLMULTI */
1331         if (dev->flags & IFF_ALLMULTI)
1332                 return;
1333 }
1334
1335 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1336                                    u32 mask, unsigned int enable)
1337 {
1338         u32 reg;
1339
1340         reg = umac_readl(priv, UMAC_CMD);
1341         if (enable)
1342                 reg |= mask;
1343         else
1344                 reg &= ~mask;
1345         umac_writel(priv, reg, UMAC_CMD);
1346
1347         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1348          * to be processed (1 msec).
1349          */
1350         if (enable == 0)
1351                 usleep_range(1000, 2000);
1352 }
1353
1354 static inline void umac_reset(struct bcm_sysport_priv *priv)
1355 {
1356         u32 reg;
1357
1358         reg = umac_readl(priv, UMAC_CMD);
1359         reg |= CMD_SW_RESET;
1360         umac_writel(priv, reg, UMAC_CMD);
1361         udelay(10);
1362         reg = umac_readl(priv, UMAC_CMD);
1363         reg &= ~CMD_SW_RESET;
1364         umac_writel(priv, reg, UMAC_CMD);
1365 }
1366
1367 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1368                              unsigned char *addr)
1369 {
1370         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1371                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1372         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1373 }
1374
1375 static void topctrl_flush(struct bcm_sysport_priv *priv)
1376 {
1377         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1378         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1379         mdelay(1);
1380         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1381         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1382 }
1383
1384 static void bcm_sysport_netif_start(struct net_device *dev)
1385 {
1386         struct bcm_sysport_priv *priv = netdev_priv(dev);
1387
1388         /* Enable NAPI */
1389         napi_enable(&priv->napi);
1390
1391         phy_start(priv->phydev);
1392
1393         /* Enable TX interrupts for the 32 TXQs */
1394         intrl2_1_mask_clear(priv, 0xffffffff);
1395
1396         /* Last call before we start the real business */
1397         netif_tx_start_all_queues(dev);
1398 }
1399
1400 static void rbuf_init(struct bcm_sysport_priv *priv)
1401 {
1402         u32 reg;
1403
1404         reg = rbuf_readl(priv, RBUF_CONTROL);
1405         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1406         rbuf_writel(priv, reg, RBUF_CONTROL);
1407 }
1408
1409 static int bcm_sysport_open(struct net_device *dev)
1410 {
1411         struct bcm_sysport_priv *priv = netdev_priv(dev);
1412         unsigned int i;
1413         int ret;
1414
1415         /* Reset UniMAC */
1416         umac_reset(priv);
1417
1418         /* Flush TX and RX FIFOs at TOPCTRL level */
1419         topctrl_flush(priv);
1420
1421         /* Disable the UniMAC RX/TX */
1422         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1423
1424         /* Enable RBUF 2bytes alignment and Receive Status Block */
1425         rbuf_init(priv);
1426
1427         /* Set maximum frame length */
1428         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1429
1430         /* Set MAC address */
1431         umac_set_hw_addr(priv, dev->dev_addr);
1432
1433         /* Read CRC forward */
1434         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1435
1436         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1437                                         0, priv->phy_interface);
1438         if (!priv->phydev) {
1439                 netdev_err(dev, "could not attach to PHY\n");
1440                 return -ENODEV;
1441         }
1442
1443         /* Reset house keeping link status */
1444         priv->old_duplex = -1;
1445         priv->old_link = -1;
1446         priv->old_pause = -1;
1447
1448         /* mask all interrupts and request them */
1449         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1450         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1451         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1452         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1453         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1454         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1455
1456         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1457         if (ret) {
1458                 netdev_err(dev, "failed to request RX interrupt\n");
1459                 goto out_phy_disconnect;
1460         }
1461
1462         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1463         if (ret) {
1464                 netdev_err(dev, "failed to request TX interrupt\n");
1465                 goto out_free_irq0;
1466         }
1467
1468         /* Initialize both hardware and software ring */
1469         for (i = 0; i < dev->num_tx_queues; i++) {
1470                 ret = bcm_sysport_init_tx_ring(priv, i);
1471                 if (ret) {
1472                         netdev_err(dev, "failed to initialize TX ring %d\n",
1473                                    i);
1474                         goto out_free_tx_ring;
1475                 }
1476         }
1477
1478         /* Initialize linked-list */
1479         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1480
1481         /* Initialize RX ring */
1482         ret = bcm_sysport_init_rx_ring(priv);
1483         if (ret) {
1484                 netdev_err(dev, "failed to initialize RX ring\n");
1485                 goto out_free_rx_ring;
1486         }
1487
1488         /* Turn on RDMA */
1489         ret = rdma_enable_set(priv, 1);
1490         if (ret)
1491                 goto out_free_rx_ring;
1492
1493         /* Enable RX interrupt and TX ring full interrupt */
1494         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1495
1496         /* Turn on TDMA */
1497         ret = tdma_enable_set(priv, 1);
1498         if (ret)
1499                 goto out_clear_rx_int;
1500
1501         /* Turn on UniMAC TX/RX */
1502         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1503
1504         bcm_sysport_netif_start(dev);
1505
1506         return 0;
1507
1508 out_clear_rx_int:
1509         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1510 out_free_rx_ring:
1511         bcm_sysport_fini_rx_ring(priv);
1512 out_free_tx_ring:
1513         for (i = 0; i < dev->num_tx_queues; i++)
1514                 bcm_sysport_fini_tx_ring(priv, i);
1515         free_irq(priv->irq1, dev);
1516 out_free_irq0:
1517         free_irq(priv->irq0, dev);
1518 out_phy_disconnect:
1519         phy_disconnect(priv->phydev);
1520         return ret;
1521 }
1522
1523 static void bcm_sysport_netif_stop(struct net_device *dev)
1524 {
1525         struct bcm_sysport_priv *priv = netdev_priv(dev);
1526
1527         /* stop all software from updating hardware */
1528         netif_tx_stop_all_queues(dev);
1529         napi_disable(&priv->napi);
1530         phy_stop(priv->phydev);
1531
1532         /* mask all interrupts */
1533         intrl2_0_mask_set(priv, 0xffffffff);
1534         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1535         intrl2_1_mask_set(priv, 0xffffffff);
1536         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1537 }
1538
1539 static int bcm_sysport_stop(struct net_device *dev)
1540 {
1541         struct bcm_sysport_priv *priv = netdev_priv(dev);
1542         unsigned int i;
1543         int ret;
1544
1545         bcm_sysport_netif_stop(dev);
1546
1547         /* Disable UniMAC RX */
1548         umac_enable_set(priv, CMD_RX_EN, 0);
1549
1550         ret = tdma_enable_set(priv, 0);
1551         if (ret) {
1552                 netdev_err(dev, "timeout disabling RDMA\n");
1553                 return ret;
1554         }
1555
1556         /* Wait for a maximum packet size to be drained */
1557         usleep_range(2000, 3000);
1558
1559         ret = rdma_enable_set(priv, 0);
1560         if (ret) {
1561                 netdev_err(dev, "timeout disabling TDMA\n");
1562                 return ret;
1563         }
1564
1565         /* Disable UniMAC TX */
1566         umac_enable_set(priv, CMD_TX_EN, 0);
1567
1568         /* Free RX/TX rings SW structures */
1569         for (i = 0; i < dev->num_tx_queues; i++)
1570                 bcm_sysport_fini_tx_ring(priv, i);
1571         bcm_sysport_fini_rx_ring(priv);
1572
1573         free_irq(priv->irq0, dev);
1574         free_irq(priv->irq1, dev);
1575
1576         /* Disconnect from PHY */
1577         phy_disconnect(priv->phydev);
1578
1579         return 0;
1580 }
1581
1582 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1583         .get_settings           = bcm_sysport_get_settings,
1584         .set_settings           = bcm_sysport_set_settings,
1585         .get_drvinfo            = bcm_sysport_get_drvinfo,
1586         .get_msglevel           = bcm_sysport_get_msglvl,
1587         .set_msglevel           = bcm_sysport_set_msglvl,
1588         .get_link               = ethtool_op_get_link,
1589         .get_strings            = bcm_sysport_get_strings,
1590         .get_ethtool_stats      = bcm_sysport_get_stats,
1591         .get_sset_count         = bcm_sysport_get_sset_count,
1592         .get_wol                = bcm_sysport_get_wol,
1593         .set_wol                = bcm_sysport_set_wol,
1594 };
1595
1596 static const struct net_device_ops bcm_sysport_netdev_ops = {
1597         .ndo_start_xmit         = bcm_sysport_xmit,
1598         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1599         .ndo_open               = bcm_sysport_open,
1600         .ndo_stop               = bcm_sysport_stop,
1601         .ndo_set_features       = bcm_sysport_set_features,
1602         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1603 };
1604
1605 #define REV_FMT "v%2x.%02x"
1606
1607 static int bcm_sysport_probe(struct platform_device *pdev)
1608 {
1609         struct bcm_sysport_priv *priv;
1610         struct device_node *dn;
1611         struct net_device *dev;
1612         const void *macaddr;
1613         struct resource *r;
1614         u32 txq, rxq;
1615         int ret;
1616
1617         dn = pdev->dev.of_node;
1618         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1619
1620         /* Read the Transmit/Receive Queue properties */
1621         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1622                 txq = TDMA_NUM_RINGS;
1623         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1624                 rxq = 1;
1625
1626         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1627         if (!dev)
1628                 return -ENOMEM;
1629
1630         /* Initialize private members */
1631         priv = netdev_priv(dev);
1632
1633         priv->irq0 = platform_get_irq(pdev, 0);
1634         priv->irq1 = platform_get_irq(pdev, 1);
1635         priv->wol_irq = platform_get_irq(pdev, 2);
1636         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1637                 dev_err(&pdev->dev, "invalid interrupts\n");
1638                 ret = -EINVAL;
1639                 goto err;
1640         }
1641
1642         priv->base = devm_ioremap_resource(&pdev->dev, r);
1643         if (IS_ERR(priv->base)) {
1644                 ret = PTR_ERR(priv->base);
1645                 goto err;
1646         }
1647
1648         priv->netdev = dev;
1649         priv->pdev = pdev;
1650
1651         priv->phy_interface = of_get_phy_mode(dn);
1652         /* Default to GMII interface mode */
1653         if (priv->phy_interface < 0)
1654                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1655
1656         /* In the case of a fixed PHY, the DT node associated
1657          * to the PHY is the Ethernet MAC DT node.
1658          */
1659         if (of_phy_is_fixed_link(dn)) {
1660                 ret = of_phy_register_fixed_link(dn);
1661                 if (ret) {
1662                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1663                         goto err;
1664                 }
1665
1666                 priv->phy_dn = dn;
1667         }
1668
1669         /* Initialize netdevice members */
1670         macaddr = of_get_mac_address(dn);
1671         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1672                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1673                 random_ether_addr(dev->dev_addr);
1674         } else {
1675                 ether_addr_copy(dev->dev_addr, macaddr);
1676         }
1677
1678         SET_NETDEV_DEV(dev, &pdev->dev);
1679         dev_set_drvdata(&pdev->dev, dev);
1680         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1681         dev->netdev_ops = &bcm_sysport_netdev_ops;
1682         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1683
1684         /* HW supported features, none enabled by default */
1685         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1686                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1687
1688         /* Request the WOL interrupt and advertise suspend if available */
1689         priv->wol_irq_disabled = 1;
1690         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1691                                bcm_sysport_wol_isr, 0, dev->name, priv);
1692         if (!ret)
1693                 device_set_wakeup_capable(&pdev->dev, 1);
1694
1695         /* Set the needed headroom once and for all */
1696         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1697         dev->needed_headroom += sizeof(struct bcm_tsb);
1698
1699         /* libphy will adjust the link state accordingly */
1700         netif_carrier_off(dev);
1701
1702         ret = register_netdev(dev);
1703         if (ret) {
1704                 dev_err(&pdev->dev, "failed to register net_device\n");
1705                 goto err;
1706         }
1707
1708         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1709         dev_info(&pdev->dev,
1710                  "Broadcom SYSTEMPORT" REV_FMT
1711                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1712                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1713                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1714
1715         return 0;
1716 err:
1717         free_netdev(dev);
1718         return ret;
1719 }
1720
1721 static int bcm_sysport_remove(struct platform_device *pdev)
1722 {
1723         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1724
1725         /* Not much to do, ndo_close has been called
1726          * and we use managed allocations
1727          */
1728         unregister_netdev(dev);
1729         free_netdev(dev);
1730         dev_set_drvdata(&pdev->dev, NULL);
1731
1732         return 0;
1733 }
1734
1735 #ifdef CONFIG_PM_SLEEP
1736 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1737 {
1738         struct net_device *ndev = priv->netdev;
1739         unsigned int timeout = 1000;
1740         u32 reg;
1741
1742         /* Password has already been programmed */
1743         reg = umac_readl(priv, UMAC_MPD_CTRL);
1744         reg |= MPD_EN;
1745         reg &= ~PSW_EN;
1746         if (priv->wolopts & WAKE_MAGICSECURE)
1747                 reg |= PSW_EN;
1748         umac_writel(priv, reg, UMAC_MPD_CTRL);
1749
1750         /* Make sure RBUF entered WoL mode as result */
1751         do {
1752                 reg = rbuf_readl(priv, RBUF_STATUS);
1753                 if (reg & RBUF_WOL_MODE)
1754                         break;
1755
1756                 udelay(10);
1757         } while (timeout-- > 0);
1758
1759         /* Do not leave the UniMAC RBUF matching only MPD packets */
1760         if (!timeout) {
1761                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1762                 reg &= ~MPD_EN;
1763                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1764                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1765                 return -ETIMEDOUT;
1766         }
1767
1768         /* UniMAC receive needs to be turned on */
1769         umac_enable_set(priv, CMD_RX_EN, 1);
1770
1771         /* Enable the interrupt wake-up source */
1772         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1773
1774         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1775
1776         return 0;
1777 }
1778
1779 static int bcm_sysport_suspend(struct device *d)
1780 {
1781         struct net_device *dev = dev_get_drvdata(d);
1782         struct bcm_sysport_priv *priv = netdev_priv(dev);
1783         unsigned int i;
1784         int ret = 0;
1785         u32 reg;
1786
1787         if (!netif_running(dev))
1788                 return 0;
1789
1790         bcm_sysport_netif_stop(dev);
1791
1792         phy_suspend(priv->phydev);
1793
1794         netif_device_detach(dev);
1795
1796         /* Disable UniMAC RX */
1797         umac_enable_set(priv, CMD_RX_EN, 0);
1798
1799         ret = rdma_enable_set(priv, 0);
1800         if (ret) {
1801                 netdev_err(dev, "RDMA timeout!\n");
1802                 return ret;
1803         }
1804
1805         /* Disable RXCHK if enabled */
1806         if (priv->rx_chk_en) {
1807                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1808                 reg &= ~RXCHK_EN;
1809                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1810         }
1811
1812         /* Flush RX pipe */
1813         if (!priv->wolopts)
1814                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1815
1816         ret = tdma_enable_set(priv, 0);
1817         if (ret) {
1818                 netdev_err(dev, "TDMA timeout!\n");
1819                 return ret;
1820         }
1821
1822         /* Wait for a packet boundary */
1823         usleep_range(2000, 3000);
1824
1825         umac_enable_set(priv, CMD_TX_EN, 0);
1826
1827         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1828
1829         /* Free RX/TX rings SW structures */
1830         for (i = 0; i < dev->num_tx_queues; i++)
1831                 bcm_sysport_fini_tx_ring(priv, i);
1832         bcm_sysport_fini_rx_ring(priv);
1833
1834         /* Get prepared for Wake-on-LAN */
1835         if (device_may_wakeup(d) && priv->wolopts)
1836                 ret = bcm_sysport_suspend_to_wol(priv);
1837
1838         return ret;
1839 }
1840
1841 static int bcm_sysport_resume(struct device *d)
1842 {
1843         struct net_device *dev = dev_get_drvdata(d);
1844         struct bcm_sysport_priv *priv = netdev_priv(dev);
1845         unsigned int i;
1846         u32 reg;
1847         int ret;
1848
1849         if (!netif_running(dev))
1850                 return 0;
1851
1852         /* We may have been suspended and never received a WOL event that
1853          * would turn off MPD detection, take care of that now
1854          */
1855         bcm_sysport_resume_from_wol(priv);
1856
1857         /* Initialize both hardware and software ring */
1858         for (i = 0; i < dev->num_tx_queues; i++) {
1859                 ret = bcm_sysport_init_tx_ring(priv, i);
1860                 if (ret) {
1861                         netdev_err(dev, "failed to initialize TX ring %d\n",
1862                                    i);
1863                         goto out_free_tx_rings;
1864                 }
1865         }
1866
1867         /* Initialize linked-list */
1868         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1869
1870         /* Initialize RX ring */
1871         ret = bcm_sysport_init_rx_ring(priv);
1872         if (ret) {
1873                 netdev_err(dev, "failed to initialize RX ring\n");
1874                 goto out_free_rx_ring;
1875         }
1876
1877         netif_device_attach(dev);
1878
1879         /* Enable RX interrupt and TX ring full interrupt */
1880         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1881
1882         /* RX pipe enable */
1883         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1884
1885         ret = rdma_enable_set(priv, 1);
1886         if (ret) {
1887                 netdev_err(dev, "failed to enable RDMA\n");
1888                 goto out_free_rx_ring;
1889         }
1890
1891         /* Enable rxhck */
1892         if (priv->rx_chk_en) {
1893                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1894                 reg |= RXCHK_EN;
1895                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1896         }
1897
1898         rbuf_init(priv);
1899
1900         /* Set maximum frame length */
1901         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1902
1903         /* Set MAC address */
1904         umac_set_hw_addr(priv, dev->dev_addr);
1905
1906         umac_enable_set(priv, CMD_RX_EN, 1);
1907
1908         /* TX pipe enable */
1909         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1910
1911         umac_enable_set(priv, CMD_TX_EN, 1);
1912
1913         ret = tdma_enable_set(priv, 1);
1914         if (ret) {
1915                 netdev_err(dev, "TDMA timeout!\n");
1916                 goto out_free_rx_ring;
1917         }
1918
1919         phy_resume(priv->phydev);
1920
1921         bcm_sysport_netif_start(dev);
1922
1923         return 0;
1924
1925 out_free_rx_ring:
1926         bcm_sysport_fini_rx_ring(priv);
1927 out_free_tx_rings:
1928         for (i = 0; i < dev->num_tx_queues; i++)
1929                 bcm_sysport_fini_tx_ring(priv, i);
1930         return ret;
1931 }
1932 #endif
1933
1934 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
1935                 bcm_sysport_suspend, bcm_sysport_resume);
1936
1937 static const struct of_device_id bcm_sysport_of_match[] = {
1938         { .compatible = "brcm,systemport-v1.00" },
1939         { .compatible = "brcm,systemport" },
1940         { /* sentinel */ }
1941 };
1942
1943 static struct platform_driver bcm_sysport_driver = {
1944         .probe  = bcm_sysport_probe,
1945         .remove = bcm_sysport_remove,
1946         .driver =  {
1947                 .name = "brcm-systemport",
1948                 .owner = THIS_MODULE,
1949                 .of_match_table = bcm_sysport_of_match,
1950                 .pm = &bcm_sysport_pm_ops,
1951         },
1952 };
1953 module_platform_driver(bcm_sysport_driver);
1954
1955 MODULE_AUTHOR("Broadcom Corporation");
1956 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1957 MODULE_ALIAS("platform:brcm-systemport");
1958 MODULE_LICENSE("GPL");