2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/string.h>
19 #include <linux/ptrace.h>
20 #include <linux/errno.h>
21 #include <linux/ioport.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/bitops.h>
33 #include <linux/platform_device.h>
34 #include <linux/of_address.h>
35 #include <linux/of_platform.h>
37 #include <asm/pgtable.h>
39 #include <asm/uaccess.h>
40 #include <asm/mpc5xxx.h>
45 /* Make MII read/write commands for the FEC.
47 #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
48 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
51 #define FEC_MII_LOOPS 10000
53 static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
55 struct fec_info* fec = bus->priv;
56 struct fec __iomem *fecp = fec->fecp;
59 BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
61 /* Add PHY address to register command. */
62 out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
64 for (i = 0; i < FEC_MII_LOOPS; i++)
65 if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
68 if (i < FEC_MII_LOOPS) {
69 out_be32(&fecp->fec_ievent, FEC_ENET_MII);
70 ret = in_be32(&fecp->fec_mii_data) & 0xffff;
76 static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
78 struct fec_info* fec = bus->priv;
79 struct fec __iomem *fecp = fec->fecp;
82 /* this must never happen */
83 BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
85 /* Add PHY address to register command. */
86 out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
88 for (i = 0; i < FEC_MII_LOOPS; i++)
89 if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
92 if (i < FEC_MII_LOOPS)
93 out_be32(&fecp->fec_ievent, FEC_ENET_MII);
99 static int fs_enet_fec_mii_reset(struct mii_bus *bus)
101 /* nothing here - for now */
105 static struct of_device_id fs_enet_mdio_fec_match[];
106 static int fs_enet_mdio_probe(struct platform_device *ofdev)
108 const struct of_device_id *match;
110 struct mii_bus *new_bus;
111 struct fec_info *fec;
112 int (*get_bus_freq)(struct device_node *);
113 int ret = -ENOMEM, clock, speed;
115 match = of_match_device(fs_enet_mdio_fec_match, &ofdev->dev);
118 get_bus_freq = match->data;
120 new_bus = mdiobus_alloc();
124 fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
129 new_bus->name = "FEC MII Bus";
130 new_bus->read = &fs_enet_fec_mii_read;
131 new_bus->write = &fs_enet_fec_mii_write;
132 new_bus->reset = &fs_enet_fec_mii_reset;
134 ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
138 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
140 fec->fecp = ioremap(res.start, resource_size(&res));
147 clock = get_bus_freq(ofdev->dev.of_node);
149 /* Use maximum divider if clock is unknown */
150 dev_warn(&ofdev->dev, "could not determine IPS clock\n");
151 clock = 0x3F * 5000000;
154 clock = ppc_proc_freq;
157 * Scale for a MII clock <= 2.5 MHz
158 * Note that only 6 bits (25:30) are available for MII speed.
160 speed = (clock + 4999999) / 5000000;
164 "MII clock (%d Hz) exceeds max (2.5 MHz)\n",
168 fec->mii_speed = speed << 1;
170 setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
171 setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
172 FEC_ECNTRL_ETHER_EN);
173 out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
174 clrsetbits_be32(&fec->fecp->fec_mii_speed, 0x7E, fec->mii_speed);
176 new_bus->phy_mask = ~0;
177 new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
183 new_bus->parent = &ofdev->dev;
184 platform_set_drvdata(ofdev, new_bus);
186 ret = of_mdiobus_register(new_bus, ofdev->dev.of_node);
200 mdiobus_free(new_bus);
205 static int fs_enet_mdio_remove(struct platform_device *ofdev)
207 struct mii_bus *bus = platform_get_drvdata(ofdev);
208 struct fec_info *fec = bus->priv;
210 mdiobus_unregister(bus);
219 static struct of_device_id fs_enet_mdio_fec_match[] = {
221 .compatible = "fsl,pq1-fec-mdio",
223 #if defined(CONFIG_PPC_MPC512x)
225 .compatible = "fsl,mpc5121-fec-mdio",
226 .data = mpc5xxx_get_bus_frequency,
231 MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
233 static struct platform_driver fs_enet_fec_mdio_driver = {
235 .name = "fsl-fec-mdio",
236 .owner = THIS_MODULE,
237 .of_match_table = fs_enet_mdio_fec_match,
239 .probe = fs_enet_mdio_probe,
240 .remove = fs_enet_mdio_remove,
243 module_platform_driver(fs_enet_fec_mdio_driver);