1 /* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
21 #include <linux/types.h>
22 #include <linux/module.h>
26 #include <linux/if_macvlan.h>
27 #include <linux/prefetch.h>
31 #define DRV_VERSION "0.12.2-k"
32 const char fm10k_driver_version[] = DRV_VERSION;
33 char fm10k_driver_name[] = "fm10k";
34 static const char fm10k_driver_string[] =
35 "Intel(R) Ethernet Switch Host Interface Driver";
36 static const char fm10k_copyright[] =
37 "Copyright (c) 2013 Intel Corporation.";
39 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
40 MODULE_DESCRIPTION("Intel(R) Ethernet Switch Host Interface Driver");
41 MODULE_LICENSE("GPL");
42 MODULE_VERSION(DRV_VERSION);
45 * fm10k_init_module - Driver Registration Routine
47 * fm10k_init_module is the first routine called when the driver is
48 * loaded. All it does is register with the PCI subsystem.
50 static int __init fm10k_init_module(void)
52 pr_info("%s - version %s\n", fm10k_driver_string, fm10k_driver_version);
53 pr_info("%s\n", fm10k_copyright);
57 return fm10k_register_pci_driver();
59 module_init(fm10k_init_module);
62 * fm10k_exit_module - Driver Exit Cleanup Routine
64 * fm10k_exit_module is called just before the driver is removed
67 static void __exit fm10k_exit_module(void)
69 fm10k_unregister_pci_driver();
73 module_exit(fm10k_exit_module);
75 static bool fm10k_alloc_mapped_page(struct fm10k_ring *rx_ring,
76 struct fm10k_rx_buffer *bi)
78 struct page *page = bi->page;
81 /* Only page will be NULL if buffer was consumed */
85 /* alloc new page for storage */
86 page = dev_alloc_page();
87 if (unlikely(!page)) {
88 rx_ring->rx_stats.alloc_failed++;
92 /* map page for use */
93 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
95 /* if mapping failed free memory back to system since
96 * there isn't much point in holding memory we can't use
98 if (dma_mapping_error(rx_ring->dev, dma)) {
102 rx_ring->rx_stats.alloc_failed++;
114 * fm10k_alloc_rx_buffers - Replace used receive buffers
115 * @rx_ring: ring to place buffers on
116 * @cleaned_count: number of buffers to replace
118 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count)
120 union fm10k_rx_desc *rx_desc;
121 struct fm10k_rx_buffer *bi;
122 u16 i = rx_ring->next_to_use;
128 rx_desc = FM10K_RX_DESC(rx_ring, i);
129 bi = &rx_ring->rx_buffer[i];
133 if (!fm10k_alloc_mapped_page(rx_ring, bi))
136 /* Refresh the desc even if buffer_addrs didn't change
137 * because each write-back erases this info.
139 rx_desc->q.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
145 rx_desc = FM10K_RX_DESC(rx_ring, 0);
146 bi = rx_ring->rx_buffer;
150 /* clear the hdr_addr for the next_to_use descriptor */
151 rx_desc->q.hdr_addr = 0;
154 } while (cleaned_count);
158 if (rx_ring->next_to_use != i) {
159 /* record the next descriptor to use */
160 rx_ring->next_to_use = i;
162 /* update next to alloc since we have filled the ring */
163 rx_ring->next_to_alloc = i;
165 /* Force memory writes to complete before letting h/w
166 * know there are new descriptors to fetch. (Only
167 * applicable for weak-ordered memory model archs,
172 /* notify hardware of new descriptors */
173 writel(i, rx_ring->tail);
178 * fm10k_reuse_rx_page - page flip buffer and store it back on the ring
179 * @rx_ring: rx descriptor ring to store buffers on
180 * @old_buff: donor buffer to have page reused
182 * Synchronizes page for reuse by the interface
184 static void fm10k_reuse_rx_page(struct fm10k_ring *rx_ring,
185 struct fm10k_rx_buffer *old_buff)
187 struct fm10k_rx_buffer *new_buff;
188 u16 nta = rx_ring->next_to_alloc;
190 new_buff = &rx_ring->rx_buffer[nta];
192 /* update, and store next to alloc */
194 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
196 /* transfer page from old buffer to new buffer */
197 memcpy(new_buff, old_buff, sizeof(struct fm10k_rx_buffer));
199 /* sync the buffer for use by the device */
200 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
201 old_buff->page_offset,
206 static bool fm10k_can_reuse_rx_page(struct fm10k_rx_buffer *rx_buffer,
208 unsigned int truesize)
210 /* avoid re-using remote pages */
211 if (unlikely(page_to_nid(page) != numa_mem_id()))
214 #if (PAGE_SIZE < 8192)
215 /* if we are only owner of page we can reuse it */
216 if (unlikely(page_count(page) != 1))
219 /* flip page offset to other buffer */
220 rx_buffer->page_offset ^= FM10K_RX_BUFSZ;
222 /* Even if we own the page, we are not allowed to use atomic_set()
223 * This would break get_page_unless_zero() users.
225 atomic_inc(&page->_count);
227 /* move offset up to the next cache line */
228 rx_buffer->page_offset += truesize;
230 if (rx_buffer->page_offset > (PAGE_SIZE - FM10K_RX_BUFSZ))
233 /* bump ref count on page before it is given to the stack */
241 * fm10k_add_rx_frag - Add contents of Rx buffer to sk_buff
242 * @rx_ring: rx descriptor ring to transact packets on
243 * @rx_buffer: buffer containing page to add
244 * @rx_desc: descriptor containing length of buffer written by hardware
245 * @skb: sk_buff to place the data into
247 * This function will add the data contained in rx_buffer->page to the skb.
248 * This is done either through a direct copy if the data in the buffer is
249 * less than the skb header size, otherwise it will just attach the page as
252 * The function will then update the page offset if necessary and return
253 * true if the buffer can be reused by the interface.
255 static bool fm10k_add_rx_frag(struct fm10k_ring *rx_ring,
256 struct fm10k_rx_buffer *rx_buffer,
257 union fm10k_rx_desc *rx_desc,
260 struct page *page = rx_buffer->page;
261 unsigned int size = le16_to_cpu(rx_desc->w.length);
262 #if (PAGE_SIZE < 8192)
263 unsigned int truesize = FM10K_RX_BUFSZ;
265 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
268 if ((size <= FM10K_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
269 unsigned char *va = page_address(page) + rx_buffer->page_offset;
271 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
273 /* we can reuse buffer as-is, just make sure it is local */
274 if (likely(page_to_nid(page) == numa_mem_id()))
277 /* this page cannot be reused so discard it */
282 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
283 rx_buffer->page_offset, size, truesize);
285 return fm10k_can_reuse_rx_page(rx_buffer, page, truesize);
288 static struct sk_buff *fm10k_fetch_rx_buffer(struct fm10k_ring *rx_ring,
289 union fm10k_rx_desc *rx_desc,
292 struct fm10k_rx_buffer *rx_buffer;
295 rx_buffer = &rx_ring->rx_buffer[rx_ring->next_to_clean];
297 page = rx_buffer->page;
301 void *page_addr = page_address(page) +
302 rx_buffer->page_offset;
304 /* prefetch first cache line of first page */
306 #if L1_CACHE_BYTES < 128
307 prefetch(page_addr + L1_CACHE_BYTES);
310 /* allocate a skb to store the frags */
311 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
313 if (unlikely(!skb)) {
314 rx_ring->rx_stats.alloc_failed++;
318 /* we will be copying header into skb->data in
319 * pskb_may_pull so it is in our interest to prefetch
320 * it now to avoid a possible cache miss
322 prefetchw(skb->data);
325 /* we are reusing so sync this buffer for CPU use */
326 dma_sync_single_range_for_cpu(rx_ring->dev,
328 rx_buffer->page_offset,
332 /* pull page into skb */
333 if (fm10k_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
334 /* hand second half of page back to the ring */
335 fm10k_reuse_rx_page(rx_ring, rx_buffer);
337 /* we are not reusing the buffer so unmap it */
338 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
339 PAGE_SIZE, DMA_FROM_DEVICE);
342 /* clear contents of rx_buffer */
343 rx_buffer->page = NULL;
348 static inline void fm10k_rx_checksum(struct fm10k_ring *ring,
349 union fm10k_rx_desc *rx_desc,
352 skb_checksum_none_assert(skb);
354 /* Rx checksum disabled via ethtool */
355 if (!(ring->netdev->features & NETIF_F_RXCSUM))
358 /* TCP/UDP checksum error bit is set */
359 if (fm10k_test_staterr(rx_desc,
360 FM10K_RXD_STATUS_L4E |
361 FM10K_RXD_STATUS_L4E2 |
362 FM10K_RXD_STATUS_IPE |
363 FM10K_RXD_STATUS_IPE2)) {
364 ring->rx_stats.csum_err++;
368 /* It must be a TCP or UDP packet with a valid checksum */
369 if (fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS2))
370 skb->encapsulation = true;
371 else if (!fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS))
374 skb->ip_summed = CHECKSUM_UNNECESSARY;
377 #define FM10K_RSS_L4_TYPES_MASK \
378 ((1ul << FM10K_RSSTYPE_IPV4_TCP) | \
379 (1ul << FM10K_RSSTYPE_IPV4_UDP) | \
380 (1ul << FM10K_RSSTYPE_IPV6_TCP) | \
381 (1ul << FM10K_RSSTYPE_IPV6_UDP))
383 static inline void fm10k_rx_hash(struct fm10k_ring *ring,
384 union fm10k_rx_desc *rx_desc,
389 if (!(ring->netdev->features & NETIF_F_RXHASH))
392 rss_type = le16_to_cpu(rx_desc->w.pkt_info) & FM10K_RXD_RSSTYPE_MASK;
396 skb_set_hash(skb, le32_to_cpu(rx_desc->d.rss),
397 (FM10K_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
398 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
401 static void fm10k_rx_hwtstamp(struct fm10k_ring *rx_ring,
402 union fm10k_rx_desc *rx_desc,
405 struct fm10k_intfc *interface = rx_ring->q_vector->interface;
407 FM10K_CB(skb)->tstamp = rx_desc->q.timestamp;
409 if (unlikely(interface->flags & FM10K_FLAG_RX_TS_ENABLED))
410 fm10k_systime_to_hwtstamp(interface, skb_hwtstamps(skb),
411 le64_to_cpu(rx_desc->q.timestamp));
414 static void fm10k_type_trans(struct fm10k_ring *rx_ring,
415 union fm10k_rx_desc *rx_desc,
418 struct net_device *dev = rx_ring->netdev;
419 struct fm10k_l2_accel *l2_accel = rcu_dereference_bh(rx_ring->l2_accel);
421 /* check to see if DGLORT belongs to a MACVLAN */
423 u16 idx = le16_to_cpu(FM10K_CB(skb)->fi.w.dglort) - 1;
425 idx -= l2_accel->dglort;
426 if (idx < l2_accel->size && l2_accel->macvlan[idx])
427 dev = l2_accel->macvlan[idx];
432 skb->protocol = eth_type_trans(skb, dev);
437 /* update MACVLAN statistics */
438 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, 1,
439 !!(rx_desc->w.hdr_info &
440 cpu_to_le16(FM10K_RXD_HDR_INFO_XC_MASK)));
444 * fm10k_process_skb_fields - Populate skb header fields from Rx descriptor
445 * @rx_ring: rx descriptor ring packet is being transacted on
446 * @rx_desc: pointer to the EOP Rx descriptor
447 * @skb: pointer to current skb being populated
449 * This function checks the ring, descriptor, and packet information in
450 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
451 * other fields within the skb.
453 static unsigned int fm10k_process_skb_fields(struct fm10k_ring *rx_ring,
454 union fm10k_rx_desc *rx_desc,
457 unsigned int len = skb->len;
459 fm10k_rx_hash(rx_ring, rx_desc, skb);
461 fm10k_rx_checksum(rx_ring, rx_desc, skb);
463 fm10k_rx_hwtstamp(rx_ring, rx_desc, skb);
465 FM10K_CB(skb)->fi.w.vlan = rx_desc->w.vlan;
467 skb_record_rx_queue(skb, rx_ring->queue_index);
469 FM10K_CB(skb)->fi.d.glort = rx_desc->d.glort;
471 if (rx_desc->w.vlan) {
472 u16 vid = le16_to_cpu(rx_desc->w.vlan);
474 if (vid != rx_ring->vid)
475 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
478 fm10k_type_trans(rx_ring, rx_desc, skb);
484 * fm10k_is_non_eop - process handling of non-EOP buffers
485 * @rx_ring: Rx ring being processed
486 * @rx_desc: Rx descriptor for current buffer
488 * This function updates next to clean. If the buffer is an EOP buffer
489 * this function exits returning false, otherwise it will place the
490 * sk_buff in the next buffer to be chained and return true indicating
491 * that this is in fact a non-EOP buffer.
493 static bool fm10k_is_non_eop(struct fm10k_ring *rx_ring,
494 union fm10k_rx_desc *rx_desc)
496 u32 ntc = rx_ring->next_to_clean + 1;
498 /* fetch, update, and store next to clean */
499 ntc = (ntc < rx_ring->count) ? ntc : 0;
500 rx_ring->next_to_clean = ntc;
502 prefetch(FM10K_RX_DESC(rx_ring, ntc));
504 if (likely(fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_EOP)))
511 * fm10k_pull_tail - fm10k specific version of skb_pull_tail
512 * @rx_ring: rx descriptor ring packet is being transacted on
513 * @rx_desc: pointer to the EOP Rx descriptor
514 * @skb: pointer to current skb being adjusted
516 * This function is an fm10k specific version of __pskb_pull_tail. The
517 * main difference between this version and the original function is that
518 * this function can make several assumptions about the state of things
519 * that allow for significant optimizations versus the standard function.
520 * As a result we can do things like drop a frag and maintain an accurate
521 * truesize for the skb.
523 static void fm10k_pull_tail(struct fm10k_ring *rx_ring,
524 union fm10k_rx_desc *rx_desc,
527 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
529 unsigned int pull_len;
531 /* it is valid to use page_address instead of kmap since we are
532 * working with pages allocated out of the lomem pool per
533 * alloc_page(GFP_ATOMIC)
535 va = skb_frag_address(frag);
537 /* we need the header to contain the greater of either ETH_HLEN or
538 * 60 bytes if the skb->len is less than 60 for skb_pad.
540 pull_len = eth_get_headlen(va, FM10K_RX_HDR_LEN);
542 /* align pull length to size of long to optimize memcpy performance */
543 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
545 /* update all of the pointers */
546 skb_frag_size_sub(frag, pull_len);
547 frag->page_offset += pull_len;
548 skb->data_len -= pull_len;
549 skb->tail += pull_len;
553 * fm10k_cleanup_headers - Correct corrupted or empty headers
554 * @rx_ring: rx descriptor ring packet is being transacted on
555 * @rx_desc: pointer to the EOP Rx descriptor
556 * @skb: pointer to current skb being fixed
558 * Address the case where we are pulling data in on pages only
559 * and as such no data is present in the skb header.
561 * In addition if skb is not at least 60 bytes we need to pad it so that
562 * it is large enough to qualify as a valid Ethernet frame.
564 * Returns true if an error was encountered and skb was freed.
566 static bool fm10k_cleanup_headers(struct fm10k_ring *rx_ring,
567 union fm10k_rx_desc *rx_desc,
570 if (unlikely((fm10k_test_staterr(rx_desc,
571 FM10K_RXD_STATUS_RXE)))) {
572 dev_kfree_skb_any(skb);
573 rx_ring->rx_stats.errors++;
577 /* place header in linear portion of buffer */
578 if (skb_is_nonlinear(skb))
579 fm10k_pull_tail(rx_ring, rx_desc, skb);
581 /* if eth_skb_pad returns an error the skb was freed */
582 if (eth_skb_pad(skb))
589 * fm10k_receive_skb - helper function to handle rx indications
590 * @q_vector: structure containing interrupt and ring information
591 * @skb: packet to send up
593 static void fm10k_receive_skb(struct fm10k_q_vector *q_vector,
596 napi_gro_receive(&q_vector->napi, skb);
599 static bool fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
600 struct fm10k_ring *rx_ring,
603 struct sk_buff *skb = rx_ring->skb;
604 unsigned int total_bytes = 0, total_packets = 0;
605 u16 cleaned_count = fm10k_desc_unused(rx_ring);
608 union fm10k_rx_desc *rx_desc;
610 /* return some buffers to hardware, one at a time is too slow */
611 if (cleaned_count >= FM10K_RX_BUFFER_WRITE) {
612 fm10k_alloc_rx_buffers(rx_ring, cleaned_count);
616 rx_desc = FM10K_RX_DESC(rx_ring, rx_ring->next_to_clean);
618 if (!rx_desc->d.staterr)
621 /* This memory barrier is needed to keep us from reading
622 * any other fields out of the rx_desc until we know the
623 * descriptor has been written back
627 /* retrieve a buffer from the ring */
628 skb = fm10k_fetch_rx_buffer(rx_ring, rx_desc, skb);
630 /* exit if we failed to retrieve a buffer */
636 /* fetch next buffer in frame if non-eop */
637 if (fm10k_is_non_eop(rx_ring, rx_desc))
640 /* verify the packet layout is correct */
641 if (fm10k_cleanup_headers(rx_ring, rx_desc, skb)) {
646 /* populate checksum, timestamp, VLAN, and protocol */
647 total_bytes += fm10k_process_skb_fields(rx_ring, rx_desc, skb);
649 fm10k_receive_skb(q_vector, skb);
651 /* reset skb pointer */
654 /* update budget accounting */
656 } while (likely(total_packets < budget));
658 /* place incomplete frames back on ring for completion */
661 u64_stats_update_begin(&rx_ring->syncp);
662 rx_ring->stats.packets += total_packets;
663 rx_ring->stats.bytes += total_bytes;
664 u64_stats_update_end(&rx_ring->syncp);
665 q_vector->rx.total_packets += total_packets;
666 q_vector->rx.total_bytes += total_bytes;
668 return total_packets < budget;
671 #define VXLAN_HLEN (sizeof(struct udphdr) + 8)
672 static struct ethhdr *fm10k_port_is_vxlan(struct sk_buff *skb)
674 struct fm10k_intfc *interface = netdev_priv(skb->dev);
675 struct fm10k_vxlan_port *vxlan_port;
677 /* we can only offload a vxlan if we recognize it as such */
678 vxlan_port = list_first_entry_or_null(&interface->vxlan_port,
679 struct fm10k_vxlan_port, list);
683 if (vxlan_port->port != udp_hdr(skb)->dest)
686 /* return offset of udp_hdr plus 8 bytes for VXLAN header */
687 return (struct ethhdr *)(skb_transport_header(skb) + VXLAN_HLEN);
690 #define FM10K_NVGRE_RESERVED0_FLAGS htons(0x9FFF)
691 #define NVGRE_TNI htons(0x2000)
692 struct fm10k_nvgre_hdr {
698 static struct ethhdr *fm10k_gre_is_nvgre(struct sk_buff *skb)
700 struct fm10k_nvgre_hdr *nvgre_hdr;
701 int hlen = ip_hdrlen(skb);
703 /* currently only IPv4 is supported due to hlen above */
704 if (vlan_get_protocol(skb) != htons(ETH_P_IP))
707 /* our transport header should be NVGRE */
708 nvgre_hdr = (struct fm10k_nvgre_hdr *)(skb_network_header(skb) + hlen);
710 /* verify all reserved flags are 0 */
711 if (nvgre_hdr->flags & FM10K_NVGRE_RESERVED0_FLAGS)
714 /* verify protocol is transparent Ethernet bridging */
715 if (nvgre_hdr->proto != htons(ETH_P_TEB))
718 /* report start of ethernet header */
719 if (nvgre_hdr->flags & NVGRE_TNI)
720 return (struct ethhdr *)(nvgre_hdr + 1);
722 return (struct ethhdr *)(&nvgre_hdr->tni);
725 static __be16 fm10k_tx_encap_offload(struct sk_buff *skb)
727 struct ethhdr *eth_hdr;
730 switch (vlan_get_protocol(skb)) {
731 case htons(ETH_P_IP):
732 l4_hdr = ip_hdr(skb)->protocol;
734 case htons(ETH_P_IPV6):
735 l4_hdr = ipv6_hdr(skb)->nexthdr;
743 eth_hdr = fm10k_port_is_vxlan(skb);
746 eth_hdr = fm10k_gre_is_nvgre(skb);
755 switch (eth_hdr->h_proto) {
756 case htons(ETH_P_IP):
757 case htons(ETH_P_IPV6):
763 return eth_hdr->h_proto;
766 static int fm10k_tso(struct fm10k_ring *tx_ring,
767 struct fm10k_tx_buffer *first)
769 struct sk_buff *skb = first->skb;
770 struct fm10k_tx_desc *tx_desc;
774 if (skb->ip_summed != CHECKSUM_PARTIAL)
777 if (!skb_is_gso(skb))
780 /* compute header lengths */
781 if (skb->encapsulation) {
782 if (!fm10k_tx_encap_offload(skb))
784 th = skb_inner_transport_header(skb);
786 th = skb_transport_header(skb);
789 /* compute offset from SOF to transport header and add header len */
790 hdrlen = (th - skb->data) + (((struct tcphdr *)th)->doff << 2);
792 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
794 /* update gso size and bytecount with header size */
795 first->gso_segs = skb_shinfo(skb)->gso_segs;
796 first->bytecount += (first->gso_segs - 1) * hdrlen;
798 /* populate Tx descriptor header size and mss */
799 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
800 tx_desc->hdrlen = hdrlen;
801 tx_desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
805 tx_ring->netdev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
806 if (!net_ratelimit())
807 netdev_err(tx_ring->netdev,
808 "TSO requested for unsupported tunnel, disabling offload\n");
812 static void fm10k_tx_csum(struct fm10k_ring *tx_ring,
813 struct fm10k_tx_buffer *first)
815 struct sk_buff *skb = first->skb;
816 struct fm10k_tx_desc *tx_desc;
819 struct ipv6hdr *ipv6;
825 if (skb->ip_summed != CHECKSUM_PARTIAL)
828 if (skb->encapsulation) {
829 protocol = fm10k_tx_encap_offload(skb);
831 if (skb_checksum_help(skb)) {
832 dev_warn(tx_ring->dev,
833 "failed to offload encap csum!\n");
834 tx_ring->tx_stats.csum_err++;
838 network_hdr.raw = skb_inner_network_header(skb);
840 protocol = vlan_get_protocol(skb);
841 network_hdr.raw = skb_network_header(skb);
845 case htons(ETH_P_IP):
846 l4_hdr = network_hdr.ipv4->protocol;
848 case htons(ETH_P_IPV6):
849 l4_hdr = network_hdr.ipv6->nexthdr;
852 if (unlikely(net_ratelimit())) {
853 dev_warn(tx_ring->dev,
854 "partial checksum but ip version=%x!\n",
857 tx_ring->tx_stats.csum_err++;
866 if (skb->encapsulation)
869 if (unlikely(net_ratelimit())) {
870 dev_warn(tx_ring->dev,
871 "partial checksum but l4 proto=%x!\n",
874 tx_ring->tx_stats.csum_err++;
878 /* update TX checksum flag */
879 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
882 /* populate Tx descriptor header size and mss */
883 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
888 #define FM10K_SET_FLAG(_input, _flag, _result) \
889 ((_flag <= _result) ? \
890 ((u32)(_input & _flag) * (_result / _flag)) : \
891 ((u32)(_input & _flag) / (_flag / _result)))
893 static u8 fm10k_tx_desc_flags(struct sk_buff *skb, u32 tx_flags)
895 /* set type for advanced descriptor with frame checksum insertion */
898 /* set timestamping bits */
899 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
900 likely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS))
901 desc_flags |= FM10K_TXD_FLAG_TIME;
903 /* set checksum offload bits */
904 desc_flags |= FM10K_SET_FLAG(tx_flags, FM10K_TX_FLAGS_CSUM,
905 FM10K_TXD_FLAG_CSUM);
910 static bool fm10k_tx_desc_push(struct fm10k_ring *tx_ring,
911 struct fm10k_tx_desc *tx_desc, u16 i,
912 dma_addr_t dma, unsigned int size, u8 desc_flags)
914 /* set RS and INT for last frame in a cache line */
915 if ((++i & (FM10K_TXD_WB_FIFO_SIZE - 1)) == 0)
916 desc_flags |= FM10K_TXD_FLAG_RS | FM10K_TXD_FLAG_INT;
918 /* record values to descriptor */
919 tx_desc->buffer_addr = cpu_to_le64(dma);
920 tx_desc->flags = desc_flags;
921 tx_desc->buflen = cpu_to_le16(size);
923 /* return true if we just wrapped the ring */
924 return i == tx_ring->count;
927 static int __fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
929 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
933 /* We need to check again in a case another CPU has just
934 * made room available. */
935 if (likely(fm10k_desc_unused(tx_ring) < size))
938 /* A reprieve! - use start_queue because it doesn't call schedule */
939 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
940 ++tx_ring->tx_stats.restart_queue;
944 static inline int fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
946 if (likely(fm10k_desc_unused(tx_ring) >= size))
948 return __fm10k_maybe_stop_tx(tx_ring, size);
951 static void fm10k_tx_map(struct fm10k_ring *tx_ring,
952 struct fm10k_tx_buffer *first)
954 struct sk_buff *skb = first->skb;
955 struct fm10k_tx_buffer *tx_buffer;
956 struct fm10k_tx_desc *tx_desc;
957 struct skb_frag_struct *frag;
960 unsigned int data_len, size;
961 u32 tx_flags = first->tx_flags;
962 u16 i = tx_ring->next_to_use;
963 u8 flags = fm10k_tx_desc_flags(skb, tx_flags);
965 tx_desc = FM10K_TX_DESC(tx_ring, i);
967 /* add HW VLAN tag */
968 if (skb_vlan_tag_present(skb))
969 tx_desc->vlan = cpu_to_le16(skb_vlan_tag_get(skb));
973 size = skb_headlen(skb);
976 dma = dma_map_single(tx_ring->dev, data, size, DMA_TO_DEVICE);
978 data_len = skb->data_len;
981 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
982 if (dma_mapping_error(tx_ring->dev, dma))
985 /* record length, and DMA address */
986 dma_unmap_len_set(tx_buffer, len, size);
987 dma_unmap_addr_set(tx_buffer, dma, dma);
989 while (unlikely(size > FM10K_MAX_DATA_PER_TXD)) {
990 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++, dma,
991 FM10K_MAX_DATA_PER_TXD, flags)) {
992 tx_desc = FM10K_TX_DESC(tx_ring, 0);
996 dma += FM10K_MAX_DATA_PER_TXD;
997 size -= FM10K_MAX_DATA_PER_TXD;
1000 if (likely(!data_len))
1003 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++,
1004 dma, size, flags)) {
1005 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1009 size = skb_frag_size(frag);
1012 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1015 tx_buffer = &tx_ring->tx_buffer[i];
1018 /* write last descriptor with LAST bit set */
1019 flags |= FM10K_TXD_FLAG_LAST;
1021 if (fm10k_tx_desc_push(tx_ring, tx_desc, i++, dma, size, flags))
1024 /* record bytecount for BQL */
1025 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1027 /* record SW timestamp if HW timestamp is not available */
1028 skb_tx_timestamp(first->skb);
1030 /* Force memory writes to complete before letting h/w know there
1031 * are new descriptors to fetch. (Only applicable for weak-ordered
1032 * memory model archs, such as IA-64).
1034 * We also need this memory barrier to make certain all of the
1035 * status bits have been updated before next_to_watch is written.
1039 /* set next_to_watch value indicating a packet is present */
1040 first->next_to_watch = tx_desc;
1042 tx_ring->next_to_use = i;
1044 /* Make sure there is space in the ring for the next send. */
1045 fm10k_maybe_stop_tx(tx_ring, DESC_NEEDED);
1047 /* notify HW of packet */
1048 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
1049 writel(i, tx_ring->tail);
1051 /* we need this if more than one processor can write to our tail
1052 * at a time, it synchronizes IO on IA64/Altix systems
1059 dev_err(tx_ring->dev, "TX DMA map failed\n");
1061 /* clear dma mappings for failed tx_buffer map */
1063 tx_buffer = &tx_ring->tx_buffer[i];
1064 fm10k_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1065 if (tx_buffer == first)
1072 tx_ring->next_to_use = i;
1075 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
1076 struct fm10k_ring *tx_ring)
1078 struct fm10k_tx_buffer *first;
1081 #if PAGE_SIZE > FM10K_MAX_DATA_PER_TXD
1084 u16 count = TXD_USE_COUNT(skb_headlen(skb));
1086 /* need: 1 descriptor per page * PAGE_SIZE/FM10K_MAX_DATA_PER_TXD,
1087 * + 1 desc for skb_headlen/FM10K_MAX_DATA_PER_TXD,
1088 * + 2 desc gap to keep tail from touching head
1089 * otherwise try next time
1091 #if PAGE_SIZE > FM10K_MAX_DATA_PER_TXD
1092 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
1093 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
1095 count += skb_shinfo(skb)->nr_frags;
1097 if (fm10k_maybe_stop_tx(tx_ring, count + 3)) {
1098 tx_ring->tx_stats.tx_busy++;
1099 return NETDEV_TX_BUSY;
1102 /* record the location of the first descriptor for this packet */
1103 first = &tx_ring->tx_buffer[tx_ring->next_to_use];
1105 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
1106 first->gso_segs = 1;
1108 /* record initial flags and protocol */
1109 first->tx_flags = tx_flags;
1111 tso = fm10k_tso(tx_ring, first);
1115 fm10k_tx_csum(tx_ring, first);
1117 fm10k_tx_map(tx_ring, first);
1119 return NETDEV_TX_OK;
1122 dev_kfree_skb_any(first->skb);
1125 return NETDEV_TX_OK;
1128 static u64 fm10k_get_tx_completed(struct fm10k_ring *ring)
1130 return ring->stats.packets;
1133 static u64 fm10k_get_tx_pending(struct fm10k_ring *ring)
1135 /* use SW head and tail until we have real hardware */
1136 u32 head = ring->next_to_clean;
1137 u32 tail = ring->next_to_use;
1139 return ((head <= tail) ? tail : tail + ring->count) - head;
1142 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring)
1144 u32 tx_done = fm10k_get_tx_completed(tx_ring);
1145 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1146 u32 tx_pending = fm10k_get_tx_pending(tx_ring);
1148 clear_check_for_tx_hang(tx_ring);
1150 /* Check for a hung queue, but be thorough. This verifies
1151 * that a transmit has been completed since the previous
1152 * check AND there is at least one packet pending. By
1153 * requiring this to fail twice we avoid races with
1154 * clearing the ARMED bit and conditions where we
1155 * run the check_tx_hang logic with a transmit completion
1156 * pending but without time to complete it yet.
1158 if (!tx_pending || (tx_done_old != tx_done)) {
1159 /* update completed stats and continue */
1160 tx_ring->tx_stats.tx_done_old = tx_done;
1161 /* reset the countdown */
1162 clear_bit(__FM10K_HANG_CHECK_ARMED, &tx_ring->state);
1167 /* make sure it is true for two checks in a row */
1168 return test_and_set_bit(__FM10K_HANG_CHECK_ARMED, &tx_ring->state);
1172 * fm10k_tx_timeout_reset - initiate reset due to Tx timeout
1173 * @interface: driver private struct
1175 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface)
1177 /* Do the reset outside of interrupt context */
1178 if (!test_bit(__FM10K_DOWN, &interface->state)) {
1179 netdev_err(interface->netdev, "Reset interface\n");
1180 interface->tx_timeout_count++;
1181 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1182 fm10k_service_event_schedule(interface);
1187 * fm10k_clean_tx_irq - Reclaim resources after transmit completes
1188 * @q_vector: structure containing interrupt and ring information
1189 * @tx_ring: tx ring to clean
1191 static bool fm10k_clean_tx_irq(struct fm10k_q_vector *q_vector,
1192 struct fm10k_ring *tx_ring)
1194 struct fm10k_intfc *interface = q_vector->interface;
1195 struct fm10k_tx_buffer *tx_buffer;
1196 struct fm10k_tx_desc *tx_desc;
1197 unsigned int total_bytes = 0, total_packets = 0;
1198 unsigned int budget = q_vector->tx.work_limit;
1199 unsigned int i = tx_ring->next_to_clean;
1201 if (test_bit(__FM10K_DOWN, &interface->state))
1204 tx_buffer = &tx_ring->tx_buffer[i];
1205 tx_desc = FM10K_TX_DESC(tx_ring, i);
1206 i -= tx_ring->count;
1209 struct fm10k_tx_desc *eop_desc = tx_buffer->next_to_watch;
1211 /* if next_to_watch is not set then there is no work pending */
1215 /* prevent any other reads prior to eop_desc */
1216 read_barrier_depends();
1218 /* if DD is not set pending work has not been completed */
1219 if (!(eop_desc->flags & FM10K_TXD_FLAG_DONE))
1222 /* clear next_to_watch to prevent false hangs */
1223 tx_buffer->next_to_watch = NULL;
1225 /* update the statistics for this packet */
1226 total_bytes += tx_buffer->bytecount;
1227 total_packets += tx_buffer->gso_segs;
1230 dev_consume_skb_any(tx_buffer->skb);
1232 /* unmap skb header data */
1233 dma_unmap_single(tx_ring->dev,
1234 dma_unmap_addr(tx_buffer, dma),
1235 dma_unmap_len(tx_buffer, len),
1238 /* clear tx_buffer data */
1239 tx_buffer->skb = NULL;
1240 dma_unmap_len_set(tx_buffer, len, 0);
1242 /* unmap remaining buffers */
1243 while (tx_desc != eop_desc) {
1248 i -= tx_ring->count;
1249 tx_buffer = tx_ring->tx_buffer;
1250 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1253 /* unmap any remaining paged data */
1254 if (dma_unmap_len(tx_buffer, len)) {
1255 dma_unmap_page(tx_ring->dev,
1256 dma_unmap_addr(tx_buffer, dma),
1257 dma_unmap_len(tx_buffer, len),
1259 dma_unmap_len_set(tx_buffer, len, 0);
1263 /* move us one more past the eop_desc for start of next pkt */
1268 i -= tx_ring->count;
1269 tx_buffer = tx_ring->tx_buffer;
1270 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1273 /* issue prefetch for next Tx descriptor */
1276 /* update budget accounting */
1278 } while (likely(budget));
1280 i += tx_ring->count;
1281 tx_ring->next_to_clean = i;
1282 u64_stats_update_begin(&tx_ring->syncp);
1283 tx_ring->stats.bytes += total_bytes;
1284 tx_ring->stats.packets += total_packets;
1285 u64_stats_update_end(&tx_ring->syncp);
1286 q_vector->tx.total_bytes += total_bytes;
1287 q_vector->tx.total_packets += total_packets;
1289 if (check_for_tx_hang(tx_ring) && fm10k_check_tx_hang(tx_ring)) {
1290 /* schedule immediate reset if we believe we hung */
1291 struct fm10k_hw *hw = &interface->hw;
1293 netif_err(interface, drv, tx_ring->netdev,
1294 "Detected Tx Unit Hang\n"
1296 " TDH, TDT <%x>, <%x>\n"
1297 " next_to_use <%x>\n"
1298 " next_to_clean <%x>\n",
1299 tx_ring->queue_index,
1300 fm10k_read_reg(hw, FM10K_TDH(tx_ring->reg_idx)),
1301 fm10k_read_reg(hw, FM10K_TDT(tx_ring->reg_idx)),
1302 tx_ring->next_to_use, i);
1304 netif_stop_subqueue(tx_ring->netdev,
1305 tx_ring->queue_index);
1307 netif_info(interface, probe, tx_ring->netdev,
1308 "tx hang %d detected on queue %d, resetting interface\n",
1309 interface->tx_timeout_count + 1,
1310 tx_ring->queue_index);
1312 fm10k_tx_timeout_reset(interface);
1314 /* the netdev is about to reset, no point in enabling stuff */
1318 /* notify netdev of completed buffers */
1319 netdev_tx_completed_queue(txring_txq(tx_ring),
1320 total_packets, total_bytes);
1322 #define TX_WAKE_THRESHOLD min_t(u16, FM10K_MIN_TXD - 1, DESC_NEEDED * 2)
1323 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1324 (fm10k_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1325 /* Make sure that anybody stopping the queue after this
1326 * sees the new next_to_clean.
1329 if (__netif_subqueue_stopped(tx_ring->netdev,
1330 tx_ring->queue_index) &&
1331 !test_bit(__FM10K_DOWN, &interface->state)) {
1332 netif_wake_subqueue(tx_ring->netdev,
1333 tx_ring->queue_index);
1334 ++tx_ring->tx_stats.restart_queue;
1342 * fm10k_update_itr - update the dynamic ITR value based on packet size
1344 * Stores a new ITR value based on strictly on packet size. The
1345 * divisors and thresholds used by this function were determined based
1346 * on theoretical maximum wire speed and testing data, in order to
1347 * minimize response time while increasing bulk throughput.
1349 * @ring_container: Container for rings to have ITR updated
1351 static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
1353 unsigned int avg_wire_size, packets;
1355 /* Only update ITR if we are using adaptive setting */
1356 if (!(ring_container->itr & FM10K_ITR_ADAPTIVE))
1359 packets = ring_container->total_packets;
1363 avg_wire_size = ring_container->total_bytes / packets;
1365 /* Add 24 bytes to size to account for CRC, preamble, and gap */
1366 avg_wire_size += 24;
1368 /* Don't starve jumbo frames */
1369 if (avg_wire_size > 3000)
1370 avg_wire_size = 3000;
1372 /* Give a little boost to mid-size frames */
1373 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
1378 /* write back value and retain adaptive flag */
1379 ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;
1382 ring_container->total_bytes = 0;
1383 ring_container->total_packets = 0;
1386 static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
1388 /* Enable auto-mask and clear the current mask */
1389 u32 itr = FM10K_ITR_ENABLE;
1392 fm10k_update_itr(&q_vector->tx);
1395 fm10k_update_itr(&q_vector->rx);
1397 /* Store Tx itr in timer slot 0 */
1398 itr |= (q_vector->tx.itr & FM10K_ITR_MAX);
1400 /* Shift Rx itr to timer slot 1 */
1401 itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
1403 /* Write the final value to the ITR register */
1404 writel(itr, q_vector->itr);
1407 static int fm10k_poll(struct napi_struct *napi, int budget)
1409 struct fm10k_q_vector *q_vector =
1410 container_of(napi, struct fm10k_q_vector, napi);
1411 struct fm10k_ring *ring;
1412 int per_ring_budget;
1413 bool clean_complete = true;
1415 fm10k_for_each_ring(ring, q_vector->tx)
1416 clean_complete &= fm10k_clean_tx_irq(q_vector, ring);
1418 /* attempt to distribute budget to each queue fairly, but don't
1419 * allow the budget to go below 1 because we'll exit polling
1421 if (q_vector->rx.count > 1)
1422 per_ring_budget = max(budget/q_vector->rx.count, 1);
1424 per_ring_budget = budget;
1426 fm10k_for_each_ring(ring, q_vector->rx)
1427 clean_complete &= fm10k_clean_rx_irq(q_vector, ring,
1430 /* If all work not completed, return budget and keep polling */
1431 if (!clean_complete)
1434 /* all work done, exit the polling mode */
1435 napi_complete(napi);
1437 /* re-enable the q_vector */
1438 fm10k_qv_enable(q_vector);
1444 * fm10k_set_qos_queues: Allocate queues for a QOS-enabled device
1445 * @interface: board private structure to initialize
1447 * When QoS (Quality of Service) is enabled, allocate queues for
1448 * each traffic class. If multiqueue isn't available,then abort QoS
1451 * This function handles all combinations of Qos and RSS.
1454 static bool fm10k_set_qos_queues(struct fm10k_intfc *interface)
1456 struct net_device *dev = interface->netdev;
1457 struct fm10k_ring_feature *f;
1461 /* Map queue offset and counts onto allocated tx queues */
1462 pcs = netdev_get_num_tc(dev);
1467 /* set QoS mask and indices */
1468 f = &interface->ring_feature[RING_F_QOS];
1470 f->mask = (1 << fls(pcs - 1)) - 1;
1472 /* determine the upper limit for our current DCB mode */
1473 rss_i = interface->hw.mac.max_queues / pcs;
1474 rss_i = 1 << (fls(rss_i) - 1);
1476 /* set RSS mask and indices */
1477 f = &interface->ring_feature[RING_F_RSS];
1478 rss_i = min_t(u16, rss_i, f->limit);
1480 f->mask = (1 << fls(rss_i - 1)) - 1;
1482 /* configure pause class to queue mapping */
1483 for (i = 0; i < pcs; i++)
1484 netdev_set_tc_queue(dev, i, rss_i, rss_i * i);
1486 interface->num_rx_queues = rss_i * pcs;
1487 interface->num_tx_queues = rss_i * pcs;
1493 * fm10k_set_rss_queues: Allocate queues for RSS
1494 * @interface: board private structure to initialize
1496 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
1497 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1500 static bool fm10k_set_rss_queues(struct fm10k_intfc *interface)
1502 struct fm10k_ring_feature *f;
1505 f = &interface->ring_feature[RING_F_RSS];
1506 rss_i = min_t(u16, interface->hw.mac.max_queues, f->limit);
1508 /* record indices and power of 2 mask for RSS */
1510 f->mask = (1 << fls(rss_i - 1)) - 1;
1512 interface->num_rx_queues = rss_i;
1513 interface->num_tx_queues = rss_i;
1519 * fm10k_set_num_queues: Allocate queues for device, feature dependent
1520 * @interface: board private structure to initialize
1522 * This is the top level queue allocation routine. The order here is very
1523 * important, starting with the "most" number of features turned on at once,
1524 * and ending with the smallest set of features. This way large combinations
1525 * can be allocated if they're turned on, and smaller combinations are the
1526 * fallthrough conditions.
1529 static void fm10k_set_num_queues(struct fm10k_intfc *interface)
1531 /* Start with base case */
1532 interface->num_rx_queues = 1;
1533 interface->num_tx_queues = 1;
1535 if (fm10k_set_qos_queues(interface))
1538 fm10k_set_rss_queues(interface);
1542 * fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
1543 * @interface: board private structure to initialize
1544 * @v_count: q_vectors allocated on interface, used for ring interleaving
1545 * @v_idx: index of vector in interface struct
1546 * @txr_count: total number of Tx rings to allocate
1547 * @txr_idx: index of first Tx ring to allocate
1548 * @rxr_count: total number of Rx rings to allocate
1549 * @rxr_idx: index of first Rx ring to allocate
1551 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1553 static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
1554 unsigned int v_count, unsigned int v_idx,
1555 unsigned int txr_count, unsigned int txr_idx,
1556 unsigned int rxr_count, unsigned int rxr_idx)
1558 struct fm10k_q_vector *q_vector;
1559 struct fm10k_ring *ring;
1560 int ring_count, size;
1562 ring_count = txr_count + rxr_count;
1563 size = sizeof(struct fm10k_q_vector) +
1564 (sizeof(struct fm10k_ring) * ring_count);
1566 /* allocate q_vector and rings */
1567 q_vector = kzalloc(size, GFP_KERNEL);
1571 /* initialize NAPI */
1572 netif_napi_add(interface->netdev, &q_vector->napi,
1573 fm10k_poll, NAPI_POLL_WEIGHT);
1575 /* tie q_vector and interface together */
1576 interface->q_vector[v_idx] = q_vector;
1577 q_vector->interface = interface;
1578 q_vector->v_idx = v_idx;
1580 /* initialize pointer to rings */
1581 ring = q_vector->ring;
1583 /* save Tx ring container info */
1584 q_vector->tx.ring = ring;
1585 q_vector->tx.work_limit = FM10K_DEFAULT_TX_WORK;
1586 q_vector->tx.itr = interface->tx_itr;
1587 q_vector->tx.count = txr_count;
1590 /* assign generic ring traits */
1591 ring->dev = &interface->pdev->dev;
1592 ring->netdev = interface->netdev;
1594 /* configure backlink on ring */
1595 ring->q_vector = q_vector;
1597 /* apply Tx specific ring traits */
1598 ring->count = interface->tx_ring_count;
1599 ring->queue_index = txr_idx;
1601 /* assign ring to interface */
1602 interface->tx_ring[txr_idx] = ring;
1604 /* update count and index */
1608 /* push pointer to next ring */
1612 /* save Rx ring container info */
1613 q_vector->rx.ring = ring;
1614 q_vector->rx.itr = interface->rx_itr;
1615 q_vector->rx.count = rxr_count;
1618 /* assign generic ring traits */
1619 ring->dev = &interface->pdev->dev;
1620 ring->netdev = interface->netdev;
1621 rcu_assign_pointer(ring->l2_accel, interface->l2_accel);
1623 /* configure backlink on ring */
1624 ring->q_vector = q_vector;
1626 /* apply Rx specific ring traits */
1627 ring->count = interface->rx_ring_count;
1628 ring->queue_index = rxr_idx;
1630 /* assign ring to interface */
1631 interface->rx_ring[rxr_idx] = ring;
1633 /* update count and index */
1637 /* push pointer to next ring */
1641 fm10k_dbg_q_vector_init(q_vector);
1647 * fm10k_free_q_vector - Free memory allocated for specific interrupt vector
1648 * @interface: board private structure to initialize
1649 * @v_idx: Index of vector to be freed
1651 * This function frees the memory allocated to the q_vector. In addition if
1652 * NAPI is enabled it will delete any references to the NAPI struct prior
1653 * to freeing the q_vector.
1655 static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
1657 struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
1658 struct fm10k_ring *ring;
1660 fm10k_dbg_q_vector_exit(q_vector);
1662 fm10k_for_each_ring(ring, q_vector->tx)
1663 interface->tx_ring[ring->queue_index] = NULL;
1665 fm10k_for_each_ring(ring, q_vector->rx)
1666 interface->rx_ring[ring->queue_index] = NULL;
1668 interface->q_vector[v_idx] = NULL;
1669 netif_napi_del(&q_vector->napi);
1670 kfree_rcu(q_vector, rcu);
1674 * fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
1675 * @interface: board private structure to initialize
1677 * We allocate one q_vector per queue interrupt. If allocation fails we
1680 static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
1682 unsigned int q_vectors = interface->num_q_vectors;
1683 unsigned int rxr_remaining = interface->num_rx_queues;
1684 unsigned int txr_remaining = interface->num_tx_queues;
1685 unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1688 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1689 for (; rxr_remaining; v_idx++) {
1690 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1695 /* update counts and index */
1701 for (; v_idx < q_vectors; v_idx++) {
1702 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1703 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1705 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1712 /* update counts and index */
1713 rxr_remaining -= rqpv;
1714 txr_remaining -= tqpv;
1722 interface->num_tx_queues = 0;
1723 interface->num_rx_queues = 0;
1724 interface->num_q_vectors = 0;
1727 fm10k_free_q_vector(interface, v_idx);
1733 * fm10k_free_q_vectors - Free memory allocated for interrupt vectors
1734 * @interface: board private structure to initialize
1736 * This function frees the memory allocated to the q_vectors. In addition if
1737 * NAPI is enabled it will delete any references to the NAPI struct prior
1738 * to freeing the q_vector.
1740 static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
1742 int v_idx = interface->num_q_vectors;
1744 interface->num_tx_queues = 0;
1745 interface->num_rx_queues = 0;
1746 interface->num_q_vectors = 0;
1749 fm10k_free_q_vector(interface, v_idx);
1753 * f10k_reset_msix_capability - reset MSI-X capability
1754 * @interface: board private structure to initialize
1756 * Reset the MSI-X capability back to its starting state
1758 static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
1760 pci_disable_msix(interface->pdev);
1761 kfree(interface->msix_entries);
1762 interface->msix_entries = NULL;
1766 * f10k_init_msix_capability - configure MSI-X capability
1767 * @interface: board private structure to initialize
1769 * Attempt to configure the interrupts using the best available
1770 * capabilities of the hardware and the kernel.
1772 static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
1774 struct fm10k_hw *hw = &interface->hw;
1775 int v_budget, vector;
1777 /* It's easy to be greedy for MSI-X vectors, but it really
1778 * doesn't do us much good if we have a lot more vectors
1779 * than CPU's. So let's be conservative and only ask for
1780 * (roughly) the same number of vectors as there are CPU's.
1781 * the default is to use pairs of vectors
1783 v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
1784 v_budget = min_t(u16, v_budget, num_online_cpus());
1786 /* account for vectors not related to queues */
1787 v_budget += NON_Q_VECTORS(hw);
1789 /* At the same time, hardware can only support a maximum of
1790 * hw.mac->max_msix_vectors vectors. With features
1791 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
1792 * descriptor queues supported by our device. Thus, we cap it off in
1793 * those rare cases where the cpu count also exceeds our vector limit.
1795 v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
1797 /* A failure in MSI-X entry allocation is fatal. */
1798 interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
1800 if (!interface->msix_entries)
1803 /* populate entry values */
1804 for (vector = 0; vector < v_budget; vector++)
1805 interface->msix_entries[vector].entry = vector;
1807 /* Attempt to enable MSI-X with requested value */
1808 v_budget = pci_enable_msix_range(interface->pdev,
1809 interface->msix_entries,
1813 kfree(interface->msix_entries);
1814 interface->msix_entries = NULL;
1818 /* record the number of queues available for q_vectors */
1819 interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);
1825 * fm10k_cache_ring_qos - Descriptor ring to register mapping for QoS
1826 * @interface: Interface structure continaining rings and devices
1828 * Cache the descriptor ring offsets for Qos
1830 static bool fm10k_cache_ring_qos(struct fm10k_intfc *interface)
1832 struct net_device *dev = interface->netdev;
1833 int pc, offset, rss_i, i, q_idx;
1834 u16 pc_stride = interface->ring_feature[RING_F_QOS].mask + 1;
1835 u8 num_pcs = netdev_get_num_tc(dev);
1840 rss_i = interface->ring_feature[RING_F_RSS].indices;
1842 for (pc = 0, offset = 0; pc < num_pcs; pc++, offset += rss_i) {
1844 for (i = 0; i < rss_i; i++) {
1845 interface->tx_ring[offset + i]->reg_idx = q_idx;
1846 interface->tx_ring[offset + i]->qos_pc = pc;
1847 interface->rx_ring[offset + i]->reg_idx = q_idx;
1848 interface->rx_ring[offset + i]->qos_pc = pc;
1857 * fm10k_cache_ring_rss - Descriptor ring to register mapping for RSS
1858 * @interface: Interface structure continaining rings and devices
1860 * Cache the descriptor ring offsets for RSS
1862 static void fm10k_cache_ring_rss(struct fm10k_intfc *interface)
1866 for (i = 0; i < interface->num_rx_queues; i++)
1867 interface->rx_ring[i]->reg_idx = i;
1869 for (i = 0; i < interface->num_tx_queues; i++)
1870 interface->tx_ring[i]->reg_idx = i;
1874 * fm10k_assign_rings - Map rings to network devices
1875 * @interface: Interface structure containing rings and devices
1877 * This function is meant to go though and configure both the network
1878 * devices so that they contain rings, and configure the rings so that
1879 * they function with their network devices.
1881 static void fm10k_assign_rings(struct fm10k_intfc *interface)
1883 if (fm10k_cache_ring_qos(interface))
1886 fm10k_cache_ring_rss(interface);
1889 static void fm10k_init_reta(struct fm10k_intfc *interface)
1891 u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
1894 /* If the netdev is initialized we have to maintain table if possible */
1895 if (interface->netdev->reg_state) {
1896 for (i = FM10K_RETA_SIZE; i--;) {
1897 reta = interface->reta[i];
1898 if ((((reta << 24) >> 24) < rss_i) &&
1899 (((reta << 16) >> 24) < rss_i) &&
1900 (((reta << 8) >> 24) < rss_i) &&
1901 (((reta) >> 24) < rss_i))
1903 goto repopulate_reta;
1906 /* do nothing if all of the elements are in bounds */
1911 /* Populate the redirection table 4 entries at a time. To do this
1912 * we are generating the results for n and n+2 and then interleaving
1913 * those with the results with n+1 and n+3.
1915 for (i = FM10K_RETA_SIZE; i--;) {
1916 /* first pass generates n and n+2 */
1917 base = ((i * 0x00040004) + 0x00020000) * rss_i;
1918 reta = (base & 0x3F803F80) >> 7;
1920 /* second pass generates n+1 and n+3 */
1921 base += 0x00010001 * rss_i;
1922 reta |= (base & 0x3F803F80) << 1;
1924 interface->reta[i] = reta;
1929 * fm10k_init_queueing_scheme - Determine proper queueing scheme
1930 * @interface: board private structure to initialize
1932 * We determine which queueing scheme to use based on...
1933 * - Hardware queue count (num_*_queues)
1934 * - defined by miscellaneous hardware support/features (RSS, etc.)
1936 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
1940 /* Number of supported queues */
1941 fm10k_set_num_queues(interface);
1943 /* Configure MSI-X capability */
1944 err = fm10k_init_msix_capability(interface);
1946 dev_err(&interface->pdev->dev,
1947 "Unable to initialize MSI-X capability\n");
1951 /* Allocate memory for queues */
1952 err = fm10k_alloc_q_vectors(interface);
1956 /* Map rings to devices, and map devices to physical queues */
1957 fm10k_assign_rings(interface);
1959 /* Initialize RSS redirection table */
1960 fm10k_init_reta(interface);
1966 * fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
1967 * @interface: board private structure to clear queueing scheme on
1969 * We go through and clear queueing specific resources and reset the structure
1970 * to pre-load conditions
1972 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
1974 fm10k_free_q_vectors(interface);
1975 fm10k_reset_msix_capability(interface);