1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
220 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0 ,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0 ,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
846 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
847 pf->stat_offsets_loaded,
848 &osd->priority_xoff_rx[i],
849 &nsd->priority_xoff_rx[i]);
851 /* No new PFC xoff rx */
852 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
854 /* Get the TC for given priority */
855 tc = dcb_cfg->etscfg.prioritytable[i];
861 * i40e_update_vsi_stats - Update the vsi statistics counters.
862 * @vsi: the VSI to be updated
864 * There are a few instances where we store the same stat in a
865 * couple of different structs. This is partly because we have
866 * the netdev stats that need to be filled out, which is slightly
867 * different from the "eth_stats" defined by the chip and used in
868 * VF communications. We sort it out here.
870 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
872 struct i40e_pf *pf = vsi->back;
873 struct rtnl_link_stats64 *ons;
874 struct rtnl_link_stats64 *ns; /* netdev stats */
875 struct i40e_eth_stats *oes;
876 struct i40e_eth_stats *es; /* device's eth stats */
877 u32 tx_restart, tx_busy;
886 if (test_bit(__I40E_DOWN, &vsi->state) ||
887 test_bit(__I40E_CONFIG_BUSY, &pf->state))
890 ns = i40e_get_vsi_stats_struct(vsi);
891 ons = &vsi->net_stats_offsets;
892 es = &vsi->eth_stats;
893 oes = &vsi->eth_stats_offsets;
895 /* Gather up the netdev and vsi stats that the driver collects
896 * on the fly during packet processing
900 tx_restart = tx_busy = 0;
904 for (q = 0; q < vsi->num_queue_pairs; q++) {
906 p = ACCESS_ONCE(vsi->tx_rings[q]);
909 start = u64_stats_fetch_begin_irq(&p->syncp);
910 packets = p->stats.packets;
911 bytes = p->stats.bytes;
912 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
915 tx_restart += p->tx_stats.restart_queue;
916 tx_busy += p->tx_stats.tx_busy;
918 /* Rx queue is part of the same block as Tx queue */
921 start = u64_stats_fetch_begin_irq(&p->syncp);
922 packets = p->stats.packets;
923 bytes = p->stats.bytes;
924 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
927 rx_buf += p->rx_stats.alloc_buff_failed;
928 rx_page += p->rx_stats.alloc_page_failed;
931 vsi->tx_restart = tx_restart;
932 vsi->tx_busy = tx_busy;
933 vsi->rx_page_failed = rx_page;
934 vsi->rx_buf_failed = rx_buf;
936 ns->rx_packets = rx_p;
938 ns->tx_packets = tx_p;
941 /* update netdev stats from eth stats */
942 i40e_update_eth_stats(vsi);
943 ons->tx_errors = oes->tx_errors;
944 ns->tx_errors = es->tx_errors;
945 ons->multicast = oes->rx_multicast;
946 ns->multicast = es->rx_multicast;
947 ons->rx_dropped = oes->rx_discards;
948 ns->rx_dropped = es->rx_discards;
949 ons->tx_dropped = oes->tx_discards;
950 ns->tx_dropped = es->tx_discards;
952 /* pull in a couple PF stats if this is the main vsi */
953 if (vsi == pf->vsi[pf->lan_vsi]) {
954 ns->rx_crc_errors = pf->stats.crc_errors;
955 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
956 ns->rx_length_errors = pf->stats.rx_length_errors;
961 * i40e_update_pf_stats - Update the PF statistics counters.
962 * @pf: the PF to be updated
964 static void i40e_update_pf_stats(struct i40e_pf *pf)
966 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
967 struct i40e_hw_port_stats *nsd = &pf->stats;
968 struct i40e_hw *hw = &pf->hw;
972 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
973 I40E_GLPRT_GORCL(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
976 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
977 I40E_GLPRT_GOTCL(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
980 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.rx_discards,
983 &nsd->eth.rx_discards);
984 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
985 I40E_GLPRT_UPRCL(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->eth.rx_unicast,
988 &nsd->eth.rx_unicast);
989 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
990 I40E_GLPRT_MPRCL(hw->port),
991 pf->stat_offsets_loaded,
992 &osd->eth.rx_multicast,
993 &nsd->eth.rx_multicast);
994 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
995 I40E_GLPRT_BPRCL(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->eth.rx_broadcast,
998 &nsd->eth.rx_broadcast);
999 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1000 I40E_GLPRT_UPTCL(hw->port),
1001 pf->stat_offsets_loaded,
1002 &osd->eth.tx_unicast,
1003 &nsd->eth.tx_unicast);
1004 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1005 I40E_GLPRT_MPTCL(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->eth.tx_multicast,
1008 &nsd->eth.tx_multicast);
1009 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1010 I40E_GLPRT_BPTCL(hw->port),
1011 pf->stat_offsets_loaded,
1012 &osd->eth.tx_broadcast,
1013 &nsd->eth.tx_broadcast);
1015 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->tx_dropped_link_down,
1018 &nsd->tx_dropped_link_down);
1020 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->crc_errors, &nsd->crc_errors);
1024 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->illegal_bytes, &nsd->illegal_bytes);
1028 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->mac_local_faults,
1031 &nsd->mac_local_faults);
1032 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->mac_remote_faults,
1035 &nsd->mac_remote_faults);
1037 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_length_errors,
1040 &nsd->rx_length_errors);
1042 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->link_xon_rx, &nsd->link_xon_rx);
1045 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xon_tx, &nsd->link_xon_tx);
1048 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1049 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1053 for (i = 0; i < 8; i++) {
1054 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1055 pf->stat_offsets_loaded,
1056 &osd->priority_xon_rx[i],
1057 &nsd->priority_xon_rx[i]);
1058 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xon_tx[i],
1061 &nsd->priority_xon_tx[i]);
1062 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1063 pf->stat_offsets_loaded,
1064 &osd->priority_xoff_tx[i],
1065 &nsd->priority_xoff_tx[i]);
1066 i40e_stat_update32(hw,
1067 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1068 pf->stat_offsets_loaded,
1069 &osd->priority_xon_2_xoff[i],
1070 &nsd->priority_xon_2_xoff[i]);
1073 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1074 I40E_GLPRT_PRC64L(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_size_64, &nsd->rx_size_64);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1078 I40E_GLPRT_PRC127L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_127, &nsd->rx_size_127);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1082 I40E_GLPRT_PRC255L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_255, &nsd->rx_size_255);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1086 I40E_GLPRT_PRC511L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_511, &nsd->rx_size_511);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1090 I40E_GLPRT_PRC1023L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_1023, &nsd->rx_size_1023);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1094 I40E_GLPRT_PRC1522L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_1522, &nsd->rx_size_1522);
1097 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1098 I40E_GLPRT_PRC9522L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_size_big, &nsd->rx_size_big);
1102 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1103 I40E_GLPRT_PTC64L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->tx_size_64, &nsd->tx_size_64);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1107 I40E_GLPRT_PTC127L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_127, &nsd->tx_size_127);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1111 I40E_GLPRT_PTC255L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_255, &nsd->tx_size_255);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1115 I40E_GLPRT_PTC511L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_511, &nsd->tx_size_511);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1119 I40E_GLPRT_PTC1023L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_1023, &nsd->tx_size_1023);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1123 I40E_GLPRT_PTC1522L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_1522, &nsd->tx_size_1522);
1126 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1127 I40E_GLPRT_PTC9522L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->tx_size_big, &nsd->tx_size_big);
1131 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->rx_undersize, &nsd->rx_undersize);
1134 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_fragments, &nsd->rx_fragments);
1137 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_oversize, &nsd->rx_oversize);
1140 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_jabber, &nsd->rx_jabber);
1145 i40e_stat_update32(hw,
1146 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1147 pf->stat_offsets_loaded,
1148 &osd->fd_atr_match, &nsd->fd_atr_match);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_sb_match, &nsd->fd_sb_match);
1153 i40e_stat_update32(hw,
1154 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1155 pf->stat_offsets_loaded,
1156 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1158 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1159 nsd->tx_lpi_status =
1160 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1161 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1162 nsd->rx_lpi_status =
1163 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1164 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1165 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1166 pf->stat_offsets_loaded,
1167 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1168 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1169 pf->stat_offsets_loaded,
1170 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1172 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1173 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1174 nsd->fd_sb_status = true;
1176 nsd->fd_sb_status = false;
1178 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1179 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1180 nsd->fd_atr_status = true;
1182 nsd->fd_atr_status = false;
1184 pf->stat_offsets_loaded = true;
1188 * i40e_update_stats - Update the various statistics counters.
1189 * @vsi: the VSI to be updated
1191 * Update the various stats for this VSI and its related entities.
1193 void i40e_update_stats(struct i40e_vsi *vsi)
1195 struct i40e_pf *pf = vsi->back;
1197 if (vsi == pf->vsi[pf->lan_vsi])
1198 i40e_update_pf_stats(pf);
1200 i40e_update_vsi_stats(vsi);
1202 i40e_update_fcoe_stats(vsi);
1207 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1208 * @vsi: the VSI to be searched
1209 * @macaddr: the MAC address
1211 * @is_vf: make sure its a VF filter, else doesn't matter
1212 * @is_netdev: make sure its a netdev filter, else doesn't matter
1214 * Returns ptr to the filter object or NULL
1216 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1217 u8 *macaddr, s16 vlan,
1218 bool is_vf, bool is_netdev)
1220 struct i40e_mac_filter *f;
1222 if (!vsi || !macaddr)
1225 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1226 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1227 (vlan == f->vlan) &&
1228 (!is_vf || f->is_vf) &&
1229 (!is_netdev || f->is_netdev))
1236 * i40e_find_mac - Find a mac addr in the macvlan filters list
1237 * @vsi: the VSI to be searched
1238 * @macaddr: the MAC address we are searching for
1239 * @is_vf: make sure its a VF filter, else doesn't matter
1240 * @is_netdev: make sure its a netdev filter, else doesn't matter
1242 * Returns the first filter with the provided MAC address or NULL if
1243 * MAC address was not found
1245 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1246 bool is_vf, bool is_netdev)
1248 struct i40e_mac_filter *f;
1250 if (!vsi || !macaddr)
1253 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1254 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1255 (!is_vf || f->is_vf) &&
1256 (!is_netdev || f->is_netdev))
1263 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1264 * @vsi: the VSI to be searched
1266 * Returns true if VSI is in vlan mode or false otherwise
1268 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1270 struct i40e_mac_filter *f;
1272 /* Only -1 for all the filters denotes not in vlan mode
1273 * so we have to go through all the list in order to make sure
1275 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1276 if (f->vlan >= 0 || vsi->info.pvid)
1284 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1285 * @vsi: the VSI to be searched
1286 * @macaddr: the mac address to be filtered
1287 * @is_vf: true if it is a VF
1288 * @is_netdev: true if it is a netdev
1290 * Goes through all the macvlan filters and adds a
1291 * macvlan filter for each unique vlan that already exists
1293 * Returns first filter found on success, else NULL
1295 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1296 bool is_vf, bool is_netdev)
1298 struct i40e_mac_filter *f;
1300 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1302 f->vlan = le16_to_cpu(vsi->info.pvid);
1303 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1304 is_vf, is_netdev)) {
1305 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1311 return list_first_entry_or_null(&vsi->mac_filter_list,
1312 struct i40e_mac_filter, list);
1316 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1317 * @vsi: the PF Main VSI - inappropriate for any other VSI
1318 * @macaddr: the MAC address
1320 * Some older firmware configurations set up a default promiscuous VLAN
1321 * filter that needs to be removed.
1323 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1325 struct i40e_aqc_remove_macvlan_element_data element;
1326 struct i40e_pf *pf = vsi->back;
1329 /* Only appropriate for the PF main VSI */
1330 if (vsi->type != I40E_VSI_MAIN)
1333 memset(&element, 0, sizeof(element));
1334 ether_addr_copy(element.mac_addr, macaddr);
1335 element.vlan_tag = 0;
1336 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1337 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1338 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1346 * i40e_add_filter - Add a mac/vlan filter to the VSI
1347 * @vsi: the VSI to be searched
1348 * @macaddr: the MAC address
1350 * @is_vf: make sure its a VF filter, else doesn't matter
1351 * @is_netdev: make sure its a netdev filter, else doesn't matter
1353 * Returns ptr to the filter object or NULL when no memory available.
1355 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1356 u8 *macaddr, s16 vlan,
1357 bool is_vf, bool is_netdev)
1359 struct i40e_mac_filter *f;
1361 if (!vsi || !macaddr)
1364 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1366 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1368 goto add_filter_out;
1370 ether_addr_copy(f->macaddr, macaddr);
1374 INIT_LIST_HEAD(&f->list);
1375 list_add(&f->list, &vsi->mac_filter_list);
1378 /* increment counter and add a new flag if needed */
1384 } else if (is_netdev) {
1385 if (!f->is_netdev) {
1386 f->is_netdev = true;
1393 /* changed tells sync_filters_subtask to
1394 * push the filter down to the firmware
1397 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1398 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1406 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1407 * @vsi: the VSI to be searched
1408 * @macaddr: the MAC address
1410 * @is_vf: make sure it's a VF filter, else doesn't matter
1411 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1413 void i40e_del_filter(struct i40e_vsi *vsi,
1414 u8 *macaddr, s16 vlan,
1415 bool is_vf, bool is_netdev)
1417 struct i40e_mac_filter *f;
1419 if (!vsi || !macaddr)
1422 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1423 if (!f || f->counter == 0)
1431 } else if (is_netdev) {
1433 f->is_netdev = false;
1437 /* make sure we don't remove a filter in use by VF or netdev */
1439 min_f += (f->is_vf ? 1 : 0);
1440 min_f += (f->is_netdev ? 1 : 0);
1442 if (f->counter > min_f)
1446 /* counter == 0 tells sync_filters_subtask to
1447 * remove the filter from the firmware's list
1449 if (f->counter == 0) {
1451 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1452 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1457 * i40e_set_mac - NDO callback to set mac address
1458 * @netdev: network interface device structure
1459 * @p: pointer to an address structure
1461 * Returns 0 on success, negative on failure
1464 int i40e_set_mac(struct net_device *netdev, void *p)
1466 static int i40e_set_mac(struct net_device *netdev, void *p)
1469 struct i40e_netdev_priv *np = netdev_priv(netdev);
1470 struct i40e_vsi *vsi = np->vsi;
1471 struct i40e_pf *pf = vsi->back;
1472 struct i40e_hw *hw = &pf->hw;
1473 struct sockaddr *addr = p;
1474 struct i40e_mac_filter *f;
1476 if (!is_valid_ether_addr(addr->sa_data))
1477 return -EADDRNOTAVAIL;
1479 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1480 netdev_info(netdev, "already using mac address %pM\n",
1485 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1486 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1487 return -EADDRNOTAVAIL;
1489 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1490 netdev_info(netdev, "returning to hw mac address %pM\n",
1493 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1495 if (vsi->type == I40E_VSI_MAIN) {
1497 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1498 I40E_AQC_WRITE_TYPE_LAA_WOL,
1499 addr->sa_data, NULL);
1502 "Addr change for Main VSI failed: %d\n",
1504 return -EADDRNOTAVAIL;
1508 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1509 struct i40e_aqc_remove_macvlan_element_data element;
1511 memset(&element, 0, sizeof(element));
1512 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1513 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1516 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1520 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1521 struct i40e_aqc_add_macvlan_element_data element;
1523 memset(&element, 0, sizeof(element));
1524 ether_addr_copy(element.mac_addr, hw->mac.addr);
1525 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1526 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1528 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1534 i40e_sync_vsi_filters(vsi, false);
1535 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1541 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1542 * @vsi: the VSI being setup
1543 * @ctxt: VSI context structure
1544 * @enabled_tc: Enabled TCs bitmap
1545 * @is_add: True if called before Add VSI
1547 * Setup VSI queue mapping for enabled traffic classes.
1550 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1551 struct i40e_vsi_context *ctxt,
1555 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1556 struct i40e_vsi_context *ctxt,
1561 struct i40e_pf *pf = vsi->back;
1571 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1574 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1575 /* Find numtc from enabled TC bitmap */
1576 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1577 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1581 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1585 /* At least TC0 is enabled in case of non-DCB case */
1589 vsi->tc_config.numtc = numtc;
1590 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1591 /* Number of queues per enabled TC */
1592 /* In MFP case we can have a much lower count of MSIx
1593 * vectors available and so we need to lower the used
1596 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1597 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1599 qcount = vsi->alloc_queue_pairs;
1600 num_tc_qps = qcount / numtc;
1601 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1603 /* Setup queue offset/count for all TCs for given VSI */
1604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1605 /* See if the given TC is enabled for the given VSI */
1606 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1610 switch (vsi->type) {
1612 qcount = min_t(int, pf->rss_size, num_tc_qps);
1616 qcount = num_tc_qps;
1620 case I40E_VSI_SRIOV:
1621 case I40E_VSI_VMDQ2:
1623 qcount = num_tc_qps;
1627 vsi->tc_config.tc_info[i].qoffset = offset;
1628 vsi->tc_config.tc_info[i].qcount = qcount;
1630 /* find the next higher power-of-2 of num queue pairs */
1633 while (num_qps && (BIT_ULL(pow) < qcount)) {
1638 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1640 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1641 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1645 /* TC is not enabled so set the offset to
1646 * default queue and allocate one queue
1649 vsi->tc_config.tc_info[i].qoffset = 0;
1650 vsi->tc_config.tc_info[i].qcount = 1;
1651 vsi->tc_config.tc_info[i].netdev_tc = 0;
1655 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1658 /* Set actual Tx/Rx queue pairs */
1659 vsi->num_queue_pairs = offset;
1660 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1661 if (vsi->req_queue_pairs > 0)
1662 vsi->num_queue_pairs = vsi->req_queue_pairs;
1663 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1664 vsi->num_queue_pairs = pf->num_lan_msix;
1667 /* Scheduler section valid can only be set for ADD VSI */
1669 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1671 ctxt->info.up_enable_bits = enabled_tc;
1673 if (vsi->type == I40E_VSI_SRIOV) {
1674 ctxt->info.mapping_flags |=
1675 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1676 for (i = 0; i < vsi->num_queue_pairs; i++)
1677 ctxt->info.queue_mapping[i] =
1678 cpu_to_le16(vsi->base_queue + i);
1680 ctxt->info.mapping_flags |=
1681 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1682 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1684 ctxt->info.valid_sections |= cpu_to_le16(sections);
1688 * i40e_set_rx_mode - NDO callback to set the netdev filters
1689 * @netdev: network interface device structure
1692 void i40e_set_rx_mode(struct net_device *netdev)
1694 static void i40e_set_rx_mode(struct net_device *netdev)
1697 struct i40e_netdev_priv *np = netdev_priv(netdev);
1698 struct i40e_mac_filter *f, *ftmp;
1699 struct i40e_vsi *vsi = np->vsi;
1700 struct netdev_hw_addr *uca;
1701 struct netdev_hw_addr *mca;
1702 struct netdev_hw_addr *ha;
1704 /* add addr if not already in the filter list */
1705 netdev_for_each_uc_addr(uca, netdev) {
1706 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1707 if (i40e_is_vsi_in_vlan(vsi))
1708 i40e_put_mac_in_vlan(vsi, uca->addr,
1711 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1716 netdev_for_each_mc_addr(mca, netdev) {
1717 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1718 if (i40e_is_vsi_in_vlan(vsi))
1719 i40e_put_mac_in_vlan(vsi, mca->addr,
1722 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1727 /* remove filter if not in netdev list */
1728 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1734 if (is_multicast_ether_addr(f->macaddr)) {
1735 netdev_for_each_mc_addr(mca, netdev) {
1736 if (ether_addr_equal(mca->addr, f->macaddr)) {
1742 netdev_for_each_uc_addr(uca, netdev) {
1743 if (ether_addr_equal(uca->addr, f->macaddr)) {
1749 for_each_dev_addr(netdev, ha) {
1750 if (ether_addr_equal(ha->addr, f->macaddr)) {
1758 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1761 /* check for other flag changes */
1762 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1763 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1764 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1769 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1770 * @vsi: ptr to the VSI
1771 * @grab_rtnl: whether RTNL needs to be grabbed
1773 * Push any outstanding VSI filter changes through the AdminQ.
1775 * Returns 0 or error value
1777 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1779 struct i40e_mac_filter *f, *ftmp;
1780 bool promisc_forced_on = false;
1781 bool add_happened = false;
1782 int filter_list_len = 0;
1783 u32 changed_flags = 0;
1784 i40e_status ret = 0;
1791 /* empty array typed pointers, kcalloc later */
1792 struct i40e_aqc_add_macvlan_element_data *add_list;
1793 struct i40e_aqc_remove_macvlan_element_data *del_list;
1795 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1796 usleep_range(1000, 2000);
1800 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1801 vsi->current_netdev_flags = vsi->netdev->flags;
1804 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1805 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1807 filter_list_len = pf->hw.aq.asq_buf_size /
1808 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1809 del_list = kcalloc(filter_list_len,
1810 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1815 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1819 if (f->counter != 0)
1824 /* add to delete list */
1825 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1826 del_list[num_del].vlan_tag =
1827 cpu_to_le16((u16)(f->vlan ==
1828 I40E_VLAN_ANY ? 0 : f->vlan));
1830 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1831 del_list[num_del].flags = cmd_flags;
1834 /* unlink from filter list */
1838 /* flush a full buffer */
1839 if (num_del == filter_list_len) {
1840 ret = i40e_aq_remove_macvlan(&pf->hw,
1841 vsi->seid, del_list, num_del,
1843 aq_err = pf->hw.aq.asq_last_status;
1845 memset(del_list, 0, sizeof(*del_list));
1847 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1848 dev_info(&pf->pdev->dev,
1849 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1850 i40e_stat_str(&pf->hw, ret),
1851 i40e_aq_str(&pf->hw, aq_err));
1855 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1856 del_list, num_del, NULL);
1857 aq_err = pf->hw.aq.asq_last_status;
1860 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1861 dev_info(&pf->pdev->dev,
1862 "ignoring delete macvlan error, err %s aq_err %s\n",
1863 i40e_stat_str(&pf->hw, ret),
1864 i40e_aq_str(&pf->hw, aq_err));
1870 /* do all the adds now */
1871 filter_list_len = pf->hw.aq.asq_buf_size /
1872 sizeof(struct i40e_aqc_add_macvlan_element_data),
1873 add_list = kcalloc(filter_list_len,
1874 sizeof(struct i40e_aqc_add_macvlan_element_data),
1879 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1883 if (f->counter == 0)
1886 add_happened = true;
1889 /* add to add array */
1890 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1891 add_list[num_add].vlan_tag =
1893 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1894 add_list[num_add].queue_number = 0;
1896 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1897 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1900 /* flush a full buffer */
1901 if (num_add == filter_list_len) {
1902 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1905 aq_err = pf->hw.aq.asq_last_status;
1910 memset(add_list, 0, sizeof(*add_list));
1914 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1915 add_list, num_add, NULL);
1916 aq_err = pf->hw.aq.asq_last_status;
1922 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1923 dev_info(&pf->pdev->dev,
1924 "add filter failed, err %s aq_err %s\n",
1925 i40e_stat_str(&pf->hw, ret),
1926 i40e_aq_str(&pf->hw, aq_err));
1927 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1928 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1930 promisc_forced_on = true;
1931 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1933 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1938 /* check for changes in promiscuous modes */
1939 if (changed_flags & IFF_ALLMULTI) {
1940 bool cur_multipromisc;
1941 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1942 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1947 dev_info(&pf->pdev->dev,
1948 "set multi promisc failed, err %s aq_err %s\n",
1949 i40e_stat_str(&pf->hw, ret),
1950 i40e_aq_str(&pf->hw,
1951 pf->hw.aq.asq_last_status));
1953 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1955 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1956 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1958 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1959 /* set defport ON for Main VSI instead of true promisc
1960 * this way we will get all unicast/multicast and VLAN
1961 * promisc behavior but will not get VF or VMDq traffic
1962 * replicated on the Main VSI.
1964 if (pf->cur_promisc != cur_promisc) {
1965 pf->cur_promisc = cur_promisc;
1967 i40e_do_reset_safe(pf,
1968 BIT(__I40E_PF_RESET_REQUESTED));
1971 BIT(__I40E_PF_RESET_REQUESTED));
1974 ret = i40e_aq_set_vsi_unicast_promiscuous(
1979 dev_info(&pf->pdev->dev,
1980 "set unicast promisc failed, err %d, aq_err %d\n",
1981 ret, pf->hw.aq.asq_last_status);
1982 ret = i40e_aq_set_vsi_multicast_promiscuous(
1987 dev_info(&pf->pdev->dev,
1988 "set multicast promisc failed, err %d, aq_err %d\n",
1989 ret, pf->hw.aq.asq_last_status);
1991 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1995 dev_info(&pf->pdev->dev,
1996 "set brdcast promisc failed, err %s, aq_err %s\n",
1997 i40e_stat_str(&pf->hw, ret),
1998 i40e_aq_str(&pf->hw,
1999 pf->hw.aq.asq_last_status));
2002 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2007 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2008 * @pf: board private structure
2010 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2014 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2016 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2018 for (v = 0; v < pf->num_alloc_vsi; v++) {
2020 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2021 i40e_sync_vsi_filters(pf->vsi[v], true);
2026 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2027 * @netdev: network interface device structure
2028 * @new_mtu: new value for maximum frame size
2030 * Returns 0 on success, negative on failure
2032 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2034 struct i40e_netdev_priv *np = netdev_priv(netdev);
2035 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2036 struct i40e_vsi *vsi = np->vsi;
2038 /* MTU < 68 is an error and causes problems on some kernels */
2039 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2042 netdev_info(netdev, "changing MTU from %d to %d\n",
2043 netdev->mtu, new_mtu);
2044 netdev->mtu = new_mtu;
2045 if (netif_running(netdev))
2046 i40e_vsi_reinit_locked(vsi);
2052 * i40e_ioctl - Access the hwtstamp interface
2053 * @netdev: network interface device structure
2054 * @ifr: interface request data
2055 * @cmd: ioctl command
2057 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2059 struct i40e_netdev_priv *np = netdev_priv(netdev);
2060 struct i40e_pf *pf = np->vsi->back;
2064 return i40e_ptp_get_ts_config(pf, ifr);
2066 return i40e_ptp_set_ts_config(pf, ifr);
2073 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2074 * @vsi: the vsi being adjusted
2076 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2078 struct i40e_vsi_context ctxt;
2081 if ((vsi->info.valid_sections &
2082 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2083 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2084 return; /* already enabled */
2086 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2087 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2088 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2090 ctxt.seid = vsi->seid;
2091 ctxt.info = vsi->info;
2092 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2094 dev_info(&vsi->back->pdev->dev,
2095 "update vlan stripping failed, err %s aq_err %s\n",
2096 i40e_stat_str(&vsi->back->hw, ret),
2097 i40e_aq_str(&vsi->back->hw,
2098 vsi->back->hw.aq.asq_last_status));
2103 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2104 * @vsi: the vsi being adjusted
2106 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2108 struct i40e_vsi_context ctxt;
2111 if ((vsi->info.valid_sections &
2112 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2113 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2114 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2115 return; /* already disabled */
2117 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2118 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2119 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2121 ctxt.seid = vsi->seid;
2122 ctxt.info = vsi->info;
2123 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2125 dev_info(&vsi->back->pdev->dev,
2126 "update vlan stripping failed, err %s aq_err %s\n",
2127 i40e_stat_str(&vsi->back->hw, ret),
2128 i40e_aq_str(&vsi->back->hw,
2129 vsi->back->hw.aq.asq_last_status));
2134 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2135 * @netdev: network interface to be adjusted
2136 * @features: netdev features to test if VLAN offload is enabled or not
2138 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2140 struct i40e_netdev_priv *np = netdev_priv(netdev);
2141 struct i40e_vsi *vsi = np->vsi;
2143 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2144 i40e_vlan_stripping_enable(vsi);
2146 i40e_vlan_stripping_disable(vsi);
2150 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2151 * @vsi: the vsi being configured
2152 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2154 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2156 struct i40e_mac_filter *f, *add_f;
2157 bool is_netdev, is_vf;
2159 is_vf = (vsi->type == I40E_VSI_SRIOV);
2160 is_netdev = !!(vsi->netdev);
2163 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2166 dev_info(&vsi->back->pdev->dev,
2167 "Could not add vlan filter %d for %pM\n",
2168 vid, vsi->netdev->dev_addr);
2173 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2174 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2176 dev_info(&vsi->back->pdev->dev,
2177 "Could not add vlan filter %d for %pM\n",
2183 /* Now if we add a vlan tag, make sure to check if it is the first
2184 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2185 * with 0, so we now accept untagged and specified tagged traffic
2186 * (and not any taged and untagged)
2189 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2191 is_vf, is_netdev)) {
2192 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2193 I40E_VLAN_ANY, is_vf, is_netdev);
2194 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2197 dev_info(&vsi->back->pdev->dev,
2198 "Could not add filter 0 for %pM\n",
2199 vsi->netdev->dev_addr);
2205 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2206 if (vid > 0 && !vsi->info.pvid) {
2207 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2208 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2209 is_vf, is_netdev)) {
2210 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2212 add_f = i40e_add_filter(vsi, f->macaddr,
2213 0, is_vf, is_netdev);
2215 dev_info(&vsi->back->pdev->dev,
2216 "Could not add filter 0 for %pM\n",
2224 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2225 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2228 return i40e_sync_vsi_filters(vsi, false);
2232 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2233 * @vsi: the vsi being configured
2234 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2236 * Return: 0 on success or negative otherwise
2238 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2240 struct net_device *netdev = vsi->netdev;
2241 struct i40e_mac_filter *f, *add_f;
2242 bool is_vf, is_netdev;
2243 int filter_count = 0;
2245 is_vf = (vsi->type == I40E_VSI_SRIOV);
2246 is_netdev = !!(netdev);
2249 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2251 list_for_each_entry(f, &vsi->mac_filter_list, list)
2252 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2254 /* go through all the filters for this VSI and if there is only
2255 * vid == 0 it means there are no other filters, so vid 0 must
2256 * be replaced with -1. This signifies that we should from now
2257 * on accept any traffic (with any tag present, or untagged)
2259 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2262 ether_addr_equal(netdev->dev_addr, f->macaddr))
2270 if (!filter_count && is_netdev) {
2271 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2272 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2275 dev_info(&vsi->back->pdev->dev,
2276 "Could not add filter %d for %pM\n",
2277 I40E_VLAN_ANY, netdev->dev_addr);
2282 if (!filter_count) {
2283 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2284 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2285 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2288 dev_info(&vsi->back->pdev->dev,
2289 "Could not add filter %d for %pM\n",
2290 I40E_VLAN_ANY, f->macaddr);
2296 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2297 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2300 return i40e_sync_vsi_filters(vsi, false);
2304 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2305 * @netdev: network interface to be adjusted
2306 * @vid: vlan id to be added
2308 * net_device_ops implementation for adding vlan ids
2311 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2312 __always_unused __be16 proto, u16 vid)
2314 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2315 __always_unused __be16 proto, u16 vid)
2318 struct i40e_netdev_priv *np = netdev_priv(netdev);
2319 struct i40e_vsi *vsi = np->vsi;
2325 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2327 /* If the network stack called us with vid = 0 then
2328 * it is asking to receive priority tagged packets with
2329 * vlan id 0. Our HW receives them by default when configured
2330 * to receive untagged packets so there is no need to add an
2331 * extra filter for vlan 0 tagged packets.
2334 ret = i40e_vsi_add_vlan(vsi, vid);
2336 if (!ret && (vid < VLAN_N_VID))
2337 set_bit(vid, vsi->active_vlans);
2343 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2344 * @netdev: network interface to be adjusted
2345 * @vid: vlan id to be removed
2347 * net_device_ops implementation for removing vlan ids
2350 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2351 __always_unused __be16 proto, u16 vid)
2353 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2354 __always_unused __be16 proto, u16 vid)
2357 struct i40e_netdev_priv *np = netdev_priv(netdev);
2358 struct i40e_vsi *vsi = np->vsi;
2360 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2362 /* return code is ignored as there is nothing a user
2363 * can do about failure to remove and a log message was
2364 * already printed from the other function
2366 i40e_vsi_kill_vlan(vsi, vid);
2368 clear_bit(vid, vsi->active_vlans);
2374 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2375 * @vsi: the vsi being brought back up
2377 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2384 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2386 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2387 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2392 * i40e_vsi_add_pvid - Add pvid for the VSI
2393 * @vsi: the vsi being adjusted
2394 * @vid: the vlan id to set as a PVID
2396 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2398 struct i40e_vsi_context ctxt;
2401 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2402 vsi->info.pvid = cpu_to_le16(vid);
2403 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2404 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2405 I40E_AQ_VSI_PVLAN_EMOD_STR;
2407 ctxt.seid = vsi->seid;
2408 ctxt.info = vsi->info;
2409 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2411 dev_info(&vsi->back->pdev->dev,
2412 "add pvid failed, err %s aq_err %s\n",
2413 i40e_stat_str(&vsi->back->hw, ret),
2414 i40e_aq_str(&vsi->back->hw,
2415 vsi->back->hw.aq.asq_last_status));
2423 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2424 * @vsi: the vsi being adjusted
2426 * Just use the vlan_rx_register() service to put it back to normal
2428 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2430 i40e_vlan_stripping_disable(vsi);
2436 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2437 * @vsi: ptr to the VSI
2439 * If this function returns with an error, then it's possible one or
2440 * more of the rings is populated (while the rest are not). It is the
2441 * callers duty to clean those orphaned rings.
2443 * Return 0 on success, negative on failure
2445 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2449 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2450 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2456 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2457 * @vsi: ptr to the VSI
2459 * Free VSI's transmit software resources
2461 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2468 for (i = 0; i < vsi->num_queue_pairs; i++)
2469 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2470 i40e_free_tx_resources(vsi->tx_rings[i]);
2474 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2475 * @vsi: ptr to the VSI
2477 * If this function returns with an error, then it's possible one or
2478 * more of the rings is populated (while the rest are not). It is the
2479 * callers duty to clean those orphaned rings.
2481 * Return 0 on success, negative on failure
2483 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2487 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2488 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2490 i40e_fcoe_setup_ddp_resources(vsi);
2496 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2497 * @vsi: ptr to the VSI
2499 * Free all receive software resources
2501 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2508 for (i = 0; i < vsi->num_queue_pairs; i++)
2509 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2510 i40e_free_rx_resources(vsi->rx_rings[i]);
2512 i40e_fcoe_free_ddp_resources(vsi);
2517 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2518 * @ring: The Tx ring to configure
2520 * This enables/disables XPS for a given Tx descriptor ring
2521 * based on the TCs enabled for the VSI that ring belongs to.
2523 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2525 struct i40e_vsi *vsi = ring->vsi;
2528 if (!ring->q_vector || !ring->netdev)
2531 /* Single TC mode enable XPS */
2532 if (vsi->tc_config.numtc <= 1) {
2533 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2534 netif_set_xps_queue(ring->netdev,
2535 &ring->q_vector->affinity_mask,
2537 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2538 /* Disable XPS to allow selection based on TC */
2539 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2540 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2541 free_cpumask_var(mask);
2546 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2547 * @ring: The Tx ring to configure
2549 * Configure the Tx descriptor ring in the HMC context.
2551 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2553 struct i40e_vsi *vsi = ring->vsi;
2554 u16 pf_q = vsi->base_queue + ring->queue_index;
2555 struct i40e_hw *hw = &vsi->back->hw;
2556 struct i40e_hmc_obj_txq tx_ctx;
2557 i40e_status err = 0;
2560 /* some ATR related tx ring init */
2561 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2562 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2563 ring->atr_count = 0;
2565 ring->atr_sample_rate = 0;
2569 i40e_config_xps_tx_ring(ring);
2571 /* clear the context structure first */
2572 memset(&tx_ctx, 0, sizeof(tx_ctx));
2574 tx_ctx.new_context = 1;
2575 tx_ctx.base = (ring->dma / 128);
2576 tx_ctx.qlen = ring->count;
2577 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2578 I40E_FLAG_FD_ATR_ENABLED));
2580 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2582 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2583 /* FDIR VSI tx ring can still use RS bit and writebacks */
2584 if (vsi->type != I40E_VSI_FDIR)
2585 tx_ctx.head_wb_ena = 1;
2586 tx_ctx.head_wb_addr = ring->dma +
2587 (ring->count * sizeof(struct i40e_tx_desc));
2589 /* As part of VSI creation/update, FW allocates certain
2590 * Tx arbitration queue sets for each TC enabled for
2591 * the VSI. The FW returns the handles to these queue
2592 * sets as part of the response buffer to Add VSI,
2593 * Update VSI, etc. AQ commands. It is expected that
2594 * these queue set handles be associated with the Tx
2595 * queues by the driver as part of the TX queue context
2596 * initialization. This has to be done regardless of
2597 * DCB as by default everything is mapped to TC0.
2599 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2600 tx_ctx.rdylist_act = 0;
2602 /* clear the context in the HMC */
2603 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2605 dev_info(&vsi->back->pdev->dev,
2606 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2607 ring->queue_index, pf_q, err);
2611 /* set the context in the HMC */
2612 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2614 dev_info(&vsi->back->pdev->dev,
2615 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2616 ring->queue_index, pf_q, err);
2620 /* Now associate this queue with this PCI function */
2621 if (vsi->type == I40E_VSI_VMDQ2) {
2622 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2623 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2624 I40E_QTX_CTL_VFVM_INDX_MASK;
2626 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2629 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2630 I40E_QTX_CTL_PF_INDX_MASK);
2631 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2634 /* cache tail off for easier writes later */
2635 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2641 * i40e_configure_rx_ring - Configure a receive ring context
2642 * @ring: The Rx ring to configure
2644 * Configure the Rx descriptor ring in the HMC context.
2646 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2648 struct i40e_vsi *vsi = ring->vsi;
2649 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2650 u16 pf_q = vsi->base_queue + ring->queue_index;
2651 struct i40e_hw *hw = &vsi->back->hw;
2652 struct i40e_hmc_obj_rxq rx_ctx;
2653 i40e_status err = 0;
2657 /* clear the context structure first */
2658 memset(&rx_ctx, 0, sizeof(rx_ctx));
2660 ring->rx_buf_len = vsi->rx_buf_len;
2661 ring->rx_hdr_len = vsi->rx_hdr_len;
2663 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2664 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2666 rx_ctx.base = (ring->dma / 128);
2667 rx_ctx.qlen = ring->count;
2669 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2670 set_ring_16byte_desc_enabled(ring);
2676 rx_ctx.dtype = vsi->dtype;
2678 set_ring_ps_enabled(ring);
2679 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2681 I40E_RX_SPLIT_TCP_UDP |
2684 rx_ctx.hsplit_0 = 0;
2687 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2688 (chain_len * ring->rx_buf_len));
2689 if (hw->revision_id == 0)
2690 rx_ctx.lrxqthresh = 0;
2692 rx_ctx.lrxqthresh = 2;
2693 rx_ctx.crcstrip = 1;
2695 /* this controls whether VLAN is stripped from inner headers */
2698 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2700 /* set the prefena field to 1 because the manual says to */
2703 /* clear the context in the HMC */
2704 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2706 dev_info(&vsi->back->pdev->dev,
2707 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2708 ring->queue_index, pf_q, err);
2712 /* set the context in the HMC */
2713 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2715 dev_info(&vsi->back->pdev->dev,
2716 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2717 ring->queue_index, pf_q, err);
2721 /* cache tail for quicker writes, and clear the reg before use */
2722 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2723 writel(0, ring->tail);
2725 if (ring_is_ps_enabled(ring)) {
2726 i40e_alloc_rx_headers(ring);
2727 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2729 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2736 * i40e_vsi_configure_tx - Configure the VSI for Tx
2737 * @vsi: VSI structure describing this set of rings and resources
2739 * Configure the Tx VSI for operation.
2741 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2746 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2747 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2753 * i40e_vsi_configure_rx - Configure the VSI for Rx
2754 * @vsi: the VSI being configured
2756 * Configure the Rx VSI for operation.
2758 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2763 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2764 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2765 + ETH_FCS_LEN + VLAN_HLEN;
2767 vsi->max_frame = I40E_RXBUFFER_2048;
2769 /* figure out correct receive buffer length */
2770 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2771 I40E_FLAG_RX_PS_ENABLED)) {
2772 case I40E_FLAG_RX_1BUF_ENABLED:
2773 vsi->rx_hdr_len = 0;
2774 vsi->rx_buf_len = vsi->max_frame;
2775 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2777 case I40E_FLAG_RX_PS_ENABLED:
2778 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2779 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2780 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2783 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2784 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2785 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2790 /* setup rx buffer for FCoE */
2791 if ((vsi->type == I40E_VSI_FCOE) &&
2792 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2793 vsi->rx_hdr_len = 0;
2794 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2795 vsi->max_frame = I40E_RXBUFFER_3072;
2796 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2799 #endif /* I40E_FCOE */
2800 /* round up for the chip's needs */
2801 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2802 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2803 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2804 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2806 /* set up individual rings */
2807 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2808 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2814 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2815 * @vsi: ptr to the VSI
2817 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2819 struct i40e_ring *tx_ring, *rx_ring;
2820 u16 qoffset, qcount;
2823 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2824 /* Reset the TC information */
2825 for (i = 0; i < vsi->num_queue_pairs; i++) {
2826 rx_ring = vsi->rx_rings[i];
2827 tx_ring = vsi->tx_rings[i];
2828 rx_ring->dcb_tc = 0;
2829 tx_ring->dcb_tc = 0;
2833 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2834 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2837 qoffset = vsi->tc_config.tc_info[n].qoffset;
2838 qcount = vsi->tc_config.tc_info[n].qcount;
2839 for (i = qoffset; i < (qoffset + qcount); i++) {
2840 rx_ring = vsi->rx_rings[i];
2841 tx_ring = vsi->tx_rings[i];
2842 rx_ring->dcb_tc = n;
2843 tx_ring->dcb_tc = n;
2849 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2850 * @vsi: ptr to the VSI
2852 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2855 i40e_set_rx_mode(vsi->netdev);
2859 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2860 * @vsi: Pointer to the targeted VSI
2862 * This function replays the hlist on the hw where all the SB Flow Director
2863 * filters were saved.
2865 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2867 struct i40e_fdir_filter *filter;
2868 struct i40e_pf *pf = vsi->back;
2869 struct hlist_node *node;
2871 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2874 hlist_for_each_entry_safe(filter, node,
2875 &pf->fdir_filter_list, fdir_node) {
2876 i40e_add_del_fdir(vsi, filter, true);
2881 * i40e_vsi_configure - Set up the VSI for action
2882 * @vsi: the VSI being configured
2884 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2888 i40e_set_vsi_rx_mode(vsi);
2889 i40e_restore_vlan(vsi);
2890 i40e_vsi_config_dcb_rings(vsi);
2891 err = i40e_vsi_configure_tx(vsi);
2893 err = i40e_vsi_configure_rx(vsi);
2899 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2900 * @vsi: the VSI being configured
2902 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2904 struct i40e_pf *pf = vsi->back;
2905 struct i40e_q_vector *q_vector;
2906 struct i40e_hw *hw = &pf->hw;
2912 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2913 * and PFINT_LNKLSTn registers, e.g.:
2914 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2916 qp = vsi->base_queue;
2917 vector = vsi->base_vector;
2918 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2919 q_vector = vsi->q_vectors[i];
2920 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2921 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2922 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2924 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2925 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2926 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2929 /* Linked list for the queuepairs assigned to this vector */
2930 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2931 for (q = 0; q < q_vector->num_ringpairs; q++) {
2932 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2933 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2934 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2935 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2937 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2939 wr32(hw, I40E_QINT_RQCTL(qp), val);
2941 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2942 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2943 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2944 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2946 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2948 /* Terminate the linked list */
2949 if (q == (q_vector->num_ringpairs - 1))
2950 val |= (I40E_QUEUE_END_OF_LIST
2951 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2953 wr32(hw, I40E_QINT_TQCTL(qp), val);
2962 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2963 * @hw: ptr to the hardware info
2965 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2967 struct i40e_hw *hw = &pf->hw;
2970 /* clear things first */
2971 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2972 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2974 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2975 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2976 I40E_PFINT_ICR0_ENA_GRST_MASK |
2977 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2978 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2979 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2980 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2981 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2983 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2984 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2986 if (pf->flags & I40E_FLAG_PTP)
2987 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2989 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2991 /* SW_ITR_IDX = 0, but don't change INTENA */
2992 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2993 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2995 /* OTHER_ITR_IDX = 0 */
2996 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3000 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3001 * @vsi: the VSI being configured
3003 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3005 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3006 struct i40e_pf *pf = vsi->back;
3007 struct i40e_hw *hw = &pf->hw;
3010 /* set the ITR configuration */
3011 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3012 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3013 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3014 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3015 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3016 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3018 i40e_enable_misc_int_causes(pf);
3020 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3021 wr32(hw, I40E_PFINT_LNKLST0, 0);
3023 /* Associate the queue pair to the vector and enable the queue int */
3024 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3025 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3026 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3028 wr32(hw, I40E_QINT_RQCTL(0), val);
3030 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3031 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3032 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3034 wr32(hw, I40E_QINT_TQCTL(0), val);
3039 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3040 * @pf: board private structure
3042 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3044 struct i40e_hw *hw = &pf->hw;
3046 wr32(hw, I40E_PFINT_DYN_CTL0,
3047 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3052 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3053 * @pf: board private structure
3055 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3057 struct i40e_hw *hw = &pf->hw;
3060 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3061 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3062 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3064 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3069 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3070 * @vsi: pointer to a vsi
3071 * @vector: enable a particular Hw Interrupt vector, without base_vector
3073 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3075 struct i40e_pf *pf = vsi->back;
3076 struct i40e_hw *hw = &pf->hw;
3079 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3080 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3081 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3082 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
3083 /* skip the flush */
3087 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3088 * @vsi: pointer to a vsi
3089 * @vector: disable a particular Hw Interrupt vector
3091 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3093 struct i40e_pf *pf = vsi->back;
3094 struct i40e_hw *hw = &pf->hw;
3097 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3098 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3103 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3104 * @irq: interrupt number
3105 * @data: pointer to a q_vector
3107 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3109 struct i40e_q_vector *q_vector = data;
3111 if (!q_vector->tx.ring && !q_vector->rx.ring)
3114 napi_schedule(&q_vector->napi);
3120 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3121 * @vsi: the VSI being configured
3122 * @basename: name for the vector
3124 * Allocates MSI-X vectors and requests interrupts from the kernel.
3126 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3128 int q_vectors = vsi->num_q_vectors;
3129 struct i40e_pf *pf = vsi->back;
3130 int base = vsi->base_vector;
3135 for (vector = 0; vector < q_vectors; vector++) {
3136 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3138 if (q_vector->tx.ring && q_vector->rx.ring) {
3139 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3140 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3142 } else if (q_vector->rx.ring) {
3143 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3144 "%s-%s-%d", basename, "rx", rx_int_idx++);
3145 } else if (q_vector->tx.ring) {
3146 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3147 "%s-%s-%d", basename, "tx", tx_int_idx++);
3149 /* skip this unused q_vector */
3152 err = request_irq(pf->msix_entries[base + vector].vector,
3158 dev_info(&pf->pdev->dev,
3159 "MSIX request_irq failed, error: %d\n", err);
3160 goto free_queue_irqs;
3162 /* assign the mask for this irq */
3163 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3164 &q_vector->affinity_mask);
3167 vsi->irqs_ready = true;
3173 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3175 free_irq(pf->msix_entries[base + vector].vector,
3176 &(vsi->q_vectors[vector]));
3182 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3183 * @vsi: the VSI being un-configured
3185 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3187 struct i40e_pf *pf = vsi->back;
3188 struct i40e_hw *hw = &pf->hw;
3189 int base = vsi->base_vector;
3192 for (i = 0; i < vsi->num_queue_pairs; i++) {
3193 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3194 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3197 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3198 for (i = vsi->base_vector;
3199 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3200 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3203 for (i = 0; i < vsi->num_q_vectors; i++)
3204 synchronize_irq(pf->msix_entries[i + base].vector);
3206 /* Legacy and MSI mode - this stops all interrupt handling */
3207 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3208 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3210 synchronize_irq(pf->pdev->irq);
3215 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3216 * @vsi: the VSI being configured
3218 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3220 struct i40e_pf *pf = vsi->back;
3223 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3224 for (i = 0; i < vsi->num_q_vectors; i++)
3225 i40e_irq_dynamic_enable(vsi, i);
3227 i40e_irq_dynamic_enable_icr0(pf);
3230 i40e_flush(&pf->hw);
3235 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3236 * @pf: board private structure
3238 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3241 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3242 i40e_flush(&pf->hw);
3246 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3247 * @irq: interrupt number
3248 * @data: pointer to a q_vector
3250 * This is the handler used for all MSI/Legacy interrupts, and deals
3251 * with both queue and non-queue interrupts. This is also used in
3252 * MSIX mode to handle the non-queue interrupts.
3254 static irqreturn_t i40e_intr(int irq, void *data)
3256 struct i40e_pf *pf = (struct i40e_pf *)data;
3257 struct i40e_hw *hw = &pf->hw;
3258 irqreturn_t ret = IRQ_NONE;
3259 u32 icr0, icr0_remaining;
3262 icr0 = rd32(hw, I40E_PFINT_ICR0);
3263 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3265 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3266 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3269 /* if interrupt but no bits showing, must be SWINT */
3270 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3271 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3274 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3275 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3276 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3277 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3278 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3281 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3282 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3284 /* temporarily disable queue cause for NAPI processing */
3285 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3286 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3287 wr32(hw, I40E_QINT_RQCTL(0), qval);
3289 qval = rd32(hw, I40E_QINT_TQCTL(0));
3290 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3291 wr32(hw, I40E_QINT_TQCTL(0), qval);
3293 if (!test_bit(__I40E_DOWN, &pf->state))
3294 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3297 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3298 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3299 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3302 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3303 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3304 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3307 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3308 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3309 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3312 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3313 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3314 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3315 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3316 val = rd32(hw, I40E_GLGEN_RSTAT);
3317 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3318 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3319 if (val == I40E_RESET_CORER) {
3321 } else if (val == I40E_RESET_GLOBR) {
3323 } else if (val == I40E_RESET_EMPR) {
3325 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3329 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3330 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3331 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3332 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3333 rd32(hw, I40E_PFHMC_ERRORINFO),
3334 rd32(hw, I40E_PFHMC_ERRORDATA));
3337 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3338 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3340 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3341 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3342 i40e_ptp_tx_hwtstamp(pf);
3346 /* If a critical error is pending we have no choice but to reset the
3348 * Report and mask out any remaining unexpected interrupts.
3350 icr0_remaining = icr0 & ena_mask;
3351 if (icr0_remaining) {
3352 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3354 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3355 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3356 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3357 dev_info(&pf->pdev->dev, "device will be reset\n");
3358 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3359 i40e_service_event_schedule(pf);
3361 ena_mask &= ~icr0_remaining;
3366 /* re-enable interrupt causes */
3367 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3368 if (!test_bit(__I40E_DOWN, &pf->state)) {
3369 i40e_service_event_schedule(pf);
3370 i40e_irq_dynamic_enable_icr0(pf);
3377 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3378 * @tx_ring: tx ring to clean
3379 * @budget: how many cleans we're allowed
3381 * Returns true if there's any budget left (e.g. the clean is finished)
3383 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3385 struct i40e_vsi *vsi = tx_ring->vsi;
3386 u16 i = tx_ring->next_to_clean;
3387 struct i40e_tx_buffer *tx_buf;
3388 struct i40e_tx_desc *tx_desc;
3390 tx_buf = &tx_ring->tx_bi[i];
3391 tx_desc = I40E_TX_DESC(tx_ring, i);
3392 i -= tx_ring->count;
3395 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3397 /* if next_to_watch is not set then there is no work pending */
3401 /* prevent any other reads prior to eop_desc */
3402 read_barrier_depends();
3404 /* if the descriptor isn't done, no work yet to do */
3405 if (!(eop_desc->cmd_type_offset_bsz &
3406 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3409 /* clear next_to_watch to prevent false hangs */
3410 tx_buf->next_to_watch = NULL;
3412 tx_desc->buffer_addr = 0;
3413 tx_desc->cmd_type_offset_bsz = 0;
3414 /* move past filter desc */
3419 i -= tx_ring->count;
3420 tx_buf = tx_ring->tx_bi;
3421 tx_desc = I40E_TX_DESC(tx_ring, 0);
3423 /* unmap skb header data */
3424 dma_unmap_single(tx_ring->dev,
3425 dma_unmap_addr(tx_buf, dma),
3426 dma_unmap_len(tx_buf, len),
3428 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3429 kfree(tx_buf->raw_buf);
3431 tx_buf->raw_buf = NULL;
3432 tx_buf->tx_flags = 0;
3433 tx_buf->next_to_watch = NULL;
3434 dma_unmap_len_set(tx_buf, len, 0);
3435 tx_desc->buffer_addr = 0;
3436 tx_desc->cmd_type_offset_bsz = 0;
3438 /* move us past the eop_desc for start of next FD desc */
3443 i -= tx_ring->count;
3444 tx_buf = tx_ring->tx_bi;
3445 tx_desc = I40E_TX_DESC(tx_ring, 0);
3448 /* update budget accounting */
3450 } while (likely(budget));
3452 i += tx_ring->count;
3453 tx_ring->next_to_clean = i;
3455 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3456 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3462 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3463 * @irq: interrupt number
3464 * @data: pointer to a q_vector
3466 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3468 struct i40e_q_vector *q_vector = data;
3469 struct i40e_vsi *vsi;
3471 if (!q_vector->tx.ring)
3474 vsi = q_vector->tx.ring->vsi;
3475 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3481 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3482 * @vsi: the VSI being configured
3483 * @v_idx: vector index
3484 * @qp_idx: queue pair index
3486 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3488 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3489 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3490 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3492 tx_ring->q_vector = q_vector;
3493 tx_ring->next = q_vector->tx.ring;
3494 q_vector->tx.ring = tx_ring;
3495 q_vector->tx.count++;
3497 rx_ring->q_vector = q_vector;
3498 rx_ring->next = q_vector->rx.ring;
3499 q_vector->rx.ring = rx_ring;
3500 q_vector->rx.count++;
3504 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3505 * @vsi: the VSI being configured
3507 * This function maps descriptor rings to the queue-specific vectors
3508 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3509 * one vector per queue pair, but on a constrained vector budget, we
3510 * group the queue pairs as "efficiently" as possible.
3512 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3514 int qp_remaining = vsi->num_queue_pairs;
3515 int q_vectors = vsi->num_q_vectors;
3520 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3521 * group them so there are multiple queues per vector.
3522 * It is also important to go through all the vectors available to be
3523 * sure that if we don't use all the vectors, that the remaining vectors
3524 * are cleared. This is especially important when decreasing the
3525 * number of queues in use.
3527 for (; v_start < q_vectors; v_start++) {
3528 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3530 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3532 q_vector->num_ringpairs = num_ringpairs;
3534 q_vector->rx.count = 0;
3535 q_vector->tx.count = 0;
3536 q_vector->rx.ring = NULL;
3537 q_vector->tx.ring = NULL;
3539 while (num_ringpairs--) {
3540 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3548 * i40e_vsi_request_irq - Request IRQ from the OS
3549 * @vsi: the VSI being configured
3550 * @basename: name for the vector
3552 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3554 struct i40e_pf *pf = vsi->back;
3557 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3558 err = i40e_vsi_request_irq_msix(vsi, basename);
3559 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3560 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3563 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3567 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3572 #ifdef CONFIG_NET_POLL_CONTROLLER
3574 * i40e_netpoll - A Polling 'interrupt'handler
3575 * @netdev: network interface device structure
3577 * This is used by netconsole to send skbs without having to re-enable
3578 * interrupts. It's not called while the normal interrupt routine is executing.
3581 void i40e_netpoll(struct net_device *netdev)
3583 static void i40e_netpoll(struct net_device *netdev)
3586 struct i40e_netdev_priv *np = netdev_priv(netdev);
3587 struct i40e_vsi *vsi = np->vsi;
3588 struct i40e_pf *pf = vsi->back;
3591 /* if interface is down do nothing */
3592 if (test_bit(__I40E_DOWN, &vsi->state))
3595 pf->flags |= I40E_FLAG_IN_NETPOLL;
3596 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3597 for (i = 0; i < vsi->num_q_vectors; i++)
3598 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3600 i40e_intr(pf->pdev->irq, netdev);
3602 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3607 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3608 * @pf: the PF being configured
3609 * @pf_q: the PF queue
3610 * @enable: enable or disable state of the queue
3612 * This routine will wait for the given Tx queue of the PF to reach the
3613 * enabled or disabled state.
3614 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3615 * multiple retries; else will return 0 in case of success.
3617 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3622 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3623 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3624 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3627 usleep_range(10, 20);
3629 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3636 * i40e_vsi_control_tx - Start or stop a VSI's rings
3637 * @vsi: the VSI being configured
3638 * @enable: start or stop the rings
3640 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3642 struct i40e_pf *pf = vsi->back;
3643 struct i40e_hw *hw = &pf->hw;
3644 int i, j, pf_q, ret = 0;
3647 pf_q = vsi->base_queue;
3648 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3650 /* warn the TX unit of coming changes */
3651 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3653 usleep_range(10, 20);
3655 for (j = 0; j < 50; j++) {
3656 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3657 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3658 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3660 usleep_range(1000, 2000);
3662 /* Skip if the queue is already in the requested state */
3663 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3666 /* turn on/off the queue */
3668 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3669 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3671 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3674 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3675 /* No waiting for the Tx queue to disable */
3676 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3679 /* wait for the change to finish */
3680 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3682 dev_info(&pf->pdev->dev,
3683 "VSI seid %d Tx ring %d %sable timeout\n",
3684 vsi->seid, pf_q, (enable ? "en" : "dis"));
3689 if (hw->revision_id == 0)
3695 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3696 * @pf: the PF being configured
3697 * @pf_q: the PF queue
3698 * @enable: enable or disable state of the queue
3700 * This routine will wait for the given Rx queue of the PF to reach the
3701 * enabled or disabled state.
3702 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3703 * multiple retries; else will return 0 in case of success.
3705 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3710 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3711 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3712 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3715 usleep_range(10, 20);
3717 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3724 * i40e_vsi_control_rx - Start or stop a VSI's rings
3725 * @vsi: the VSI being configured
3726 * @enable: start or stop the rings
3728 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3730 struct i40e_pf *pf = vsi->back;
3731 struct i40e_hw *hw = &pf->hw;
3732 int i, j, pf_q, ret = 0;
3735 pf_q = vsi->base_queue;
3736 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3737 for (j = 0; j < 50; j++) {
3738 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3739 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3740 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3742 usleep_range(1000, 2000);
3745 /* Skip if the queue is already in the requested state */
3746 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3749 /* turn on/off the queue */
3751 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3753 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3754 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3756 /* wait for the change to finish */
3757 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3759 dev_info(&pf->pdev->dev,
3760 "VSI seid %d Rx ring %d %sable timeout\n",
3761 vsi->seid, pf_q, (enable ? "en" : "dis"));
3770 * i40e_vsi_control_rings - Start or stop a VSI's rings
3771 * @vsi: the VSI being configured
3772 * @enable: start or stop the rings
3774 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3778 /* do rx first for enable and last for disable */
3780 ret = i40e_vsi_control_rx(vsi, request);
3783 ret = i40e_vsi_control_tx(vsi, request);
3785 /* Ignore return value, we need to shutdown whatever we can */
3786 i40e_vsi_control_tx(vsi, request);
3787 i40e_vsi_control_rx(vsi, request);
3794 * i40e_vsi_free_irq - Free the irq association with the OS
3795 * @vsi: the VSI being configured
3797 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3799 struct i40e_pf *pf = vsi->back;
3800 struct i40e_hw *hw = &pf->hw;
3801 int base = vsi->base_vector;
3805 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3806 if (!vsi->q_vectors)
3809 if (!vsi->irqs_ready)
3812 vsi->irqs_ready = false;
3813 for (i = 0; i < vsi->num_q_vectors; i++) {
3814 u16 vector = i + base;
3816 /* free only the irqs that were actually requested */
3817 if (!vsi->q_vectors[i] ||
3818 !vsi->q_vectors[i]->num_ringpairs)
3821 /* clear the affinity_mask in the IRQ descriptor */
3822 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3824 free_irq(pf->msix_entries[vector].vector,
3827 /* Tear down the interrupt queue link list
3829 * We know that they come in pairs and always
3830 * the Rx first, then the Tx. To clear the
3831 * link list, stick the EOL value into the
3832 * next_q field of the registers.
3834 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3835 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3836 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3837 val |= I40E_QUEUE_END_OF_LIST
3838 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3839 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3841 while (qp != I40E_QUEUE_END_OF_LIST) {
3844 val = rd32(hw, I40E_QINT_RQCTL(qp));
3846 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3847 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3848 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3849 I40E_QINT_RQCTL_INTEVENT_MASK);
3851 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3852 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3854 wr32(hw, I40E_QINT_RQCTL(qp), val);
3856 val = rd32(hw, I40E_QINT_TQCTL(qp));
3858 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3859 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3861 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3862 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3863 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3864 I40E_QINT_TQCTL_INTEVENT_MASK);
3866 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3867 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3869 wr32(hw, I40E_QINT_TQCTL(qp), val);
3874 free_irq(pf->pdev->irq, pf);
3876 val = rd32(hw, I40E_PFINT_LNKLST0);
3877 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3878 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3879 val |= I40E_QUEUE_END_OF_LIST
3880 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3881 wr32(hw, I40E_PFINT_LNKLST0, val);
3883 val = rd32(hw, I40E_QINT_RQCTL(qp));
3884 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3885 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3886 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3887 I40E_QINT_RQCTL_INTEVENT_MASK);
3889 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3890 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3892 wr32(hw, I40E_QINT_RQCTL(qp), val);
3894 val = rd32(hw, I40E_QINT_TQCTL(qp));
3896 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3897 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3898 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3899 I40E_QINT_TQCTL_INTEVENT_MASK);
3901 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3902 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3904 wr32(hw, I40E_QINT_TQCTL(qp), val);
3909 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3910 * @vsi: the VSI being configured
3911 * @v_idx: Index of vector to be freed
3913 * This function frees the memory allocated to the q_vector. In addition if
3914 * NAPI is enabled it will delete any references to the NAPI struct prior
3915 * to freeing the q_vector.
3917 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3919 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3920 struct i40e_ring *ring;
3925 /* disassociate q_vector from rings */
3926 i40e_for_each_ring(ring, q_vector->tx)
3927 ring->q_vector = NULL;
3929 i40e_for_each_ring(ring, q_vector->rx)
3930 ring->q_vector = NULL;
3932 /* only VSI w/ an associated netdev is set up w/ NAPI */
3934 netif_napi_del(&q_vector->napi);
3936 vsi->q_vectors[v_idx] = NULL;
3938 kfree_rcu(q_vector, rcu);
3942 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3943 * @vsi: the VSI being un-configured
3945 * This frees the memory allocated to the q_vectors and
3946 * deletes references to the NAPI struct.
3948 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3952 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3953 i40e_free_q_vector(vsi, v_idx);
3957 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3958 * @pf: board private structure
3960 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3962 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3963 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3964 pci_disable_msix(pf->pdev);
3965 kfree(pf->msix_entries);
3966 pf->msix_entries = NULL;
3967 kfree(pf->irq_pile);
3968 pf->irq_pile = NULL;
3969 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3970 pci_disable_msi(pf->pdev);
3972 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3976 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3977 * @pf: board private structure
3979 * We go through and clear interrupt specific resources and reset the structure
3980 * to pre-load conditions
3982 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3986 i40e_stop_misc_vector(pf);
3987 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3988 synchronize_irq(pf->msix_entries[0].vector);
3989 free_irq(pf->msix_entries[0].vector, pf);
3992 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3993 for (i = 0; i < pf->num_alloc_vsi; i++)
3995 i40e_vsi_free_q_vectors(pf->vsi[i]);
3996 i40e_reset_interrupt_capability(pf);
4000 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4001 * @vsi: the VSI being configured
4003 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4010 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4011 napi_enable(&vsi->q_vectors[q_idx]->napi);
4015 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4016 * @vsi: the VSI being configured
4018 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4025 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4026 napi_disable(&vsi->q_vectors[q_idx]->napi);
4030 * i40e_vsi_close - Shut down a VSI
4031 * @vsi: the vsi to be quelled
4033 static void i40e_vsi_close(struct i40e_vsi *vsi)
4035 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4037 i40e_vsi_free_irq(vsi);
4038 i40e_vsi_free_tx_resources(vsi);
4039 i40e_vsi_free_rx_resources(vsi);
4040 vsi->current_netdev_flags = 0;
4044 * i40e_quiesce_vsi - Pause a given VSI
4045 * @vsi: the VSI being paused
4047 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4049 if (test_bit(__I40E_DOWN, &vsi->state))
4052 /* No need to disable FCoE VSI when Tx suspended */
4053 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4054 vsi->type == I40E_VSI_FCOE) {
4055 dev_dbg(&vsi->back->pdev->dev,
4056 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4060 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4061 if (vsi->netdev && netif_running(vsi->netdev)) {
4062 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4064 i40e_vsi_close(vsi);
4069 * i40e_unquiesce_vsi - Resume a given VSI
4070 * @vsi: the VSI being resumed
4072 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4074 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4077 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4078 if (vsi->netdev && netif_running(vsi->netdev))
4079 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4081 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4085 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4088 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4092 for (v = 0; v < pf->num_alloc_vsi; v++) {
4094 i40e_quiesce_vsi(pf->vsi[v]);
4099 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4102 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4106 for (v = 0; v < pf->num_alloc_vsi; v++) {
4108 i40e_unquiesce_vsi(pf->vsi[v]);
4112 #ifdef CONFIG_I40E_DCB
4114 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4115 * @vsi: the VSI being configured
4117 * This function waits for the given VSI's Tx queues to be disabled.
4119 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4121 struct i40e_pf *pf = vsi->back;
4124 pf_q = vsi->base_queue;
4125 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4126 /* Check and wait for the disable status of the queue */
4127 ret = i40e_pf_txq_wait(pf, pf_q, false);
4129 dev_info(&pf->pdev->dev,
4130 "VSI seid %d Tx ring %d disable timeout\n",
4140 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4143 * This function waits for the Tx queues to be in disabled state for all the
4144 * VSIs that are managed by this PF.
4146 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4150 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4151 /* No need to wait for FCoE VSI queues */
4152 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4153 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4165 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4166 * @q_idx: TX queue number
4167 * @vsi: Pointer to VSI struct
4169 * This function checks specified queue for given VSI. Detects hung condition.
4170 * Sets hung bit since it is two step process. Before next run of service task
4171 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4172 * hung condition remain unchanged and during subsequent run, this function
4173 * issues SW interrupt to recover from hung condition.
4175 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4177 struct i40e_ring *tx_ring = NULL;
4179 u32 head, val, tx_pending;
4184 /* now that we have an index, find the tx_ring struct */
4185 for (i = 0; i < vsi->num_queue_pairs; i++) {
4186 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4187 if (q_idx == vsi->tx_rings[i]->queue_index) {
4188 tx_ring = vsi->tx_rings[i];
4197 /* Read interrupt register */
4198 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4200 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4201 tx_ring->vsi->base_vector - 1));
4203 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4205 head = i40e_get_head(tx_ring);
4207 tx_pending = i40e_get_tx_pending(tx_ring);
4209 /* Interrupts are disabled and TX pending is non-zero,
4210 * trigger the SW interrupt (don't wait). Worst case
4211 * there will be one extra interrupt which may result
4212 * into not cleaning any queues because queues are cleaned.
4214 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4215 i40e_force_wb(vsi, tx_ring->q_vector);
4219 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4220 * @pf: pointer to PF struct
4222 * LAN VSI has netdev and netdev has TX queues. This function is to check
4223 * each of those TX queues if they are hung, trigger recovery by issuing
4226 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4228 struct net_device *netdev;
4229 struct i40e_vsi *vsi;
4232 /* Only for LAN VSI */
4233 vsi = pf->vsi[pf->lan_vsi];
4238 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4239 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4240 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4243 /* Make sure type is MAIN VSI */
4244 if (vsi->type != I40E_VSI_MAIN)
4247 netdev = vsi->netdev;
4251 /* Bail out if netif_carrier is not OK */
4252 if (!netif_carrier_ok(netdev))
4255 /* Go thru' TX queues for netdev */
4256 for (i = 0; i < netdev->num_tx_queues; i++) {
4257 struct netdev_queue *q;
4259 q = netdev_get_tx_queue(netdev, i);
4261 i40e_detect_recover_hung_queue(i, vsi);
4266 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4267 * @pf: pointer to PF
4269 * Get TC map for ISCSI PF type that will include iSCSI TC
4272 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4274 struct i40e_dcb_app_priority_table app;
4275 struct i40e_hw *hw = &pf->hw;
4276 u8 enabled_tc = 1; /* TC0 is always enabled */
4278 /* Get the iSCSI APP TLV */
4279 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4281 for (i = 0; i < dcbcfg->numapps; i++) {
4282 app = dcbcfg->app[i];
4283 if (app.selector == I40E_APP_SEL_TCPIP &&
4284 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4285 tc = dcbcfg->etscfg.prioritytable[app.priority];
4286 enabled_tc |= BIT_ULL(tc);
4295 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4296 * @dcbcfg: the corresponding DCBx configuration structure
4298 * Return the number of TCs from given DCBx configuration
4300 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4305 /* Scan the ETS Config Priority Table to find
4306 * traffic class enabled for a given priority
4307 * and use the traffic class index to get the
4308 * number of traffic classes enabled
4310 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4311 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4312 num_tc = dcbcfg->etscfg.prioritytable[i];
4315 /* Traffic class index starts from zero so
4316 * increment to return the actual count
4322 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4323 * @dcbcfg: the corresponding DCBx configuration structure
4325 * Query the current DCB configuration and return the number of
4326 * traffic classes enabled from the given DCBX config
4328 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4330 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4334 for (i = 0; i < num_tc; i++)
4335 enabled_tc |= BIT(i);
4341 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4342 * @pf: PF being queried
4344 * Return number of traffic classes enabled for the given PF
4346 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4348 struct i40e_hw *hw = &pf->hw;
4351 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4353 /* If DCB is not enabled then always in single TC */
4354 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4357 /* SFP mode will be enabled for all TCs on port */
4358 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4359 return i40e_dcb_get_num_tc(dcbcfg);
4361 /* MFP mode return count of enabled TCs for this PF */
4362 if (pf->hw.func_caps.iscsi)
4363 enabled_tc = i40e_get_iscsi_tc_map(pf);
4365 return 1; /* Only TC0 */
4367 /* At least have TC0 */
4368 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4369 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4370 if (enabled_tc & BIT_ULL(i))
4377 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4378 * @pf: PF being queried
4380 * Return a bitmap for first enabled traffic class for this PF.
4382 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4384 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4388 return 0x1; /* TC0 */
4390 /* Find the first enabled TC */
4391 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4392 if (enabled_tc & BIT_ULL(i))
4400 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4401 * @pf: PF being queried
4403 * Return a bitmap for enabled traffic classes for this PF.
4405 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4407 /* If DCB is not enabled for this PF then just return default TC */
4408 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4409 return i40e_pf_get_default_tc(pf);
4411 /* SFP mode we want PF to be enabled for all TCs */
4412 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4413 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4415 /* MFP enabled and iSCSI PF type */
4416 if (pf->hw.func_caps.iscsi)
4417 return i40e_get_iscsi_tc_map(pf);
4419 return i40e_pf_get_default_tc(pf);
4423 * i40e_vsi_get_bw_info - Query VSI BW Information
4424 * @vsi: the VSI being queried
4426 * Returns 0 on success, negative value on failure
4428 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4430 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4431 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4432 struct i40e_pf *pf = vsi->back;
4433 struct i40e_hw *hw = &pf->hw;
4438 /* Get the VSI level BW configuration */
4439 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4441 dev_info(&pf->pdev->dev,
4442 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4443 i40e_stat_str(&pf->hw, ret),
4444 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4448 /* Get the VSI level BW configuration per TC */
4449 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4452 dev_info(&pf->pdev->dev,
4453 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4454 i40e_stat_str(&pf->hw, ret),
4455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4459 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4460 dev_info(&pf->pdev->dev,
4461 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4462 bw_config.tc_valid_bits,
4463 bw_ets_config.tc_valid_bits);
4464 /* Still continuing */
4467 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4468 vsi->bw_max_quanta = bw_config.max_bw;
4469 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4470 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4471 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4472 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4473 vsi->bw_ets_limit_credits[i] =
4474 le16_to_cpu(bw_ets_config.credits[i]);
4475 /* 3 bits out of 4 for each TC */
4476 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4483 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4484 * @vsi: the VSI being configured
4485 * @enabled_tc: TC bitmap
4486 * @bw_credits: BW shared credits per TC
4488 * Returns 0 on success, negative value on failure
4490 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4493 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4497 bw_data.tc_valid_bits = enabled_tc;
4498 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4499 bw_data.tc_bw_credits[i] = bw_share[i];
4501 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4504 dev_info(&vsi->back->pdev->dev,
4505 "AQ command Config VSI BW allocation per TC failed = %d\n",
4506 vsi->back->hw.aq.asq_last_status);
4510 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4511 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4517 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4518 * @vsi: the VSI being configured
4519 * @enabled_tc: TC map to be enabled
4522 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4524 struct net_device *netdev = vsi->netdev;
4525 struct i40e_pf *pf = vsi->back;
4526 struct i40e_hw *hw = &pf->hw;
4529 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4535 netdev_reset_tc(netdev);
4539 /* Set up actual enabled TCs on the VSI */
4540 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4543 /* set per TC queues for the VSI */
4544 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4545 /* Only set TC queues for enabled tcs
4547 * e.g. For a VSI that has TC0 and TC3 enabled the
4548 * enabled_tc bitmap would be 0x00001001; the driver
4549 * will set the numtc for netdev as 2 that will be
4550 * referenced by the netdev layer as TC 0 and 1.
4552 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4553 netdev_set_tc_queue(netdev,
4554 vsi->tc_config.tc_info[i].netdev_tc,
4555 vsi->tc_config.tc_info[i].qcount,
4556 vsi->tc_config.tc_info[i].qoffset);
4559 /* Assign UP2TC map for the VSI */
4560 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4561 /* Get the actual TC# for the UP */
4562 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4563 /* Get the mapped netdev TC# for the UP */
4564 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4565 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4570 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4571 * @vsi: the VSI being configured
4572 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4574 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4575 struct i40e_vsi_context *ctxt)
4577 /* copy just the sections touched not the entire info
4578 * since not all sections are valid as returned by
4581 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4582 memcpy(&vsi->info.queue_mapping,
4583 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4584 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4585 sizeof(vsi->info.tc_mapping));
4589 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4590 * @vsi: VSI to be configured
4591 * @enabled_tc: TC bitmap
4593 * This configures a particular VSI for TCs that are mapped to the
4594 * given TC bitmap. It uses default bandwidth share for TCs across
4595 * VSIs to configure TC for a particular VSI.
4598 * It is expected that the VSI queues have been quisced before calling
4601 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4603 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4604 struct i40e_vsi_context ctxt;
4608 /* Check if enabled_tc is same as existing or new TCs */
4609 if (vsi->tc_config.enabled_tc == enabled_tc)
4612 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4613 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4614 if (enabled_tc & BIT_ULL(i))
4618 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4620 dev_info(&vsi->back->pdev->dev,
4621 "Failed configuring TC map %d for VSI %d\n",
4622 enabled_tc, vsi->seid);
4626 /* Update Queue Pairs Mapping for currently enabled UPs */
4627 ctxt.seid = vsi->seid;
4628 ctxt.pf_num = vsi->back->hw.pf_id;
4630 ctxt.uplink_seid = vsi->uplink_seid;
4631 ctxt.info = vsi->info;
4632 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4634 /* Update the VSI after updating the VSI queue-mapping information */
4635 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4637 dev_info(&vsi->back->pdev->dev,
4638 "Update vsi tc config failed, err %s aq_err %s\n",
4639 i40e_stat_str(&vsi->back->hw, ret),
4640 i40e_aq_str(&vsi->back->hw,
4641 vsi->back->hw.aq.asq_last_status));
4644 /* update the local VSI info with updated queue map */
4645 i40e_vsi_update_queue_map(vsi, &ctxt);
4646 vsi->info.valid_sections = 0;
4648 /* Update current VSI BW information */
4649 ret = i40e_vsi_get_bw_info(vsi);
4651 dev_info(&vsi->back->pdev->dev,
4652 "Failed updating vsi bw info, err %s aq_err %s\n",
4653 i40e_stat_str(&vsi->back->hw, ret),
4654 i40e_aq_str(&vsi->back->hw,
4655 vsi->back->hw.aq.asq_last_status));
4659 /* Update the netdev TC setup */
4660 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4666 * i40e_veb_config_tc - Configure TCs for given VEB
4668 * @enabled_tc: TC bitmap
4670 * Configures given TC bitmap for VEB (switching) element
4672 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4674 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4675 struct i40e_pf *pf = veb->pf;
4679 /* No TCs or already enabled TCs just return */
4680 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4683 bw_data.tc_valid_bits = enabled_tc;
4684 /* bw_data.absolute_credits is not set (relative) */
4686 /* Enable ETS TCs with equal BW Share for now */
4687 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4688 if (enabled_tc & BIT_ULL(i))
4689 bw_data.tc_bw_share_credits[i] = 1;
4692 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4695 dev_info(&pf->pdev->dev,
4696 "VEB bw config failed, err %s aq_err %s\n",
4697 i40e_stat_str(&pf->hw, ret),
4698 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4702 /* Update the BW information */
4703 ret = i40e_veb_get_bw_info(veb);
4705 dev_info(&pf->pdev->dev,
4706 "Failed getting veb bw config, err %s aq_err %s\n",
4707 i40e_stat_str(&pf->hw, ret),
4708 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4715 #ifdef CONFIG_I40E_DCB
4717 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4720 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4721 * the caller would've quiesce all the VSIs before calling
4724 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4730 /* Enable the TCs available on PF to all VEBs */
4731 tc_map = i40e_pf_get_tc_map(pf);
4732 for (v = 0; v < I40E_MAX_VEB; v++) {
4735 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4737 dev_info(&pf->pdev->dev,
4738 "Failed configuring TC for VEB seid=%d\n",
4740 /* Will try to configure as many components */
4744 /* Update each VSI */
4745 for (v = 0; v < pf->num_alloc_vsi; v++) {
4749 /* - Enable all TCs for the LAN VSI
4751 * - For FCoE VSI only enable the TC configured
4752 * as per the APP TLV
4754 * - For all others keep them at TC0 for now
4756 if (v == pf->lan_vsi)
4757 tc_map = i40e_pf_get_tc_map(pf);
4759 tc_map = i40e_pf_get_default_tc(pf);
4761 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4762 tc_map = i40e_get_fcoe_tc_map(pf);
4763 #endif /* #ifdef I40E_FCOE */
4765 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4767 dev_info(&pf->pdev->dev,
4768 "Failed configuring TC for VSI seid=%d\n",
4770 /* Will try to configure as many components */
4772 /* Re-configure VSI vectors based on updated TC map */
4773 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4774 if (pf->vsi[v]->netdev)
4775 i40e_dcbnl_set_all(pf->vsi[v]);
4781 * i40e_resume_port_tx - Resume port Tx
4784 * Resume a port's Tx and issue a PF reset in case of failure to
4787 static int i40e_resume_port_tx(struct i40e_pf *pf)
4789 struct i40e_hw *hw = &pf->hw;
4792 ret = i40e_aq_resume_port_tx(hw, NULL);
4794 dev_info(&pf->pdev->dev,
4795 "Resume Port Tx failed, err %s aq_err %s\n",
4796 i40e_stat_str(&pf->hw, ret),
4797 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4798 /* Schedule PF reset to recover */
4799 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4800 i40e_service_event_schedule(pf);
4807 * i40e_init_pf_dcb - Initialize DCB configuration
4808 * @pf: PF being configured
4810 * Query the current DCB configuration and cache it
4811 * in the hardware structure
4813 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4815 struct i40e_hw *hw = &pf->hw;
4818 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4819 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4820 (pf->hw.aq.fw_maj_ver < 4))
4823 /* Get the initial DCB configuration */
4824 err = i40e_init_dcb(hw);
4826 /* Device/Function is not DCBX capable */
4827 if ((!hw->func_caps.dcb) ||
4828 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4829 dev_info(&pf->pdev->dev,
4830 "DCBX offload is not supported or is disabled for this PF.\n");
4832 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4836 /* When status is not DISABLED then DCBX in FW */
4837 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4838 DCB_CAP_DCBX_VER_IEEE;
4840 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4841 /* Enable DCB tagging only when more than one TC */
4842 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4843 pf->flags |= I40E_FLAG_DCB_ENABLED;
4844 dev_dbg(&pf->pdev->dev,
4845 "DCBX offload is supported for this PF.\n");
4848 dev_info(&pf->pdev->dev,
4849 "Query for DCB configuration failed, err %s aq_err %s\n",
4850 i40e_stat_str(&pf->hw, err),
4851 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4857 #endif /* CONFIG_I40E_DCB */
4858 #define SPEED_SIZE 14
4861 * i40e_print_link_message - print link up or down
4862 * @vsi: the VSI for which link needs a message
4864 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4866 char speed[SPEED_SIZE] = "Unknown";
4867 char fc[FC_SIZE] = "RX/TX";
4870 netdev_info(vsi->netdev, "NIC Link is Down\n");
4874 /* Warn user if link speed on NPAR enabled partition is not at
4877 if (vsi->back->hw.func_caps.npar_enable &&
4878 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4879 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4880 netdev_warn(vsi->netdev,
4881 "The partition detected link speed that is less than 10Gbps\n");
4883 switch (vsi->back->hw.phy.link_info.link_speed) {
4884 case I40E_LINK_SPEED_40GB:
4885 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4887 case I40E_LINK_SPEED_20GB:
4888 strncpy(speed, "20 Gbps", SPEED_SIZE);
4890 case I40E_LINK_SPEED_10GB:
4891 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4893 case I40E_LINK_SPEED_1GB:
4894 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4896 case I40E_LINK_SPEED_100MB:
4897 strncpy(speed, "100 Mbps", SPEED_SIZE);
4903 switch (vsi->back->hw.fc.current_mode) {
4905 strlcpy(fc, "RX/TX", FC_SIZE);
4907 case I40E_FC_TX_PAUSE:
4908 strlcpy(fc, "TX", FC_SIZE);
4910 case I40E_FC_RX_PAUSE:
4911 strlcpy(fc, "RX", FC_SIZE);
4914 strlcpy(fc, "None", FC_SIZE);
4918 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4923 * i40e_up_complete - Finish the last steps of bringing up a connection
4924 * @vsi: the VSI being configured
4926 static int i40e_up_complete(struct i40e_vsi *vsi)
4928 struct i40e_pf *pf = vsi->back;
4931 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4932 i40e_vsi_configure_msix(vsi);
4934 i40e_configure_msi_and_legacy(vsi);
4937 err = i40e_vsi_control_rings(vsi, true);
4941 clear_bit(__I40E_DOWN, &vsi->state);
4942 i40e_napi_enable_all(vsi);
4943 i40e_vsi_enable_irq(vsi);
4945 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4947 i40e_print_link_message(vsi, true);
4948 netif_tx_start_all_queues(vsi->netdev);
4949 netif_carrier_on(vsi->netdev);
4950 } else if (vsi->netdev) {
4951 i40e_print_link_message(vsi, false);
4952 /* need to check for qualified module here*/
4953 if ((pf->hw.phy.link_info.link_info &
4954 I40E_AQ_MEDIA_AVAILABLE) &&
4955 (!(pf->hw.phy.link_info.an_info &
4956 I40E_AQ_QUALIFIED_MODULE)))
4957 netdev_err(vsi->netdev,
4958 "the driver failed to link because an unqualified module was detected.");
4961 /* replay FDIR SB filters */
4962 if (vsi->type == I40E_VSI_FDIR) {
4963 /* reset fd counters */
4964 pf->fd_add_err = pf->fd_atr_cnt = 0;
4965 if (pf->fd_tcp_rule > 0) {
4966 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4967 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4968 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4969 pf->fd_tcp_rule = 0;
4971 i40e_fdir_filter_restore(vsi);
4973 i40e_service_event_schedule(pf);
4979 * i40e_vsi_reinit_locked - Reset the VSI
4980 * @vsi: the VSI being configured
4982 * Rebuild the ring structs after some configuration
4983 * has changed, e.g. MTU size.
4985 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4987 struct i40e_pf *pf = vsi->back;
4989 WARN_ON(in_interrupt());
4990 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4991 usleep_range(1000, 2000);
4994 /* Give a VF some time to respond to the reset. The
4995 * two second wait is based upon the watchdog cycle in
4998 if (vsi->type == I40E_VSI_SRIOV)
5001 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5005 * i40e_up - Bring the connection back up after being down
5006 * @vsi: the VSI being configured
5008 int i40e_up(struct i40e_vsi *vsi)
5012 err = i40e_vsi_configure(vsi);
5014 err = i40e_up_complete(vsi);
5020 * i40e_down - Shutdown the connection processing
5021 * @vsi: the VSI being stopped
5023 void i40e_down(struct i40e_vsi *vsi)
5027 /* It is assumed that the caller of this function
5028 * sets the vsi->state __I40E_DOWN bit.
5031 netif_carrier_off(vsi->netdev);
5032 netif_tx_disable(vsi->netdev);
5034 i40e_vsi_disable_irq(vsi);
5035 i40e_vsi_control_rings(vsi, false);
5036 i40e_napi_disable_all(vsi);
5038 for (i = 0; i < vsi->num_queue_pairs; i++) {
5039 i40e_clean_tx_ring(vsi->tx_rings[i]);
5040 i40e_clean_rx_ring(vsi->rx_rings[i]);
5045 * i40e_setup_tc - configure multiple traffic classes
5046 * @netdev: net device to configure
5047 * @tc: number of traffic classes to enable
5050 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5052 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5055 struct i40e_netdev_priv *np = netdev_priv(netdev);
5056 struct i40e_vsi *vsi = np->vsi;
5057 struct i40e_pf *pf = vsi->back;
5062 /* Check if DCB enabled to continue */
5063 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5064 netdev_info(netdev, "DCB is not enabled for adapter\n");
5068 /* Check if MFP enabled */
5069 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5070 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5074 /* Check whether tc count is within enabled limit */
5075 if (tc > i40e_pf_get_num_tc(pf)) {
5076 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5080 /* Generate TC map for number of tc requested */
5081 for (i = 0; i < tc; i++)
5082 enabled_tc |= BIT_ULL(i);
5084 /* Requesting same TC configuration as already enabled */
5085 if (enabled_tc == vsi->tc_config.enabled_tc)
5088 /* Quiesce VSI queues */
5089 i40e_quiesce_vsi(vsi);
5091 /* Configure VSI for enabled TCs */
5092 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5094 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5100 i40e_unquiesce_vsi(vsi);
5107 * i40e_open - Called when a network interface is made active
5108 * @netdev: network interface device structure
5110 * The open entry point is called when a network interface is made
5111 * active by the system (IFF_UP). At this point all resources needed
5112 * for transmit and receive operations are allocated, the interrupt
5113 * handler is registered with the OS, the netdev watchdog subtask is
5114 * enabled, and the stack is notified that the interface is ready.
5116 * Returns 0 on success, negative value on failure
5118 int i40e_open(struct net_device *netdev)
5120 struct i40e_netdev_priv *np = netdev_priv(netdev);
5121 struct i40e_vsi *vsi = np->vsi;
5122 struct i40e_pf *pf = vsi->back;
5125 /* disallow open during test or if eeprom is broken */
5126 if (test_bit(__I40E_TESTING, &pf->state) ||
5127 test_bit(__I40E_BAD_EEPROM, &pf->state))
5130 netif_carrier_off(netdev);
5132 err = i40e_vsi_open(vsi);
5136 /* configure global TSO hardware offload settings */
5137 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5138 TCP_FLAG_FIN) >> 16);
5139 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5141 TCP_FLAG_CWR) >> 16);
5142 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5144 #ifdef CONFIG_I40E_VXLAN
5145 vxlan_get_rx_port(netdev);
5153 * @vsi: the VSI to open
5155 * Finish initialization of the VSI.
5157 * Returns 0 on success, negative value on failure
5159 int i40e_vsi_open(struct i40e_vsi *vsi)
5161 struct i40e_pf *pf = vsi->back;
5162 char int_name[I40E_INT_NAME_STR_LEN];
5165 /* allocate descriptors */
5166 err = i40e_vsi_setup_tx_resources(vsi);
5169 err = i40e_vsi_setup_rx_resources(vsi);
5173 err = i40e_vsi_configure(vsi);
5178 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5179 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5180 err = i40e_vsi_request_irq(vsi, int_name);
5184 /* Notify the stack of the actual queue counts. */
5185 err = netif_set_real_num_tx_queues(vsi->netdev,
5186 vsi->num_queue_pairs);
5188 goto err_set_queues;
5190 err = netif_set_real_num_rx_queues(vsi->netdev,
5191 vsi->num_queue_pairs);
5193 goto err_set_queues;
5195 } else if (vsi->type == I40E_VSI_FDIR) {
5196 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5197 dev_driver_string(&pf->pdev->dev),
5198 dev_name(&pf->pdev->dev));
5199 err = i40e_vsi_request_irq(vsi, int_name);
5206 err = i40e_up_complete(vsi);
5208 goto err_up_complete;
5215 i40e_vsi_free_irq(vsi);
5217 i40e_vsi_free_rx_resources(vsi);
5219 i40e_vsi_free_tx_resources(vsi);
5220 if (vsi == pf->vsi[pf->lan_vsi])
5221 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5227 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5228 * @pf: Pointer to PF
5230 * This function destroys the hlist where all the Flow Director
5231 * filters were saved.
5233 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5235 struct i40e_fdir_filter *filter;
5236 struct hlist_node *node2;
5238 hlist_for_each_entry_safe(filter, node2,
5239 &pf->fdir_filter_list, fdir_node) {
5240 hlist_del(&filter->fdir_node);
5243 pf->fdir_pf_active_filters = 0;
5247 * i40e_close - Disables a network interface
5248 * @netdev: network interface device structure
5250 * The close entry point is called when an interface is de-activated
5251 * by the OS. The hardware is still under the driver's control, but
5252 * this netdev interface is disabled.
5254 * Returns 0, this is not allowed to fail
5257 int i40e_close(struct net_device *netdev)
5259 static int i40e_close(struct net_device *netdev)
5262 struct i40e_netdev_priv *np = netdev_priv(netdev);
5263 struct i40e_vsi *vsi = np->vsi;
5265 i40e_vsi_close(vsi);
5271 * i40e_do_reset - Start a PF or Core Reset sequence
5272 * @pf: board private structure
5273 * @reset_flags: which reset is requested
5275 * The essential difference in resets is that the PF Reset
5276 * doesn't clear the packet buffers, doesn't reset the PE
5277 * firmware, and doesn't bother the other PFs on the chip.
5279 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5283 WARN_ON(in_interrupt());
5285 if (i40e_check_asq_alive(&pf->hw))
5286 i40e_vc_notify_reset(pf);
5288 /* do the biggest reset indicated */
5289 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5291 /* Request a Global Reset
5293 * This will start the chip's countdown to the actual full
5294 * chip reset event, and a warning interrupt to be sent
5295 * to all PFs, including the requestor. Our handler
5296 * for the warning interrupt will deal with the shutdown
5297 * and recovery of the switch setup.
5299 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5300 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5301 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5302 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5304 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5306 /* Request a Core Reset
5308 * Same as Global Reset, except does *not* include the MAC/PHY
5310 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5311 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5312 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5313 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5314 i40e_flush(&pf->hw);
5316 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5318 /* Request a PF Reset
5320 * Resets only the PF-specific registers
5322 * This goes directly to the tear-down and rebuild of
5323 * the switch, since we need to do all the recovery as
5324 * for the Core Reset.
5326 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5327 i40e_handle_reset_warning(pf);
5329 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5332 /* Find the VSI(s) that requested a re-init */
5333 dev_info(&pf->pdev->dev,
5334 "VSI reinit requested\n");
5335 for (v = 0; v < pf->num_alloc_vsi; v++) {
5336 struct i40e_vsi *vsi = pf->vsi[v];
5338 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5339 i40e_vsi_reinit_locked(pf->vsi[v]);
5340 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5344 /* no further action needed, so return now */
5346 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5349 /* Find the VSI(s) that needs to be brought down */
5350 dev_info(&pf->pdev->dev, "VSI down requested\n");
5351 for (v = 0; v < pf->num_alloc_vsi; v++) {
5352 struct i40e_vsi *vsi = pf->vsi[v];
5354 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5355 set_bit(__I40E_DOWN, &vsi->state);
5357 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5361 /* no further action needed, so return now */
5364 dev_info(&pf->pdev->dev,
5365 "bad reset request 0x%08x\n", reset_flags);
5370 #ifdef CONFIG_I40E_DCB
5372 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5373 * @pf: board private structure
5374 * @old_cfg: current DCB config
5375 * @new_cfg: new DCB config
5377 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5378 struct i40e_dcbx_config *old_cfg,
5379 struct i40e_dcbx_config *new_cfg)
5381 bool need_reconfig = false;
5383 /* Check if ETS configuration has changed */
5384 if (memcmp(&new_cfg->etscfg,
5386 sizeof(new_cfg->etscfg))) {
5387 /* If Priority Table has changed reconfig is needed */
5388 if (memcmp(&new_cfg->etscfg.prioritytable,
5389 &old_cfg->etscfg.prioritytable,
5390 sizeof(new_cfg->etscfg.prioritytable))) {
5391 need_reconfig = true;
5392 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5395 if (memcmp(&new_cfg->etscfg.tcbwtable,
5396 &old_cfg->etscfg.tcbwtable,
5397 sizeof(new_cfg->etscfg.tcbwtable)))
5398 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5400 if (memcmp(&new_cfg->etscfg.tsatable,
5401 &old_cfg->etscfg.tsatable,
5402 sizeof(new_cfg->etscfg.tsatable)))
5403 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5406 /* Check if PFC configuration has changed */
5407 if (memcmp(&new_cfg->pfc,
5409 sizeof(new_cfg->pfc))) {
5410 need_reconfig = true;
5411 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5414 /* Check if APP Table has changed */
5415 if (memcmp(&new_cfg->app,
5417 sizeof(new_cfg->app))) {
5418 need_reconfig = true;
5419 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5422 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5423 return need_reconfig;
5427 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5428 * @pf: board private structure
5429 * @e: event info posted on ARQ
5431 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5432 struct i40e_arq_event_info *e)
5434 struct i40e_aqc_lldp_get_mib *mib =
5435 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5436 struct i40e_hw *hw = &pf->hw;
5437 struct i40e_dcbx_config tmp_dcbx_cfg;
5438 bool need_reconfig = false;
5442 /* Not DCB capable or capability disabled */
5443 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5446 /* Ignore if event is not for Nearest Bridge */
5447 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5448 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5449 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5450 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5453 /* Check MIB Type and return if event for Remote MIB update */
5454 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5455 dev_dbg(&pf->pdev->dev,
5456 "LLDP event mib type %s\n", type ? "remote" : "local");
5457 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5458 /* Update the remote cached instance and return */
5459 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5460 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5461 &hw->remote_dcbx_config);
5465 /* Store the old configuration */
5466 tmp_dcbx_cfg = hw->local_dcbx_config;
5468 /* Reset the old DCBx configuration data */
5469 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5470 /* Get updated DCBX data from firmware */
5471 ret = i40e_get_dcb_config(&pf->hw);
5473 dev_info(&pf->pdev->dev,
5474 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5475 i40e_stat_str(&pf->hw, ret),
5476 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5480 /* No change detected in DCBX configs */
5481 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5482 sizeof(tmp_dcbx_cfg))) {
5483 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5487 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5488 &hw->local_dcbx_config);
5490 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5495 /* Enable DCB tagging only when more than one TC */
5496 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5497 pf->flags |= I40E_FLAG_DCB_ENABLED;
5499 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5501 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5502 /* Reconfiguration needed quiesce all VSIs */
5503 i40e_pf_quiesce_all_vsi(pf);
5505 /* Changes in configuration update VEB/VSI */
5506 i40e_dcb_reconfigure(pf);
5508 ret = i40e_resume_port_tx(pf);
5510 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5511 /* In case of error no point in resuming VSIs */
5515 /* Wait for the PF's Tx queues to be disabled */
5516 ret = i40e_pf_wait_txq_disabled(pf);
5518 /* Schedule PF reset to recover */
5519 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5520 i40e_service_event_schedule(pf);
5522 i40e_pf_unquiesce_all_vsi(pf);
5528 #endif /* CONFIG_I40E_DCB */
5531 * i40e_do_reset_safe - Protected reset path for userland calls.
5532 * @pf: board private structure
5533 * @reset_flags: which reset is requested
5536 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5539 i40e_do_reset(pf, reset_flags);
5544 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5545 * @pf: board private structure
5546 * @e: event info posted on ARQ
5548 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5551 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5552 struct i40e_arq_event_info *e)
5554 struct i40e_aqc_lan_overflow *data =
5555 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5556 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5557 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5558 struct i40e_hw *hw = &pf->hw;
5562 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5565 /* Queue belongs to VF, find the VF and issue VF reset */
5566 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5567 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5568 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5569 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5570 vf_id -= hw->func_caps.vf_base_id;
5571 vf = &pf->vf[vf_id];
5572 i40e_vc_notify_vf_reset(vf);
5573 /* Allow VF to process pending reset notification */
5575 i40e_reset_vf(vf, false);
5580 * i40e_service_event_complete - Finish up the service event
5581 * @pf: board private structure
5583 static void i40e_service_event_complete(struct i40e_pf *pf)
5585 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5587 /* flush memory to make sure state is correct before next watchog */
5588 smp_mb__before_atomic();
5589 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5593 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5594 * @pf: board private structure
5596 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5600 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5601 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5606 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5607 * @pf: board private structure
5609 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5613 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5614 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5615 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5616 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5621 * i40e_get_global_fd_count - Get total FD filters programmed on device
5622 * @pf: board private structure
5624 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5628 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5629 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5630 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5631 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5636 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5637 * @pf: board private structure
5639 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5641 u32 fcnt_prog, fcnt_avail;
5643 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5646 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5649 fcnt_prog = i40e_get_global_fd_count(pf);
5650 fcnt_avail = pf->fdir_pf_filter_count;
5651 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5652 (pf->fd_add_err == 0) ||
5653 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5654 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5655 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5656 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5657 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5658 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5661 /* Wait for some more space to be available to turn on ATR */
5662 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5663 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5664 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5665 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5666 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5667 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5672 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5673 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5675 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5676 * @pf: board private structure
5678 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5680 unsigned long min_flush_time;
5681 int flush_wait_retry = 50;
5682 bool disable_atr = false;
5686 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5689 if (time_after(jiffies, pf->fd_flush_timestamp +
5690 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5691 /* If the flush is happening too quick and we have mostly
5692 * SB rules we should not re-enable ATR for some time.
5694 min_flush_time = pf->fd_flush_timestamp
5695 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5696 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5698 if (!(time_after(jiffies, min_flush_time)) &&
5699 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5700 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5701 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5705 pf->fd_flush_timestamp = jiffies;
5706 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5707 /* flush all filters */
5708 wr32(&pf->hw, I40E_PFQF_CTL_1,
5709 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5710 i40e_flush(&pf->hw);
5714 /* Check FD flush status every 5-6msec */
5715 usleep_range(5000, 6000);
5716 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5717 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5719 } while (flush_wait_retry--);
5720 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5721 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5723 /* replay sideband filters */
5724 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5726 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5727 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5728 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5729 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5735 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5736 * @pf: board private structure
5738 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5740 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5743 /* We can see up to 256 filter programming desc in transit if the filters are
5744 * being applied really fast; before we see the first
5745 * filter miss error on Rx queue 0. Accumulating enough error messages before
5746 * reacting will make sure we don't cause flush too often.
5748 #define I40E_MAX_FD_PROGRAM_ERROR 256
5751 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5752 * @pf: board private structure
5754 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5757 /* if interface is down do nothing */
5758 if (test_bit(__I40E_DOWN, &pf->state))
5761 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5764 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5765 i40e_fdir_flush_and_replay(pf);
5767 i40e_fdir_check_and_reenable(pf);
5772 * i40e_vsi_link_event - notify VSI of a link event
5773 * @vsi: vsi to be notified
5774 * @link_up: link up or down
5776 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5778 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5781 switch (vsi->type) {
5786 if (!vsi->netdev || !vsi->netdev_registered)
5790 netif_carrier_on(vsi->netdev);
5791 netif_tx_wake_all_queues(vsi->netdev);
5793 netif_carrier_off(vsi->netdev);
5794 netif_tx_stop_all_queues(vsi->netdev);
5798 case I40E_VSI_SRIOV:
5799 case I40E_VSI_VMDQ2:
5801 case I40E_VSI_MIRROR:
5803 /* there is no notification for other VSIs */
5809 * i40e_veb_link_event - notify elements on the veb of a link event
5810 * @veb: veb to be notified
5811 * @link_up: link up or down
5813 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5818 if (!veb || !veb->pf)
5822 /* depth first... */
5823 for (i = 0; i < I40E_MAX_VEB; i++)
5824 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5825 i40e_veb_link_event(pf->veb[i], link_up);
5827 /* ... now the local VSIs */
5828 for (i = 0; i < pf->num_alloc_vsi; i++)
5829 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5830 i40e_vsi_link_event(pf->vsi[i], link_up);
5834 * i40e_link_event - Update netif_carrier status
5835 * @pf: board private structure
5837 static void i40e_link_event(struct i40e_pf *pf)
5839 bool new_link, old_link;
5840 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5841 u8 new_link_speed, old_link_speed;
5843 /* set this to force the get_link_status call to refresh state */
5844 pf->hw.phy.get_link_info = true;
5846 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5847 new_link = i40e_get_link_status(&pf->hw);
5848 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5849 new_link_speed = pf->hw.phy.link_info.link_speed;
5851 if (new_link == old_link &&
5852 new_link_speed == old_link_speed &&
5853 (test_bit(__I40E_DOWN, &vsi->state) ||
5854 new_link == netif_carrier_ok(vsi->netdev)))
5857 if (!test_bit(__I40E_DOWN, &vsi->state))
5858 i40e_print_link_message(vsi, new_link);
5860 /* Notify the base of the switch tree connected to
5861 * the link. Floating VEBs are not notified.
5863 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5864 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5866 i40e_vsi_link_event(vsi, new_link);
5869 i40e_vc_notify_link_state(pf);
5871 if (pf->flags & I40E_FLAG_PTP)
5872 i40e_ptp_set_increment(pf);
5876 * i40e_watchdog_subtask - periodic checks not using event driven response
5877 * @pf: board private structure
5879 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5883 /* if interface is down do nothing */
5884 if (test_bit(__I40E_DOWN, &pf->state) ||
5885 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5888 /* make sure we don't do these things too often */
5889 if (time_before(jiffies, (pf->service_timer_previous +
5890 pf->service_timer_period)))
5892 pf->service_timer_previous = jiffies;
5894 i40e_link_event(pf);
5896 /* Update the stats for active netdevs so the network stack
5897 * can look at updated numbers whenever it cares to
5899 for (i = 0; i < pf->num_alloc_vsi; i++)
5900 if (pf->vsi[i] && pf->vsi[i]->netdev)
5901 i40e_update_stats(pf->vsi[i]);
5903 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5904 /* Update the stats for the active switching components */
5905 for (i = 0; i < I40E_MAX_VEB; i++)
5907 i40e_update_veb_stats(pf->veb[i]);
5910 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5914 * i40e_reset_subtask - Set up for resetting the device and driver
5915 * @pf: board private structure
5917 static void i40e_reset_subtask(struct i40e_pf *pf)
5919 u32 reset_flags = 0;
5922 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5923 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5924 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5926 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5927 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5928 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5930 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5931 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5932 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5934 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5935 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5936 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5938 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5939 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5940 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5943 /* If there's a recovery already waiting, it takes
5944 * precedence before starting a new reset sequence.
5946 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5947 i40e_handle_reset_warning(pf);
5951 /* If we're already down or resetting, just bail */
5953 !test_bit(__I40E_DOWN, &pf->state) &&
5954 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5955 i40e_do_reset(pf, reset_flags);
5962 * i40e_handle_link_event - Handle link event
5963 * @pf: board private structure
5964 * @e: event info posted on ARQ
5966 static void i40e_handle_link_event(struct i40e_pf *pf,
5967 struct i40e_arq_event_info *e)
5969 struct i40e_hw *hw = &pf->hw;
5970 struct i40e_aqc_get_link_status *status =
5971 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5973 /* save off old link status information */
5974 hw->phy.link_info_old = hw->phy.link_info;
5976 /* Do a new status request to re-enable LSE reporting
5977 * and load new status information into the hw struct
5978 * This completely ignores any state information
5979 * in the ARQ event info, instead choosing to always
5980 * issue the AQ update link status command.
5982 i40e_link_event(pf);
5984 /* check for unqualified module, if link is down */
5985 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5986 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5987 (!(status->link_info & I40E_AQ_LINK_UP)))
5988 dev_err(&pf->pdev->dev,
5989 "The driver failed to link because an unqualified module was detected.\n");
5993 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5994 * @pf: board private structure
5996 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5998 struct i40e_arq_event_info event;
5999 struct i40e_hw *hw = &pf->hw;
6006 /* Do not run clean AQ when PF reset fails */
6007 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6010 /* check for error indications */
6011 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6013 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6014 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6015 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6017 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6018 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6019 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6021 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6022 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6023 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6026 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6028 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6030 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6031 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6032 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6034 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6035 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6036 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6038 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6039 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6040 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6043 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6045 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6046 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6051 ret = i40e_clean_arq_element(hw, &event, &pending);
6052 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6055 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6059 opcode = le16_to_cpu(event.desc.opcode);
6062 case i40e_aqc_opc_get_link_status:
6063 i40e_handle_link_event(pf, &event);
6065 case i40e_aqc_opc_send_msg_to_pf:
6066 ret = i40e_vc_process_vf_msg(pf,
6067 le16_to_cpu(event.desc.retval),
6068 le32_to_cpu(event.desc.cookie_high),
6069 le32_to_cpu(event.desc.cookie_low),
6073 case i40e_aqc_opc_lldp_update_mib:
6074 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6075 #ifdef CONFIG_I40E_DCB
6077 ret = i40e_handle_lldp_event(pf, &event);
6079 #endif /* CONFIG_I40E_DCB */
6081 case i40e_aqc_opc_event_lan_overflow:
6082 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6083 i40e_handle_lan_overflow_event(pf, &event);
6085 case i40e_aqc_opc_send_msg_to_peer:
6086 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6088 case i40e_aqc_opc_nvm_erase:
6089 case i40e_aqc_opc_nvm_update:
6090 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6093 dev_info(&pf->pdev->dev,
6094 "ARQ Error: Unknown event 0x%04x received\n",
6098 } while (pending && (i++ < pf->adminq_work_limit));
6100 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6101 /* re-enable Admin queue interrupt cause */
6102 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6103 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6104 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6107 kfree(event.msg_buf);
6111 * i40e_verify_eeprom - make sure eeprom is good to use
6112 * @pf: board private structure
6114 static void i40e_verify_eeprom(struct i40e_pf *pf)
6118 err = i40e_diag_eeprom_test(&pf->hw);
6120 /* retry in case of garbage read */
6121 err = i40e_diag_eeprom_test(&pf->hw);
6123 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6125 set_bit(__I40E_BAD_EEPROM, &pf->state);
6129 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6130 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6131 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6136 * i40e_enable_pf_switch_lb
6137 * @pf: pointer to the PF structure
6139 * enable switch loop back or die - no point in a return value
6141 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6143 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6144 struct i40e_vsi_context ctxt;
6147 ctxt.seid = pf->main_vsi_seid;
6148 ctxt.pf_num = pf->hw.pf_id;
6150 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6152 dev_info(&pf->pdev->dev,
6153 "couldn't get PF vsi config, err %s aq_err %s\n",
6154 i40e_stat_str(&pf->hw, ret),
6155 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6158 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6159 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6160 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6162 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6164 dev_info(&pf->pdev->dev,
6165 "update vsi switch failed, err %s aq_err %s\n",
6166 i40e_stat_str(&pf->hw, ret),
6167 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6172 * i40e_disable_pf_switch_lb
6173 * @pf: pointer to the PF structure
6175 * disable switch loop back or die - no point in a return value
6177 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6179 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6180 struct i40e_vsi_context ctxt;
6183 ctxt.seid = pf->main_vsi_seid;
6184 ctxt.pf_num = pf->hw.pf_id;
6186 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6188 dev_info(&pf->pdev->dev,
6189 "couldn't get PF vsi config, err %s aq_err %s\n",
6190 i40e_stat_str(&pf->hw, ret),
6191 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6194 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6195 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6196 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6198 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6200 dev_info(&pf->pdev->dev,
6201 "update vsi switch failed, err %s aq_err %s\n",
6202 i40e_stat_str(&pf->hw, ret),
6203 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6208 * i40e_config_bridge_mode - Configure the HW bridge mode
6209 * @veb: pointer to the bridge instance
6211 * Configure the loop back mode for the LAN VSI that is downlink to the
6212 * specified HW bridge instance. It is expected this function is called
6213 * when a new HW bridge is instantiated.
6215 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6217 struct i40e_pf *pf = veb->pf;
6219 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6220 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6221 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6222 i40e_disable_pf_switch_lb(pf);
6224 i40e_enable_pf_switch_lb(pf);
6228 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6229 * @veb: pointer to the VEB instance
6231 * This is a recursive function that first builds the attached VSIs then
6232 * recurses in to build the next layer of VEB. We track the connections
6233 * through our own index numbers because the seid's from the HW could
6234 * change across the reset.
6236 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6238 struct i40e_vsi *ctl_vsi = NULL;
6239 struct i40e_pf *pf = veb->pf;
6243 /* build VSI that owns this VEB, temporarily attached to base VEB */
6244 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6246 pf->vsi[v]->veb_idx == veb->idx &&
6247 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6248 ctl_vsi = pf->vsi[v];
6253 dev_info(&pf->pdev->dev,
6254 "missing owner VSI for veb_idx %d\n", veb->idx);
6256 goto end_reconstitute;
6258 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6259 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6260 ret = i40e_add_vsi(ctl_vsi);
6262 dev_info(&pf->pdev->dev,
6263 "rebuild of veb_idx %d owner VSI failed: %d\n",
6265 goto end_reconstitute;
6267 i40e_vsi_reset_stats(ctl_vsi);
6269 /* create the VEB in the switch and move the VSI onto the VEB */
6270 ret = i40e_add_veb(veb, ctl_vsi);
6272 goto end_reconstitute;
6274 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6275 veb->bridge_mode = BRIDGE_MODE_VEB;
6277 veb->bridge_mode = BRIDGE_MODE_VEPA;
6278 i40e_config_bridge_mode(veb);
6280 /* create the remaining VSIs attached to this VEB */
6281 for (v = 0; v < pf->num_alloc_vsi; v++) {
6282 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6285 if (pf->vsi[v]->veb_idx == veb->idx) {
6286 struct i40e_vsi *vsi = pf->vsi[v];
6287 vsi->uplink_seid = veb->seid;
6288 ret = i40e_add_vsi(vsi);
6290 dev_info(&pf->pdev->dev,
6291 "rebuild of vsi_idx %d failed: %d\n",
6293 goto end_reconstitute;
6295 i40e_vsi_reset_stats(vsi);
6299 /* create any VEBs attached to this VEB - RECURSION */
6300 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6301 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6302 pf->veb[veb_idx]->uplink_seid = veb->seid;
6303 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6314 * i40e_get_capabilities - get info about the HW
6315 * @pf: the PF struct
6317 static int i40e_get_capabilities(struct i40e_pf *pf)
6319 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6324 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6326 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6330 /* this loads the data into the hw struct for us */
6331 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6333 i40e_aqc_opc_list_func_capabilities,
6335 /* data loaded, buffer no longer needed */
6338 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6339 /* retry with a larger buffer */
6340 buf_len = data_size;
6341 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6342 dev_info(&pf->pdev->dev,
6343 "capability discovery failed, err %s aq_err %s\n",
6344 i40e_stat_str(&pf->hw, err),
6345 i40e_aq_str(&pf->hw,
6346 pf->hw.aq.asq_last_status));
6351 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6352 (pf->hw.aq.fw_maj_ver < 2)) {
6353 pf->hw.func_caps.num_msix_vectors++;
6354 pf->hw.func_caps.num_msix_vectors_vf++;
6357 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6358 dev_info(&pf->pdev->dev,
6359 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6360 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6361 pf->hw.func_caps.num_msix_vectors,
6362 pf->hw.func_caps.num_msix_vectors_vf,
6363 pf->hw.func_caps.fd_filters_guaranteed,
6364 pf->hw.func_caps.fd_filters_best_effort,
6365 pf->hw.func_caps.num_tx_qp,
6366 pf->hw.func_caps.num_vsis);
6368 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6369 + pf->hw.func_caps.num_vfs)
6370 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6371 dev_info(&pf->pdev->dev,
6372 "got num_vsis %d, setting num_vsis to %d\n",
6373 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6374 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6380 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6383 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6384 * @pf: board private structure
6386 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6388 struct i40e_vsi *vsi;
6391 /* quick workaround for an NVM issue that leaves a critical register
6394 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6395 static const u32 hkey[] = {
6396 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6397 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6398 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6401 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6402 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6405 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6408 /* find existing VSI and see if it needs configuring */
6410 for (i = 0; i < pf->num_alloc_vsi; i++) {
6411 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6417 /* create a new VSI if none exists */
6419 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6420 pf->vsi[pf->lan_vsi]->seid, 0);
6422 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6423 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6428 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6432 * i40e_fdir_teardown - release the Flow Director resources
6433 * @pf: board private structure
6435 static void i40e_fdir_teardown(struct i40e_pf *pf)
6439 i40e_fdir_filter_exit(pf);
6440 for (i = 0; i < pf->num_alloc_vsi; i++) {
6441 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6442 i40e_vsi_release(pf->vsi[i]);
6449 * i40e_prep_for_reset - prep for the core to reset
6450 * @pf: board private structure
6452 * Close up the VFs and other things in prep for PF Reset.
6454 static void i40e_prep_for_reset(struct i40e_pf *pf)
6456 struct i40e_hw *hw = &pf->hw;
6457 i40e_status ret = 0;
6460 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6461 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6464 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6466 /* quiesce the VSIs and their queues that are not already DOWN */
6467 i40e_pf_quiesce_all_vsi(pf);
6469 for (v = 0; v < pf->num_alloc_vsi; v++) {
6471 pf->vsi[v]->seid = 0;
6474 i40e_shutdown_adminq(&pf->hw);
6476 /* call shutdown HMC */
6477 if (hw->hmc.hmc_obj) {
6478 ret = i40e_shutdown_lan_hmc(hw);
6480 dev_warn(&pf->pdev->dev,
6481 "shutdown_lan_hmc failed: %d\n", ret);
6486 * i40e_send_version - update firmware with driver version
6489 static void i40e_send_version(struct i40e_pf *pf)
6491 struct i40e_driver_version dv;
6493 dv.major_version = DRV_VERSION_MAJOR;
6494 dv.minor_version = DRV_VERSION_MINOR;
6495 dv.build_version = DRV_VERSION_BUILD;
6496 dv.subbuild_version = 0;
6497 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6498 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6502 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6503 * @pf: board private structure
6504 * @reinit: if the Main VSI needs to re-initialized.
6506 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6508 struct i40e_hw *hw = &pf->hw;
6509 u8 set_fc_aq_fail = 0;
6513 /* Now we wait for GRST to settle out.
6514 * We don't have to delete the VEBs or VSIs from the hw switch
6515 * because the reset will make them disappear.
6517 ret = i40e_pf_reset(hw);
6519 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6520 set_bit(__I40E_RESET_FAILED, &pf->state);
6521 goto clear_recovery;
6525 if (test_bit(__I40E_DOWN, &pf->state))
6526 goto clear_recovery;
6527 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6529 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6530 ret = i40e_init_adminq(&pf->hw);
6532 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6533 i40e_stat_str(&pf->hw, ret),
6534 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6535 goto clear_recovery;
6538 /* re-verify the eeprom if we just had an EMP reset */
6539 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6540 i40e_verify_eeprom(pf);
6542 i40e_clear_pxe_mode(hw);
6543 ret = i40e_get_capabilities(pf);
6545 goto end_core_reset;
6547 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6548 hw->func_caps.num_rx_qp,
6549 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6551 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6552 goto end_core_reset;
6554 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6556 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6557 goto end_core_reset;
6560 #ifdef CONFIG_I40E_DCB
6561 ret = i40e_init_pf_dcb(pf);
6563 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6564 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6565 /* Continue without DCB enabled */
6567 #endif /* CONFIG_I40E_DCB */
6569 i40e_init_pf_fcoe(pf);
6572 /* do basic switch setup */
6573 ret = i40e_setup_pf_switch(pf, reinit);
6575 goto end_core_reset;
6577 /* driver is only interested in link up/down and module qualification
6578 * reports from firmware
6580 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6581 I40E_AQ_EVENT_LINK_UPDOWN |
6582 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6584 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6585 i40e_stat_str(&pf->hw, ret),
6586 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6588 /* make sure our flow control settings are restored */
6589 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6591 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6592 i40e_stat_str(&pf->hw, ret),
6593 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6595 /* Rebuild the VSIs and VEBs that existed before reset.
6596 * They are still in our local switch element arrays, so only
6597 * need to rebuild the switch model in the HW.
6599 * If there were VEBs but the reconstitution failed, we'll try
6600 * try to recover minimal use by getting the basic PF VSI working.
6602 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6603 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6604 /* find the one VEB connected to the MAC, and find orphans */
6605 for (v = 0; v < I40E_MAX_VEB; v++) {
6609 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6610 pf->veb[v]->uplink_seid == 0) {
6611 ret = i40e_reconstitute_veb(pf->veb[v]);
6616 /* If Main VEB failed, we're in deep doodoo,
6617 * so give up rebuilding the switch and set up
6618 * for minimal rebuild of PF VSI.
6619 * If orphan failed, we'll report the error
6620 * but try to keep going.
6622 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6623 dev_info(&pf->pdev->dev,
6624 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6626 pf->vsi[pf->lan_vsi]->uplink_seid
6629 } else if (pf->veb[v]->uplink_seid == 0) {
6630 dev_info(&pf->pdev->dev,
6631 "rebuild of orphan VEB failed: %d\n",
6638 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6639 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6640 /* no VEB, so rebuild only the Main VSI */
6641 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6643 dev_info(&pf->pdev->dev,
6644 "rebuild of Main VSI failed: %d\n", ret);
6645 goto end_core_reset;
6649 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6650 (pf->hw.aq.fw_maj_ver < 4)) {
6652 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6654 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6655 i40e_stat_str(&pf->hw, ret),
6656 i40e_aq_str(&pf->hw,
6657 pf->hw.aq.asq_last_status));
6659 /* reinit the misc interrupt */
6660 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6661 ret = i40e_setup_misc_vector(pf);
6663 /* restart the VSIs that were rebuilt and running before the reset */
6664 i40e_pf_unquiesce_all_vsi(pf);
6666 if (pf->num_alloc_vfs) {
6667 for (v = 0; v < pf->num_alloc_vfs; v++)
6668 i40e_reset_vf(&pf->vf[v], true);
6671 /* tell the firmware that we're starting */
6672 i40e_send_version(pf);
6675 clear_bit(__I40E_RESET_FAILED, &pf->state);
6677 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6681 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6682 * @pf: board private structure
6684 * Close up the VFs and other things in prep for a Core Reset,
6685 * then get ready to rebuild the world.
6687 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6689 i40e_prep_for_reset(pf);
6690 i40e_reset_and_rebuild(pf, false);
6694 * i40e_handle_mdd_event
6695 * @pf: pointer to the PF structure
6697 * Called from the MDD irq handler to identify possibly malicious vfs
6699 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6701 struct i40e_hw *hw = &pf->hw;
6702 bool mdd_detected = false;
6703 bool pf_mdd_detected = false;
6708 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6711 /* find what triggered the MDD event */
6712 reg = rd32(hw, I40E_GL_MDET_TX);
6713 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6714 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6715 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6716 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6717 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6718 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6719 I40E_GL_MDET_TX_EVENT_SHIFT;
6720 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6721 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6722 pf->hw.func_caps.base_queue;
6723 if (netif_msg_tx_err(pf))
6724 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6725 event, queue, pf_num, vf_num);
6726 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6727 mdd_detected = true;
6729 reg = rd32(hw, I40E_GL_MDET_RX);
6730 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6731 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6732 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6733 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6734 I40E_GL_MDET_RX_EVENT_SHIFT;
6735 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6736 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6737 pf->hw.func_caps.base_queue;
6738 if (netif_msg_rx_err(pf))
6739 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6740 event, queue, func);
6741 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6742 mdd_detected = true;
6746 reg = rd32(hw, I40E_PF_MDET_TX);
6747 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6748 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6749 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6750 pf_mdd_detected = true;
6752 reg = rd32(hw, I40E_PF_MDET_RX);
6753 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6754 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6755 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6756 pf_mdd_detected = true;
6758 /* Queue belongs to the PF, initiate a reset */
6759 if (pf_mdd_detected) {
6760 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6761 i40e_service_event_schedule(pf);
6765 /* see if one of the VFs needs its hand slapped */
6766 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6768 reg = rd32(hw, I40E_VP_MDET_TX(i));
6769 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6770 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6771 vf->num_mdd_events++;
6772 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6776 reg = rd32(hw, I40E_VP_MDET_RX(i));
6777 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6778 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6779 vf->num_mdd_events++;
6780 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6784 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6785 dev_info(&pf->pdev->dev,
6786 "Too many MDD events on VF %d, disabled\n", i);
6787 dev_info(&pf->pdev->dev,
6788 "Use PF Control I/F to re-enable the VF\n");
6789 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6793 /* re-enable mdd interrupt cause */
6794 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6795 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6796 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6797 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6801 #ifdef CONFIG_I40E_VXLAN
6803 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6804 * @pf: board private structure
6806 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6808 struct i40e_hw *hw = &pf->hw;
6813 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6816 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6818 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6819 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6820 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6821 port = pf->vxlan_ports[i];
6823 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6824 I40E_AQC_TUNNEL_TYPE_VXLAN,
6827 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6830 dev_info(&pf->pdev->dev,
6831 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6832 port ? "add" : "delete",
6834 i40e_stat_str(&pf->hw, ret),
6835 i40e_aq_str(&pf->hw,
6836 pf->hw.aq.asq_last_status));
6837 pf->vxlan_ports[i] = 0;
6845 * i40e_service_task - Run the driver's async subtasks
6846 * @work: pointer to work_struct containing our data
6848 static void i40e_service_task(struct work_struct *work)
6850 struct i40e_pf *pf = container_of(work,
6853 unsigned long start_time = jiffies;
6855 /* don't bother with service tasks if a reset is in progress */
6856 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6857 i40e_service_event_complete(pf);
6861 i40e_detect_recover_hung(pf);
6862 i40e_reset_subtask(pf);
6863 i40e_handle_mdd_event(pf);
6864 i40e_vc_process_vflr_event(pf);
6865 i40e_watchdog_subtask(pf);
6866 i40e_fdir_reinit_subtask(pf);
6867 i40e_sync_filters_subtask(pf);
6868 #ifdef CONFIG_I40E_VXLAN
6869 i40e_sync_vxlan_filters_subtask(pf);
6871 i40e_clean_adminq_subtask(pf);
6873 i40e_service_event_complete(pf);
6875 /* If the tasks have taken longer than one timer cycle or there
6876 * is more work to be done, reschedule the service task now
6877 * rather than wait for the timer to tick again.
6879 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6880 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6881 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6882 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6883 i40e_service_event_schedule(pf);
6887 * i40e_service_timer - timer callback
6888 * @data: pointer to PF struct
6890 static void i40e_service_timer(unsigned long data)
6892 struct i40e_pf *pf = (struct i40e_pf *)data;
6894 mod_timer(&pf->service_timer,
6895 round_jiffies(jiffies + pf->service_timer_period));
6896 i40e_service_event_schedule(pf);
6900 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6901 * @vsi: the VSI being configured
6903 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6905 struct i40e_pf *pf = vsi->back;
6907 switch (vsi->type) {
6909 vsi->alloc_queue_pairs = pf->num_lan_qps;
6910 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6911 I40E_REQ_DESCRIPTOR_MULTIPLE);
6912 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6913 vsi->num_q_vectors = pf->num_lan_msix;
6915 vsi->num_q_vectors = 1;
6920 vsi->alloc_queue_pairs = 1;
6921 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6922 I40E_REQ_DESCRIPTOR_MULTIPLE);
6923 vsi->num_q_vectors = 1;
6926 case I40E_VSI_VMDQ2:
6927 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6928 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6929 I40E_REQ_DESCRIPTOR_MULTIPLE);
6930 vsi->num_q_vectors = pf->num_vmdq_msix;
6933 case I40E_VSI_SRIOV:
6934 vsi->alloc_queue_pairs = pf->num_vf_qps;
6935 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6936 I40E_REQ_DESCRIPTOR_MULTIPLE);
6941 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6942 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6943 I40E_REQ_DESCRIPTOR_MULTIPLE);
6944 vsi->num_q_vectors = pf->num_fcoe_msix;
6947 #endif /* I40E_FCOE */
6957 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6958 * @type: VSI pointer
6959 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6961 * On error: returns error code (negative)
6962 * On success: returns 0
6964 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6969 /* allocate memory for both Tx and Rx ring pointers */
6970 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6971 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6974 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6976 if (alloc_qvectors) {
6977 /* allocate memory for q_vector pointers */
6978 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6979 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6980 if (!vsi->q_vectors) {
6988 kfree(vsi->tx_rings);
6993 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6994 * @pf: board private structure
6995 * @type: type of VSI
6997 * On error: returns error code (negative)
6998 * On success: returns vsi index in PF (positive)
7000 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7003 struct i40e_vsi *vsi;
7007 /* Need to protect the allocation of the VSIs at the PF level */
7008 mutex_lock(&pf->switch_mutex);
7010 /* VSI list may be fragmented if VSI creation/destruction has
7011 * been happening. We can afford to do a quick scan to look
7012 * for any free VSIs in the list.
7014 * find next empty vsi slot, looping back around if necessary
7017 while (i < pf->num_alloc_vsi && pf->vsi[i])
7019 if (i >= pf->num_alloc_vsi) {
7021 while (i < pf->next_vsi && pf->vsi[i])
7025 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7026 vsi_idx = i; /* Found one! */
7029 goto unlock_pf; /* out of VSI slots! */
7033 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7040 set_bit(__I40E_DOWN, &vsi->state);
7043 vsi->rx_itr_setting = pf->rx_itr_default;
7044 vsi->tx_itr_setting = pf->tx_itr_default;
7045 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7046 pf->rss_table_size : 64;
7047 vsi->netdev_registered = false;
7048 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7049 INIT_LIST_HEAD(&vsi->mac_filter_list);
7050 vsi->irqs_ready = false;
7052 ret = i40e_set_num_rings_in_vsi(vsi);
7056 ret = i40e_vsi_alloc_arrays(vsi, true);
7060 /* Setup default MSIX irq handler for VSI */
7061 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7063 pf->vsi[vsi_idx] = vsi;
7068 pf->next_vsi = i - 1;
7071 mutex_unlock(&pf->switch_mutex);
7076 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7077 * @type: VSI pointer
7078 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7080 * On error: returns error code (negative)
7081 * On success: returns 0
7083 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7085 /* free the ring and vector containers */
7086 if (free_qvectors) {
7087 kfree(vsi->q_vectors);
7088 vsi->q_vectors = NULL;
7090 kfree(vsi->tx_rings);
7091 vsi->tx_rings = NULL;
7092 vsi->rx_rings = NULL;
7096 * i40e_vsi_clear - Deallocate the VSI provided
7097 * @vsi: the VSI being un-configured
7099 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7110 mutex_lock(&pf->switch_mutex);
7111 if (!pf->vsi[vsi->idx]) {
7112 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7113 vsi->idx, vsi->idx, vsi, vsi->type);
7117 if (pf->vsi[vsi->idx] != vsi) {
7118 dev_err(&pf->pdev->dev,
7119 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7120 pf->vsi[vsi->idx]->idx,
7122 pf->vsi[vsi->idx]->type,
7123 vsi->idx, vsi, vsi->type);
7127 /* updates the PF for this cleared vsi */
7128 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7129 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7131 i40e_vsi_free_arrays(vsi, true);
7133 pf->vsi[vsi->idx] = NULL;
7134 if (vsi->idx < pf->next_vsi)
7135 pf->next_vsi = vsi->idx;
7138 mutex_unlock(&pf->switch_mutex);
7146 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7147 * @vsi: the VSI being cleaned
7149 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7153 if (vsi->tx_rings && vsi->tx_rings[0]) {
7154 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7155 kfree_rcu(vsi->tx_rings[i], rcu);
7156 vsi->tx_rings[i] = NULL;
7157 vsi->rx_rings[i] = NULL;
7163 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7164 * @vsi: the VSI being configured
7166 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7168 struct i40e_ring *tx_ring, *rx_ring;
7169 struct i40e_pf *pf = vsi->back;
7172 /* Set basic values in the rings to be used later during open() */
7173 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7174 /* allocate space for both Tx and Rx in one shot */
7175 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7179 tx_ring->queue_index = i;
7180 tx_ring->reg_idx = vsi->base_queue + i;
7181 tx_ring->ring_active = false;
7183 tx_ring->netdev = vsi->netdev;
7184 tx_ring->dev = &pf->pdev->dev;
7185 tx_ring->count = vsi->num_desc;
7187 tx_ring->dcb_tc = 0;
7188 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7189 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7190 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7191 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7192 vsi->tx_rings[i] = tx_ring;
7194 rx_ring = &tx_ring[1];
7195 rx_ring->queue_index = i;
7196 rx_ring->reg_idx = vsi->base_queue + i;
7197 rx_ring->ring_active = false;
7199 rx_ring->netdev = vsi->netdev;
7200 rx_ring->dev = &pf->pdev->dev;
7201 rx_ring->count = vsi->num_desc;
7203 rx_ring->dcb_tc = 0;
7204 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7205 set_ring_16byte_desc_enabled(rx_ring);
7207 clear_ring_16byte_desc_enabled(rx_ring);
7208 vsi->rx_rings[i] = rx_ring;
7214 i40e_vsi_clear_rings(vsi);
7219 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7220 * @pf: board private structure
7221 * @vectors: the number of MSI-X vectors to request
7223 * Returns the number of vectors reserved, or error
7225 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7227 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7228 I40E_MIN_MSIX, vectors);
7230 dev_info(&pf->pdev->dev,
7231 "MSI-X vector reservation failed: %d\n", vectors);
7239 * i40e_init_msix - Setup the MSIX capability
7240 * @pf: board private structure
7242 * Work with the OS to set up the MSIX vectors needed.
7244 * Returns the number of vectors reserved or negative on failure
7246 static int i40e_init_msix(struct i40e_pf *pf)
7248 struct i40e_hw *hw = &pf->hw;
7253 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7256 /* The number of vectors we'll request will be comprised of:
7257 * - Add 1 for "other" cause for Admin Queue events, etc.
7258 * - The number of LAN queue pairs
7259 * - Queues being used for RSS.
7260 * We don't need as many as max_rss_size vectors.
7261 * use rss_size instead in the calculation since that
7262 * is governed by number of cpus in the system.
7263 * - assumes symmetric Tx/Rx pairing
7264 * - The number of VMDq pairs
7266 * - The number of FCOE qps.
7268 * Once we count this up, try the request.
7270 * If we can't get what we want, we'll simplify to nearly nothing
7271 * and try again. If that still fails, we punt.
7273 vectors_left = hw->func_caps.num_msix_vectors;
7276 /* reserve one vector for miscellaneous handler */
7282 /* reserve vectors for the main PF traffic queues */
7283 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7284 vectors_left -= pf->num_lan_msix;
7285 v_budget += pf->num_lan_msix;
7287 /* reserve one vector for sideband flow director */
7288 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7293 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7298 /* can we reserve enough for FCoE? */
7299 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7301 pf->num_fcoe_msix = 0;
7302 else if (vectors_left >= pf->num_fcoe_qps)
7303 pf->num_fcoe_msix = pf->num_fcoe_qps;
7305 pf->num_fcoe_msix = 1;
7306 v_budget += pf->num_fcoe_msix;
7307 vectors_left -= pf->num_fcoe_msix;
7311 /* any vectors left over go for VMDq support */
7312 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7313 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7314 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7316 /* if we're short on vectors for what's desired, we limit
7317 * the queues per vmdq. If this is still more than are
7318 * available, the user will need to change the number of
7319 * queues/vectors used by the PF later with the ethtool
7322 if (vmdq_vecs < vmdq_vecs_wanted)
7323 pf->num_vmdq_qps = 1;
7324 pf->num_vmdq_msix = pf->num_vmdq_qps;
7326 v_budget += vmdq_vecs;
7327 vectors_left -= vmdq_vecs;
7330 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7332 if (!pf->msix_entries)
7335 for (i = 0; i < v_budget; i++)
7336 pf->msix_entries[i].entry = i;
7337 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7339 if (v_actual != v_budget) {
7340 /* If we have limited resources, we will start with no vectors
7341 * for the special features and then allocate vectors to some
7342 * of these features based on the policy and at the end disable
7343 * the features that did not get any vectors.
7346 pf->num_fcoe_qps = 0;
7347 pf->num_fcoe_msix = 0;
7349 pf->num_vmdq_msix = 0;
7352 if (v_actual < I40E_MIN_MSIX) {
7353 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7354 kfree(pf->msix_entries);
7355 pf->msix_entries = NULL;
7358 } else if (v_actual == I40E_MIN_MSIX) {
7359 /* Adjust for minimal MSIX use */
7360 pf->num_vmdq_vsis = 0;
7361 pf->num_vmdq_qps = 0;
7362 pf->num_lan_qps = 1;
7363 pf->num_lan_msix = 1;
7365 } else if (v_actual != v_budget) {
7368 /* reserve the misc vector */
7371 /* Scale vector usage down */
7372 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7373 pf->num_vmdq_vsis = 1;
7374 pf->num_vmdq_qps = 1;
7375 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7377 /* partition out the remaining vectors */
7380 pf->num_lan_msix = 1;
7384 /* give one vector to FCoE */
7385 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7386 pf->num_lan_msix = 1;
7387 pf->num_fcoe_msix = 1;
7390 pf->num_lan_msix = 2;
7395 /* give one vector to FCoE */
7396 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7397 pf->num_fcoe_msix = 1;
7401 /* give the rest to the PF */
7402 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7407 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7408 (pf->num_vmdq_msix == 0)) {
7409 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7410 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7414 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7415 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7416 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7423 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7424 * @vsi: the VSI being configured
7425 * @v_idx: index of the vector in the vsi struct
7427 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7429 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7431 struct i40e_q_vector *q_vector;
7433 /* allocate q_vector */
7434 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7438 q_vector->vsi = vsi;
7439 q_vector->v_idx = v_idx;
7440 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7442 netif_napi_add(vsi->netdev, &q_vector->napi,
7443 i40e_napi_poll, NAPI_POLL_WEIGHT);
7445 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7446 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7448 /* tie q_vector and vsi together */
7449 vsi->q_vectors[v_idx] = q_vector;
7455 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7456 * @vsi: the VSI being configured
7458 * We allocate one q_vector per queue interrupt. If allocation fails we
7461 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7463 struct i40e_pf *pf = vsi->back;
7464 int v_idx, num_q_vectors;
7467 /* if not MSIX, give the one vector only to the LAN VSI */
7468 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7469 num_q_vectors = vsi->num_q_vectors;
7470 else if (vsi == pf->vsi[pf->lan_vsi])
7475 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7476 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7485 i40e_free_q_vector(vsi, v_idx);
7491 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7492 * @pf: board private structure to initialize
7494 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7499 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7500 vectors = i40e_init_msix(pf);
7502 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7504 I40E_FLAG_FCOE_ENABLED |
7506 I40E_FLAG_RSS_ENABLED |
7507 I40E_FLAG_DCB_CAPABLE |
7508 I40E_FLAG_SRIOV_ENABLED |
7509 I40E_FLAG_FD_SB_ENABLED |
7510 I40E_FLAG_FD_ATR_ENABLED |
7511 I40E_FLAG_VMDQ_ENABLED);
7513 /* rework the queue expectations without MSIX */
7514 i40e_determine_queue_usage(pf);
7518 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7519 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7520 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7521 vectors = pci_enable_msi(pf->pdev);
7523 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7525 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7527 vectors = 1; /* one MSI or Legacy vector */
7530 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7531 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7533 /* set up vector assignment tracking */
7534 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7535 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7536 if (!pf->irq_pile) {
7537 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7540 pf->irq_pile->num_entries = vectors;
7541 pf->irq_pile->search_hint = 0;
7543 /* track first vector for misc interrupts, ignore return */
7544 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7550 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7551 * @pf: board private structure
7553 * This sets up the handler for MSIX 0, which is used to manage the
7554 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7555 * when in MSI or Legacy interrupt mode.
7557 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7559 struct i40e_hw *hw = &pf->hw;
7562 /* Only request the irq if this is the first time through, and
7563 * not when we're rebuilding after a Reset
7565 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7566 err = request_irq(pf->msix_entries[0].vector,
7567 i40e_intr, 0, pf->int_name, pf);
7569 dev_info(&pf->pdev->dev,
7570 "request_irq for %s failed: %d\n",
7576 i40e_enable_misc_int_causes(pf);
7578 /* associate no queues to the misc vector */
7579 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7580 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7584 i40e_irq_dynamic_enable_icr0(pf);
7590 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7591 * @vsi: vsi structure
7592 * @seed: RSS hash seed
7594 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7596 struct i40e_aqc_get_set_rss_key_data rss_key;
7597 struct i40e_pf *pf = vsi->back;
7598 struct i40e_hw *hw = &pf->hw;
7599 bool pf_lut = false;
7603 memset(&rss_key, 0, sizeof(rss_key));
7604 memcpy(&rss_key, seed, sizeof(rss_key));
7606 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7610 /* Populate the LUT with max no. of queues in round robin fashion */
7611 for (i = 0; i < vsi->rss_table_size; i++)
7612 rss_lut[i] = i % vsi->rss_size;
7614 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7616 dev_info(&pf->pdev->dev,
7617 "Cannot set RSS key, err %s aq_err %s\n",
7618 i40e_stat_str(&pf->hw, ret),
7619 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7620 goto config_rss_aq_out;
7623 if (vsi->type == I40E_VSI_MAIN)
7626 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7627 vsi->rss_table_size);
7629 dev_info(&pf->pdev->dev,
7630 "Cannot set RSS lut, err %s aq_err %s\n",
7631 i40e_stat_str(&pf->hw, ret),
7632 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7640 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7641 * @vsi: VSI structure
7643 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7645 u8 seed[I40E_HKEY_ARRAY_SIZE];
7646 struct i40e_pf *pf = vsi->back;
7648 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7649 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7651 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7652 return i40e_config_rss_aq(vsi, seed);
7658 * i40e_config_rss_reg - Prepare for RSS if used
7659 * @pf: board private structure
7660 * @seed: RSS hash seed
7662 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7664 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7665 struct i40e_hw *hw = &pf->hw;
7666 u32 *seed_dw = (u32 *)seed;
7667 u32 current_queue = 0;
7671 /* Fill out hash function seed */
7672 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7673 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7675 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7677 for (j = 0; j < 4; j++) {
7678 if (current_queue == vsi->rss_size)
7680 lut |= ((current_queue) << (8 * j));
7683 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7691 * i40e_config_rss - Prepare for RSS if used
7692 * @pf: board private structure
7694 static int i40e_config_rss(struct i40e_pf *pf)
7696 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7697 u8 seed[I40E_HKEY_ARRAY_SIZE];
7698 struct i40e_hw *hw = &pf->hw;
7702 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7704 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7705 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7706 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7707 hena |= i40e_pf_get_default_rss_hena(pf);
7709 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7710 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7712 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7714 /* Determine the RSS table size based on the hardware capabilities */
7715 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7716 reg_val = (pf->rss_table_size == 512) ?
7717 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7718 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7719 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7721 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7722 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7724 return i40e_config_rss_reg(pf, seed);
7728 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7729 * @pf: board private structure
7730 * @queue_count: the requested queue count for rss.
7732 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7733 * count which may be different from the requested queue count.
7735 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7737 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7740 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7743 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7745 if (queue_count != vsi->num_queue_pairs) {
7746 vsi->req_queue_pairs = queue_count;
7747 i40e_prep_for_reset(pf);
7749 pf->rss_size = new_rss_size;
7751 i40e_reset_and_rebuild(pf, true);
7752 i40e_config_rss(pf);
7754 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7755 return pf->rss_size;
7759 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7760 * @pf: board private structure
7762 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7765 bool min_valid, max_valid;
7768 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7769 &min_valid, &max_valid);
7773 pf->npar_min_bw = min_bw;
7775 pf->npar_max_bw = max_bw;
7782 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7783 * @pf: board private structure
7785 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7787 struct i40e_aqc_configure_partition_bw_data bw_data;
7790 /* Set the valid bit for this PF */
7791 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7792 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7793 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7795 /* Set the new bandwidths */
7796 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7802 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7803 * @pf: board private structure
7805 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7807 /* Commit temporary BW setting to permanent NVM image */
7808 enum i40e_admin_queue_err last_aq_status;
7812 if (pf->hw.partition_id != 1) {
7813 dev_info(&pf->pdev->dev,
7814 "Commit BW only works on partition 1! This is partition %d",
7815 pf->hw.partition_id);
7816 ret = I40E_NOT_SUPPORTED;
7820 /* Acquire NVM for read access */
7821 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7822 last_aq_status = pf->hw.aq.asq_last_status;
7824 dev_info(&pf->pdev->dev,
7825 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7826 i40e_stat_str(&pf->hw, ret),
7827 i40e_aq_str(&pf->hw, last_aq_status));
7831 /* Read word 0x10 of NVM - SW compatibility word 1 */
7832 ret = i40e_aq_read_nvm(&pf->hw,
7833 I40E_SR_NVM_CONTROL_WORD,
7834 0x10, sizeof(nvm_word), &nvm_word,
7836 /* Save off last admin queue command status before releasing
7839 last_aq_status = pf->hw.aq.asq_last_status;
7840 i40e_release_nvm(&pf->hw);
7842 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7843 i40e_stat_str(&pf->hw, ret),
7844 i40e_aq_str(&pf->hw, last_aq_status));
7848 /* Wait a bit for NVM release to complete */
7851 /* Acquire NVM for write access */
7852 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7853 last_aq_status = pf->hw.aq.asq_last_status;
7855 dev_info(&pf->pdev->dev,
7856 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7857 i40e_stat_str(&pf->hw, ret),
7858 i40e_aq_str(&pf->hw, last_aq_status));
7861 /* Write it back out unchanged to initiate update NVM,
7862 * which will force a write of the shadow (alt) RAM to
7863 * the NVM - thus storing the bandwidth values permanently.
7865 ret = i40e_aq_update_nvm(&pf->hw,
7866 I40E_SR_NVM_CONTROL_WORD,
7867 0x10, sizeof(nvm_word),
7868 &nvm_word, true, NULL);
7869 /* Save off last admin queue command status before releasing
7872 last_aq_status = pf->hw.aq.asq_last_status;
7873 i40e_release_nvm(&pf->hw);
7875 dev_info(&pf->pdev->dev,
7876 "BW settings NOT SAVED, err %s aq_err %s\n",
7877 i40e_stat_str(&pf->hw, ret),
7878 i40e_aq_str(&pf->hw, last_aq_status));
7885 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7886 * @pf: board private structure to initialize
7888 * i40e_sw_init initializes the Adapter private data structure.
7889 * Fields are initialized based on PCI device information and
7890 * OS network device settings (MTU size).
7892 static int i40e_sw_init(struct i40e_pf *pf)
7897 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7898 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7899 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7900 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7901 if (I40E_DEBUG_USER & debug)
7902 pf->hw.debug_mask = debug;
7903 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7904 I40E_DEFAULT_MSG_ENABLE);
7907 /* Set default capability flags */
7908 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7909 I40E_FLAG_MSI_ENABLED |
7910 I40E_FLAG_MSIX_ENABLED;
7912 if (iommu_present(&pci_bus_type))
7913 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7915 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7917 /* Set default ITR */
7918 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7919 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7921 /* Depending on PF configurations, it is possible that the RSS
7922 * maximum might end up larger than the available queues
7924 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7926 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7927 pf->rss_size_max = min_t(int, pf->rss_size_max,
7928 pf->hw.func_caps.num_tx_qp);
7929 if (pf->hw.func_caps.rss) {
7930 pf->flags |= I40E_FLAG_RSS_ENABLED;
7931 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7934 /* MFP mode enabled */
7935 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7936 pf->flags |= I40E_FLAG_MFP_ENABLED;
7937 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7938 if (i40e_get_npar_bw_setting(pf))
7939 dev_warn(&pf->pdev->dev,
7940 "Could not get NPAR bw settings\n");
7942 dev_info(&pf->pdev->dev,
7943 "Min BW = %8.8x, Max BW = %8.8x\n",
7944 pf->npar_min_bw, pf->npar_max_bw);
7947 /* FW/NVM is not yet fixed in this regard */
7948 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7949 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7950 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7951 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7952 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7953 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7955 dev_info(&pf->pdev->dev,
7956 "Flow Director Sideband mode Disabled in MFP mode\n");
7958 pf->fdir_pf_filter_count =
7959 pf->hw.func_caps.fd_filters_guaranteed;
7960 pf->hw.fdir_shared_filter_count =
7961 pf->hw.func_caps.fd_filters_best_effort;
7964 if (pf->hw.func_caps.vmdq) {
7965 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7966 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7970 i40e_init_pf_fcoe(pf);
7972 #endif /* I40E_FCOE */
7973 #ifdef CONFIG_PCI_IOV
7974 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7975 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7976 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7977 pf->num_req_vfs = min_t(int,
7978 pf->hw.func_caps.num_vfs,
7981 #endif /* CONFIG_PCI_IOV */
7982 if (pf->hw.mac.type == I40E_MAC_X722) {
7983 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7984 I40E_FLAG_128_QP_RSS_CAPABLE |
7985 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7986 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7987 I40E_FLAG_WB_ON_ITR_CAPABLE |
7988 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7990 pf->eeprom_version = 0xDEAD;
7991 pf->lan_veb = I40E_NO_VEB;
7992 pf->lan_vsi = I40E_NO_VSI;
7994 /* By default FW has this off for performance reasons */
7995 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
7997 /* set up queue assignment tracking */
7998 size = sizeof(struct i40e_lump_tracking)
7999 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8000 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8005 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8006 pf->qp_pile->search_hint = 0;
8008 pf->tx_timeout_recovery_level = 1;
8010 mutex_init(&pf->switch_mutex);
8012 /* If NPAR is enabled nudge the Tx scheduler */
8013 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8014 i40e_set_npar_bw_setting(pf);
8021 * i40e_set_ntuple - set the ntuple feature flag and take action
8022 * @pf: board private structure to initialize
8023 * @features: the feature set that the stack is suggesting
8025 * returns a bool to indicate if reset needs to happen
8027 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8029 bool need_reset = false;
8031 /* Check if Flow Director n-tuple support was enabled or disabled. If
8032 * the state changed, we need to reset.
8034 if (features & NETIF_F_NTUPLE) {
8035 /* Enable filters and mark for reset */
8036 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8038 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8040 /* turn off filters, mark for reset and clear SW filter list */
8041 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8043 i40e_fdir_filter_exit(pf);
8045 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8046 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8047 /* reset fd counters */
8048 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8049 pf->fdir_pf_active_filters = 0;
8050 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8051 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8052 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8053 /* if ATR was auto disabled it can be re-enabled. */
8054 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8055 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8056 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8062 * i40e_set_features - set the netdev feature flags
8063 * @netdev: ptr to the netdev being adjusted
8064 * @features: the feature set that the stack is suggesting
8066 static int i40e_set_features(struct net_device *netdev,
8067 netdev_features_t features)
8069 struct i40e_netdev_priv *np = netdev_priv(netdev);
8070 struct i40e_vsi *vsi = np->vsi;
8071 struct i40e_pf *pf = vsi->back;
8074 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8075 i40e_vlan_stripping_enable(vsi);
8077 i40e_vlan_stripping_disable(vsi);
8079 need_reset = i40e_set_ntuple(pf, features);
8082 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8087 #ifdef CONFIG_I40E_VXLAN
8089 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8090 * @pf: board private structure
8091 * @port: The UDP port to look up
8093 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8095 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8099 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8100 if (pf->vxlan_ports[i] == port)
8108 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8109 * @netdev: This physical port's netdev
8110 * @sa_family: Socket Family that VXLAN is notifying us about
8111 * @port: New UDP port number that VXLAN started listening to
8113 static void i40e_add_vxlan_port(struct net_device *netdev,
8114 sa_family_t sa_family, __be16 port)
8116 struct i40e_netdev_priv *np = netdev_priv(netdev);
8117 struct i40e_vsi *vsi = np->vsi;
8118 struct i40e_pf *pf = vsi->back;
8122 if (sa_family == AF_INET6)
8125 idx = i40e_get_vxlan_port_idx(pf, port);
8127 /* Check if port already exists */
8128 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8129 netdev_info(netdev, "vxlan port %d already offloaded\n",
8134 /* Now check if there is space to add the new port */
8135 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8137 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8138 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8143 /* New port: add it and mark its index in the bitmap */
8144 pf->vxlan_ports[next_idx] = port;
8145 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8146 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8150 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8151 * @netdev: This physical port's netdev
8152 * @sa_family: Socket Family that VXLAN is notifying us about
8153 * @port: UDP port number that VXLAN stopped listening to
8155 static void i40e_del_vxlan_port(struct net_device *netdev,
8156 sa_family_t sa_family, __be16 port)
8158 struct i40e_netdev_priv *np = netdev_priv(netdev);
8159 struct i40e_vsi *vsi = np->vsi;
8160 struct i40e_pf *pf = vsi->back;
8163 if (sa_family == AF_INET6)
8166 idx = i40e_get_vxlan_port_idx(pf, port);
8168 /* Check if port already exists */
8169 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8170 /* if port exists, set it to 0 (mark for deletion)
8171 * and make it pending
8173 pf->vxlan_ports[idx] = 0;
8174 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8175 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8177 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8183 static int i40e_get_phys_port_id(struct net_device *netdev,
8184 struct netdev_phys_item_id *ppid)
8186 struct i40e_netdev_priv *np = netdev_priv(netdev);
8187 struct i40e_pf *pf = np->vsi->back;
8188 struct i40e_hw *hw = &pf->hw;
8190 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8193 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8194 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8200 * i40e_ndo_fdb_add - add an entry to the hardware database
8201 * @ndm: the input from the stack
8202 * @tb: pointer to array of nladdr (unused)
8203 * @dev: the net device pointer
8204 * @addr: the MAC address entry being added
8205 * @flags: instructions from stack about fdb operation
8207 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8208 struct net_device *dev,
8209 const unsigned char *addr, u16 vid,
8212 struct i40e_netdev_priv *np = netdev_priv(dev);
8213 struct i40e_pf *pf = np->vsi->back;
8216 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8220 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8224 /* Hardware does not support aging addresses so if a
8225 * ndm_state is given only allow permanent addresses
8227 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8228 netdev_info(dev, "FDB only supports static addresses\n");
8232 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8233 err = dev_uc_add_excl(dev, addr);
8234 else if (is_multicast_ether_addr(addr))
8235 err = dev_mc_add_excl(dev, addr);
8239 /* Only return duplicate errors if NLM_F_EXCL is set */
8240 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8247 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8248 * @dev: the netdev being configured
8249 * @nlh: RTNL message
8251 * Inserts a new hardware bridge if not already created and
8252 * enables the bridging mode requested (VEB or VEPA). If the
8253 * hardware bridge has already been inserted and the request
8254 * is to change the mode then that requires a PF reset to
8255 * allow rebuild of the components with required hardware
8256 * bridge mode enabled.
8258 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8259 struct nlmsghdr *nlh,
8262 struct i40e_netdev_priv *np = netdev_priv(dev);
8263 struct i40e_vsi *vsi = np->vsi;
8264 struct i40e_pf *pf = vsi->back;
8265 struct i40e_veb *veb = NULL;
8266 struct nlattr *attr, *br_spec;
8269 /* Only for PF VSI for now */
8270 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8273 /* Find the HW bridge for PF VSI */
8274 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8275 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8279 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8281 nla_for_each_nested(attr, br_spec, rem) {
8284 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8287 mode = nla_get_u16(attr);
8288 if ((mode != BRIDGE_MODE_VEPA) &&
8289 (mode != BRIDGE_MODE_VEB))
8292 /* Insert a new HW bridge */
8294 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8295 vsi->tc_config.enabled_tc);
8297 veb->bridge_mode = mode;
8298 i40e_config_bridge_mode(veb);
8300 /* No Bridge HW offload available */
8304 } else if (mode != veb->bridge_mode) {
8305 /* Existing HW bridge but different mode needs reset */
8306 veb->bridge_mode = mode;
8307 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8308 if (mode == BRIDGE_MODE_VEB)
8309 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8311 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8312 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8321 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8324 * @seq: RTNL message seq #
8325 * @dev: the netdev being configured
8326 * @filter_mask: unused
8328 * Return the mode in which the hardware bridge is operating in
8331 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8332 struct net_device *dev,
8333 u32 filter_mask, int nlflags)
8335 struct i40e_netdev_priv *np = netdev_priv(dev);
8336 struct i40e_vsi *vsi = np->vsi;
8337 struct i40e_pf *pf = vsi->back;
8338 struct i40e_veb *veb = NULL;
8341 /* Only for PF VSI for now */
8342 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8345 /* Find the HW bridge for the PF VSI */
8346 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8347 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8354 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8355 nlflags, 0, 0, filter_mask, NULL);
8358 #define I40E_MAX_TUNNEL_HDR_LEN 80
8360 * i40e_features_check - Validate encapsulated packet conforms to limits
8362 * @netdev: This physical port's netdev
8363 * @features: Offload features that the stack believes apply
8365 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8366 struct net_device *dev,
8367 netdev_features_t features)
8369 if (skb->encapsulation &&
8370 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8371 I40E_MAX_TUNNEL_HDR_LEN))
8372 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8377 static const struct net_device_ops i40e_netdev_ops = {
8378 .ndo_open = i40e_open,
8379 .ndo_stop = i40e_close,
8380 .ndo_start_xmit = i40e_lan_xmit_frame,
8381 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8382 .ndo_set_rx_mode = i40e_set_rx_mode,
8383 .ndo_validate_addr = eth_validate_addr,
8384 .ndo_set_mac_address = i40e_set_mac,
8385 .ndo_change_mtu = i40e_change_mtu,
8386 .ndo_do_ioctl = i40e_ioctl,
8387 .ndo_tx_timeout = i40e_tx_timeout,
8388 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8389 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8390 #ifdef CONFIG_NET_POLL_CONTROLLER
8391 .ndo_poll_controller = i40e_netpoll,
8393 .ndo_setup_tc = i40e_setup_tc,
8395 .ndo_fcoe_enable = i40e_fcoe_enable,
8396 .ndo_fcoe_disable = i40e_fcoe_disable,
8398 .ndo_set_features = i40e_set_features,
8399 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8400 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8401 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8402 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8403 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8404 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8405 #ifdef CONFIG_I40E_VXLAN
8406 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8407 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8409 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8410 .ndo_fdb_add = i40e_ndo_fdb_add,
8411 .ndo_features_check = i40e_features_check,
8412 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8413 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8417 * i40e_config_netdev - Setup the netdev flags
8418 * @vsi: the VSI being configured
8420 * Returns 0 on success, negative value on failure
8422 static int i40e_config_netdev(struct i40e_vsi *vsi)
8424 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8425 struct i40e_pf *pf = vsi->back;
8426 struct i40e_hw *hw = &pf->hw;
8427 struct i40e_netdev_priv *np;
8428 struct net_device *netdev;
8429 u8 mac_addr[ETH_ALEN];
8432 etherdev_size = sizeof(struct i40e_netdev_priv);
8433 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8437 vsi->netdev = netdev;
8438 np = netdev_priv(netdev);
8441 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8442 NETIF_F_GSO_UDP_TUNNEL |
8445 netdev->features = NETIF_F_SG |
8449 NETIF_F_GSO_UDP_TUNNEL |
8450 NETIF_F_HW_VLAN_CTAG_TX |
8451 NETIF_F_HW_VLAN_CTAG_RX |
8452 NETIF_F_HW_VLAN_CTAG_FILTER |
8461 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8462 netdev->features |= NETIF_F_NTUPLE;
8464 /* copy netdev features into list of user selectable features */
8465 netdev->hw_features |= netdev->features;
8467 if (vsi->type == I40E_VSI_MAIN) {
8468 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8469 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8470 /* The following steps are necessary to prevent reception
8471 * of tagged packets - some older NVM configurations load a
8472 * default a MAC-VLAN filter that accepts any tagged packet
8473 * which must be replaced by a normal filter.
8475 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8476 i40e_add_filter(vsi, mac_addr,
8477 I40E_VLAN_ANY, false, true);
8479 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8480 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8481 pf->vsi[pf->lan_vsi]->netdev->name);
8482 random_ether_addr(mac_addr);
8483 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8485 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8487 ether_addr_copy(netdev->dev_addr, mac_addr);
8488 ether_addr_copy(netdev->perm_addr, mac_addr);
8489 /* vlan gets same features (except vlan offload)
8490 * after any tweaks for specific VSI types
8492 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8493 NETIF_F_HW_VLAN_CTAG_RX |
8494 NETIF_F_HW_VLAN_CTAG_FILTER);
8495 netdev->priv_flags |= IFF_UNICAST_FLT;
8496 netdev->priv_flags |= IFF_SUPP_NOFCS;
8497 /* Setup netdev TC information */
8498 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8500 netdev->netdev_ops = &i40e_netdev_ops;
8501 netdev->watchdog_timeo = 5 * HZ;
8502 i40e_set_ethtool_ops(netdev);
8504 i40e_fcoe_config_netdev(netdev, vsi);
8511 * i40e_vsi_delete - Delete a VSI from the switch
8512 * @vsi: the VSI being removed
8514 * Returns 0 on success, negative value on failure
8516 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8518 /* remove default VSI is not allowed */
8519 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8522 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8526 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8527 * @vsi: the VSI being queried
8529 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8531 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8533 struct i40e_veb *veb;
8534 struct i40e_pf *pf = vsi->back;
8536 /* Uplink is not a bridge so default to VEB */
8537 if (vsi->veb_idx == I40E_NO_VEB)
8540 veb = pf->veb[vsi->veb_idx];
8541 /* Uplink is a bridge in VEPA mode */
8542 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8545 /* Uplink is a bridge in VEB mode */
8550 * i40e_add_vsi - Add a VSI to the switch
8551 * @vsi: the VSI being configured
8553 * This initializes a VSI context depending on the VSI type to be added and
8554 * passes it down to the add_vsi aq command.
8556 static int i40e_add_vsi(struct i40e_vsi *vsi)
8559 struct i40e_mac_filter *f, *ftmp;
8560 struct i40e_pf *pf = vsi->back;
8561 struct i40e_hw *hw = &pf->hw;
8562 struct i40e_vsi_context ctxt;
8563 u8 enabled_tc = 0x1; /* TC0 enabled */
8566 memset(&ctxt, 0, sizeof(ctxt));
8567 switch (vsi->type) {
8569 /* The PF's main VSI is already setup as part of the
8570 * device initialization, so we'll not bother with
8571 * the add_vsi call, but we will retrieve the current
8574 ctxt.seid = pf->main_vsi_seid;
8575 ctxt.pf_num = pf->hw.pf_id;
8577 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8578 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8580 dev_info(&pf->pdev->dev,
8581 "couldn't get PF vsi config, err %s aq_err %s\n",
8582 i40e_stat_str(&pf->hw, ret),
8583 i40e_aq_str(&pf->hw,
8584 pf->hw.aq.asq_last_status));
8587 vsi->info = ctxt.info;
8588 vsi->info.valid_sections = 0;
8590 vsi->seid = ctxt.seid;
8591 vsi->id = ctxt.vsi_number;
8593 enabled_tc = i40e_pf_get_tc_map(pf);
8595 /* MFP mode setup queue map and update VSI */
8596 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8597 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8598 memset(&ctxt, 0, sizeof(ctxt));
8599 ctxt.seid = pf->main_vsi_seid;
8600 ctxt.pf_num = pf->hw.pf_id;
8602 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8603 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8605 dev_info(&pf->pdev->dev,
8606 "update vsi failed, err %s aq_err %s\n",
8607 i40e_stat_str(&pf->hw, ret),
8608 i40e_aq_str(&pf->hw,
8609 pf->hw.aq.asq_last_status));
8613 /* update the local VSI info queue map */
8614 i40e_vsi_update_queue_map(vsi, &ctxt);
8615 vsi->info.valid_sections = 0;
8617 /* Default/Main VSI is only enabled for TC0
8618 * reconfigure it to enable all TCs that are
8619 * available on the port in SFP mode.
8620 * For MFP case the iSCSI PF would use this
8621 * flow to enable LAN+iSCSI TC.
8623 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8625 dev_info(&pf->pdev->dev,
8626 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8628 i40e_stat_str(&pf->hw, ret),
8629 i40e_aq_str(&pf->hw,
8630 pf->hw.aq.asq_last_status));
8637 ctxt.pf_num = hw->pf_id;
8639 ctxt.uplink_seid = vsi->uplink_seid;
8640 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8641 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8642 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8643 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8644 ctxt.info.valid_sections |=
8645 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8646 ctxt.info.switch_id =
8647 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8649 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8652 case I40E_VSI_VMDQ2:
8653 ctxt.pf_num = hw->pf_id;
8655 ctxt.uplink_seid = vsi->uplink_seid;
8656 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8657 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8659 /* This VSI is connected to VEB so the switch_id
8660 * should be set to zero by default.
8662 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8663 ctxt.info.valid_sections |=
8664 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8665 ctxt.info.switch_id =
8666 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8669 /* Setup the VSI tx/rx queue map for TC0 only for now */
8670 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8673 case I40E_VSI_SRIOV:
8674 ctxt.pf_num = hw->pf_id;
8675 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8676 ctxt.uplink_seid = vsi->uplink_seid;
8677 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8678 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8680 /* This VSI is connected to VEB so the switch_id
8681 * should be set to zero by default.
8683 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8684 ctxt.info.valid_sections |=
8685 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8686 ctxt.info.switch_id =
8687 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8690 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8691 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8692 if (pf->vf[vsi->vf_id].spoofchk) {
8693 ctxt.info.valid_sections |=
8694 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8695 ctxt.info.sec_flags |=
8696 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8697 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8699 /* Setup the VSI tx/rx queue map for TC0 only for now */
8700 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8705 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8707 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8712 #endif /* I40E_FCOE */
8717 if (vsi->type != I40E_VSI_MAIN) {
8718 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8720 dev_info(&vsi->back->pdev->dev,
8721 "add vsi failed, err %s aq_err %s\n",
8722 i40e_stat_str(&pf->hw, ret),
8723 i40e_aq_str(&pf->hw,
8724 pf->hw.aq.asq_last_status));
8728 vsi->info = ctxt.info;
8729 vsi->info.valid_sections = 0;
8730 vsi->seid = ctxt.seid;
8731 vsi->id = ctxt.vsi_number;
8734 /* If macvlan filters already exist, force them to get loaded */
8735 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8739 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8740 struct i40e_aqc_remove_macvlan_element_data element;
8742 memset(&element, 0, sizeof(element));
8743 ether_addr_copy(element.mac_addr, f->macaddr);
8744 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8745 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8748 /* some older FW has a different default */
8750 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8751 i40e_aq_remove_macvlan(hw, vsi->seid,
8755 i40e_aq_mac_address_write(hw,
8756 I40E_AQC_WRITE_TYPE_LAA_WOL,
8761 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8762 pf->flags |= I40E_FLAG_FILTER_SYNC;
8765 /* Update VSI BW information */
8766 ret = i40e_vsi_get_bw_info(vsi);
8768 dev_info(&pf->pdev->dev,
8769 "couldn't get vsi bw info, err %s aq_err %s\n",
8770 i40e_stat_str(&pf->hw, ret),
8771 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8772 /* VSI is already added so not tearing that up */
8781 * i40e_vsi_release - Delete a VSI and free its resources
8782 * @vsi: the VSI being removed
8784 * Returns 0 on success or < 0 on error
8786 int i40e_vsi_release(struct i40e_vsi *vsi)
8788 struct i40e_mac_filter *f, *ftmp;
8789 struct i40e_veb *veb = NULL;
8796 /* release of a VEB-owner or last VSI is not allowed */
8797 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8798 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8799 vsi->seid, vsi->uplink_seid);
8802 if (vsi == pf->vsi[pf->lan_vsi] &&
8803 !test_bit(__I40E_DOWN, &pf->state)) {
8804 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8808 uplink_seid = vsi->uplink_seid;
8809 if (vsi->type != I40E_VSI_SRIOV) {
8810 if (vsi->netdev_registered) {
8811 vsi->netdev_registered = false;
8813 /* results in a call to i40e_close() */
8814 unregister_netdev(vsi->netdev);
8817 i40e_vsi_close(vsi);
8819 i40e_vsi_disable_irq(vsi);
8822 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8823 i40e_del_filter(vsi, f->macaddr, f->vlan,
8824 f->is_vf, f->is_netdev);
8825 i40e_sync_vsi_filters(vsi, false);
8827 i40e_vsi_delete(vsi);
8828 i40e_vsi_free_q_vectors(vsi);
8830 free_netdev(vsi->netdev);
8833 i40e_vsi_clear_rings(vsi);
8834 i40e_vsi_clear(vsi);
8836 /* If this was the last thing on the VEB, except for the
8837 * controlling VSI, remove the VEB, which puts the controlling
8838 * VSI onto the next level down in the switch.
8840 * Well, okay, there's one more exception here: don't remove
8841 * the orphan VEBs yet. We'll wait for an explicit remove request
8842 * from up the network stack.
8844 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8846 pf->vsi[i]->uplink_seid == uplink_seid &&
8847 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8848 n++; /* count the VSIs */
8851 for (i = 0; i < I40E_MAX_VEB; i++) {
8854 if (pf->veb[i]->uplink_seid == uplink_seid)
8855 n++; /* count the VEBs */
8856 if (pf->veb[i]->seid == uplink_seid)
8859 if (n == 0 && veb && veb->uplink_seid != 0)
8860 i40e_veb_release(veb);
8866 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8867 * @vsi: ptr to the VSI
8869 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8870 * corresponding SW VSI structure and initializes num_queue_pairs for the
8871 * newly allocated VSI.
8873 * Returns 0 on success or negative on failure
8875 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8878 struct i40e_pf *pf = vsi->back;
8880 if (vsi->q_vectors[0]) {
8881 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8886 if (vsi->base_vector) {
8887 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8888 vsi->seid, vsi->base_vector);
8892 ret = i40e_vsi_alloc_q_vectors(vsi);
8894 dev_info(&pf->pdev->dev,
8895 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8896 vsi->num_q_vectors, vsi->seid, ret);
8897 vsi->num_q_vectors = 0;
8898 goto vector_setup_out;
8901 /* In Legacy mode, we do not have to get any other vector since we
8902 * piggyback on the misc/ICR0 for queue interrupts.
8904 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8906 if (vsi->num_q_vectors)
8907 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8908 vsi->num_q_vectors, vsi->idx);
8909 if (vsi->base_vector < 0) {
8910 dev_info(&pf->pdev->dev,
8911 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8912 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8913 i40e_vsi_free_q_vectors(vsi);
8915 goto vector_setup_out;
8923 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8924 * @vsi: pointer to the vsi.
8926 * This re-allocates a vsi's queue resources.
8928 * Returns pointer to the successfully allocated and configured VSI sw struct
8929 * on success, otherwise returns NULL on failure.
8931 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8933 struct i40e_pf *pf = vsi->back;
8937 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8938 i40e_vsi_clear_rings(vsi);
8940 i40e_vsi_free_arrays(vsi, false);
8941 i40e_set_num_rings_in_vsi(vsi);
8942 ret = i40e_vsi_alloc_arrays(vsi, false);
8946 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8948 dev_info(&pf->pdev->dev,
8949 "failed to get tracking for %d queues for VSI %d err %d\n",
8950 vsi->alloc_queue_pairs, vsi->seid, ret);
8953 vsi->base_queue = ret;
8955 /* Update the FW view of the VSI. Force a reset of TC and queue
8956 * layout configurations.
8958 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8959 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8960 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8961 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8963 /* assign it some queues */
8964 ret = i40e_alloc_rings(vsi);
8968 /* map all of the rings to the q_vectors */
8969 i40e_vsi_map_rings_to_vectors(vsi);
8973 i40e_vsi_free_q_vectors(vsi);
8974 if (vsi->netdev_registered) {
8975 vsi->netdev_registered = false;
8976 unregister_netdev(vsi->netdev);
8977 free_netdev(vsi->netdev);
8980 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8982 i40e_vsi_clear(vsi);
8987 * i40e_vsi_setup - Set up a VSI by a given type
8988 * @pf: board private structure
8990 * @uplink_seid: the switch element to link to
8991 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8993 * This allocates the sw VSI structure and its queue resources, then add a VSI
8994 * to the identified VEB.
8996 * Returns pointer to the successfully allocated and configure VSI sw struct on
8997 * success, otherwise returns NULL on failure.
8999 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9000 u16 uplink_seid, u32 param1)
9002 struct i40e_vsi *vsi = NULL;
9003 struct i40e_veb *veb = NULL;
9007 /* The requested uplink_seid must be either
9008 * - the PF's port seid
9009 * no VEB is needed because this is the PF
9010 * or this is a Flow Director special case VSI
9011 * - seid of an existing VEB
9012 * - seid of a VSI that owns an existing VEB
9013 * - seid of a VSI that doesn't own a VEB
9014 * a new VEB is created and the VSI becomes the owner
9015 * - seid of the PF VSI, which is what creates the first VEB
9016 * this is a special case of the previous
9018 * Find which uplink_seid we were given and create a new VEB if needed
9020 for (i = 0; i < I40E_MAX_VEB; i++) {
9021 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9027 if (!veb && uplink_seid != pf->mac_seid) {
9029 for (i = 0; i < pf->num_alloc_vsi; i++) {
9030 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9036 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9041 if (vsi->uplink_seid == pf->mac_seid)
9042 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9043 vsi->tc_config.enabled_tc);
9044 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9045 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9046 vsi->tc_config.enabled_tc);
9048 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9049 dev_info(&vsi->back->pdev->dev,
9050 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9053 /* We come up by default in VEPA mode if SRIOV is not
9054 * already enabled, in which case we can't force VEPA
9057 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9058 veb->bridge_mode = BRIDGE_MODE_VEPA;
9059 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9061 i40e_config_bridge_mode(veb);
9063 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9064 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9068 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9072 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9073 uplink_seid = veb->seid;
9076 /* get vsi sw struct */
9077 v_idx = i40e_vsi_mem_alloc(pf, type);
9080 vsi = pf->vsi[v_idx];
9084 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9086 if (type == I40E_VSI_MAIN)
9087 pf->lan_vsi = v_idx;
9088 else if (type == I40E_VSI_SRIOV)
9089 vsi->vf_id = param1;
9090 /* assign it some queues */
9091 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9094 dev_info(&pf->pdev->dev,
9095 "failed to get tracking for %d queues for VSI %d err=%d\n",
9096 vsi->alloc_queue_pairs, vsi->seid, ret);
9099 vsi->base_queue = ret;
9101 /* get a VSI from the hardware */
9102 vsi->uplink_seid = uplink_seid;
9103 ret = i40e_add_vsi(vsi);
9107 switch (vsi->type) {
9108 /* setup the netdev if needed */
9110 case I40E_VSI_VMDQ2:
9112 ret = i40e_config_netdev(vsi);
9115 ret = register_netdev(vsi->netdev);
9118 vsi->netdev_registered = true;
9119 netif_carrier_off(vsi->netdev);
9120 #ifdef CONFIG_I40E_DCB
9121 /* Setup DCB netlink interface */
9122 i40e_dcbnl_setup(vsi);
9123 #endif /* CONFIG_I40E_DCB */
9127 /* set up vectors and rings if needed */
9128 ret = i40e_vsi_setup_vectors(vsi);
9132 ret = i40e_alloc_rings(vsi);
9136 /* map all of the rings to the q_vectors */
9137 i40e_vsi_map_rings_to_vectors(vsi);
9139 i40e_vsi_reset_stats(vsi);
9143 /* no netdev or rings for the other VSI types */
9147 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9148 (vsi->type == I40E_VSI_VMDQ2)) {
9149 ret = i40e_vsi_config_rss(vsi);
9154 i40e_vsi_free_q_vectors(vsi);
9156 if (vsi->netdev_registered) {
9157 vsi->netdev_registered = false;
9158 unregister_netdev(vsi->netdev);
9159 free_netdev(vsi->netdev);
9163 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9165 i40e_vsi_clear(vsi);
9171 * i40e_veb_get_bw_info - Query VEB BW information
9172 * @veb: the veb to query
9174 * Query the Tx scheduler BW configuration data for given VEB
9176 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9178 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9179 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9180 struct i40e_pf *pf = veb->pf;
9181 struct i40e_hw *hw = &pf->hw;
9186 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9189 dev_info(&pf->pdev->dev,
9190 "query veb bw config failed, err %s aq_err %s\n",
9191 i40e_stat_str(&pf->hw, ret),
9192 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9196 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9199 dev_info(&pf->pdev->dev,
9200 "query veb bw ets config failed, err %s aq_err %s\n",
9201 i40e_stat_str(&pf->hw, ret),
9202 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9206 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9207 veb->bw_max_quanta = ets_data.tc_bw_max;
9208 veb->is_abs_credits = bw_data.absolute_credits_enable;
9209 veb->enabled_tc = ets_data.tc_valid_bits;
9210 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9211 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9212 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9213 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9214 veb->bw_tc_limit_credits[i] =
9215 le16_to_cpu(bw_data.tc_bw_limits[i]);
9216 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9224 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9225 * @pf: board private structure
9227 * On error: returns error code (negative)
9228 * On success: returns vsi index in PF (positive)
9230 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9233 struct i40e_veb *veb;
9236 /* Need to protect the allocation of switch elements at the PF level */
9237 mutex_lock(&pf->switch_mutex);
9239 /* VEB list may be fragmented if VEB creation/destruction has
9240 * been happening. We can afford to do a quick scan to look
9241 * for any free slots in the list.
9243 * find next empty veb slot, looping back around if necessary
9246 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9248 if (i >= I40E_MAX_VEB) {
9250 goto err_alloc_veb; /* out of VEB slots! */
9253 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9260 veb->enabled_tc = 1;
9265 mutex_unlock(&pf->switch_mutex);
9270 * i40e_switch_branch_release - Delete a branch of the switch tree
9271 * @branch: where to start deleting
9273 * This uses recursion to find the tips of the branch to be
9274 * removed, deleting until we get back to and can delete this VEB.
9276 static void i40e_switch_branch_release(struct i40e_veb *branch)
9278 struct i40e_pf *pf = branch->pf;
9279 u16 branch_seid = branch->seid;
9280 u16 veb_idx = branch->idx;
9283 /* release any VEBs on this VEB - RECURSION */
9284 for (i = 0; i < I40E_MAX_VEB; i++) {
9287 if (pf->veb[i]->uplink_seid == branch->seid)
9288 i40e_switch_branch_release(pf->veb[i]);
9291 /* Release the VSIs on this VEB, but not the owner VSI.
9293 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9294 * the VEB itself, so don't use (*branch) after this loop.
9296 for (i = 0; i < pf->num_alloc_vsi; i++) {
9299 if (pf->vsi[i]->uplink_seid == branch_seid &&
9300 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9301 i40e_vsi_release(pf->vsi[i]);
9305 /* There's one corner case where the VEB might not have been
9306 * removed, so double check it here and remove it if needed.
9307 * This case happens if the veb was created from the debugfs
9308 * commands and no VSIs were added to it.
9310 if (pf->veb[veb_idx])
9311 i40e_veb_release(pf->veb[veb_idx]);
9315 * i40e_veb_clear - remove veb struct
9316 * @veb: the veb to remove
9318 static void i40e_veb_clear(struct i40e_veb *veb)
9324 struct i40e_pf *pf = veb->pf;
9326 mutex_lock(&pf->switch_mutex);
9327 if (pf->veb[veb->idx] == veb)
9328 pf->veb[veb->idx] = NULL;
9329 mutex_unlock(&pf->switch_mutex);
9336 * i40e_veb_release - Delete a VEB and free its resources
9337 * @veb: the VEB being removed
9339 void i40e_veb_release(struct i40e_veb *veb)
9341 struct i40e_vsi *vsi = NULL;
9347 /* find the remaining VSI and check for extras */
9348 for (i = 0; i < pf->num_alloc_vsi; i++) {
9349 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9355 dev_info(&pf->pdev->dev,
9356 "can't remove VEB %d with %d VSIs left\n",
9361 /* move the remaining VSI to uplink veb */
9362 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9363 if (veb->uplink_seid) {
9364 vsi->uplink_seid = veb->uplink_seid;
9365 if (veb->uplink_seid == pf->mac_seid)
9366 vsi->veb_idx = I40E_NO_VEB;
9368 vsi->veb_idx = veb->veb_idx;
9371 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9372 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9375 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9376 i40e_veb_clear(veb);
9380 * i40e_add_veb - create the VEB in the switch
9381 * @veb: the VEB to be instantiated
9382 * @vsi: the controlling VSI
9384 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9386 struct i40e_pf *pf = veb->pf;
9387 bool is_default = veb->pf->cur_promisc;
9388 bool is_cloud = false;
9391 /* get a VEB from the hardware */
9392 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9393 veb->enabled_tc, is_default,
9394 is_cloud, &veb->seid, NULL);
9396 dev_info(&pf->pdev->dev,
9397 "couldn't add VEB, err %s aq_err %s\n",
9398 i40e_stat_str(&pf->hw, ret),
9399 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9403 /* get statistics counter */
9404 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9405 &veb->stats_idx, NULL, NULL, NULL);
9407 dev_info(&pf->pdev->dev,
9408 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9409 i40e_stat_str(&pf->hw, ret),
9410 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9413 ret = i40e_veb_get_bw_info(veb);
9415 dev_info(&pf->pdev->dev,
9416 "couldn't get VEB bw info, err %s aq_err %s\n",
9417 i40e_stat_str(&pf->hw, ret),
9418 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9419 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9423 vsi->uplink_seid = veb->seid;
9424 vsi->veb_idx = veb->idx;
9425 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9431 * i40e_veb_setup - Set up a VEB
9432 * @pf: board private structure
9433 * @flags: VEB setup flags
9434 * @uplink_seid: the switch element to link to
9435 * @vsi_seid: the initial VSI seid
9436 * @enabled_tc: Enabled TC bit-map
9438 * This allocates the sw VEB structure and links it into the switch
9439 * It is possible and legal for this to be a duplicate of an already
9440 * existing VEB. It is also possible for both uplink and vsi seids
9441 * to be zero, in order to create a floating VEB.
9443 * Returns pointer to the successfully allocated VEB sw struct on
9444 * success, otherwise returns NULL on failure.
9446 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9447 u16 uplink_seid, u16 vsi_seid,
9450 struct i40e_veb *veb, *uplink_veb = NULL;
9451 int vsi_idx, veb_idx;
9454 /* if one seid is 0, the other must be 0 to create a floating relay */
9455 if ((uplink_seid == 0 || vsi_seid == 0) &&
9456 (uplink_seid + vsi_seid != 0)) {
9457 dev_info(&pf->pdev->dev,
9458 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9459 uplink_seid, vsi_seid);
9463 /* make sure there is such a vsi and uplink */
9464 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9465 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9467 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9468 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9473 if (uplink_seid && uplink_seid != pf->mac_seid) {
9474 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9475 if (pf->veb[veb_idx] &&
9476 pf->veb[veb_idx]->seid == uplink_seid) {
9477 uplink_veb = pf->veb[veb_idx];
9482 dev_info(&pf->pdev->dev,
9483 "uplink seid %d not found\n", uplink_seid);
9488 /* get veb sw struct */
9489 veb_idx = i40e_veb_mem_alloc(pf);
9492 veb = pf->veb[veb_idx];
9494 veb->uplink_seid = uplink_seid;
9495 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9496 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9498 /* create the VEB in the switch */
9499 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9502 if (vsi_idx == pf->lan_vsi)
9503 pf->lan_veb = veb->idx;
9508 i40e_veb_clear(veb);
9514 * i40e_setup_pf_switch_element - set PF vars based on switch type
9515 * @pf: board private structure
9516 * @ele: element we are building info from
9517 * @num_reported: total number of elements
9518 * @printconfig: should we print the contents
9520 * helper function to assist in extracting a few useful SEID values.
9522 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9523 struct i40e_aqc_switch_config_element_resp *ele,
9524 u16 num_reported, bool printconfig)
9526 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9527 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9528 u8 element_type = ele->element_type;
9529 u16 seid = le16_to_cpu(ele->seid);
9532 dev_info(&pf->pdev->dev,
9533 "type=%d seid=%d uplink=%d downlink=%d\n",
9534 element_type, seid, uplink_seid, downlink_seid);
9536 switch (element_type) {
9537 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9538 pf->mac_seid = seid;
9540 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9542 if (uplink_seid != pf->mac_seid)
9544 if (pf->lan_veb == I40E_NO_VEB) {
9547 /* find existing or else empty VEB */
9548 for (v = 0; v < I40E_MAX_VEB; v++) {
9549 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9554 if (pf->lan_veb == I40E_NO_VEB) {
9555 v = i40e_veb_mem_alloc(pf);
9562 pf->veb[pf->lan_veb]->seid = seid;
9563 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9564 pf->veb[pf->lan_veb]->pf = pf;
9565 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9567 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9568 if (num_reported != 1)
9570 /* This is immediately after a reset so we can assume this is
9573 pf->mac_seid = uplink_seid;
9574 pf->pf_seid = downlink_seid;
9575 pf->main_vsi_seid = seid;
9577 dev_info(&pf->pdev->dev,
9578 "pf_seid=%d main_vsi_seid=%d\n",
9579 pf->pf_seid, pf->main_vsi_seid);
9581 case I40E_SWITCH_ELEMENT_TYPE_PF:
9582 case I40E_SWITCH_ELEMENT_TYPE_VF:
9583 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9584 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9585 case I40E_SWITCH_ELEMENT_TYPE_PE:
9586 case I40E_SWITCH_ELEMENT_TYPE_PA:
9587 /* ignore these for now */
9590 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9591 element_type, seid);
9597 * i40e_fetch_switch_configuration - Get switch config from firmware
9598 * @pf: board private structure
9599 * @printconfig: should we print the contents
9601 * Get the current switch configuration from the device and
9602 * extract a few useful SEID values.
9604 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9606 struct i40e_aqc_get_switch_config_resp *sw_config;
9612 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9616 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9618 u16 num_reported, num_total;
9620 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9624 dev_info(&pf->pdev->dev,
9625 "get switch config failed err %s aq_err %s\n",
9626 i40e_stat_str(&pf->hw, ret),
9627 i40e_aq_str(&pf->hw,
9628 pf->hw.aq.asq_last_status));
9633 num_reported = le16_to_cpu(sw_config->header.num_reported);
9634 num_total = le16_to_cpu(sw_config->header.num_total);
9637 dev_info(&pf->pdev->dev,
9638 "header: %d reported %d total\n",
9639 num_reported, num_total);
9641 for (i = 0; i < num_reported; i++) {
9642 struct i40e_aqc_switch_config_element_resp *ele =
9643 &sw_config->element[i];
9645 i40e_setup_pf_switch_element(pf, ele, num_reported,
9648 } while (next_seid != 0);
9655 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9656 * @pf: board private structure
9657 * @reinit: if the Main VSI needs to re-initialized.
9659 * Returns 0 on success, negative value on failure
9661 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9665 /* find out what's out there already */
9666 ret = i40e_fetch_switch_configuration(pf, false);
9668 dev_info(&pf->pdev->dev,
9669 "couldn't fetch switch config, err %s aq_err %s\n",
9670 i40e_stat_str(&pf->hw, ret),
9671 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9674 i40e_pf_reset_stats(pf);
9676 /* first time setup */
9677 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9678 struct i40e_vsi *vsi = NULL;
9681 /* Set up the PF VSI associated with the PF's main VSI
9682 * that is already in the HW switch
9684 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9685 uplink_seid = pf->veb[pf->lan_veb]->seid;
9687 uplink_seid = pf->mac_seid;
9688 if (pf->lan_vsi == I40E_NO_VSI)
9689 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9691 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9693 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9694 i40e_fdir_teardown(pf);
9698 /* force a reset of TC and queue layout configurations */
9699 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9700 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9701 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9702 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9704 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9706 i40e_fdir_sb_setup(pf);
9708 /* Setup static PF queue filter control settings */
9709 ret = i40e_setup_pf_filter_control(pf);
9711 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9713 /* Failure here should not stop continuing other steps */
9716 /* enable RSS in the HW, even for only one queue, as the stack can use
9719 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9720 i40e_config_rss(pf);
9722 /* fill in link information and enable LSE reporting */
9723 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9724 i40e_link_event(pf);
9726 /* Initialize user-specific link properties */
9727 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9728 I40E_AQ_AN_COMPLETED) ? true : false);
9736 * i40e_determine_queue_usage - Work out queue distribution
9737 * @pf: board private structure
9739 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9743 pf->num_lan_qps = 0;
9745 pf->num_fcoe_qps = 0;
9748 /* Find the max queues to be put into basic use. We'll always be
9749 * using TC0, whether or not DCB is running, and TC0 will get the
9752 queues_left = pf->hw.func_caps.num_tx_qp;
9754 if ((queues_left == 1) ||
9755 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9756 /* one qp for PF, no queues for anything else */
9758 pf->rss_size = pf->num_lan_qps = 1;
9760 /* make sure all the fancies are disabled */
9761 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9763 I40E_FLAG_FCOE_ENABLED |
9765 I40E_FLAG_FD_SB_ENABLED |
9766 I40E_FLAG_FD_ATR_ENABLED |
9767 I40E_FLAG_DCB_CAPABLE |
9768 I40E_FLAG_SRIOV_ENABLED |
9769 I40E_FLAG_VMDQ_ENABLED);
9770 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9771 I40E_FLAG_FD_SB_ENABLED |
9772 I40E_FLAG_FD_ATR_ENABLED |
9773 I40E_FLAG_DCB_CAPABLE))) {
9775 pf->rss_size = pf->num_lan_qps = 1;
9776 queues_left -= pf->num_lan_qps;
9778 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9780 I40E_FLAG_FCOE_ENABLED |
9782 I40E_FLAG_FD_SB_ENABLED |
9783 I40E_FLAG_FD_ATR_ENABLED |
9784 I40E_FLAG_DCB_ENABLED |
9785 I40E_FLAG_VMDQ_ENABLED);
9787 /* Not enough queues for all TCs */
9788 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9789 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9790 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9791 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9793 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9795 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9796 pf->hw.func_caps.num_tx_qp);
9798 queues_left -= pf->num_lan_qps;
9802 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9803 if (I40E_DEFAULT_FCOE <= queues_left) {
9804 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9805 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9806 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9808 pf->num_fcoe_qps = 0;
9809 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9810 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9813 queues_left -= pf->num_fcoe_qps;
9817 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9818 if (queues_left > 1) {
9819 queues_left -= 1; /* save 1 queue for FD */
9821 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9822 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9826 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9827 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9828 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9829 (queues_left / pf->num_vf_qps));
9830 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9833 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9834 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9835 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9836 (queues_left / pf->num_vmdq_qps));
9837 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9840 pf->queues_left = queues_left;
9842 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9847 * i40e_setup_pf_filter_control - Setup PF static filter control
9848 * @pf: PF to be setup
9850 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9851 * settings. If PE/FCoE are enabled then it will also set the per PF
9852 * based filter sizes required for them. It also enables Flow director,
9853 * ethertype and macvlan type filter settings for the pf.
9855 * Returns 0 on success, negative on failure
9857 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9859 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9861 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9863 /* Flow Director is enabled */
9864 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9865 settings->enable_fdir = true;
9867 /* Ethtype and MACVLAN filters enabled for PF */
9868 settings->enable_ethtype = true;
9869 settings->enable_macvlan = true;
9871 if (i40e_set_filter_control(&pf->hw, settings))
9877 #define INFO_STRING_LEN 255
9878 static void i40e_print_features(struct i40e_pf *pf)
9880 struct i40e_hw *hw = &pf->hw;
9883 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9885 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9891 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9892 #ifdef CONFIG_PCI_IOV
9893 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9895 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9896 pf->hw.func_caps.num_vsis,
9897 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9898 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9900 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9901 buf += sprintf(buf, "RSS ");
9902 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9903 buf += sprintf(buf, "FD_ATR ");
9904 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9905 buf += sprintf(buf, "FD_SB ");
9906 buf += sprintf(buf, "NTUPLE ");
9908 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9909 buf += sprintf(buf, "DCB ");
9910 if (pf->flags & I40E_FLAG_PTP)
9911 buf += sprintf(buf, "PTP ");
9913 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9914 buf += sprintf(buf, "FCOE ");
9917 BUG_ON(buf > (string + INFO_STRING_LEN));
9918 dev_info(&pf->pdev->dev, "%s\n", string);
9923 * i40e_probe - Device initialization routine
9924 * @pdev: PCI device information struct
9925 * @ent: entry in i40e_pci_tbl
9927 * i40e_probe initializes a PF identified by a pci_dev structure.
9928 * The OS initialization, configuring of the PF private structure,
9929 * and a hardware reset occur.
9931 * Returns 0 on success, negative on failure
9933 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9935 struct i40e_aq_get_phy_abilities_resp abilities;
9938 static u16 pfs_found;
9945 err = pci_enable_device_mem(pdev);
9949 /* set up for high or low dma */
9950 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9952 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9955 "DMA configuration failed: 0x%x\n", err);
9960 /* set up pci connections */
9961 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9962 IORESOURCE_MEM), i40e_driver_name);
9964 dev_info(&pdev->dev,
9965 "pci_request_selected_regions failed %d\n", err);
9969 pci_enable_pcie_error_reporting(pdev);
9970 pci_set_master(pdev);
9972 /* Now that we have a PCI connection, we need to do the
9973 * low level device setup. This is primarily setting up
9974 * the Admin Queue structures and then querying for the
9975 * device's current profile information.
9977 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9984 set_bit(__I40E_DOWN, &pf->state);
9989 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9990 I40E_MAX_CSR_SPACE);
9992 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
9995 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9996 (unsigned int)pci_resource_start(pdev, 0),
9997 pf->ioremap_len, err);
10000 hw->vendor_id = pdev->vendor;
10001 hw->device_id = pdev->device;
10002 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10003 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10004 hw->subsystem_device_id = pdev->subsystem_device;
10005 hw->bus.device = PCI_SLOT(pdev->devfn);
10006 hw->bus.func = PCI_FUNC(pdev->devfn);
10007 pf->instance = pfs_found;
10010 pf->msg_enable = pf->hw.debug_mask;
10011 pf->msg_enable = debug;
10014 /* do a special CORER for clearing PXE mode once at init */
10015 if (hw->revision_id == 0 &&
10016 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10017 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10022 i40e_clear_pxe_mode(hw);
10025 /* Reset here to make sure all is clean and to define PF 'n' */
10027 err = i40e_pf_reset(hw);
10029 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10034 hw->aq.num_arq_entries = I40E_AQ_LEN;
10035 hw->aq.num_asq_entries = I40E_AQ_LEN;
10036 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10037 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10038 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10040 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10042 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10044 err = i40e_init_shared_code(hw);
10046 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10051 /* set up a default setting for link flow control */
10052 pf->hw.fc.requested_mode = I40E_FC_NONE;
10054 err = i40e_init_adminq(hw);
10055 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10057 dev_info(&pdev->dev,
10058 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10062 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10063 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10064 dev_info(&pdev->dev,
10065 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10066 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10067 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10068 dev_info(&pdev->dev,
10069 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10071 i40e_verify_eeprom(pf);
10073 /* Rev 0 hardware was never productized */
10074 if (hw->revision_id < 1)
10075 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10077 i40e_clear_pxe_mode(hw);
10078 err = i40e_get_capabilities(pf);
10080 goto err_adminq_setup;
10082 err = i40e_sw_init(pf);
10084 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10088 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10089 hw->func_caps.num_rx_qp,
10090 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10092 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10093 goto err_init_lan_hmc;
10096 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10098 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10100 goto err_configure_lan_hmc;
10103 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10104 * Ignore error return codes because if it was already disabled via
10105 * hardware settings this will fail
10107 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10108 (pf->hw.aq.fw_maj_ver < 4)) {
10109 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10110 i40e_aq_stop_lldp(hw, true, NULL);
10113 i40e_get_mac_addr(hw, hw->mac.addr);
10114 if (!is_valid_ether_addr(hw->mac.addr)) {
10115 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10119 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10120 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10121 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10122 if (is_valid_ether_addr(hw->mac.port_addr))
10123 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10125 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10127 dev_info(&pdev->dev,
10128 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10129 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10130 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10132 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10134 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10135 #endif /* I40E_FCOE */
10137 pci_set_drvdata(pdev, pf);
10138 pci_save_state(pdev);
10139 #ifdef CONFIG_I40E_DCB
10140 err = i40e_init_pf_dcb(pf);
10142 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10143 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10144 /* Continue without DCB enabled */
10146 #endif /* CONFIG_I40E_DCB */
10148 /* set up periodic task facility */
10149 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10150 pf->service_timer_period = HZ;
10152 INIT_WORK(&pf->service_task, i40e_service_task);
10153 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10154 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10156 /* NVM bit on means WoL disabled for the port */
10157 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10158 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10159 pf->wol_en = false;
10162 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10164 /* set up the main switch operations */
10165 i40e_determine_queue_usage(pf);
10166 err = i40e_init_interrupt_scheme(pf);
10168 goto err_switch_setup;
10170 /* The number of VSIs reported by the FW is the minimum guaranteed
10171 * to us; HW supports far more and we share the remaining pool with
10172 * the other PFs. We allocate space for more than the guarantee with
10173 * the understanding that we might not get them all later.
10175 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10176 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10178 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10180 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10181 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10182 pf->vsi = kzalloc(len, GFP_KERNEL);
10185 goto err_switch_setup;
10188 #ifdef CONFIG_PCI_IOV
10189 /* prep for VF support */
10190 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10191 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10192 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10193 if (pci_num_vf(pdev))
10194 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10197 err = i40e_setup_pf_switch(pf, false);
10199 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10202 /* if FDIR VSI was set up, start it now */
10203 for (i = 0; i < pf->num_alloc_vsi; i++) {
10204 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10205 i40e_vsi_open(pf->vsi[i]);
10210 /* driver is only interested in link up/down and module qualification
10211 * reports from firmware
10213 err = i40e_aq_set_phy_int_mask(&pf->hw,
10214 I40E_AQ_EVENT_LINK_UPDOWN |
10215 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10217 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10218 i40e_stat_str(&pf->hw, err),
10219 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10221 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10222 (pf->hw.aq.fw_maj_ver < 4)) {
10224 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10226 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10227 i40e_stat_str(&pf->hw, err),
10228 i40e_aq_str(&pf->hw,
10229 pf->hw.aq.asq_last_status));
10231 /* The main driver is (mostly) up and happy. We need to set this state
10232 * before setting up the misc vector or we get a race and the vector
10233 * ends up disabled forever.
10235 clear_bit(__I40E_DOWN, &pf->state);
10237 /* In case of MSIX we are going to setup the misc vector right here
10238 * to handle admin queue events etc. In case of legacy and MSI
10239 * the misc functionality and queue processing is combined in
10240 * the same vector and that gets setup at open.
10242 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10243 err = i40e_setup_misc_vector(pf);
10245 dev_info(&pdev->dev,
10246 "setup of misc vector failed: %d\n", err);
10251 #ifdef CONFIG_PCI_IOV
10252 /* prep for VF support */
10253 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10254 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10255 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10258 /* disable link interrupts for VFs */
10259 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10260 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10261 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10264 if (pci_num_vf(pdev)) {
10265 dev_info(&pdev->dev,
10266 "Active VFs found, allocating resources.\n");
10267 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10269 dev_info(&pdev->dev,
10270 "Error %d allocating resources for existing VFs\n",
10274 #endif /* CONFIG_PCI_IOV */
10278 i40e_dbg_pf_init(pf);
10280 /* tell the firmware that we're starting */
10281 i40e_send_version(pf);
10283 /* since everything's happy, start the service_task timer */
10284 mod_timer(&pf->service_timer,
10285 round_jiffies(jiffies + pf->service_timer_period));
10288 /* create FCoE interface */
10289 i40e_fcoe_vsi_setup(pf);
10292 /* Get the negotiated link width and speed from PCI config space */
10293 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10295 i40e_set_pci_config_data(hw, link_status);
10297 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10298 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10299 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10300 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10302 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10303 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10304 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10305 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10308 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10309 hw->bus.speed < i40e_bus_speed_8000) {
10310 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10311 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10314 /* get the requested speeds from the fw */
10315 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10317 dev_info(&pf->pdev->dev,
10318 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10319 i40e_stat_str(&pf->hw, err),
10320 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10321 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10323 /* print a string summarizing features */
10324 i40e_print_features(pf);
10328 /* Unwind what we've done if something failed in the setup */
10330 set_bit(__I40E_DOWN, &pf->state);
10331 i40e_clear_interrupt_scheme(pf);
10334 i40e_reset_interrupt_capability(pf);
10335 del_timer_sync(&pf->service_timer);
10337 err_configure_lan_hmc:
10338 (void)i40e_shutdown_lan_hmc(hw);
10340 kfree(pf->qp_pile);
10343 (void)i40e_shutdown_adminq(hw);
10345 iounmap(hw->hw_addr);
10349 pci_disable_pcie_error_reporting(pdev);
10350 pci_release_selected_regions(pdev,
10351 pci_select_bars(pdev, IORESOURCE_MEM));
10354 pci_disable_device(pdev);
10359 * i40e_remove - Device removal routine
10360 * @pdev: PCI device information struct
10362 * i40e_remove is called by the PCI subsystem to alert the driver
10363 * that is should release a PCI device. This could be caused by a
10364 * Hot-Plug event, or because the driver is going to be removed from
10367 static void i40e_remove(struct pci_dev *pdev)
10369 struct i40e_pf *pf = pci_get_drvdata(pdev);
10370 i40e_status ret_code;
10373 i40e_dbg_pf_exit(pf);
10377 /* no more scheduling of any task */
10378 set_bit(__I40E_DOWN, &pf->state);
10379 del_timer_sync(&pf->service_timer);
10380 cancel_work_sync(&pf->service_task);
10381 i40e_fdir_teardown(pf);
10383 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10385 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10388 i40e_fdir_teardown(pf);
10390 /* If there is a switch structure or any orphans, remove them.
10391 * This will leave only the PF's VSI remaining.
10393 for (i = 0; i < I40E_MAX_VEB; i++) {
10397 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10398 pf->veb[i]->uplink_seid == 0)
10399 i40e_switch_branch_release(pf->veb[i]);
10402 /* Now we can shutdown the PF's VSI, just before we kill
10405 if (pf->vsi[pf->lan_vsi])
10406 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10408 /* shutdown and destroy the HMC */
10409 if (pf->hw.hmc.hmc_obj) {
10410 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10412 dev_warn(&pdev->dev,
10413 "Failed to destroy the HMC resources: %d\n",
10417 /* shutdown the adminq */
10418 ret_code = i40e_shutdown_adminq(&pf->hw);
10420 dev_warn(&pdev->dev,
10421 "Failed to destroy the Admin Queue resources: %d\n",
10424 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10425 i40e_clear_interrupt_scheme(pf);
10426 for (i = 0; i < pf->num_alloc_vsi; i++) {
10428 i40e_vsi_clear_rings(pf->vsi[i]);
10429 i40e_vsi_clear(pf->vsi[i]);
10434 for (i = 0; i < I40E_MAX_VEB; i++) {
10439 kfree(pf->qp_pile);
10442 iounmap(pf->hw.hw_addr);
10444 pci_release_selected_regions(pdev,
10445 pci_select_bars(pdev, IORESOURCE_MEM));
10447 pci_disable_pcie_error_reporting(pdev);
10448 pci_disable_device(pdev);
10452 * i40e_pci_error_detected - warning that something funky happened in PCI land
10453 * @pdev: PCI device information struct
10455 * Called to warn that something happened and the error handling steps
10456 * are in progress. Allows the driver to quiesce things, be ready for
10459 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10460 enum pci_channel_state error)
10462 struct i40e_pf *pf = pci_get_drvdata(pdev);
10464 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10466 /* shutdown all operations */
10467 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10469 i40e_prep_for_reset(pf);
10473 /* Request a slot reset */
10474 return PCI_ERS_RESULT_NEED_RESET;
10478 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10479 * @pdev: PCI device information struct
10481 * Called to find if the driver can work with the device now that
10482 * the pci slot has been reset. If a basic connection seems good
10483 * (registers are readable and have sane content) then return a
10484 * happy little PCI_ERS_RESULT_xxx.
10486 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10488 struct i40e_pf *pf = pci_get_drvdata(pdev);
10489 pci_ers_result_t result;
10493 dev_dbg(&pdev->dev, "%s\n", __func__);
10494 if (pci_enable_device_mem(pdev)) {
10495 dev_info(&pdev->dev,
10496 "Cannot re-enable PCI device after reset.\n");
10497 result = PCI_ERS_RESULT_DISCONNECT;
10499 pci_set_master(pdev);
10500 pci_restore_state(pdev);
10501 pci_save_state(pdev);
10502 pci_wake_from_d3(pdev, false);
10504 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10506 result = PCI_ERS_RESULT_RECOVERED;
10508 result = PCI_ERS_RESULT_DISCONNECT;
10511 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10513 dev_info(&pdev->dev,
10514 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10516 /* non-fatal, continue */
10523 * i40e_pci_error_resume - restart operations after PCI error recovery
10524 * @pdev: PCI device information struct
10526 * Called to allow the driver to bring things back up after PCI error
10527 * and/or reset recovery has finished.
10529 static void i40e_pci_error_resume(struct pci_dev *pdev)
10531 struct i40e_pf *pf = pci_get_drvdata(pdev);
10533 dev_dbg(&pdev->dev, "%s\n", __func__);
10534 if (test_bit(__I40E_SUSPENDED, &pf->state))
10538 i40e_handle_reset_warning(pf);
10543 * i40e_shutdown - PCI callback for shutting down
10544 * @pdev: PCI device information struct
10546 static void i40e_shutdown(struct pci_dev *pdev)
10548 struct i40e_pf *pf = pci_get_drvdata(pdev);
10549 struct i40e_hw *hw = &pf->hw;
10551 set_bit(__I40E_SUSPENDED, &pf->state);
10552 set_bit(__I40E_DOWN, &pf->state);
10554 i40e_prep_for_reset(pf);
10557 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10558 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10560 del_timer_sync(&pf->service_timer);
10561 cancel_work_sync(&pf->service_task);
10562 i40e_fdir_teardown(pf);
10565 i40e_prep_for_reset(pf);
10568 wr32(hw, I40E_PFPM_APM,
10569 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10570 wr32(hw, I40E_PFPM_WUFC,
10571 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10573 i40e_clear_interrupt_scheme(pf);
10575 if (system_state == SYSTEM_POWER_OFF) {
10576 pci_wake_from_d3(pdev, pf->wol_en);
10577 pci_set_power_state(pdev, PCI_D3hot);
10583 * i40e_suspend - PCI callback for moving to D3
10584 * @pdev: PCI device information struct
10586 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10588 struct i40e_pf *pf = pci_get_drvdata(pdev);
10589 struct i40e_hw *hw = &pf->hw;
10591 set_bit(__I40E_SUSPENDED, &pf->state);
10592 set_bit(__I40E_DOWN, &pf->state);
10595 i40e_prep_for_reset(pf);
10598 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10599 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10601 pci_wake_from_d3(pdev, pf->wol_en);
10602 pci_set_power_state(pdev, PCI_D3hot);
10608 * i40e_resume - PCI callback for waking up from D3
10609 * @pdev: PCI device information struct
10611 static int i40e_resume(struct pci_dev *pdev)
10613 struct i40e_pf *pf = pci_get_drvdata(pdev);
10616 pci_set_power_state(pdev, PCI_D0);
10617 pci_restore_state(pdev);
10618 /* pci_restore_state() clears dev->state_saves, so
10619 * call pci_save_state() again to restore it.
10621 pci_save_state(pdev);
10623 err = pci_enable_device_mem(pdev);
10625 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10628 pci_set_master(pdev);
10630 /* no wakeup events while running */
10631 pci_wake_from_d3(pdev, false);
10633 /* handling the reset will rebuild the device state */
10634 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10635 clear_bit(__I40E_DOWN, &pf->state);
10637 i40e_reset_and_rebuild(pf, false);
10645 static const struct pci_error_handlers i40e_err_handler = {
10646 .error_detected = i40e_pci_error_detected,
10647 .slot_reset = i40e_pci_error_slot_reset,
10648 .resume = i40e_pci_error_resume,
10651 static struct pci_driver i40e_driver = {
10652 .name = i40e_driver_name,
10653 .id_table = i40e_pci_tbl,
10654 .probe = i40e_probe,
10655 .remove = i40e_remove,
10657 .suspend = i40e_suspend,
10658 .resume = i40e_resume,
10660 .shutdown = i40e_shutdown,
10661 .err_handler = &i40e_err_handler,
10662 .sriov_configure = i40e_pci_sriov_configure,
10666 * i40e_init_module - Driver registration routine
10668 * i40e_init_module is the first routine called when the driver is
10669 * loaded. All it does is register with the PCI subsystem.
10671 static int __init i40e_init_module(void)
10673 pr_info("%s: %s - version %s\n", i40e_driver_name,
10674 i40e_driver_string, i40e_driver_version_str);
10675 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10678 return pci_register_driver(&i40e_driver);
10680 module_init(i40e_init_module);
10683 * i40e_exit_module - Driver exit cleanup routine
10685 * i40e_exit_module is called just before the driver is removed
10688 static void __exit i40e_exit_module(void)
10690 pci_unregister_driver(&i40e_driver);
10693 module_exit(i40e_exit_module);