1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 6
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 /* required last entry */
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL");
95 MODULE_VERSION(DRV_VERSION);
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
104 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
105 u64 size, u32 alignment)
107 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
109 mem->size = ALIGN(size, alignment);
110 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
111 &mem->pa, GFP_KERNEL);
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
123 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
125 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
127 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
141 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 mem->va = kzalloc(size, GFP_KERNEL);
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
158 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
160 /* it's ok to kfree a NULL pointer */
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
175 * Returns the base item index of the lump, or negative for error
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
181 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
187 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
188 dev_info(&pf->pdev->dev,
189 "param err: pile=%p needed=%d id=0x%04x\n",
194 /* start the linear search with an imperfect hint */
195 i = pile->search_hint;
196 while (i < pile->num_entries) {
197 /* skip already allocated entries */
198 if (pile->list[i] & I40E_PILE_VALID_BIT) {
203 /* do we have enough in this lump? */
204 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
205 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
210 /* there was enough, so assign it to the requestor */
211 for (j = 0; j < needed; j++)
212 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
214 pile->search_hint = i + j;
217 /* not enough, so skip over it and continue looking */
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
231 * Returns the count of items in the lump
233 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
235 int valid_id = (id | I40E_PILE_VALID_BIT);
239 if (!pile || index >= pile->num_entries)
243 i < pile->num_entries && pile->list[i] == valid_id;
249 if (count && index < pile->search_hint)
250 pile->search_hint = index;
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf - the pf structure to search for the vsi
258 * @id - id of the vsi it is searching for
260 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 for (i = 0; i < pf->num_alloc_vsi; i++)
265 if (pf->vsi[i] && (pf->vsi[i]->id == id))
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
275 * If not already scheduled, this puts the task into the work queue
277 static void i40e_service_event_schedule(struct i40e_pf *pf)
279 if (!test_bit(__I40E_DOWN, &pf->state) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
281 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
282 schedule_work(&pf->service_task);
286 * i40e_tx_timeout - Respond to a Tx Hang
287 * @netdev: network interface device structure
289 * If any port has noticed a Tx timeout, it is likely that the whole
290 * device is munged, not just the one netdev port, so go for the full
294 void i40e_tx_timeout(struct net_device *netdev)
296 static void i40e_tx_timeout(struct net_device *netdev)
299 struct i40e_netdev_priv *np = netdev_priv(netdev);
300 struct i40e_vsi *vsi = np->vsi;
301 struct i40e_pf *pf = vsi->back;
303 pf->tx_timeout_count++;
305 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
306 pf->tx_timeout_recovery_level = 1;
307 pf->tx_timeout_last_recovery = jiffies;
308 netdev_info(netdev, "tx_timeout recovery level %d\n",
309 pf->tx_timeout_recovery_level);
311 switch (pf->tx_timeout_recovery_level) {
313 /* disable and re-enable queues for the VSI */
314 if (in_interrupt()) {
315 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
316 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
318 i40e_vsi_reinit_locked(vsi);
322 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
325 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
328 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
331 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
332 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
333 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
336 i40e_service_event_schedule(pf);
337 pf->tx_timeout_recovery_level++;
341 * i40e_release_rx_desc - Store the new tail and head values
342 * @rx_ring: ring to bump
343 * @val: new head index
345 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
347 rx_ring->next_to_use = val;
349 /* Force memory writes to complete before letting h/w
350 * know there are new descriptors to fetch. (Only
351 * applicable for weak-ordered memory model archs,
355 writel(val, rx_ring->tail);
359 * i40e_get_vsi_stats_struct - Get System Network Statistics
360 * @vsi: the VSI we care about
362 * Returns the address of the device statistics structure.
363 * The statistics are actually updated from the service task.
365 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
367 return &vsi->net_stats;
371 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
372 * @netdev: network interface device structure
374 * Returns the address of the device statistics structure.
375 * The statistics are actually updated from the service task.
378 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
379 struct net_device *netdev,
380 struct rtnl_link_stats64 *stats)
382 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
383 struct net_device *netdev,
384 struct rtnl_link_stats64 *stats)
387 struct i40e_netdev_priv *np = netdev_priv(netdev);
388 struct i40e_ring *tx_ring, *rx_ring;
389 struct i40e_vsi *vsi = np->vsi;
390 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
393 if (test_bit(__I40E_DOWN, &vsi->state))
400 for (i = 0; i < vsi->num_queue_pairs; i++) {
404 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
409 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
410 packets = tx_ring->stats.packets;
411 bytes = tx_ring->stats.bytes;
412 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
414 stats->tx_packets += packets;
415 stats->tx_bytes += bytes;
416 rx_ring = &tx_ring[1];
419 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
420 packets = rx_ring->stats.packets;
421 bytes = rx_ring->stats.bytes;
422 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
424 stats->rx_packets += packets;
425 stats->rx_bytes += bytes;
429 /* following stats updated by i40e_watchdog_subtask() */
430 stats->multicast = vsi_stats->multicast;
431 stats->tx_errors = vsi_stats->tx_errors;
432 stats->tx_dropped = vsi_stats->tx_dropped;
433 stats->rx_errors = vsi_stats->rx_errors;
434 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
435 stats->rx_length_errors = vsi_stats->rx_length_errors;
441 * i40e_vsi_reset_stats - Resets all stats of the given vsi
442 * @vsi: the VSI to have its stats reset
444 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
446 struct rtnl_link_stats64 *ns;
452 ns = i40e_get_vsi_stats_struct(vsi);
453 memset(ns, 0, sizeof(*ns));
454 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
455 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
456 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
457 if (vsi->rx_rings && vsi->rx_rings[0]) {
458 for (i = 0; i < vsi->num_queue_pairs; i++) {
459 memset(&vsi->rx_rings[i]->stats, 0 ,
460 sizeof(vsi->rx_rings[i]->stats));
461 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
462 sizeof(vsi->rx_rings[i]->rx_stats));
463 memset(&vsi->tx_rings[i]->stats, 0 ,
464 sizeof(vsi->tx_rings[i]->stats));
465 memset(&vsi->tx_rings[i]->tx_stats, 0,
466 sizeof(vsi->tx_rings[i]->tx_stats));
469 vsi->stat_offsets_loaded = false;
473 * i40e_pf_reset_stats - Reset all of the stats for the given PF
474 * @pf: the PF to be reset
476 void i40e_pf_reset_stats(struct i40e_pf *pf)
480 memset(&pf->stats, 0, sizeof(pf->stats));
481 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
482 pf->stat_offsets_loaded = false;
484 for (i = 0; i < I40E_MAX_VEB; i++) {
486 memset(&pf->veb[i]->stats, 0,
487 sizeof(pf->veb[i]->stats));
488 memset(&pf->veb[i]->stats_offsets, 0,
489 sizeof(pf->veb[i]->stats_offsets));
490 pf->veb[i]->stat_offsets_loaded = false;
496 * i40e_stat_update48 - read and update a 48 bit stat from the chip
497 * @hw: ptr to the hardware info
498 * @hireg: the high 32 bit reg to read
499 * @loreg: the low 32 bit reg to read
500 * @offset_loaded: has the initial offset been loaded yet
501 * @offset: ptr to current offset value
502 * @stat: ptr to the stat
504 * Since the device stats are not reset at PFReset, they likely will not
505 * be zeroed when the driver starts. We'll save the first values read
506 * and use them as offsets to be subtracted from the raw values in order
507 * to report stats that count from zero. In the process, we also manage
508 * the potential roll-over.
510 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
511 bool offset_loaded, u64 *offset, u64 *stat)
515 if (hw->device_id == I40E_DEV_ID_QEMU) {
516 new_data = rd32(hw, loreg);
517 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
519 new_data = rd64(hw, loreg);
523 if (likely(new_data >= *offset))
524 *stat = new_data - *offset;
526 *stat = (new_data + BIT_ULL(48)) - *offset;
527 *stat &= 0xFFFFFFFFFFFFULL;
531 * i40e_stat_update32 - read and update a 32 bit stat from the chip
532 * @hw: ptr to the hardware info
533 * @reg: the hw reg to read
534 * @offset_loaded: has the initial offset been loaded yet
535 * @offset: ptr to current offset value
536 * @stat: ptr to the stat
538 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
539 bool offset_loaded, u64 *offset, u64 *stat)
543 new_data = rd32(hw, reg);
546 if (likely(new_data >= *offset))
547 *stat = (u32)(new_data - *offset);
549 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
553 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
554 * @vsi: the VSI to be updated
556 void i40e_update_eth_stats(struct i40e_vsi *vsi)
558 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
559 struct i40e_pf *pf = vsi->back;
560 struct i40e_hw *hw = &pf->hw;
561 struct i40e_eth_stats *oes;
562 struct i40e_eth_stats *es; /* device's eth stats */
564 es = &vsi->eth_stats;
565 oes = &vsi->eth_stats_offsets;
567 /* Gather up the stats that the hw collects */
568 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->tx_errors, &es->tx_errors);
571 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
572 vsi->stat_offsets_loaded,
573 &oes->rx_discards, &es->rx_discards);
574 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
577 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
578 vsi->stat_offsets_loaded,
579 &oes->tx_errors, &es->tx_errors);
581 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
582 I40E_GLV_GORCL(stat_idx),
583 vsi->stat_offsets_loaded,
584 &oes->rx_bytes, &es->rx_bytes);
585 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
586 I40E_GLV_UPRCL(stat_idx),
587 vsi->stat_offsets_loaded,
588 &oes->rx_unicast, &es->rx_unicast);
589 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
590 I40E_GLV_MPRCL(stat_idx),
591 vsi->stat_offsets_loaded,
592 &oes->rx_multicast, &es->rx_multicast);
593 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
594 I40E_GLV_BPRCL(stat_idx),
595 vsi->stat_offsets_loaded,
596 &oes->rx_broadcast, &es->rx_broadcast);
598 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
599 I40E_GLV_GOTCL(stat_idx),
600 vsi->stat_offsets_loaded,
601 &oes->tx_bytes, &es->tx_bytes);
602 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
603 I40E_GLV_UPTCL(stat_idx),
604 vsi->stat_offsets_loaded,
605 &oes->tx_unicast, &es->tx_unicast);
606 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
607 I40E_GLV_MPTCL(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->tx_multicast, &es->tx_multicast);
610 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
611 I40E_GLV_BPTCL(stat_idx),
612 vsi->stat_offsets_loaded,
613 &oes->tx_broadcast, &es->tx_broadcast);
614 vsi->stat_offsets_loaded = true;
618 * i40e_update_veb_stats - Update Switch component statistics
619 * @veb: the VEB being updated
621 static void i40e_update_veb_stats(struct i40e_veb *veb)
623 struct i40e_pf *pf = veb->pf;
624 struct i40e_hw *hw = &pf->hw;
625 struct i40e_eth_stats *oes;
626 struct i40e_eth_stats *es; /* device's eth stats */
629 idx = veb->stats_idx;
631 oes = &veb->stats_offsets;
633 /* Gather up the stats that the hw collects */
634 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
635 veb->stat_offsets_loaded,
636 &oes->tx_discards, &es->tx_discards);
637 if (hw->revision_id > 0)
638 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
639 veb->stat_offsets_loaded,
640 &oes->rx_unknown_protocol,
641 &es->rx_unknown_protocol);
642 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
643 veb->stat_offsets_loaded,
644 &oes->rx_bytes, &es->rx_bytes);
645 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
646 veb->stat_offsets_loaded,
647 &oes->rx_unicast, &es->rx_unicast);
648 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
649 veb->stat_offsets_loaded,
650 &oes->rx_multicast, &es->rx_multicast);
651 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
652 veb->stat_offsets_loaded,
653 &oes->rx_broadcast, &es->rx_broadcast);
655 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
656 veb->stat_offsets_loaded,
657 &oes->tx_bytes, &es->tx_bytes);
658 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
659 veb->stat_offsets_loaded,
660 &oes->tx_unicast, &es->tx_unicast);
661 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
662 veb->stat_offsets_loaded,
663 &oes->tx_multicast, &es->tx_multicast);
664 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
665 veb->stat_offsets_loaded,
666 &oes->tx_broadcast, &es->tx_broadcast);
667 veb->stat_offsets_loaded = true;
672 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
673 * @vsi: the VSI that is capable of doing FCoE
675 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
677 struct i40e_pf *pf = vsi->back;
678 struct i40e_hw *hw = &pf->hw;
679 struct i40e_fcoe_stats *ofs;
680 struct i40e_fcoe_stats *fs; /* device's eth stats */
683 if (vsi->type != I40E_VSI_FCOE)
686 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
687 fs = &vsi->fcoe_stats;
688 ofs = &vsi->fcoe_stats_offsets;
690 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
691 vsi->fcoe_stat_offsets_loaded,
692 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
693 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
694 vsi->fcoe_stat_offsets_loaded,
695 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
696 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
697 vsi->fcoe_stat_offsets_loaded,
698 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
699 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
700 vsi->fcoe_stat_offsets_loaded,
701 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
702 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
703 vsi->fcoe_stat_offsets_loaded,
704 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
705 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
706 vsi->fcoe_stat_offsets_loaded,
707 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
708 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
709 vsi->fcoe_stat_offsets_loaded,
710 &ofs->fcoe_last_error, &fs->fcoe_last_error);
711 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
712 vsi->fcoe_stat_offsets_loaded,
713 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
715 vsi->fcoe_stat_offsets_loaded = true;
720 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
721 * @pf: the corresponding PF
723 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
725 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
727 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
728 struct i40e_hw_port_stats *nsd = &pf->stats;
729 struct i40e_hw *hw = &pf->hw;
733 if ((hw->fc.current_mode != I40E_FC_FULL) &&
734 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
737 xoff = nsd->link_xoff_rx;
738 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
739 pf->stat_offsets_loaded,
740 &osd->link_xoff_rx, &nsd->link_xoff_rx);
742 /* No new LFC xoff rx */
743 if (!(nsd->link_xoff_rx - xoff))
746 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
747 for (v = 0; v < pf->num_alloc_vsi; v++) {
748 struct i40e_vsi *vsi = pf->vsi[v];
750 if (!vsi || !vsi->tx_rings[0])
753 for (i = 0; i < vsi->num_queue_pairs; i++) {
754 struct i40e_ring *ring = vsi->tx_rings[i];
755 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
761 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
762 * @pf: the corresponding PF
764 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
766 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
768 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
769 struct i40e_hw_port_stats *nsd = &pf->stats;
770 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
771 struct i40e_dcbx_config *dcb_cfg;
772 struct i40e_hw *hw = &pf->hw;
776 dcb_cfg = &hw->local_dcbx_config;
778 /* Collect Link XOFF stats when PFC is disabled */
779 if (!dcb_cfg->pfc.pfcenable) {
780 i40e_update_link_xoff_rx(pf);
784 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
785 u64 prio_xoff = nsd->priority_xoff_rx[i];
786 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
787 pf->stat_offsets_loaded,
788 &osd->priority_xoff_rx[i],
789 &nsd->priority_xoff_rx[i]);
791 /* No new PFC xoff rx */
792 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
794 /* Get the TC for given priority */
795 tc = dcb_cfg->etscfg.prioritytable[i];
799 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
800 for (v = 0; v < pf->num_alloc_vsi; v++) {
801 struct i40e_vsi *vsi = pf->vsi[v];
803 if (!vsi || !vsi->tx_rings[0])
806 for (i = 0; i < vsi->num_queue_pairs; i++) {
807 struct i40e_ring *ring = vsi->tx_rings[i];
811 clear_bit(__I40E_HANG_CHECK_ARMED,
818 * i40e_update_vsi_stats - Update the vsi statistics counters.
819 * @vsi: the VSI to be updated
821 * There are a few instances where we store the same stat in a
822 * couple of different structs. This is partly because we have
823 * the netdev stats that need to be filled out, which is slightly
824 * different from the "eth_stats" defined by the chip and used in
825 * VF communications. We sort it out here.
827 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
829 struct i40e_pf *pf = vsi->back;
830 struct rtnl_link_stats64 *ons;
831 struct rtnl_link_stats64 *ns; /* netdev stats */
832 struct i40e_eth_stats *oes;
833 struct i40e_eth_stats *es; /* device's eth stats */
834 u32 tx_restart, tx_busy;
843 if (test_bit(__I40E_DOWN, &vsi->state) ||
844 test_bit(__I40E_CONFIG_BUSY, &pf->state))
847 ns = i40e_get_vsi_stats_struct(vsi);
848 ons = &vsi->net_stats_offsets;
849 es = &vsi->eth_stats;
850 oes = &vsi->eth_stats_offsets;
852 /* Gather up the netdev and vsi stats that the driver collects
853 * on the fly during packet processing
857 tx_restart = tx_busy = 0;
861 for (q = 0; q < vsi->num_queue_pairs; q++) {
863 p = ACCESS_ONCE(vsi->tx_rings[q]);
866 start = u64_stats_fetch_begin_irq(&p->syncp);
867 packets = p->stats.packets;
868 bytes = p->stats.bytes;
869 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
872 tx_restart += p->tx_stats.restart_queue;
873 tx_busy += p->tx_stats.tx_busy;
875 /* Rx queue is part of the same block as Tx queue */
878 start = u64_stats_fetch_begin_irq(&p->syncp);
879 packets = p->stats.packets;
880 bytes = p->stats.bytes;
881 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
884 rx_buf += p->rx_stats.alloc_buff_failed;
885 rx_page += p->rx_stats.alloc_page_failed;
888 vsi->tx_restart = tx_restart;
889 vsi->tx_busy = tx_busy;
890 vsi->rx_page_failed = rx_page;
891 vsi->rx_buf_failed = rx_buf;
893 ns->rx_packets = rx_p;
895 ns->tx_packets = tx_p;
898 /* update netdev stats from eth stats */
899 i40e_update_eth_stats(vsi);
900 ons->tx_errors = oes->tx_errors;
901 ns->tx_errors = es->tx_errors;
902 ons->multicast = oes->rx_multicast;
903 ns->multicast = es->rx_multicast;
904 ons->rx_dropped = oes->rx_discards;
905 ns->rx_dropped = es->rx_discards;
906 ons->tx_dropped = oes->tx_discards;
907 ns->tx_dropped = es->tx_discards;
909 /* pull in a couple PF stats if this is the main vsi */
910 if (vsi == pf->vsi[pf->lan_vsi]) {
911 ns->rx_crc_errors = pf->stats.crc_errors;
912 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
913 ns->rx_length_errors = pf->stats.rx_length_errors;
918 * i40e_update_pf_stats - Update the PF statistics counters.
919 * @pf: the PF to be updated
921 static void i40e_update_pf_stats(struct i40e_pf *pf)
923 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
924 struct i40e_hw_port_stats *nsd = &pf->stats;
925 struct i40e_hw *hw = &pf->hw;
929 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
930 I40E_GLPRT_GORCL(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
933 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
934 I40E_GLPRT_GOTCL(hw->port),
935 pf->stat_offsets_loaded,
936 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
937 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
938 pf->stat_offsets_loaded,
939 &osd->eth.rx_discards,
940 &nsd->eth.rx_discards);
941 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
942 I40E_GLPRT_UPRCL(hw->port),
943 pf->stat_offsets_loaded,
944 &osd->eth.rx_unicast,
945 &nsd->eth.rx_unicast);
946 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
947 I40E_GLPRT_MPRCL(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->eth.rx_multicast,
950 &nsd->eth.rx_multicast);
951 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
952 I40E_GLPRT_BPRCL(hw->port),
953 pf->stat_offsets_loaded,
954 &osd->eth.rx_broadcast,
955 &nsd->eth.rx_broadcast);
956 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
957 I40E_GLPRT_UPTCL(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->eth.tx_unicast,
960 &nsd->eth.tx_unicast);
961 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
962 I40E_GLPRT_MPTCL(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->eth.tx_multicast,
965 &nsd->eth.tx_multicast);
966 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
967 I40E_GLPRT_BPTCL(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->eth.tx_broadcast,
970 &nsd->eth.tx_broadcast);
972 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->tx_dropped_link_down,
975 &nsd->tx_dropped_link_down);
977 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->crc_errors, &nsd->crc_errors);
981 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->illegal_bytes, &nsd->illegal_bytes);
985 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->mac_local_faults,
988 &nsd->mac_local_faults);
989 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->mac_remote_faults,
992 &nsd->mac_remote_faults);
994 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->rx_length_errors,
997 &nsd->rx_length_errors);
999 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->link_xon_rx, &nsd->link_xon_rx);
1002 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->link_xon_tx, &nsd->link_xon_tx);
1005 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1006 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1010 for (i = 0; i < 8; i++) {
1011 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xon_rx[i],
1014 &nsd->priority_xon_rx[i]);
1015 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1016 pf->stat_offsets_loaded,
1017 &osd->priority_xon_tx[i],
1018 &nsd->priority_xon_tx[i]);
1019 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1020 pf->stat_offsets_loaded,
1021 &osd->priority_xoff_tx[i],
1022 &nsd->priority_xoff_tx[i]);
1023 i40e_stat_update32(hw,
1024 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1025 pf->stat_offsets_loaded,
1026 &osd->priority_xon_2_xoff[i],
1027 &nsd->priority_xon_2_xoff[i]);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1031 I40E_GLPRT_PRC64L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_64, &nsd->rx_size_64);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1035 I40E_GLPRT_PRC127L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_127, &nsd->rx_size_127);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1039 I40E_GLPRT_PRC255L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_255, &nsd->rx_size_255);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1043 I40E_GLPRT_PRC511L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_511, &nsd->rx_size_511);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1047 I40E_GLPRT_PRC1023L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_1023, &nsd->rx_size_1023);
1050 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1051 I40E_GLPRT_PRC1522L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->rx_size_1522, &nsd->rx_size_1522);
1054 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1055 I40E_GLPRT_PRC9522L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_size_big, &nsd->rx_size_big);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1060 I40E_GLPRT_PTC64L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_64, &nsd->tx_size_64);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1064 I40E_GLPRT_PTC127L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_127, &nsd->tx_size_127);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1068 I40E_GLPRT_PTC255L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_255, &nsd->tx_size_255);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1072 I40E_GLPRT_PTC511L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_511, &nsd->tx_size_511);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1076 I40E_GLPRT_PTC1023L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_1023, &nsd->tx_size_1023);
1079 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1080 I40E_GLPRT_PTC1522L(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->tx_size_1522, &nsd->tx_size_1522);
1083 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1084 I40E_GLPRT_PTC9522L(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->tx_size_big, &nsd->tx_size_big);
1088 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->rx_undersize, &nsd->rx_undersize);
1091 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_fragments, &nsd->rx_fragments);
1094 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_oversize, &nsd->rx_oversize);
1097 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_jabber, &nsd->rx_jabber);
1102 i40e_stat_update32(hw,
1103 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1104 pf->stat_offsets_loaded,
1105 &osd->fd_atr_match, &nsd->fd_atr_match);
1106 i40e_stat_update32(hw,
1107 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1108 pf->stat_offsets_loaded,
1109 &osd->fd_sb_match, &nsd->fd_sb_match);
1110 i40e_stat_update32(hw,
1111 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1112 pf->stat_offsets_loaded,
1113 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1115 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1116 nsd->tx_lpi_status =
1117 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1118 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1119 nsd->rx_lpi_status =
1120 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1121 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1122 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1123 pf->stat_offsets_loaded,
1124 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1125 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1126 pf->stat_offsets_loaded,
1127 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1129 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1130 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1131 nsd->fd_sb_status = true;
1133 nsd->fd_sb_status = false;
1135 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1136 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1137 nsd->fd_atr_status = true;
1139 nsd->fd_atr_status = false;
1141 pf->stat_offsets_loaded = true;
1145 * i40e_update_stats - Update the various statistics counters.
1146 * @vsi: the VSI to be updated
1148 * Update the various stats for this VSI and its related entities.
1150 void i40e_update_stats(struct i40e_vsi *vsi)
1152 struct i40e_pf *pf = vsi->back;
1154 if (vsi == pf->vsi[pf->lan_vsi])
1155 i40e_update_pf_stats(pf);
1157 i40e_update_vsi_stats(vsi);
1159 i40e_update_fcoe_stats(vsi);
1164 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address
1168 * @is_vf: make sure its a VF filter, else doesn't matter
1169 * @is_netdev: make sure its a netdev filter, else doesn't matter
1171 * Returns ptr to the filter object or NULL
1173 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1174 u8 *macaddr, s16 vlan,
1175 bool is_vf, bool is_netdev)
1177 struct i40e_mac_filter *f;
1179 if (!vsi || !macaddr)
1182 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1183 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1184 (vlan == f->vlan) &&
1185 (!is_vf || f->is_vf) &&
1186 (!is_netdev || f->is_netdev))
1193 * i40e_find_mac - Find a mac addr in the macvlan filters list
1194 * @vsi: the VSI to be searched
1195 * @macaddr: the MAC address we are searching for
1196 * @is_vf: make sure its a VF filter, else doesn't matter
1197 * @is_netdev: make sure its a netdev filter, else doesn't matter
1199 * Returns the first filter with the provided MAC address or NULL if
1200 * MAC address was not found
1202 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1203 bool is_vf, bool is_netdev)
1205 struct i40e_mac_filter *f;
1207 if (!vsi || !macaddr)
1210 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1211 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1212 (!is_vf || f->is_vf) &&
1213 (!is_netdev || f->is_netdev))
1220 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1221 * @vsi: the VSI to be searched
1223 * Returns true if VSI is in vlan mode or false otherwise
1225 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1227 struct i40e_mac_filter *f;
1229 /* Only -1 for all the filters denotes not in vlan mode
1230 * so we have to go through all the list in order to make sure
1232 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1241 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1242 * @vsi: the VSI to be searched
1243 * @macaddr: the mac address to be filtered
1244 * @is_vf: true if it is a VF
1245 * @is_netdev: true if it is a netdev
1247 * Goes through all the macvlan filters and adds a
1248 * macvlan filter for each unique vlan that already exists
1250 * Returns first filter found on success, else NULL
1252 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1253 bool is_vf, bool is_netdev)
1255 struct i40e_mac_filter *f;
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1258 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1259 is_vf, is_netdev)) {
1260 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1266 return list_first_entry_or_null(&vsi->mac_filter_list,
1267 struct i40e_mac_filter, list);
1271 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1272 * @vsi: the PF Main VSI - inappropriate for any other VSI
1273 * @macaddr: the MAC address
1275 * Some older firmware configurations set up a default promiscuous VLAN
1276 * filter that needs to be removed.
1278 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1280 struct i40e_aqc_remove_macvlan_element_data element;
1281 struct i40e_pf *pf = vsi->back;
1284 /* Only appropriate for the PF main VSI */
1285 if (vsi->type != I40E_VSI_MAIN)
1288 memset(&element, 0, sizeof(element));
1289 ether_addr_copy(element.mac_addr, macaddr);
1290 element.vlan_tag = 0;
1291 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1292 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1293 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1301 * i40e_add_filter - Add a mac/vlan filter to the VSI
1302 * @vsi: the VSI to be searched
1303 * @macaddr: the MAC address
1305 * @is_vf: make sure its a VF filter, else doesn't matter
1306 * @is_netdev: make sure its a netdev filter, else doesn't matter
1308 * Returns ptr to the filter object or NULL when no memory available.
1310 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1311 u8 *macaddr, s16 vlan,
1312 bool is_vf, bool is_netdev)
1314 struct i40e_mac_filter *f;
1316 if (!vsi || !macaddr)
1319 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1321 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1323 goto add_filter_out;
1325 ether_addr_copy(f->macaddr, macaddr);
1329 INIT_LIST_HEAD(&f->list);
1330 list_add(&f->list, &vsi->mac_filter_list);
1333 /* increment counter and add a new flag if needed */
1339 } else if (is_netdev) {
1340 if (!f->is_netdev) {
1341 f->is_netdev = true;
1348 /* changed tells sync_filters_subtask to
1349 * push the filter down to the firmware
1352 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1353 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1361 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1362 * @vsi: the VSI to be searched
1363 * @macaddr: the MAC address
1365 * @is_vf: make sure it's a VF filter, else doesn't matter
1366 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1368 void i40e_del_filter(struct i40e_vsi *vsi,
1369 u8 *macaddr, s16 vlan,
1370 bool is_vf, bool is_netdev)
1372 struct i40e_mac_filter *f;
1374 if (!vsi || !macaddr)
1377 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1378 if (!f || f->counter == 0)
1386 } else if (is_netdev) {
1388 f->is_netdev = false;
1392 /* make sure we don't remove a filter in use by VF or netdev */
1394 min_f += (f->is_vf ? 1 : 0);
1395 min_f += (f->is_netdev ? 1 : 0);
1397 if (f->counter > min_f)
1401 /* counter == 0 tells sync_filters_subtask to
1402 * remove the filter from the firmware's list
1404 if (f->counter == 0) {
1406 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1407 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1412 * i40e_set_mac - NDO callback to set mac address
1413 * @netdev: network interface device structure
1414 * @p: pointer to an address structure
1416 * Returns 0 on success, negative on failure
1419 int i40e_set_mac(struct net_device *netdev, void *p)
1421 static int i40e_set_mac(struct net_device *netdev, void *p)
1424 struct i40e_netdev_priv *np = netdev_priv(netdev);
1425 struct i40e_vsi *vsi = np->vsi;
1426 struct i40e_pf *pf = vsi->back;
1427 struct i40e_hw *hw = &pf->hw;
1428 struct sockaddr *addr = p;
1429 struct i40e_mac_filter *f;
1431 if (!is_valid_ether_addr(addr->sa_data))
1432 return -EADDRNOTAVAIL;
1434 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1435 netdev_info(netdev, "already using mac address %pM\n",
1440 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1441 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1442 return -EADDRNOTAVAIL;
1444 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1445 netdev_info(netdev, "returning to hw mac address %pM\n",
1448 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1450 if (vsi->type == I40E_VSI_MAIN) {
1452 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1453 I40E_AQC_WRITE_TYPE_LAA_WOL,
1454 addr->sa_data, NULL);
1457 "Addr change for Main VSI failed: %d\n",
1459 return -EADDRNOTAVAIL;
1463 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1464 struct i40e_aqc_remove_macvlan_element_data element;
1466 memset(&element, 0, sizeof(element));
1467 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1468 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1469 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1471 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1475 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1476 struct i40e_aqc_add_macvlan_element_data element;
1478 memset(&element, 0, sizeof(element));
1479 ether_addr_copy(element.mac_addr, hw->mac.addr);
1480 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1481 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1483 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1489 i40e_sync_vsi_filters(vsi);
1490 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1496 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1497 * @vsi: the VSI being setup
1498 * @ctxt: VSI context structure
1499 * @enabled_tc: Enabled TCs bitmap
1500 * @is_add: True if called before Add VSI
1502 * Setup VSI queue mapping for enabled traffic classes.
1505 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1506 struct i40e_vsi_context *ctxt,
1510 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1511 struct i40e_vsi_context *ctxt,
1516 struct i40e_pf *pf = vsi->back;
1526 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1529 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1530 /* Find numtc from enabled TC bitmap */
1531 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1532 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1536 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1540 /* At least TC0 is enabled in case of non-DCB case */
1544 vsi->tc_config.numtc = numtc;
1545 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1546 /* Number of queues per enabled TC */
1547 /* In MFP case we can have a much lower count of MSIx
1548 * vectors available and so we need to lower the used
1551 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1552 num_tc_qps = qcount / numtc;
1553 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1555 /* Setup queue offset/count for all TCs for given VSI */
1556 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1557 /* See if the given TC is enabled for the given VSI */
1558 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1562 switch (vsi->type) {
1564 qcount = min_t(int, pf->rss_size, num_tc_qps);
1568 qcount = num_tc_qps;
1572 case I40E_VSI_SRIOV:
1573 case I40E_VSI_VMDQ2:
1575 qcount = num_tc_qps;
1579 vsi->tc_config.tc_info[i].qoffset = offset;
1580 vsi->tc_config.tc_info[i].qcount = qcount;
1582 /* find the next higher power-of-2 of num queue pairs */
1585 while (num_qps && (BIT_ULL(pow) < qcount)) {
1590 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1592 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1593 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1597 /* TC is not enabled so set the offset to
1598 * default queue and allocate one queue
1601 vsi->tc_config.tc_info[i].qoffset = 0;
1602 vsi->tc_config.tc_info[i].qcount = 1;
1603 vsi->tc_config.tc_info[i].netdev_tc = 0;
1607 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1610 /* Set actual Tx/Rx queue pairs */
1611 vsi->num_queue_pairs = offset;
1612 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1613 if (vsi->req_queue_pairs > 0)
1614 vsi->num_queue_pairs = vsi->req_queue_pairs;
1616 vsi->num_queue_pairs = pf->num_lan_msix;
1619 /* Scheduler section valid can only be set for ADD VSI */
1621 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1623 ctxt->info.up_enable_bits = enabled_tc;
1625 if (vsi->type == I40E_VSI_SRIOV) {
1626 ctxt->info.mapping_flags |=
1627 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1628 for (i = 0; i < vsi->num_queue_pairs; i++)
1629 ctxt->info.queue_mapping[i] =
1630 cpu_to_le16(vsi->base_queue + i);
1632 ctxt->info.mapping_flags |=
1633 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1634 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1636 ctxt->info.valid_sections |= cpu_to_le16(sections);
1640 * i40e_set_rx_mode - NDO callback to set the netdev filters
1641 * @netdev: network interface device structure
1644 void i40e_set_rx_mode(struct net_device *netdev)
1646 static void i40e_set_rx_mode(struct net_device *netdev)
1649 struct i40e_netdev_priv *np = netdev_priv(netdev);
1650 struct i40e_mac_filter *f, *ftmp;
1651 struct i40e_vsi *vsi = np->vsi;
1652 struct netdev_hw_addr *uca;
1653 struct netdev_hw_addr *mca;
1654 struct netdev_hw_addr *ha;
1656 /* add addr if not already in the filter list */
1657 netdev_for_each_uc_addr(uca, netdev) {
1658 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1659 if (i40e_is_vsi_in_vlan(vsi))
1660 i40e_put_mac_in_vlan(vsi, uca->addr,
1663 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1668 netdev_for_each_mc_addr(mca, netdev) {
1669 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1670 if (i40e_is_vsi_in_vlan(vsi))
1671 i40e_put_mac_in_vlan(vsi, mca->addr,
1674 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1679 /* remove filter if not in netdev list */
1680 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1686 if (is_multicast_ether_addr(f->macaddr)) {
1687 netdev_for_each_mc_addr(mca, netdev) {
1688 if (ether_addr_equal(mca->addr, f->macaddr)) {
1694 netdev_for_each_uc_addr(uca, netdev) {
1695 if (ether_addr_equal(uca->addr, f->macaddr)) {
1701 for_each_dev_addr(netdev, ha) {
1702 if (ether_addr_equal(ha->addr, f->macaddr)) {
1710 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1713 /* check for other flag changes */
1714 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1715 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1716 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1721 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1722 * @vsi: ptr to the VSI
1724 * Push any outstanding VSI filter changes through the AdminQ.
1726 * Returns 0 or error value
1728 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1730 struct i40e_mac_filter *f, *ftmp;
1731 bool promisc_forced_on = false;
1732 bool add_happened = false;
1733 int filter_list_len = 0;
1734 u32 changed_flags = 0;
1735 i40e_status ret = 0;
1742 /* empty array typed pointers, kcalloc later */
1743 struct i40e_aqc_add_macvlan_element_data *add_list;
1744 struct i40e_aqc_remove_macvlan_element_data *del_list;
1746 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1747 usleep_range(1000, 2000);
1751 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1752 vsi->current_netdev_flags = vsi->netdev->flags;
1755 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1756 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1758 filter_list_len = pf->hw.aq.asq_buf_size /
1759 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1760 del_list = kcalloc(filter_list_len,
1761 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1766 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1770 if (f->counter != 0)
1775 /* add to delete list */
1776 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1777 del_list[num_del].vlan_tag =
1778 cpu_to_le16((u16)(f->vlan ==
1779 I40E_VLAN_ANY ? 0 : f->vlan));
1781 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1782 del_list[num_del].flags = cmd_flags;
1785 /* unlink from filter list */
1789 /* flush a full buffer */
1790 if (num_del == filter_list_len) {
1791 ret = i40e_aq_remove_macvlan(&pf->hw,
1792 vsi->seid, del_list, num_del,
1794 aq_err = pf->hw.aq.asq_last_status;
1796 memset(del_list, 0, sizeof(*del_list));
1798 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1799 dev_info(&pf->pdev->dev,
1800 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1801 i40e_stat_str(&pf->hw, ret),
1802 i40e_aq_str(&pf->hw, aq_err));
1806 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1807 del_list, num_del, NULL);
1808 aq_err = pf->hw.aq.asq_last_status;
1811 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1812 dev_info(&pf->pdev->dev,
1813 "ignoring delete macvlan error, err %s aq_err %s\n",
1814 i40e_stat_str(&pf->hw, ret),
1815 i40e_aq_str(&pf->hw, aq_err));
1821 /* do all the adds now */
1822 filter_list_len = pf->hw.aq.asq_buf_size /
1823 sizeof(struct i40e_aqc_add_macvlan_element_data),
1824 add_list = kcalloc(filter_list_len,
1825 sizeof(struct i40e_aqc_add_macvlan_element_data),
1830 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1834 if (f->counter == 0)
1837 add_happened = true;
1840 /* add to add array */
1841 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1842 add_list[num_add].vlan_tag =
1844 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1845 add_list[num_add].queue_number = 0;
1847 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1848 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1851 /* flush a full buffer */
1852 if (num_add == filter_list_len) {
1853 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1856 aq_err = pf->hw.aq.asq_last_status;
1861 memset(add_list, 0, sizeof(*add_list));
1865 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1866 add_list, num_add, NULL);
1867 aq_err = pf->hw.aq.asq_last_status;
1873 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1874 dev_info(&pf->pdev->dev,
1875 "add filter failed, err %s aq_err %s\n",
1876 i40e_stat_str(&pf->hw, ret),
1877 i40e_aq_str(&pf->hw, aq_err));
1878 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1879 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1881 promisc_forced_on = true;
1882 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1884 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1889 /* check for changes in promiscuous modes */
1890 if (changed_flags & IFF_ALLMULTI) {
1891 bool cur_multipromisc;
1892 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1893 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1898 dev_info(&pf->pdev->dev,
1899 "set multi promisc failed, err %s aq_err %s\n",
1900 i40e_stat_str(&pf->hw, ret),
1901 i40e_aq_str(&pf->hw,
1902 pf->hw.aq.asq_last_status));
1904 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1906 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1907 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1909 ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1913 dev_info(&pf->pdev->dev,
1914 "set uni promisc failed, err %s, aq_err %s\n",
1915 i40e_stat_str(&pf->hw, ret),
1916 i40e_aq_str(&pf->hw,
1917 pf->hw.aq.asq_last_status));
1918 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1922 dev_info(&pf->pdev->dev,
1923 "set brdcast promisc failed, err %s, aq_err %s\n",
1924 i40e_stat_str(&pf->hw, ret),
1925 i40e_aq_str(&pf->hw,
1926 pf->hw.aq.asq_last_status));
1929 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1934 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1935 * @pf: board private structure
1937 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1941 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1943 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1945 for (v = 0; v < pf->num_alloc_vsi; v++) {
1947 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1948 i40e_sync_vsi_filters(pf->vsi[v]);
1953 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1954 * @netdev: network interface device structure
1955 * @new_mtu: new value for maximum frame size
1957 * Returns 0 on success, negative on failure
1959 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1961 struct i40e_netdev_priv *np = netdev_priv(netdev);
1962 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1963 struct i40e_vsi *vsi = np->vsi;
1965 /* MTU < 68 is an error and causes problems on some kernels */
1966 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1969 netdev_info(netdev, "changing MTU from %d to %d\n",
1970 netdev->mtu, new_mtu);
1971 netdev->mtu = new_mtu;
1972 if (netif_running(netdev))
1973 i40e_vsi_reinit_locked(vsi);
1979 * i40e_ioctl - Access the hwtstamp interface
1980 * @netdev: network interface device structure
1981 * @ifr: interface request data
1982 * @cmd: ioctl command
1984 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1986 struct i40e_netdev_priv *np = netdev_priv(netdev);
1987 struct i40e_pf *pf = np->vsi->back;
1991 return i40e_ptp_get_ts_config(pf, ifr);
1993 return i40e_ptp_set_ts_config(pf, ifr);
2000 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2001 * @vsi: the vsi being adjusted
2003 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2005 struct i40e_vsi_context ctxt;
2008 if ((vsi->info.valid_sections &
2009 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2010 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2011 return; /* already enabled */
2013 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2014 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2015 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2017 ctxt.seid = vsi->seid;
2018 ctxt.info = vsi->info;
2019 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2021 dev_info(&vsi->back->pdev->dev,
2022 "update vlan stripping failed, err %s aq_err %s\n",
2023 i40e_stat_str(&vsi->back->hw, ret),
2024 i40e_aq_str(&vsi->back->hw,
2025 vsi->back->hw.aq.asq_last_status));
2030 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2031 * @vsi: the vsi being adjusted
2033 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2035 struct i40e_vsi_context ctxt;
2038 if ((vsi->info.valid_sections &
2039 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2040 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2041 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2042 return; /* already disabled */
2044 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2045 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2046 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2048 ctxt.seid = vsi->seid;
2049 ctxt.info = vsi->info;
2050 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2052 dev_info(&vsi->back->pdev->dev,
2053 "update vlan stripping failed, err %s aq_err %s\n",
2054 i40e_stat_str(&vsi->back->hw, ret),
2055 i40e_aq_str(&vsi->back->hw,
2056 vsi->back->hw.aq.asq_last_status));
2061 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2062 * @netdev: network interface to be adjusted
2063 * @features: netdev features to test if VLAN offload is enabled or not
2065 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2067 struct i40e_netdev_priv *np = netdev_priv(netdev);
2068 struct i40e_vsi *vsi = np->vsi;
2070 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2071 i40e_vlan_stripping_enable(vsi);
2073 i40e_vlan_stripping_disable(vsi);
2077 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2078 * @vsi: the vsi being configured
2079 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2081 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2083 struct i40e_mac_filter *f, *add_f;
2084 bool is_netdev, is_vf;
2086 is_vf = (vsi->type == I40E_VSI_SRIOV);
2087 is_netdev = !!(vsi->netdev);
2090 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2093 dev_info(&vsi->back->pdev->dev,
2094 "Could not add vlan filter %d for %pM\n",
2095 vid, vsi->netdev->dev_addr);
2100 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2101 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2103 dev_info(&vsi->back->pdev->dev,
2104 "Could not add vlan filter %d for %pM\n",
2110 /* Now if we add a vlan tag, make sure to check if it is the first
2111 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2112 * with 0, so we now accept untagged and specified tagged traffic
2113 * (and not any taged and untagged)
2116 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2118 is_vf, is_netdev)) {
2119 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2120 I40E_VLAN_ANY, is_vf, is_netdev);
2121 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2124 dev_info(&vsi->back->pdev->dev,
2125 "Could not add filter 0 for %pM\n",
2126 vsi->netdev->dev_addr);
2132 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2133 if (vid > 0 && !vsi->info.pvid) {
2134 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2135 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2136 is_vf, is_netdev)) {
2137 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2139 add_f = i40e_add_filter(vsi, f->macaddr,
2140 0, is_vf, is_netdev);
2142 dev_info(&vsi->back->pdev->dev,
2143 "Could not add filter 0 for %pM\n",
2151 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2152 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2155 return i40e_sync_vsi_filters(vsi);
2159 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2160 * @vsi: the vsi being configured
2161 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2163 * Return: 0 on success or negative otherwise
2165 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2167 struct net_device *netdev = vsi->netdev;
2168 struct i40e_mac_filter *f, *add_f;
2169 bool is_vf, is_netdev;
2170 int filter_count = 0;
2172 is_vf = (vsi->type == I40E_VSI_SRIOV);
2173 is_netdev = !!(netdev);
2176 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2178 list_for_each_entry(f, &vsi->mac_filter_list, list)
2179 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2181 /* go through all the filters for this VSI and if there is only
2182 * vid == 0 it means there are no other filters, so vid 0 must
2183 * be replaced with -1. This signifies that we should from now
2184 * on accept any traffic (with any tag present, or untagged)
2186 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2189 ether_addr_equal(netdev->dev_addr, f->macaddr))
2197 if (!filter_count && is_netdev) {
2198 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2199 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2202 dev_info(&vsi->back->pdev->dev,
2203 "Could not add filter %d for %pM\n",
2204 I40E_VLAN_ANY, netdev->dev_addr);
2209 if (!filter_count) {
2210 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2211 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2212 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2215 dev_info(&vsi->back->pdev->dev,
2216 "Could not add filter %d for %pM\n",
2217 I40E_VLAN_ANY, f->macaddr);
2223 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2224 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2227 return i40e_sync_vsi_filters(vsi);
2231 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2232 * @netdev: network interface to be adjusted
2233 * @vid: vlan id to be added
2235 * net_device_ops implementation for adding vlan ids
2238 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2239 __always_unused __be16 proto, u16 vid)
2241 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2242 __always_unused __be16 proto, u16 vid)
2245 struct i40e_netdev_priv *np = netdev_priv(netdev);
2246 struct i40e_vsi *vsi = np->vsi;
2252 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2254 /* If the network stack called us with vid = 0 then
2255 * it is asking to receive priority tagged packets with
2256 * vlan id 0. Our HW receives them by default when configured
2257 * to receive untagged packets so there is no need to add an
2258 * extra filter for vlan 0 tagged packets.
2261 ret = i40e_vsi_add_vlan(vsi, vid);
2263 if (!ret && (vid < VLAN_N_VID))
2264 set_bit(vid, vsi->active_vlans);
2270 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2271 * @netdev: network interface to be adjusted
2272 * @vid: vlan id to be removed
2274 * net_device_ops implementation for removing vlan ids
2277 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2278 __always_unused __be16 proto, u16 vid)
2280 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2281 __always_unused __be16 proto, u16 vid)
2284 struct i40e_netdev_priv *np = netdev_priv(netdev);
2285 struct i40e_vsi *vsi = np->vsi;
2287 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2289 /* return code is ignored as there is nothing a user
2290 * can do about failure to remove and a log message was
2291 * already printed from the other function
2293 i40e_vsi_kill_vlan(vsi, vid);
2295 clear_bit(vid, vsi->active_vlans);
2301 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2302 * @vsi: the vsi being brought back up
2304 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2311 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2313 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2314 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2319 * i40e_vsi_add_pvid - Add pvid for the VSI
2320 * @vsi: the vsi being adjusted
2321 * @vid: the vlan id to set as a PVID
2323 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2325 struct i40e_vsi_context ctxt;
2328 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2329 vsi->info.pvid = cpu_to_le16(vid);
2330 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2331 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2332 I40E_AQ_VSI_PVLAN_EMOD_STR;
2334 ctxt.seid = vsi->seid;
2335 ctxt.info = vsi->info;
2336 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2338 dev_info(&vsi->back->pdev->dev,
2339 "add pvid failed, err %s aq_err %s\n",
2340 i40e_stat_str(&vsi->back->hw, ret),
2341 i40e_aq_str(&vsi->back->hw,
2342 vsi->back->hw.aq.asq_last_status));
2350 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2351 * @vsi: the vsi being adjusted
2353 * Just use the vlan_rx_register() service to put it back to normal
2355 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2357 i40e_vlan_stripping_disable(vsi);
2363 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2364 * @vsi: ptr to the VSI
2366 * If this function returns with an error, then it's possible one or
2367 * more of the rings is populated (while the rest are not). It is the
2368 * callers duty to clean those orphaned rings.
2370 * Return 0 on success, negative on failure
2372 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2376 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2377 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2383 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2384 * @vsi: ptr to the VSI
2386 * Free VSI's transmit software resources
2388 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2395 for (i = 0; i < vsi->num_queue_pairs; i++)
2396 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2397 i40e_free_tx_resources(vsi->tx_rings[i]);
2401 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2402 * @vsi: ptr to the VSI
2404 * If this function returns with an error, then it's possible one or
2405 * more of the rings is populated (while the rest are not). It is the
2406 * callers duty to clean those orphaned rings.
2408 * Return 0 on success, negative on failure
2410 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2414 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2415 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2417 i40e_fcoe_setup_ddp_resources(vsi);
2423 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2424 * @vsi: ptr to the VSI
2426 * Free all receive software resources
2428 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2435 for (i = 0; i < vsi->num_queue_pairs; i++)
2436 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2437 i40e_free_rx_resources(vsi->rx_rings[i]);
2439 i40e_fcoe_free_ddp_resources(vsi);
2444 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2445 * @ring: The Tx ring to configure
2447 * This enables/disables XPS for a given Tx descriptor ring
2448 * based on the TCs enabled for the VSI that ring belongs to.
2450 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2452 struct i40e_vsi *vsi = ring->vsi;
2455 if (!ring->q_vector || !ring->netdev)
2458 /* Single TC mode enable XPS */
2459 if (vsi->tc_config.numtc <= 1) {
2460 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2461 netif_set_xps_queue(ring->netdev,
2462 &ring->q_vector->affinity_mask,
2464 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2465 /* Disable XPS to allow selection based on TC */
2466 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2467 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2468 free_cpumask_var(mask);
2473 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2474 * @ring: The Tx ring to configure
2476 * Configure the Tx descriptor ring in the HMC context.
2478 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2480 struct i40e_vsi *vsi = ring->vsi;
2481 u16 pf_q = vsi->base_queue + ring->queue_index;
2482 struct i40e_hw *hw = &vsi->back->hw;
2483 struct i40e_hmc_obj_txq tx_ctx;
2484 i40e_status err = 0;
2487 /* some ATR related tx ring init */
2488 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2489 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2490 ring->atr_count = 0;
2492 ring->atr_sample_rate = 0;
2496 i40e_config_xps_tx_ring(ring);
2498 /* clear the context structure first */
2499 memset(&tx_ctx, 0, sizeof(tx_ctx));
2501 tx_ctx.new_context = 1;
2502 tx_ctx.base = (ring->dma / 128);
2503 tx_ctx.qlen = ring->count;
2504 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2505 I40E_FLAG_FD_ATR_ENABLED));
2507 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2509 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2510 /* FDIR VSI tx ring can still use RS bit and writebacks */
2511 if (vsi->type != I40E_VSI_FDIR)
2512 tx_ctx.head_wb_ena = 1;
2513 tx_ctx.head_wb_addr = ring->dma +
2514 (ring->count * sizeof(struct i40e_tx_desc));
2516 /* As part of VSI creation/update, FW allocates certain
2517 * Tx arbitration queue sets for each TC enabled for
2518 * the VSI. The FW returns the handles to these queue
2519 * sets as part of the response buffer to Add VSI,
2520 * Update VSI, etc. AQ commands. It is expected that
2521 * these queue set handles be associated with the Tx
2522 * queues by the driver as part of the TX queue context
2523 * initialization. This has to be done regardless of
2524 * DCB as by default everything is mapped to TC0.
2526 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2527 tx_ctx.rdylist_act = 0;
2529 /* clear the context in the HMC */
2530 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2532 dev_info(&vsi->back->pdev->dev,
2533 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2534 ring->queue_index, pf_q, err);
2538 /* set the context in the HMC */
2539 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2541 dev_info(&vsi->back->pdev->dev,
2542 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2543 ring->queue_index, pf_q, err);
2547 /* Now associate this queue with this PCI function */
2548 if (vsi->type == I40E_VSI_VMDQ2) {
2549 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2550 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2551 I40E_QTX_CTL_VFVM_INDX_MASK;
2553 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2556 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2557 I40E_QTX_CTL_PF_INDX_MASK);
2558 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2561 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2563 /* cache tail off for easier writes later */
2564 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2570 * i40e_configure_rx_ring - Configure a receive ring context
2571 * @ring: The Rx ring to configure
2573 * Configure the Rx descriptor ring in the HMC context.
2575 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2577 struct i40e_vsi *vsi = ring->vsi;
2578 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2579 u16 pf_q = vsi->base_queue + ring->queue_index;
2580 struct i40e_hw *hw = &vsi->back->hw;
2581 struct i40e_hmc_obj_rxq rx_ctx;
2582 i40e_status err = 0;
2586 /* clear the context structure first */
2587 memset(&rx_ctx, 0, sizeof(rx_ctx));
2589 ring->rx_buf_len = vsi->rx_buf_len;
2590 ring->rx_hdr_len = vsi->rx_hdr_len;
2592 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2593 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2595 rx_ctx.base = (ring->dma / 128);
2596 rx_ctx.qlen = ring->count;
2598 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2599 set_ring_16byte_desc_enabled(ring);
2605 rx_ctx.dtype = vsi->dtype;
2607 set_ring_ps_enabled(ring);
2608 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2610 I40E_RX_SPLIT_TCP_UDP |
2613 rx_ctx.hsplit_0 = 0;
2616 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2617 (chain_len * ring->rx_buf_len));
2618 if (hw->revision_id == 0)
2619 rx_ctx.lrxqthresh = 0;
2621 rx_ctx.lrxqthresh = 2;
2622 rx_ctx.crcstrip = 1;
2626 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2628 /* set the prefena field to 1 because the manual says to */
2631 /* clear the context in the HMC */
2632 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2634 dev_info(&vsi->back->pdev->dev,
2635 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2636 ring->queue_index, pf_q, err);
2640 /* set the context in the HMC */
2641 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2643 dev_info(&vsi->back->pdev->dev,
2644 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2645 ring->queue_index, pf_q, err);
2649 /* cache tail for quicker writes, and clear the reg before use */
2650 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2651 writel(0, ring->tail);
2653 if (ring_is_ps_enabled(ring)) {
2654 i40e_alloc_rx_headers(ring);
2655 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2657 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2664 * i40e_vsi_configure_tx - Configure the VSI for Tx
2665 * @vsi: VSI structure describing this set of rings and resources
2667 * Configure the Tx VSI for operation.
2669 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2674 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2675 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2681 * i40e_vsi_configure_rx - Configure the VSI for Rx
2682 * @vsi: the VSI being configured
2684 * Configure the Rx VSI for operation.
2686 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2691 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2692 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2693 + ETH_FCS_LEN + VLAN_HLEN;
2695 vsi->max_frame = I40E_RXBUFFER_2048;
2697 /* figure out correct receive buffer length */
2698 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2699 I40E_FLAG_RX_PS_ENABLED)) {
2700 case I40E_FLAG_RX_1BUF_ENABLED:
2701 vsi->rx_hdr_len = 0;
2702 vsi->rx_buf_len = vsi->max_frame;
2703 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2705 case I40E_FLAG_RX_PS_ENABLED:
2706 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2707 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2708 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2711 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2712 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2713 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2718 /* setup rx buffer for FCoE */
2719 if ((vsi->type == I40E_VSI_FCOE) &&
2720 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2721 vsi->rx_hdr_len = 0;
2722 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2723 vsi->max_frame = I40E_RXBUFFER_3072;
2724 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2727 #endif /* I40E_FCOE */
2728 /* round up for the chip's needs */
2729 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2730 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2731 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2732 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2734 /* set up individual rings */
2735 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2736 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2742 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2743 * @vsi: ptr to the VSI
2745 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2747 struct i40e_ring *tx_ring, *rx_ring;
2748 u16 qoffset, qcount;
2751 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2752 /* Reset the TC information */
2753 for (i = 0; i < vsi->num_queue_pairs; i++) {
2754 rx_ring = vsi->rx_rings[i];
2755 tx_ring = vsi->tx_rings[i];
2756 rx_ring->dcb_tc = 0;
2757 tx_ring->dcb_tc = 0;
2761 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2762 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2765 qoffset = vsi->tc_config.tc_info[n].qoffset;
2766 qcount = vsi->tc_config.tc_info[n].qcount;
2767 for (i = qoffset; i < (qoffset + qcount); i++) {
2768 rx_ring = vsi->rx_rings[i];
2769 tx_ring = vsi->tx_rings[i];
2770 rx_ring->dcb_tc = n;
2771 tx_ring->dcb_tc = n;
2777 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2778 * @vsi: ptr to the VSI
2780 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2783 i40e_set_rx_mode(vsi->netdev);
2787 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2788 * @vsi: Pointer to the targeted VSI
2790 * This function replays the hlist on the hw where all the SB Flow Director
2791 * filters were saved.
2793 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2795 struct i40e_fdir_filter *filter;
2796 struct i40e_pf *pf = vsi->back;
2797 struct hlist_node *node;
2799 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2802 hlist_for_each_entry_safe(filter, node,
2803 &pf->fdir_filter_list, fdir_node) {
2804 i40e_add_del_fdir(vsi, filter, true);
2809 * i40e_vsi_configure - Set up the VSI for action
2810 * @vsi: the VSI being configured
2812 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2816 i40e_set_vsi_rx_mode(vsi);
2817 i40e_restore_vlan(vsi);
2818 i40e_vsi_config_dcb_rings(vsi);
2819 err = i40e_vsi_configure_tx(vsi);
2821 err = i40e_vsi_configure_rx(vsi);
2827 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2828 * @vsi: the VSI being configured
2830 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2832 struct i40e_pf *pf = vsi->back;
2833 struct i40e_q_vector *q_vector;
2834 struct i40e_hw *hw = &pf->hw;
2840 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2841 * and PFINT_LNKLSTn registers, e.g.:
2842 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2844 qp = vsi->base_queue;
2845 vector = vsi->base_vector;
2846 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2847 q_vector = vsi->q_vectors[i];
2848 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2849 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2850 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2852 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2853 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2854 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2857 /* Linked list for the queuepairs assigned to this vector */
2858 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2859 for (q = 0; q < q_vector->num_ringpairs; q++) {
2860 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2861 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2862 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2863 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2865 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2867 wr32(hw, I40E_QINT_RQCTL(qp), val);
2869 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2870 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2871 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2872 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2874 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2876 /* Terminate the linked list */
2877 if (q == (q_vector->num_ringpairs - 1))
2878 val |= (I40E_QUEUE_END_OF_LIST
2879 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2881 wr32(hw, I40E_QINT_TQCTL(qp), val);
2890 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2891 * @hw: ptr to the hardware info
2893 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2895 struct i40e_hw *hw = &pf->hw;
2898 /* clear things first */
2899 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2900 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2902 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2903 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2904 I40E_PFINT_ICR0_ENA_GRST_MASK |
2905 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2906 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2907 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2908 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2909 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2911 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2912 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2914 if (pf->flags & I40E_FLAG_PTP)
2915 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2917 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2919 /* SW_ITR_IDX = 0, but don't change INTENA */
2920 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2921 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2923 /* OTHER_ITR_IDX = 0 */
2924 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2928 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2929 * @vsi: the VSI being configured
2931 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2933 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2934 struct i40e_pf *pf = vsi->back;
2935 struct i40e_hw *hw = &pf->hw;
2938 /* set the ITR configuration */
2939 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2940 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2941 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2942 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2943 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2944 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2946 i40e_enable_misc_int_causes(pf);
2948 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2949 wr32(hw, I40E_PFINT_LNKLST0, 0);
2951 /* Associate the queue pair to the vector and enable the queue int */
2952 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2953 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2954 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2956 wr32(hw, I40E_QINT_RQCTL(0), val);
2958 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2959 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2960 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2962 wr32(hw, I40E_QINT_TQCTL(0), val);
2967 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2968 * @pf: board private structure
2970 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2972 struct i40e_hw *hw = &pf->hw;
2974 wr32(hw, I40E_PFINT_DYN_CTL0,
2975 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2980 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2981 * @pf: board private structure
2983 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2985 struct i40e_hw *hw = &pf->hw;
2988 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2989 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2990 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2992 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2997 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2998 * @vsi: pointer to a vsi
2999 * @vector: enable a particular Hw Interrupt vector
3001 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3003 struct i40e_pf *pf = vsi->back;
3004 struct i40e_hw *hw = &pf->hw;
3007 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3008 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3009 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3010 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3011 /* skip the flush */
3015 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3016 * @vsi: pointer to a vsi
3017 * @vector: disable a particular Hw Interrupt vector
3019 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3021 struct i40e_pf *pf = vsi->back;
3022 struct i40e_hw *hw = &pf->hw;
3025 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3026 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3031 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3032 * @irq: interrupt number
3033 * @data: pointer to a q_vector
3035 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3037 struct i40e_q_vector *q_vector = data;
3039 if (!q_vector->tx.ring && !q_vector->rx.ring)
3042 napi_schedule(&q_vector->napi);
3048 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3049 * @vsi: the VSI being configured
3050 * @basename: name for the vector
3052 * Allocates MSI-X vectors and requests interrupts from the kernel.
3054 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3056 int q_vectors = vsi->num_q_vectors;
3057 struct i40e_pf *pf = vsi->back;
3058 int base = vsi->base_vector;
3063 for (vector = 0; vector < q_vectors; vector++) {
3064 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3066 if (q_vector->tx.ring && q_vector->rx.ring) {
3067 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3068 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3070 } else if (q_vector->rx.ring) {
3071 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3072 "%s-%s-%d", basename, "rx", rx_int_idx++);
3073 } else if (q_vector->tx.ring) {
3074 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3075 "%s-%s-%d", basename, "tx", tx_int_idx++);
3077 /* skip this unused q_vector */
3080 err = request_irq(pf->msix_entries[base + vector].vector,
3086 dev_info(&pf->pdev->dev,
3087 "%s: request_irq failed, error: %d\n",
3089 goto free_queue_irqs;
3091 /* assign the mask for this irq */
3092 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3093 &q_vector->affinity_mask);
3096 vsi->irqs_ready = true;
3102 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3104 free_irq(pf->msix_entries[base + vector].vector,
3105 &(vsi->q_vectors[vector]));
3111 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3112 * @vsi: the VSI being un-configured
3114 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3116 struct i40e_pf *pf = vsi->back;
3117 struct i40e_hw *hw = &pf->hw;
3118 int base = vsi->base_vector;
3121 for (i = 0; i < vsi->num_queue_pairs; i++) {
3122 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3123 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3126 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3127 for (i = vsi->base_vector;
3128 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3129 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3132 for (i = 0; i < vsi->num_q_vectors; i++)
3133 synchronize_irq(pf->msix_entries[i + base].vector);
3135 /* Legacy and MSI mode - this stops all interrupt handling */
3136 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3137 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3139 synchronize_irq(pf->pdev->irq);
3144 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3145 * @vsi: the VSI being configured
3147 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3149 struct i40e_pf *pf = vsi->back;
3152 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3153 for (i = vsi->base_vector;
3154 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3155 i40e_irq_dynamic_enable(vsi, i);
3157 i40e_irq_dynamic_enable_icr0(pf);
3160 i40e_flush(&pf->hw);
3165 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3166 * @pf: board private structure
3168 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3171 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3172 i40e_flush(&pf->hw);
3176 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3177 * @irq: interrupt number
3178 * @data: pointer to a q_vector
3180 * This is the handler used for all MSI/Legacy interrupts, and deals
3181 * with both queue and non-queue interrupts. This is also used in
3182 * MSIX mode to handle the non-queue interrupts.
3184 static irqreturn_t i40e_intr(int irq, void *data)
3186 struct i40e_pf *pf = (struct i40e_pf *)data;
3187 struct i40e_hw *hw = &pf->hw;
3188 irqreturn_t ret = IRQ_NONE;
3189 u32 icr0, icr0_remaining;
3192 icr0 = rd32(hw, I40E_PFINT_ICR0);
3193 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3195 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3196 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3199 /* if interrupt but no bits showing, must be SWINT */
3200 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3201 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3204 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3205 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3206 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3207 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3208 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3211 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3212 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3214 /* temporarily disable queue cause for NAPI processing */
3215 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3216 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3217 wr32(hw, I40E_QINT_RQCTL(0), qval);
3219 qval = rd32(hw, I40E_QINT_TQCTL(0));
3220 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3221 wr32(hw, I40E_QINT_TQCTL(0), qval);
3223 if (!test_bit(__I40E_DOWN, &pf->state))
3224 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3227 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3228 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3229 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3232 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3233 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3234 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3237 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3238 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3239 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3242 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3243 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3244 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3245 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3246 val = rd32(hw, I40E_GLGEN_RSTAT);
3247 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3248 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3249 if (val == I40E_RESET_CORER) {
3251 } else if (val == I40E_RESET_GLOBR) {
3253 } else if (val == I40E_RESET_EMPR) {
3255 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3259 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3260 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3261 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3262 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3263 rd32(hw, I40E_PFHMC_ERRORINFO),
3264 rd32(hw, I40E_PFHMC_ERRORDATA));
3267 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3268 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3270 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3271 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3272 i40e_ptp_tx_hwtstamp(pf);
3276 /* If a critical error is pending we have no choice but to reset the
3278 * Report and mask out any remaining unexpected interrupts.
3280 icr0_remaining = icr0 & ena_mask;
3281 if (icr0_remaining) {
3282 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3284 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3285 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3286 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3287 dev_info(&pf->pdev->dev, "device will be reset\n");
3288 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3289 i40e_service_event_schedule(pf);
3291 ena_mask &= ~icr0_remaining;
3296 /* re-enable interrupt causes */
3297 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3298 if (!test_bit(__I40E_DOWN, &pf->state)) {
3299 i40e_service_event_schedule(pf);
3300 i40e_irq_dynamic_enable_icr0(pf);
3307 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3308 * @tx_ring: tx ring to clean
3309 * @budget: how many cleans we're allowed
3311 * Returns true if there's any budget left (e.g. the clean is finished)
3313 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3315 struct i40e_vsi *vsi = tx_ring->vsi;
3316 u16 i = tx_ring->next_to_clean;
3317 struct i40e_tx_buffer *tx_buf;
3318 struct i40e_tx_desc *tx_desc;
3320 tx_buf = &tx_ring->tx_bi[i];
3321 tx_desc = I40E_TX_DESC(tx_ring, i);
3322 i -= tx_ring->count;
3325 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3327 /* if next_to_watch is not set then there is no work pending */
3331 /* prevent any other reads prior to eop_desc */
3332 read_barrier_depends();
3334 /* if the descriptor isn't done, no work yet to do */
3335 if (!(eop_desc->cmd_type_offset_bsz &
3336 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3339 /* clear next_to_watch to prevent false hangs */
3340 tx_buf->next_to_watch = NULL;
3342 tx_desc->buffer_addr = 0;
3343 tx_desc->cmd_type_offset_bsz = 0;
3344 /* move past filter desc */
3349 i -= tx_ring->count;
3350 tx_buf = tx_ring->tx_bi;
3351 tx_desc = I40E_TX_DESC(tx_ring, 0);
3353 /* unmap skb header data */
3354 dma_unmap_single(tx_ring->dev,
3355 dma_unmap_addr(tx_buf, dma),
3356 dma_unmap_len(tx_buf, len),
3358 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3359 kfree(tx_buf->raw_buf);
3361 tx_buf->raw_buf = NULL;
3362 tx_buf->tx_flags = 0;
3363 tx_buf->next_to_watch = NULL;
3364 dma_unmap_len_set(tx_buf, len, 0);
3365 tx_desc->buffer_addr = 0;
3366 tx_desc->cmd_type_offset_bsz = 0;
3368 /* move us past the eop_desc for start of next FD desc */
3373 i -= tx_ring->count;
3374 tx_buf = tx_ring->tx_bi;
3375 tx_desc = I40E_TX_DESC(tx_ring, 0);
3378 /* update budget accounting */
3380 } while (likely(budget));
3382 i += tx_ring->count;
3383 tx_ring->next_to_clean = i;
3385 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3386 i40e_irq_dynamic_enable(vsi,
3387 tx_ring->q_vector->v_idx + vsi->base_vector);
3393 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3394 * @irq: interrupt number
3395 * @data: pointer to a q_vector
3397 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3399 struct i40e_q_vector *q_vector = data;
3400 struct i40e_vsi *vsi;
3402 if (!q_vector->tx.ring)
3405 vsi = q_vector->tx.ring->vsi;
3406 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3412 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3413 * @vsi: the VSI being configured
3414 * @v_idx: vector index
3415 * @qp_idx: queue pair index
3417 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3419 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3420 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3421 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3423 tx_ring->q_vector = q_vector;
3424 tx_ring->next = q_vector->tx.ring;
3425 q_vector->tx.ring = tx_ring;
3426 q_vector->tx.count++;
3428 rx_ring->q_vector = q_vector;
3429 rx_ring->next = q_vector->rx.ring;
3430 q_vector->rx.ring = rx_ring;
3431 q_vector->rx.count++;
3435 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3436 * @vsi: the VSI being configured
3438 * This function maps descriptor rings to the queue-specific vectors
3439 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3440 * one vector per queue pair, but on a constrained vector budget, we
3441 * group the queue pairs as "efficiently" as possible.
3443 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3445 int qp_remaining = vsi->num_queue_pairs;
3446 int q_vectors = vsi->num_q_vectors;
3451 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3452 * group them so there are multiple queues per vector.
3453 * It is also important to go through all the vectors available to be
3454 * sure that if we don't use all the vectors, that the remaining vectors
3455 * are cleared. This is especially important when decreasing the
3456 * number of queues in use.
3458 for (; v_start < q_vectors; v_start++) {
3459 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3461 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3463 q_vector->num_ringpairs = num_ringpairs;
3465 q_vector->rx.count = 0;
3466 q_vector->tx.count = 0;
3467 q_vector->rx.ring = NULL;
3468 q_vector->tx.ring = NULL;
3470 while (num_ringpairs--) {
3471 map_vector_to_qp(vsi, v_start, qp_idx);
3479 * i40e_vsi_request_irq - Request IRQ from the OS
3480 * @vsi: the VSI being configured
3481 * @basename: name for the vector
3483 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3485 struct i40e_pf *pf = vsi->back;
3488 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3489 err = i40e_vsi_request_irq_msix(vsi, basename);
3490 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3491 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3494 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3498 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3503 #ifdef CONFIG_NET_POLL_CONTROLLER
3505 * i40e_netpoll - A Polling 'interrupt'handler
3506 * @netdev: network interface device structure
3508 * This is used by netconsole to send skbs without having to re-enable
3509 * interrupts. It's not called while the normal interrupt routine is executing.
3512 void i40e_netpoll(struct net_device *netdev)
3514 static void i40e_netpoll(struct net_device *netdev)
3517 struct i40e_netdev_priv *np = netdev_priv(netdev);
3518 struct i40e_vsi *vsi = np->vsi;
3519 struct i40e_pf *pf = vsi->back;
3522 /* if interface is down do nothing */
3523 if (test_bit(__I40E_DOWN, &vsi->state))
3526 pf->flags |= I40E_FLAG_IN_NETPOLL;
3527 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3528 for (i = 0; i < vsi->num_q_vectors; i++)
3529 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3531 i40e_intr(pf->pdev->irq, netdev);
3533 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3538 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3539 * @pf: the PF being configured
3540 * @pf_q: the PF queue
3541 * @enable: enable or disable state of the queue
3543 * This routine will wait for the given Tx queue of the PF to reach the
3544 * enabled or disabled state.
3545 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3546 * multiple retries; else will return 0 in case of success.
3548 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3553 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3554 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3555 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3558 usleep_range(10, 20);
3560 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3567 * i40e_vsi_control_tx - Start or stop a VSI's rings
3568 * @vsi: the VSI being configured
3569 * @enable: start or stop the rings
3571 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3573 struct i40e_pf *pf = vsi->back;
3574 struct i40e_hw *hw = &pf->hw;
3575 int i, j, pf_q, ret = 0;
3578 pf_q = vsi->base_queue;
3579 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3581 /* warn the TX unit of coming changes */
3582 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3584 usleep_range(10, 20);
3586 for (j = 0; j < 50; j++) {
3587 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3588 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3589 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3591 usleep_range(1000, 2000);
3593 /* Skip if the queue is already in the requested state */
3594 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3597 /* turn on/off the queue */
3599 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3600 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3602 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3605 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3606 /* No waiting for the Tx queue to disable */
3607 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3610 /* wait for the change to finish */
3611 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3613 dev_info(&pf->pdev->dev,
3614 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3615 __func__, vsi->seid, pf_q,
3616 (enable ? "en" : "dis"));
3621 if (hw->revision_id == 0)
3627 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3628 * @pf: the PF being configured
3629 * @pf_q: the PF queue
3630 * @enable: enable or disable state of the queue
3632 * This routine will wait for the given Rx queue of the PF to reach the
3633 * enabled or disabled state.
3634 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3635 * multiple retries; else will return 0 in case of success.
3637 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3642 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3643 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3644 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3647 usleep_range(10, 20);
3649 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3656 * i40e_vsi_control_rx - Start or stop a VSI's rings
3657 * @vsi: the VSI being configured
3658 * @enable: start or stop the rings
3660 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3662 struct i40e_pf *pf = vsi->back;
3663 struct i40e_hw *hw = &pf->hw;
3664 int i, j, pf_q, ret = 0;
3667 pf_q = vsi->base_queue;
3668 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3669 for (j = 0; j < 50; j++) {
3670 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3671 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3672 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3674 usleep_range(1000, 2000);
3677 /* Skip if the queue is already in the requested state */
3678 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3681 /* turn on/off the queue */
3683 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3685 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3686 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3688 /* wait for the change to finish */
3689 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3691 dev_info(&pf->pdev->dev,
3692 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3693 __func__, vsi->seid, pf_q,
3694 (enable ? "en" : "dis"));
3703 * i40e_vsi_control_rings - Start or stop a VSI's rings
3704 * @vsi: the VSI being configured
3705 * @enable: start or stop the rings
3707 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3711 /* do rx first for enable and last for disable */
3713 ret = i40e_vsi_control_rx(vsi, request);
3716 ret = i40e_vsi_control_tx(vsi, request);
3718 /* Ignore return value, we need to shutdown whatever we can */
3719 i40e_vsi_control_tx(vsi, request);
3720 i40e_vsi_control_rx(vsi, request);
3727 * i40e_vsi_free_irq - Free the irq association with the OS
3728 * @vsi: the VSI being configured
3730 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3732 struct i40e_pf *pf = vsi->back;
3733 struct i40e_hw *hw = &pf->hw;
3734 int base = vsi->base_vector;
3738 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3739 if (!vsi->q_vectors)
3742 if (!vsi->irqs_ready)
3745 vsi->irqs_ready = false;
3746 for (i = 0; i < vsi->num_q_vectors; i++) {
3747 u16 vector = i + base;
3749 /* free only the irqs that were actually requested */
3750 if (!vsi->q_vectors[i] ||
3751 !vsi->q_vectors[i]->num_ringpairs)
3754 /* clear the affinity_mask in the IRQ descriptor */
3755 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3757 free_irq(pf->msix_entries[vector].vector,
3760 /* Tear down the interrupt queue link list
3762 * We know that they come in pairs and always
3763 * the Rx first, then the Tx. To clear the
3764 * link list, stick the EOL value into the
3765 * next_q field of the registers.
3767 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3768 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3769 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3770 val |= I40E_QUEUE_END_OF_LIST
3771 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3772 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3774 while (qp != I40E_QUEUE_END_OF_LIST) {
3777 val = rd32(hw, I40E_QINT_RQCTL(qp));
3779 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3780 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3781 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3782 I40E_QINT_RQCTL_INTEVENT_MASK);
3784 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3785 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3787 wr32(hw, I40E_QINT_RQCTL(qp), val);
3789 val = rd32(hw, I40E_QINT_TQCTL(qp));
3791 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3792 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3794 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3795 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3796 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3797 I40E_QINT_TQCTL_INTEVENT_MASK);
3799 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3800 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3802 wr32(hw, I40E_QINT_TQCTL(qp), val);
3807 free_irq(pf->pdev->irq, pf);
3809 val = rd32(hw, I40E_PFINT_LNKLST0);
3810 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3811 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3812 val |= I40E_QUEUE_END_OF_LIST
3813 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3814 wr32(hw, I40E_PFINT_LNKLST0, val);
3816 val = rd32(hw, I40E_QINT_RQCTL(qp));
3817 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3818 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3819 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3820 I40E_QINT_RQCTL_INTEVENT_MASK);
3822 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3823 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3825 wr32(hw, I40E_QINT_RQCTL(qp), val);
3827 val = rd32(hw, I40E_QINT_TQCTL(qp));
3829 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3830 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3831 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3832 I40E_QINT_TQCTL_INTEVENT_MASK);
3834 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3835 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3837 wr32(hw, I40E_QINT_TQCTL(qp), val);
3842 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3843 * @vsi: the VSI being configured
3844 * @v_idx: Index of vector to be freed
3846 * This function frees the memory allocated to the q_vector. In addition if
3847 * NAPI is enabled it will delete any references to the NAPI struct prior
3848 * to freeing the q_vector.
3850 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3852 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3853 struct i40e_ring *ring;
3858 /* disassociate q_vector from rings */
3859 i40e_for_each_ring(ring, q_vector->tx)
3860 ring->q_vector = NULL;
3862 i40e_for_each_ring(ring, q_vector->rx)
3863 ring->q_vector = NULL;
3865 /* only VSI w/ an associated netdev is set up w/ NAPI */
3867 netif_napi_del(&q_vector->napi);
3869 vsi->q_vectors[v_idx] = NULL;
3871 kfree_rcu(q_vector, rcu);
3875 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3876 * @vsi: the VSI being un-configured
3878 * This frees the memory allocated to the q_vectors and
3879 * deletes references to the NAPI struct.
3881 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3885 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3886 i40e_free_q_vector(vsi, v_idx);
3890 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3891 * @pf: board private structure
3893 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3895 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3896 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3897 pci_disable_msix(pf->pdev);
3898 kfree(pf->msix_entries);
3899 pf->msix_entries = NULL;
3900 kfree(pf->irq_pile);
3901 pf->irq_pile = NULL;
3902 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3903 pci_disable_msi(pf->pdev);
3905 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3909 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3910 * @pf: board private structure
3912 * We go through and clear interrupt specific resources and reset the structure
3913 * to pre-load conditions
3915 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3919 i40e_stop_misc_vector(pf);
3920 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3921 synchronize_irq(pf->msix_entries[0].vector);
3922 free_irq(pf->msix_entries[0].vector, pf);
3925 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3926 for (i = 0; i < pf->num_alloc_vsi; i++)
3928 i40e_vsi_free_q_vectors(pf->vsi[i]);
3929 i40e_reset_interrupt_capability(pf);
3933 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3934 * @vsi: the VSI being configured
3936 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3943 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3944 napi_enable(&vsi->q_vectors[q_idx]->napi);
3948 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3949 * @vsi: the VSI being configured
3951 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3958 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3959 napi_disable(&vsi->q_vectors[q_idx]->napi);
3963 * i40e_vsi_close - Shut down a VSI
3964 * @vsi: the vsi to be quelled
3966 static void i40e_vsi_close(struct i40e_vsi *vsi)
3968 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3970 i40e_vsi_free_irq(vsi);
3971 i40e_vsi_free_tx_resources(vsi);
3972 i40e_vsi_free_rx_resources(vsi);
3976 * i40e_quiesce_vsi - Pause a given VSI
3977 * @vsi: the VSI being paused
3979 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3981 if (test_bit(__I40E_DOWN, &vsi->state))
3984 /* No need to disable FCoE VSI when Tx suspended */
3985 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3986 vsi->type == I40E_VSI_FCOE) {
3987 dev_dbg(&vsi->back->pdev->dev,
3988 "%s: VSI seid %d skipping FCoE VSI disable\n",
3989 __func__, vsi->seid);
3993 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3994 if (vsi->netdev && netif_running(vsi->netdev)) {
3995 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3997 i40e_vsi_close(vsi);
4002 * i40e_unquiesce_vsi - Resume a given VSI
4003 * @vsi: the VSI being resumed
4005 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4007 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4010 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4011 if (vsi->netdev && netif_running(vsi->netdev))
4012 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4014 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4018 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4021 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4025 for (v = 0; v < pf->num_alloc_vsi; v++) {
4027 i40e_quiesce_vsi(pf->vsi[v]);
4032 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4035 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4039 for (v = 0; v < pf->num_alloc_vsi; v++) {
4041 i40e_unquiesce_vsi(pf->vsi[v]);
4045 #ifdef CONFIG_I40E_DCB
4047 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4048 * @vsi: the VSI being configured
4050 * This function waits for the given VSI's Tx queues to be disabled.
4052 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4054 struct i40e_pf *pf = vsi->back;
4057 pf_q = vsi->base_queue;
4058 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4059 /* Check and wait for the disable status of the queue */
4060 ret = i40e_pf_txq_wait(pf, pf_q, false);
4062 dev_info(&pf->pdev->dev,
4063 "%s: VSI seid %d Tx ring %d disable timeout\n",
4064 __func__, vsi->seid, pf_q);
4073 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4076 * This function waits for the Tx queues to be in disabled state for all the
4077 * VSIs that are managed by this PF.
4079 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4083 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4084 /* No need to wait for FCoE VSI queues */
4085 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4086 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4097 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4098 * @pf: pointer to PF
4100 * Get TC map for ISCSI PF type that will include iSCSI TC
4103 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4105 struct i40e_dcb_app_priority_table app;
4106 struct i40e_hw *hw = &pf->hw;
4107 u8 enabled_tc = 1; /* TC0 is always enabled */
4109 /* Get the iSCSI APP TLV */
4110 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4112 for (i = 0; i < dcbcfg->numapps; i++) {
4113 app = dcbcfg->app[i];
4114 if (app.selector == I40E_APP_SEL_TCPIP &&
4115 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4116 tc = dcbcfg->etscfg.prioritytable[app.priority];
4117 enabled_tc |= BIT_ULL(tc);
4126 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4127 * @dcbcfg: the corresponding DCBx configuration structure
4129 * Return the number of TCs from given DCBx configuration
4131 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4136 /* Scan the ETS Config Priority Table to find
4137 * traffic class enabled for a given priority
4138 * and use the traffic class index to get the
4139 * number of traffic classes enabled
4141 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4142 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4143 num_tc = dcbcfg->etscfg.prioritytable[i];
4146 /* Traffic class index starts from zero so
4147 * increment to return the actual count
4153 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4154 * @dcbcfg: the corresponding DCBx configuration structure
4156 * Query the current DCB configuration and return the number of
4157 * traffic classes enabled from the given DCBX config
4159 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4161 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4165 for (i = 0; i < num_tc; i++)
4166 enabled_tc |= BIT(i);
4172 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4173 * @pf: PF being queried
4175 * Return number of traffic classes enabled for the given PF
4177 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4179 struct i40e_hw *hw = &pf->hw;
4182 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4184 /* If DCB is not enabled then always in single TC */
4185 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4188 /* SFP mode will be enabled for all TCs on port */
4189 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4190 return i40e_dcb_get_num_tc(dcbcfg);
4192 /* MFP mode return count of enabled TCs for this PF */
4193 if (pf->hw.func_caps.iscsi)
4194 enabled_tc = i40e_get_iscsi_tc_map(pf);
4196 return 1; /* Only TC0 */
4198 /* At least have TC0 */
4199 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4200 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4201 if (enabled_tc & BIT_ULL(i))
4208 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4209 * @pf: PF being queried
4211 * Return a bitmap for first enabled traffic class for this PF.
4213 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4215 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4219 return 0x1; /* TC0 */
4221 /* Find the first enabled TC */
4222 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4223 if (enabled_tc & BIT_ULL(i))
4231 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4232 * @pf: PF being queried
4234 * Return a bitmap for enabled traffic classes for this PF.
4236 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4238 /* If DCB is not enabled for this PF then just return default TC */
4239 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4240 return i40e_pf_get_default_tc(pf);
4242 /* SFP mode we want PF to be enabled for all TCs */
4243 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4244 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4246 /* MFP enabled and iSCSI PF type */
4247 if (pf->hw.func_caps.iscsi)
4248 return i40e_get_iscsi_tc_map(pf);
4250 return i40e_pf_get_default_tc(pf);
4254 * i40e_vsi_get_bw_info - Query VSI BW Information
4255 * @vsi: the VSI being queried
4257 * Returns 0 on success, negative value on failure
4259 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4261 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4262 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4263 struct i40e_pf *pf = vsi->back;
4264 struct i40e_hw *hw = &pf->hw;
4269 /* Get the VSI level BW configuration */
4270 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4272 dev_info(&pf->pdev->dev,
4273 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4274 i40e_stat_str(&pf->hw, ret),
4275 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4279 /* Get the VSI level BW configuration per TC */
4280 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4283 dev_info(&pf->pdev->dev,
4284 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4285 i40e_stat_str(&pf->hw, ret),
4286 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4290 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4291 dev_info(&pf->pdev->dev,
4292 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4293 bw_config.tc_valid_bits,
4294 bw_ets_config.tc_valid_bits);
4295 /* Still continuing */
4298 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4299 vsi->bw_max_quanta = bw_config.max_bw;
4300 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4301 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4302 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4303 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4304 vsi->bw_ets_limit_credits[i] =
4305 le16_to_cpu(bw_ets_config.credits[i]);
4306 /* 3 bits out of 4 for each TC */
4307 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4314 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4315 * @vsi: the VSI being configured
4316 * @enabled_tc: TC bitmap
4317 * @bw_credits: BW shared credits per TC
4319 * Returns 0 on success, negative value on failure
4321 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4324 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4328 bw_data.tc_valid_bits = enabled_tc;
4329 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4330 bw_data.tc_bw_credits[i] = bw_share[i];
4332 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4335 dev_info(&vsi->back->pdev->dev,
4336 "AQ command Config VSI BW allocation per TC failed = %d\n",
4337 vsi->back->hw.aq.asq_last_status);
4341 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4342 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4348 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4349 * @vsi: the VSI being configured
4350 * @enabled_tc: TC map to be enabled
4353 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4355 struct net_device *netdev = vsi->netdev;
4356 struct i40e_pf *pf = vsi->back;
4357 struct i40e_hw *hw = &pf->hw;
4360 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4366 netdev_reset_tc(netdev);
4370 /* Set up actual enabled TCs on the VSI */
4371 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4374 /* set per TC queues for the VSI */
4375 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4376 /* Only set TC queues for enabled tcs
4378 * e.g. For a VSI that has TC0 and TC3 enabled the
4379 * enabled_tc bitmap would be 0x00001001; the driver
4380 * will set the numtc for netdev as 2 that will be
4381 * referenced by the netdev layer as TC 0 and 1.
4383 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4384 netdev_set_tc_queue(netdev,
4385 vsi->tc_config.tc_info[i].netdev_tc,
4386 vsi->tc_config.tc_info[i].qcount,
4387 vsi->tc_config.tc_info[i].qoffset);
4390 /* Assign UP2TC map for the VSI */
4391 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4392 /* Get the actual TC# for the UP */
4393 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4394 /* Get the mapped netdev TC# for the UP */
4395 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4396 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4401 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4402 * @vsi: the VSI being configured
4403 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4405 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4406 struct i40e_vsi_context *ctxt)
4408 /* copy just the sections touched not the entire info
4409 * since not all sections are valid as returned by
4412 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4413 memcpy(&vsi->info.queue_mapping,
4414 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4415 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4416 sizeof(vsi->info.tc_mapping));
4420 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4421 * @vsi: VSI to be configured
4422 * @enabled_tc: TC bitmap
4424 * This configures a particular VSI for TCs that are mapped to the
4425 * given TC bitmap. It uses default bandwidth share for TCs across
4426 * VSIs to configure TC for a particular VSI.
4429 * It is expected that the VSI queues have been quisced before calling
4432 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4434 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4435 struct i40e_vsi_context ctxt;
4439 /* Check if enabled_tc is same as existing or new TCs */
4440 if (vsi->tc_config.enabled_tc == enabled_tc)
4443 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4444 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4445 if (enabled_tc & BIT_ULL(i))
4449 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4451 dev_info(&vsi->back->pdev->dev,
4452 "Failed configuring TC map %d for VSI %d\n",
4453 enabled_tc, vsi->seid);
4457 /* Update Queue Pairs Mapping for currently enabled UPs */
4458 ctxt.seid = vsi->seid;
4459 ctxt.pf_num = vsi->back->hw.pf_id;
4461 ctxt.uplink_seid = vsi->uplink_seid;
4462 ctxt.info = vsi->info;
4463 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4465 /* Update the VSI after updating the VSI queue-mapping information */
4466 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4468 dev_info(&vsi->back->pdev->dev,
4469 "Update vsi tc config failed, err %s aq_err %s\n",
4470 i40e_stat_str(&vsi->back->hw, ret),
4471 i40e_aq_str(&vsi->back->hw,
4472 vsi->back->hw.aq.asq_last_status));
4475 /* update the local VSI info with updated queue map */
4476 i40e_vsi_update_queue_map(vsi, &ctxt);
4477 vsi->info.valid_sections = 0;
4479 /* Update current VSI BW information */
4480 ret = i40e_vsi_get_bw_info(vsi);
4482 dev_info(&vsi->back->pdev->dev,
4483 "Failed updating vsi bw info, err %s aq_err %s\n",
4484 i40e_stat_str(&vsi->back->hw, ret),
4485 i40e_aq_str(&vsi->back->hw,
4486 vsi->back->hw.aq.asq_last_status));
4490 /* Update the netdev TC setup */
4491 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4497 * i40e_veb_config_tc - Configure TCs for given VEB
4499 * @enabled_tc: TC bitmap
4501 * Configures given TC bitmap for VEB (switching) element
4503 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4505 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4506 struct i40e_pf *pf = veb->pf;
4510 /* No TCs or already enabled TCs just return */
4511 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4514 bw_data.tc_valid_bits = enabled_tc;
4515 /* bw_data.absolute_credits is not set (relative) */
4517 /* Enable ETS TCs with equal BW Share for now */
4518 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4519 if (enabled_tc & BIT_ULL(i))
4520 bw_data.tc_bw_share_credits[i] = 1;
4523 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4526 dev_info(&pf->pdev->dev,
4527 "VEB bw config failed, err %s aq_err %s\n",
4528 i40e_stat_str(&pf->hw, ret),
4529 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4533 /* Update the BW information */
4534 ret = i40e_veb_get_bw_info(veb);
4536 dev_info(&pf->pdev->dev,
4537 "Failed getting veb bw config, err %s aq_err %s\n",
4538 i40e_stat_str(&pf->hw, ret),
4539 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4546 #ifdef CONFIG_I40E_DCB
4548 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4551 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4552 * the caller would've quiesce all the VSIs before calling
4555 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4561 /* Enable the TCs available on PF to all VEBs */
4562 tc_map = i40e_pf_get_tc_map(pf);
4563 for (v = 0; v < I40E_MAX_VEB; v++) {
4566 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4568 dev_info(&pf->pdev->dev,
4569 "Failed configuring TC for VEB seid=%d\n",
4571 /* Will try to configure as many components */
4575 /* Update each VSI */
4576 for (v = 0; v < pf->num_alloc_vsi; v++) {
4580 /* - Enable all TCs for the LAN VSI
4582 * - For FCoE VSI only enable the TC configured
4583 * as per the APP TLV
4585 * - For all others keep them at TC0 for now
4587 if (v == pf->lan_vsi)
4588 tc_map = i40e_pf_get_tc_map(pf);
4590 tc_map = i40e_pf_get_default_tc(pf);
4592 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4593 tc_map = i40e_get_fcoe_tc_map(pf);
4594 #endif /* #ifdef I40E_FCOE */
4596 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4598 dev_info(&pf->pdev->dev,
4599 "Failed configuring TC for VSI seid=%d\n",
4601 /* Will try to configure as many components */
4603 /* Re-configure VSI vectors based on updated TC map */
4604 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4605 if (pf->vsi[v]->netdev)
4606 i40e_dcbnl_set_all(pf->vsi[v]);
4612 * i40e_resume_port_tx - Resume port Tx
4615 * Resume a port's Tx and issue a PF reset in case of failure to
4618 static int i40e_resume_port_tx(struct i40e_pf *pf)
4620 struct i40e_hw *hw = &pf->hw;
4623 ret = i40e_aq_resume_port_tx(hw, NULL);
4625 dev_info(&pf->pdev->dev,
4626 "Resume Port Tx failed, err %s aq_err %s\n",
4627 i40e_stat_str(&pf->hw, ret),
4628 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4629 /* Schedule PF reset to recover */
4630 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4631 i40e_service_event_schedule(pf);
4638 * i40e_init_pf_dcb - Initialize DCB configuration
4639 * @pf: PF being configured
4641 * Query the current DCB configuration and cache it
4642 * in the hardware structure
4644 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4646 struct i40e_hw *hw = &pf->hw;
4649 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4650 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4651 (pf->hw.aq.fw_maj_ver < 4))
4654 /* Get the initial DCB configuration */
4655 err = i40e_init_dcb(hw);
4657 /* Device/Function is not DCBX capable */
4658 if ((!hw->func_caps.dcb) ||
4659 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4660 dev_info(&pf->pdev->dev,
4661 "DCBX offload is not supported or is disabled for this PF.\n");
4663 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4667 /* When status is not DISABLED then DCBX in FW */
4668 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4669 DCB_CAP_DCBX_VER_IEEE;
4671 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4672 /* Enable DCB tagging only when more than one TC */
4673 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4674 pf->flags |= I40E_FLAG_DCB_ENABLED;
4675 dev_dbg(&pf->pdev->dev,
4676 "DCBX offload is supported for this PF.\n");
4679 dev_info(&pf->pdev->dev,
4680 "Query for DCB configuration failed, err %s aq_err %s\n",
4681 i40e_stat_str(&pf->hw, err),
4682 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4688 #endif /* CONFIG_I40E_DCB */
4689 #define SPEED_SIZE 14
4692 * i40e_print_link_message - print link up or down
4693 * @vsi: the VSI for which link needs a message
4695 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4697 char speed[SPEED_SIZE] = "Unknown";
4698 char fc[FC_SIZE] = "RX/TX";
4701 netdev_info(vsi->netdev, "NIC Link is Down\n");
4705 /* Warn user if link speed on NPAR enabled partition is not at
4708 if (vsi->back->hw.func_caps.npar_enable &&
4709 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4710 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4711 netdev_warn(vsi->netdev,
4712 "The partition detected link speed that is less than 10Gbps\n");
4714 switch (vsi->back->hw.phy.link_info.link_speed) {
4715 case I40E_LINK_SPEED_40GB:
4716 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4718 case I40E_LINK_SPEED_20GB:
4719 strncpy(speed, "20 Gbps", SPEED_SIZE);
4721 case I40E_LINK_SPEED_10GB:
4722 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4724 case I40E_LINK_SPEED_1GB:
4725 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4727 case I40E_LINK_SPEED_100MB:
4728 strncpy(speed, "100 Mbps", SPEED_SIZE);
4734 switch (vsi->back->hw.fc.current_mode) {
4736 strlcpy(fc, "RX/TX", FC_SIZE);
4738 case I40E_FC_TX_PAUSE:
4739 strlcpy(fc, "TX", FC_SIZE);
4741 case I40E_FC_RX_PAUSE:
4742 strlcpy(fc, "RX", FC_SIZE);
4745 strlcpy(fc, "None", FC_SIZE);
4749 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4754 * i40e_up_complete - Finish the last steps of bringing up a connection
4755 * @vsi: the VSI being configured
4757 static int i40e_up_complete(struct i40e_vsi *vsi)
4759 struct i40e_pf *pf = vsi->back;
4762 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4763 i40e_vsi_configure_msix(vsi);
4765 i40e_configure_msi_and_legacy(vsi);
4768 err = i40e_vsi_control_rings(vsi, true);
4772 clear_bit(__I40E_DOWN, &vsi->state);
4773 i40e_napi_enable_all(vsi);
4774 i40e_vsi_enable_irq(vsi);
4776 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4778 i40e_print_link_message(vsi, true);
4779 netif_tx_start_all_queues(vsi->netdev);
4780 netif_carrier_on(vsi->netdev);
4781 } else if (vsi->netdev) {
4782 i40e_print_link_message(vsi, false);
4783 /* need to check for qualified module here*/
4784 if ((pf->hw.phy.link_info.link_info &
4785 I40E_AQ_MEDIA_AVAILABLE) &&
4786 (!(pf->hw.phy.link_info.an_info &
4787 I40E_AQ_QUALIFIED_MODULE)))
4788 netdev_err(vsi->netdev,
4789 "the driver failed to link because an unqualified module was detected.");
4792 /* replay FDIR SB filters */
4793 if (vsi->type == I40E_VSI_FDIR) {
4794 /* reset fd counters */
4795 pf->fd_add_err = pf->fd_atr_cnt = 0;
4796 if (pf->fd_tcp_rule > 0) {
4797 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4798 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4799 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4800 pf->fd_tcp_rule = 0;
4802 i40e_fdir_filter_restore(vsi);
4804 i40e_service_event_schedule(pf);
4810 * i40e_vsi_reinit_locked - Reset the VSI
4811 * @vsi: the VSI being configured
4813 * Rebuild the ring structs after some configuration
4814 * has changed, e.g. MTU size.
4816 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4818 struct i40e_pf *pf = vsi->back;
4820 WARN_ON(in_interrupt());
4821 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4822 usleep_range(1000, 2000);
4825 /* Give a VF some time to respond to the reset. The
4826 * two second wait is based upon the watchdog cycle in
4829 if (vsi->type == I40E_VSI_SRIOV)
4832 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4836 * i40e_up - Bring the connection back up after being down
4837 * @vsi: the VSI being configured
4839 int i40e_up(struct i40e_vsi *vsi)
4843 err = i40e_vsi_configure(vsi);
4845 err = i40e_up_complete(vsi);
4851 * i40e_down - Shutdown the connection processing
4852 * @vsi: the VSI being stopped
4854 void i40e_down(struct i40e_vsi *vsi)
4858 /* It is assumed that the caller of this function
4859 * sets the vsi->state __I40E_DOWN bit.
4862 netif_carrier_off(vsi->netdev);
4863 netif_tx_disable(vsi->netdev);
4865 i40e_vsi_disable_irq(vsi);
4866 i40e_vsi_control_rings(vsi, false);
4867 i40e_napi_disable_all(vsi);
4869 for (i = 0; i < vsi->num_queue_pairs; i++) {
4870 i40e_clean_tx_ring(vsi->tx_rings[i]);
4871 i40e_clean_rx_ring(vsi->rx_rings[i]);
4876 * i40e_setup_tc - configure multiple traffic classes
4877 * @netdev: net device to configure
4878 * @tc: number of traffic classes to enable
4881 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4883 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4886 struct i40e_netdev_priv *np = netdev_priv(netdev);
4887 struct i40e_vsi *vsi = np->vsi;
4888 struct i40e_pf *pf = vsi->back;
4893 /* Check if DCB enabled to continue */
4894 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4895 netdev_info(netdev, "DCB is not enabled for adapter\n");
4899 /* Check if MFP enabled */
4900 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4901 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4905 /* Check whether tc count is within enabled limit */
4906 if (tc > i40e_pf_get_num_tc(pf)) {
4907 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4911 /* Generate TC map for number of tc requested */
4912 for (i = 0; i < tc; i++)
4913 enabled_tc |= BIT_ULL(i);
4915 /* Requesting same TC configuration as already enabled */
4916 if (enabled_tc == vsi->tc_config.enabled_tc)
4919 /* Quiesce VSI queues */
4920 i40e_quiesce_vsi(vsi);
4922 /* Configure VSI for enabled TCs */
4923 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4925 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4931 i40e_unquiesce_vsi(vsi);
4938 * i40e_open - Called when a network interface is made active
4939 * @netdev: network interface device structure
4941 * The open entry point is called when a network interface is made
4942 * active by the system (IFF_UP). At this point all resources needed
4943 * for transmit and receive operations are allocated, the interrupt
4944 * handler is registered with the OS, the netdev watchdog subtask is
4945 * enabled, and the stack is notified that the interface is ready.
4947 * Returns 0 on success, negative value on failure
4949 int i40e_open(struct net_device *netdev)
4951 struct i40e_netdev_priv *np = netdev_priv(netdev);
4952 struct i40e_vsi *vsi = np->vsi;
4953 struct i40e_pf *pf = vsi->back;
4956 /* disallow open during test or if eeprom is broken */
4957 if (test_bit(__I40E_TESTING, &pf->state) ||
4958 test_bit(__I40E_BAD_EEPROM, &pf->state))
4961 netif_carrier_off(netdev);
4963 err = i40e_vsi_open(vsi);
4967 /* configure global TSO hardware offload settings */
4968 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4969 TCP_FLAG_FIN) >> 16);
4970 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4972 TCP_FLAG_CWR) >> 16);
4973 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4975 #ifdef CONFIG_I40E_VXLAN
4976 vxlan_get_rx_port(netdev);
4984 * @vsi: the VSI to open
4986 * Finish initialization of the VSI.
4988 * Returns 0 on success, negative value on failure
4990 int i40e_vsi_open(struct i40e_vsi *vsi)
4992 struct i40e_pf *pf = vsi->back;
4993 char int_name[I40E_INT_NAME_STR_LEN];
4996 /* allocate descriptors */
4997 err = i40e_vsi_setup_tx_resources(vsi);
5000 err = i40e_vsi_setup_rx_resources(vsi);
5004 err = i40e_vsi_configure(vsi);
5009 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5010 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5011 err = i40e_vsi_request_irq(vsi, int_name);
5015 /* Notify the stack of the actual queue counts. */
5016 err = netif_set_real_num_tx_queues(vsi->netdev,
5017 vsi->num_queue_pairs);
5019 goto err_set_queues;
5021 err = netif_set_real_num_rx_queues(vsi->netdev,
5022 vsi->num_queue_pairs);
5024 goto err_set_queues;
5026 } else if (vsi->type == I40E_VSI_FDIR) {
5027 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5028 dev_driver_string(&pf->pdev->dev),
5029 dev_name(&pf->pdev->dev));
5030 err = i40e_vsi_request_irq(vsi, int_name);
5037 err = i40e_up_complete(vsi);
5039 goto err_up_complete;
5046 i40e_vsi_free_irq(vsi);
5048 i40e_vsi_free_rx_resources(vsi);
5050 i40e_vsi_free_tx_resources(vsi);
5051 if (vsi == pf->vsi[pf->lan_vsi])
5052 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5058 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5059 * @pf: Pointer to PF
5061 * This function destroys the hlist where all the Flow Director
5062 * filters were saved.
5064 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5066 struct i40e_fdir_filter *filter;
5067 struct hlist_node *node2;
5069 hlist_for_each_entry_safe(filter, node2,
5070 &pf->fdir_filter_list, fdir_node) {
5071 hlist_del(&filter->fdir_node);
5074 pf->fdir_pf_active_filters = 0;
5078 * i40e_close - Disables a network interface
5079 * @netdev: network interface device structure
5081 * The close entry point is called when an interface is de-activated
5082 * by the OS. The hardware is still under the driver's control, but
5083 * this netdev interface is disabled.
5085 * Returns 0, this is not allowed to fail
5088 int i40e_close(struct net_device *netdev)
5090 static int i40e_close(struct net_device *netdev)
5093 struct i40e_netdev_priv *np = netdev_priv(netdev);
5094 struct i40e_vsi *vsi = np->vsi;
5096 i40e_vsi_close(vsi);
5102 * i40e_do_reset - Start a PF or Core Reset sequence
5103 * @pf: board private structure
5104 * @reset_flags: which reset is requested
5106 * The essential difference in resets is that the PF Reset
5107 * doesn't clear the packet buffers, doesn't reset the PE
5108 * firmware, and doesn't bother the other PFs on the chip.
5110 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5114 WARN_ON(in_interrupt());
5116 if (i40e_check_asq_alive(&pf->hw))
5117 i40e_vc_notify_reset(pf);
5119 /* do the biggest reset indicated */
5120 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5122 /* Request a Global Reset
5124 * This will start the chip's countdown to the actual full
5125 * chip reset event, and a warning interrupt to be sent
5126 * to all PFs, including the requestor. Our handler
5127 * for the warning interrupt will deal with the shutdown
5128 * and recovery of the switch setup.
5130 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5131 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5132 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5133 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5135 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5137 /* Request a Core Reset
5139 * Same as Global Reset, except does *not* include the MAC/PHY
5141 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5142 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5143 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5144 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5145 i40e_flush(&pf->hw);
5147 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5149 /* Request a PF Reset
5151 * Resets only the PF-specific registers
5153 * This goes directly to the tear-down and rebuild of
5154 * the switch, since we need to do all the recovery as
5155 * for the Core Reset.
5157 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5158 i40e_handle_reset_warning(pf);
5160 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5163 /* Find the VSI(s) that requested a re-init */
5164 dev_info(&pf->pdev->dev,
5165 "VSI reinit requested\n");
5166 for (v = 0; v < pf->num_alloc_vsi; v++) {
5167 struct i40e_vsi *vsi = pf->vsi[v];
5169 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5170 i40e_vsi_reinit_locked(pf->vsi[v]);
5171 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5175 /* no further action needed, so return now */
5177 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5180 /* Find the VSI(s) that needs to be brought down */
5181 dev_info(&pf->pdev->dev, "VSI down requested\n");
5182 for (v = 0; v < pf->num_alloc_vsi; v++) {
5183 struct i40e_vsi *vsi = pf->vsi[v];
5185 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5186 set_bit(__I40E_DOWN, &vsi->state);
5188 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5192 /* no further action needed, so return now */
5195 dev_info(&pf->pdev->dev,
5196 "bad reset request 0x%08x\n", reset_flags);
5201 #ifdef CONFIG_I40E_DCB
5203 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5204 * @pf: board private structure
5205 * @old_cfg: current DCB config
5206 * @new_cfg: new DCB config
5208 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5209 struct i40e_dcbx_config *old_cfg,
5210 struct i40e_dcbx_config *new_cfg)
5212 bool need_reconfig = false;
5214 /* Check if ETS configuration has changed */
5215 if (memcmp(&new_cfg->etscfg,
5217 sizeof(new_cfg->etscfg))) {
5218 /* If Priority Table has changed reconfig is needed */
5219 if (memcmp(&new_cfg->etscfg.prioritytable,
5220 &old_cfg->etscfg.prioritytable,
5221 sizeof(new_cfg->etscfg.prioritytable))) {
5222 need_reconfig = true;
5223 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5226 if (memcmp(&new_cfg->etscfg.tcbwtable,
5227 &old_cfg->etscfg.tcbwtable,
5228 sizeof(new_cfg->etscfg.tcbwtable)))
5229 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5231 if (memcmp(&new_cfg->etscfg.tsatable,
5232 &old_cfg->etscfg.tsatable,
5233 sizeof(new_cfg->etscfg.tsatable)))
5234 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5237 /* Check if PFC configuration has changed */
5238 if (memcmp(&new_cfg->pfc,
5240 sizeof(new_cfg->pfc))) {
5241 need_reconfig = true;
5242 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5245 /* Check if APP Table has changed */
5246 if (memcmp(&new_cfg->app,
5248 sizeof(new_cfg->app))) {
5249 need_reconfig = true;
5250 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5253 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5255 return need_reconfig;
5259 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5260 * @pf: board private structure
5261 * @e: event info posted on ARQ
5263 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5264 struct i40e_arq_event_info *e)
5266 struct i40e_aqc_lldp_get_mib *mib =
5267 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5268 struct i40e_hw *hw = &pf->hw;
5269 struct i40e_dcbx_config tmp_dcbx_cfg;
5270 bool need_reconfig = false;
5274 /* Not DCB capable or capability disabled */
5275 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5278 /* Ignore if event is not for Nearest Bridge */
5279 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5280 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5281 dev_dbg(&pf->pdev->dev,
5282 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5283 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5286 /* Check MIB Type and return if event for Remote MIB update */
5287 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5288 dev_dbg(&pf->pdev->dev,
5289 "%s: LLDP event mib type %s\n", __func__,
5290 type ? "remote" : "local");
5291 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5292 /* Update the remote cached instance and return */
5293 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5294 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5295 &hw->remote_dcbx_config);
5299 /* Store the old configuration */
5300 tmp_dcbx_cfg = hw->local_dcbx_config;
5302 /* Reset the old DCBx configuration data */
5303 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5304 /* Get updated DCBX data from firmware */
5305 ret = i40e_get_dcb_config(&pf->hw);
5307 dev_info(&pf->pdev->dev,
5308 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5309 i40e_stat_str(&pf->hw, ret),
5310 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5314 /* No change detected in DCBX configs */
5315 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5316 sizeof(tmp_dcbx_cfg))) {
5317 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5321 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5322 &hw->local_dcbx_config);
5324 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5329 /* Enable DCB tagging only when more than one TC */
5330 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5331 pf->flags |= I40E_FLAG_DCB_ENABLED;
5333 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5335 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5336 /* Reconfiguration needed quiesce all VSIs */
5337 i40e_pf_quiesce_all_vsi(pf);
5339 /* Changes in configuration update VEB/VSI */
5340 i40e_dcb_reconfigure(pf);
5342 ret = i40e_resume_port_tx(pf);
5344 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5345 /* In case of error no point in resuming VSIs */
5349 /* Wait for the PF's Tx queues to be disabled */
5350 ret = i40e_pf_wait_txq_disabled(pf);
5352 /* Schedule PF reset to recover */
5353 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5354 i40e_service_event_schedule(pf);
5356 i40e_pf_unquiesce_all_vsi(pf);
5362 #endif /* CONFIG_I40E_DCB */
5365 * i40e_do_reset_safe - Protected reset path for userland calls.
5366 * @pf: board private structure
5367 * @reset_flags: which reset is requested
5370 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5373 i40e_do_reset(pf, reset_flags);
5378 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5379 * @pf: board private structure
5380 * @e: event info posted on ARQ
5382 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5385 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5386 struct i40e_arq_event_info *e)
5388 struct i40e_aqc_lan_overflow *data =
5389 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5390 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5391 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5392 struct i40e_hw *hw = &pf->hw;
5396 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5399 /* Queue belongs to VF, find the VF and issue VF reset */
5400 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5401 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5402 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5403 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5404 vf_id -= hw->func_caps.vf_base_id;
5405 vf = &pf->vf[vf_id];
5406 i40e_vc_notify_vf_reset(vf);
5407 /* Allow VF to process pending reset notification */
5409 i40e_reset_vf(vf, false);
5414 * i40e_service_event_complete - Finish up the service event
5415 * @pf: board private structure
5417 static void i40e_service_event_complete(struct i40e_pf *pf)
5419 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5421 /* flush memory to make sure state is correct before next watchog */
5422 smp_mb__before_atomic();
5423 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5427 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5428 * @pf: board private structure
5430 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5434 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5435 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5440 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5441 * @pf: board private structure
5443 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5447 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5448 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5449 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5450 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5455 * i40e_get_global_fd_count - Get total FD filters programmed on device
5456 * @pf: board private structure
5458 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5462 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5463 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5464 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5465 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5470 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5471 * @pf: board private structure
5473 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5475 u32 fcnt_prog, fcnt_avail;
5477 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5480 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5483 fcnt_prog = i40e_get_global_fd_count(pf);
5484 fcnt_avail = pf->fdir_pf_filter_count;
5485 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5486 (pf->fd_add_err == 0) ||
5487 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5488 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5489 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5490 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5491 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5492 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5495 /* Wait for some more space to be available to turn on ATR */
5496 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5497 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5498 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5499 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5500 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5501 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5506 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5507 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5509 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5510 * @pf: board private structure
5512 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5514 unsigned long min_flush_time;
5515 int flush_wait_retry = 50;
5516 bool disable_atr = false;
5520 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5523 if (time_after(jiffies, pf->fd_flush_timestamp +
5524 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5525 /* If the flush is happening too quick and we have mostly
5526 * SB rules we should not re-enable ATR for some time.
5528 min_flush_time = pf->fd_flush_timestamp
5529 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5530 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5532 if (!(time_after(jiffies, min_flush_time)) &&
5533 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5534 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5535 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5539 pf->fd_flush_timestamp = jiffies;
5540 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5541 /* flush all filters */
5542 wr32(&pf->hw, I40E_PFQF_CTL_1,
5543 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5544 i40e_flush(&pf->hw);
5548 /* Check FD flush status every 5-6msec */
5549 usleep_range(5000, 6000);
5550 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5551 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5553 } while (flush_wait_retry--);
5554 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5555 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5557 /* replay sideband filters */
5558 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5560 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5561 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5562 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5563 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5569 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5570 * @pf: board private structure
5572 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5574 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5577 /* We can see up to 256 filter programming desc in transit if the filters are
5578 * being applied really fast; before we see the first
5579 * filter miss error on Rx queue 0. Accumulating enough error messages before
5580 * reacting will make sure we don't cause flush too often.
5582 #define I40E_MAX_FD_PROGRAM_ERROR 256
5585 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5586 * @pf: board private structure
5588 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5591 /* if interface is down do nothing */
5592 if (test_bit(__I40E_DOWN, &pf->state))
5595 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5598 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5599 i40e_fdir_flush_and_replay(pf);
5601 i40e_fdir_check_and_reenable(pf);
5606 * i40e_vsi_link_event - notify VSI of a link event
5607 * @vsi: vsi to be notified
5608 * @link_up: link up or down
5610 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5612 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5615 switch (vsi->type) {
5620 if (!vsi->netdev || !vsi->netdev_registered)
5624 netif_carrier_on(vsi->netdev);
5625 netif_tx_wake_all_queues(vsi->netdev);
5627 netif_carrier_off(vsi->netdev);
5628 netif_tx_stop_all_queues(vsi->netdev);
5632 case I40E_VSI_SRIOV:
5633 case I40E_VSI_VMDQ2:
5635 case I40E_VSI_MIRROR:
5637 /* there is no notification for other VSIs */
5643 * i40e_veb_link_event - notify elements on the veb of a link event
5644 * @veb: veb to be notified
5645 * @link_up: link up or down
5647 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5652 if (!veb || !veb->pf)
5656 /* depth first... */
5657 for (i = 0; i < I40E_MAX_VEB; i++)
5658 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5659 i40e_veb_link_event(pf->veb[i], link_up);
5661 /* ... now the local VSIs */
5662 for (i = 0; i < pf->num_alloc_vsi; i++)
5663 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5664 i40e_vsi_link_event(pf->vsi[i], link_up);
5668 * i40e_link_event - Update netif_carrier status
5669 * @pf: board private structure
5671 static void i40e_link_event(struct i40e_pf *pf)
5673 bool new_link, old_link;
5674 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5675 u8 new_link_speed, old_link_speed;
5677 /* set this to force the get_link_status call to refresh state */
5678 pf->hw.phy.get_link_info = true;
5680 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5681 new_link = i40e_get_link_status(&pf->hw);
5682 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5683 new_link_speed = pf->hw.phy.link_info.link_speed;
5685 if (new_link == old_link &&
5686 new_link_speed == old_link_speed &&
5687 (test_bit(__I40E_DOWN, &vsi->state) ||
5688 new_link == netif_carrier_ok(vsi->netdev)))
5691 if (!test_bit(__I40E_DOWN, &vsi->state))
5692 i40e_print_link_message(vsi, new_link);
5694 /* Notify the base of the switch tree connected to
5695 * the link. Floating VEBs are not notified.
5697 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5698 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5700 i40e_vsi_link_event(vsi, new_link);
5703 i40e_vc_notify_link_state(pf);
5705 if (pf->flags & I40E_FLAG_PTP)
5706 i40e_ptp_set_increment(pf);
5710 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5711 * @pf: board private structure
5713 * Set the per-queue flags to request a check for stuck queues in the irq
5714 * clean functions, then force interrupts to be sure the irq clean is called.
5716 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5720 /* If we're down or resetting, just bail */
5721 if (test_bit(__I40E_DOWN, &pf->state) ||
5722 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5725 /* for each VSI/netdev
5727 * set the check flag
5729 * force an interrupt
5731 for (v = 0; v < pf->num_alloc_vsi; v++) {
5732 struct i40e_vsi *vsi = pf->vsi[v];
5736 test_bit(__I40E_DOWN, &vsi->state) ||
5737 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5740 for (i = 0; i < vsi->num_queue_pairs; i++) {
5741 set_check_for_tx_hang(vsi->tx_rings[i]);
5742 if (test_bit(__I40E_HANG_CHECK_ARMED,
5743 &vsi->tx_rings[i]->state))
5748 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5749 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5750 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5751 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5752 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5753 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5754 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5756 u16 vec = vsi->base_vector - 1;
5757 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5758 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5759 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5760 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5761 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5762 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5763 wr32(&vsi->back->hw,
5764 I40E_PFINT_DYN_CTLN(vec), val);
5766 i40e_flush(&vsi->back->hw);
5772 * i40e_watchdog_subtask - periodic checks not using event driven response
5773 * @pf: board private structure
5775 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5779 /* if interface is down do nothing */
5780 if (test_bit(__I40E_DOWN, &pf->state) ||
5781 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5784 /* make sure we don't do these things too often */
5785 if (time_before(jiffies, (pf->service_timer_previous +
5786 pf->service_timer_period)))
5788 pf->service_timer_previous = jiffies;
5790 i40e_check_hang_subtask(pf);
5791 i40e_link_event(pf);
5793 /* Update the stats for active netdevs so the network stack
5794 * can look at updated numbers whenever it cares to
5796 for (i = 0; i < pf->num_alloc_vsi; i++)
5797 if (pf->vsi[i] && pf->vsi[i]->netdev)
5798 i40e_update_stats(pf->vsi[i]);
5800 /* Update the stats for the active switching components */
5801 for (i = 0; i < I40E_MAX_VEB; i++)
5803 i40e_update_veb_stats(pf->veb[i]);
5805 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5809 * i40e_reset_subtask - Set up for resetting the device and driver
5810 * @pf: board private structure
5812 static void i40e_reset_subtask(struct i40e_pf *pf)
5814 u32 reset_flags = 0;
5817 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5818 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5819 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5821 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5822 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5823 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5825 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5826 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5827 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5829 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5830 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5831 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5833 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5834 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5835 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5838 /* If there's a recovery already waiting, it takes
5839 * precedence before starting a new reset sequence.
5841 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5842 i40e_handle_reset_warning(pf);
5846 /* If we're already down or resetting, just bail */
5848 !test_bit(__I40E_DOWN, &pf->state) &&
5849 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5850 i40e_do_reset(pf, reset_flags);
5857 * i40e_handle_link_event - Handle link event
5858 * @pf: board private structure
5859 * @e: event info posted on ARQ
5861 static void i40e_handle_link_event(struct i40e_pf *pf,
5862 struct i40e_arq_event_info *e)
5864 struct i40e_hw *hw = &pf->hw;
5865 struct i40e_aqc_get_link_status *status =
5866 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5868 /* save off old link status information */
5869 hw->phy.link_info_old = hw->phy.link_info;
5871 /* Do a new status request to re-enable LSE reporting
5872 * and load new status information into the hw struct
5873 * This completely ignores any state information
5874 * in the ARQ event info, instead choosing to always
5875 * issue the AQ update link status command.
5877 i40e_link_event(pf);
5879 /* check for unqualified module, if link is down */
5880 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5881 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5882 (!(status->link_info & I40E_AQ_LINK_UP)))
5883 dev_err(&pf->pdev->dev,
5884 "The driver failed to link because an unqualified module was detected.\n");
5888 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5889 * @pf: board private structure
5891 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5893 struct i40e_arq_event_info event;
5894 struct i40e_hw *hw = &pf->hw;
5901 /* Do not run clean AQ when PF reset fails */
5902 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5905 /* check for error indications */
5906 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5908 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5909 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5910 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5912 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5913 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5914 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5916 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5917 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5918 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5921 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5923 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5925 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5926 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5927 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5929 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5930 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5931 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5933 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5934 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5935 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5938 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5940 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5941 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5946 ret = i40e_clean_arq_element(hw, &event, &pending);
5947 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5950 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5954 opcode = le16_to_cpu(event.desc.opcode);
5957 case i40e_aqc_opc_get_link_status:
5958 i40e_handle_link_event(pf, &event);
5960 case i40e_aqc_opc_send_msg_to_pf:
5961 ret = i40e_vc_process_vf_msg(pf,
5962 le16_to_cpu(event.desc.retval),
5963 le32_to_cpu(event.desc.cookie_high),
5964 le32_to_cpu(event.desc.cookie_low),
5968 case i40e_aqc_opc_lldp_update_mib:
5969 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5970 #ifdef CONFIG_I40E_DCB
5972 ret = i40e_handle_lldp_event(pf, &event);
5974 #endif /* CONFIG_I40E_DCB */
5976 case i40e_aqc_opc_event_lan_overflow:
5977 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5978 i40e_handle_lan_overflow_event(pf, &event);
5980 case i40e_aqc_opc_send_msg_to_peer:
5981 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5983 case i40e_aqc_opc_nvm_erase:
5984 case i40e_aqc_opc_nvm_update:
5985 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
5988 dev_info(&pf->pdev->dev,
5989 "ARQ Error: Unknown event 0x%04x received\n",
5993 } while (pending && (i++ < pf->adminq_work_limit));
5995 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5996 /* re-enable Admin queue interrupt cause */
5997 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5998 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5999 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6002 kfree(event.msg_buf);
6006 * i40e_verify_eeprom - make sure eeprom is good to use
6007 * @pf: board private structure
6009 static void i40e_verify_eeprom(struct i40e_pf *pf)
6013 err = i40e_diag_eeprom_test(&pf->hw);
6015 /* retry in case of garbage read */
6016 err = i40e_diag_eeprom_test(&pf->hw);
6018 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6020 set_bit(__I40E_BAD_EEPROM, &pf->state);
6024 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6025 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6026 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6031 * i40e_enable_pf_switch_lb
6032 * @pf: pointer to the PF structure
6034 * enable switch loop back or die - no point in a return value
6036 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6038 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6039 struct i40e_vsi_context ctxt;
6042 ctxt.seid = pf->main_vsi_seid;
6043 ctxt.pf_num = pf->hw.pf_id;
6045 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6047 dev_info(&pf->pdev->dev,
6048 "couldn't get PF vsi config, err %s aq_err %s\n",
6049 i40e_stat_str(&pf->hw, ret),
6050 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6053 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6054 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6055 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6057 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6059 dev_info(&pf->pdev->dev,
6060 "update vsi switch failed, err %s aq_err %s\n",
6061 i40e_stat_str(&pf->hw, ret),
6062 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6067 * i40e_disable_pf_switch_lb
6068 * @pf: pointer to the PF structure
6070 * disable switch loop back or die - no point in a return value
6072 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6074 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6075 struct i40e_vsi_context ctxt;
6078 ctxt.seid = pf->main_vsi_seid;
6079 ctxt.pf_num = pf->hw.pf_id;
6081 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6083 dev_info(&pf->pdev->dev,
6084 "couldn't get PF vsi config, err %s aq_err %s\n",
6085 i40e_stat_str(&pf->hw, ret),
6086 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6089 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6090 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6091 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6093 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6095 dev_info(&pf->pdev->dev,
6096 "update vsi switch failed, err %s aq_err %s\n",
6097 i40e_stat_str(&pf->hw, ret),
6098 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6103 * i40e_config_bridge_mode - Configure the HW bridge mode
6104 * @veb: pointer to the bridge instance
6106 * Configure the loop back mode for the LAN VSI that is downlink to the
6107 * specified HW bridge instance. It is expected this function is called
6108 * when a new HW bridge is instantiated.
6110 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6112 struct i40e_pf *pf = veb->pf;
6114 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6115 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6116 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6117 i40e_disable_pf_switch_lb(pf);
6119 i40e_enable_pf_switch_lb(pf);
6123 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6124 * @veb: pointer to the VEB instance
6126 * This is a recursive function that first builds the attached VSIs then
6127 * recurses in to build the next layer of VEB. We track the connections
6128 * through our own index numbers because the seid's from the HW could
6129 * change across the reset.
6131 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6133 struct i40e_vsi *ctl_vsi = NULL;
6134 struct i40e_pf *pf = veb->pf;
6138 /* build VSI that owns this VEB, temporarily attached to base VEB */
6139 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6141 pf->vsi[v]->veb_idx == veb->idx &&
6142 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6143 ctl_vsi = pf->vsi[v];
6148 dev_info(&pf->pdev->dev,
6149 "missing owner VSI for veb_idx %d\n", veb->idx);
6151 goto end_reconstitute;
6153 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6154 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6155 ret = i40e_add_vsi(ctl_vsi);
6157 dev_info(&pf->pdev->dev,
6158 "rebuild of veb_idx %d owner VSI failed: %d\n",
6160 goto end_reconstitute;
6162 i40e_vsi_reset_stats(ctl_vsi);
6164 /* create the VEB in the switch and move the VSI onto the VEB */
6165 ret = i40e_add_veb(veb, ctl_vsi);
6167 goto end_reconstitute;
6169 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6170 veb->bridge_mode = BRIDGE_MODE_VEB;
6172 veb->bridge_mode = BRIDGE_MODE_VEPA;
6173 i40e_config_bridge_mode(veb);
6175 /* create the remaining VSIs attached to this VEB */
6176 for (v = 0; v < pf->num_alloc_vsi; v++) {
6177 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6180 if (pf->vsi[v]->veb_idx == veb->idx) {
6181 struct i40e_vsi *vsi = pf->vsi[v];
6182 vsi->uplink_seid = veb->seid;
6183 ret = i40e_add_vsi(vsi);
6185 dev_info(&pf->pdev->dev,
6186 "rebuild of vsi_idx %d failed: %d\n",
6188 goto end_reconstitute;
6190 i40e_vsi_reset_stats(vsi);
6194 /* create any VEBs attached to this VEB - RECURSION */
6195 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6196 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6197 pf->veb[veb_idx]->uplink_seid = veb->seid;
6198 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6209 * i40e_get_capabilities - get info about the HW
6210 * @pf: the PF struct
6212 static int i40e_get_capabilities(struct i40e_pf *pf)
6214 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6219 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6221 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6225 /* this loads the data into the hw struct for us */
6226 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6228 i40e_aqc_opc_list_func_capabilities,
6230 /* data loaded, buffer no longer needed */
6233 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6234 /* retry with a larger buffer */
6235 buf_len = data_size;
6236 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6237 dev_info(&pf->pdev->dev,
6238 "capability discovery failed, err %s aq_err %s\n",
6239 i40e_stat_str(&pf->hw, err),
6240 i40e_aq_str(&pf->hw,
6241 pf->hw.aq.asq_last_status));
6246 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6247 (pf->hw.aq.fw_maj_ver < 2)) {
6248 pf->hw.func_caps.num_msix_vectors++;
6249 pf->hw.func_caps.num_msix_vectors_vf++;
6252 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6253 dev_info(&pf->pdev->dev,
6254 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6255 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6256 pf->hw.func_caps.num_msix_vectors,
6257 pf->hw.func_caps.num_msix_vectors_vf,
6258 pf->hw.func_caps.fd_filters_guaranteed,
6259 pf->hw.func_caps.fd_filters_best_effort,
6260 pf->hw.func_caps.num_tx_qp,
6261 pf->hw.func_caps.num_vsis);
6263 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6264 + pf->hw.func_caps.num_vfs)
6265 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6266 dev_info(&pf->pdev->dev,
6267 "got num_vsis %d, setting num_vsis to %d\n",
6268 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6269 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6275 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6278 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6279 * @pf: board private structure
6281 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6283 struct i40e_vsi *vsi;
6286 /* quick workaround for an NVM issue that leaves a critical register
6289 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6290 static const u32 hkey[] = {
6291 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6292 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6293 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6296 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6297 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6300 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6303 /* find existing VSI and see if it needs configuring */
6305 for (i = 0; i < pf->num_alloc_vsi; i++) {
6306 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6312 /* create a new VSI if none exists */
6314 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6315 pf->vsi[pf->lan_vsi]->seid, 0);
6317 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6318 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6323 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6327 * i40e_fdir_teardown - release the Flow Director resources
6328 * @pf: board private structure
6330 static void i40e_fdir_teardown(struct i40e_pf *pf)
6334 i40e_fdir_filter_exit(pf);
6335 for (i = 0; i < pf->num_alloc_vsi; i++) {
6336 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6337 i40e_vsi_release(pf->vsi[i]);
6344 * i40e_prep_for_reset - prep for the core to reset
6345 * @pf: board private structure
6347 * Close up the VFs and other things in prep for PF Reset.
6349 static void i40e_prep_for_reset(struct i40e_pf *pf)
6351 struct i40e_hw *hw = &pf->hw;
6352 i40e_status ret = 0;
6355 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6356 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6359 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6361 /* quiesce the VSIs and their queues that are not already DOWN */
6362 i40e_pf_quiesce_all_vsi(pf);
6364 for (v = 0; v < pf->num_alloc_vsi; v++) {
6366 pf->vsi[v]->seid = 0;
6369 i40e_shutdown_adminq(&pf->hw);
6371 /* call shutdown HMC */
6372 if (hw->hmc.hmc_obj) {
6373 ret = i40e_shutdown_lan_hmc(hw);
6375 dev_warn(&pf->pdev->dev,
6376 "shutdown_lan_hmc failed: %d\n", ret);
6381 * i40e_send_version - update firmware with driver version
6384 static void i40e_send_version(struct i40e_pf *pf)
6386 struct i40e_driver_version dv;
6388 dv.major_version = DRV_VERSION_MAJOR;
6389 dv.minor_version = DRV_VERSION_MINOR;
6390 dv.build_version = DRV_VERSION_BUILD;
6391 dv.subbuild_version = 0;
6392 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6393 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6397 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6398 * @pf: board private structure
6399 * @reinit: if the Main VSI needs to re-initialized.
6401 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6403 struct i40e_hw *hw = &pf->hw;
6404 u8 set_fc_aq_fail = 0;
6408 /* Now we wait for GRST to settle out.
6409 * We don't have to delete the VEBs or VSIs from the hw switch
6410 * because the reset will make them disappear.
6412 ret = i40e_pf_reset(hw);
6414 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6415 set_bit(__I40E_RESET_FAILED, &pf->state);
6416 goto clear_recovery;
6420 if (test_bit(__I40E_DOWN, &pf->state))
6421 goto clear_recovery;
6422 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6424 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6425 ret = i40e_init_adminq(&pf->hw);
6427 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6428 i40e_stat_str(&pf->hw, ret),
6429 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6430 goto clear_recovery;
6433 /* re-verify the eeprom if we just had an EMP reset */
6434 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6435 i40e_verify_eeprom(pf);
6437 i40e_clear_pxe_mode(hw);
6438 ret = i40e_get_capabilities(pf);
6440 goto end_core_reset;
6442 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6443 hw->func_caps.num_rx_qp,
6444 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6446 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6447 goto end_core_reset;
6449 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6451 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6452 goto end_core_reset;
6455 #ifdef CONFIG_I40E_DCB
6456 ret = i40e_init_pf_dcb(pf);
6458 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6459 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6460 /* Continue without DCB enabled */
6462 #endif /* CONFIG_I40E_DCB */
6464 ret = i40e_init_pf_fcoe(pf);
6466 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6469 /* do basic switch setup */
6470 ret = i40e_setup_pf_switch(pf, reinit);
6472 goto end_core_reset;
6474 /* driver is only interested in link up/down and module qualification
6475 * reports from firmware
6477 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6478 I40E_AQ_EVENT_LINK_UPDOWN |
6479 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6481 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6482 i40e_stat_str(&pf->hw, ret),
6483 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6485 /* make sure our flow control settings are restored */
6486 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6488 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6489 i40e_stat_str(&pf->hw, ret),
6490 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6492 /* Rebuild the VSIs and VEBs that existed before reset.
6493 * They are still in our local switch element arrays, so only
6494 * need to rebuild the switch model in the HW.
6496 * If there were VEBs but the reconstitution failed, we'll try
6497 * try to recover minimal use by getting the basic PF VSI working.
6499 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6500 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6501 /* find the one VEB connected to the MAC, and find orphans */
6502 for (v = 0; v < I40E_MAX_VEB; v++) {
6506 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6507 pf->veb[v]->uplink_seid == 0) {
6508 ret = i40e_reconstitute_veb(pf->veb[v]);
6513 /* If Main VEB failed, we're in deep doodoo,
6514 * so give up rebuilding the switch and set up
6515 * for minimal rebuild of PF VSI.
6516 * If orphan failed, we'll report the error
6517 * but try to keep going.
6519 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6520 dev_info(&pf->pdev->dev,
6521 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6523 pf->vsi[pf->lan_vsi]->uplink_seid
6526 } else if (pf->veb[v]->uplink_seid == 0) {
6527 dev_info(&pf->pdev->dev,
6528 "rebuild of orphan VEB failed: %d\n",
6535 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6536 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6537 /* no VEB, so rebuild only the Main VSI */
6538 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6540 dev_info(&pf->pdev->dev,
6541 "rebuild of Main VSI failed: %d\n", ret);
6542 goto end_core_reset;
6546 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6547 (pf->hw.aq.fw_maj_ver < 4)) {
6549 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6551 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6552 i40e_stat_str(&pf->hw, ret),
6553 i40e_aq_str(&pf->hw,
6554 pf->hw.aq.asq_last_status));
6556 /* reinit the misc interrupt */
6557 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6558 ret = i40e_setup_misc_vector(pf);
6560 /* restart the VSIs that were rebuilt and running before the reset */
6561 i40e_pf_unquiesce_all_vsi(pf);
6563 if (pf->num_alloc_vfs) {
6564 for (v = 0; v < pf->num_alloc_vfs; v++)
6565 i40e_reset_vf(&pf->vf[v], true);
6568 /* tell the firmware that we're starting */
6569 i40e_send_version(pf);
6572 clear_bit(__I40E_RESET_FAILED, &pf->state);
6574 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6578 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6579 * @pf: board private structure
6581 * Close up the VFs and other things in prep for a Core Reset,
6582 * then get ready to rebuild the world.
6584 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6586 i40e_prep_for_reset(pf);
6587 i40e_reset_and_rebuild(pf, false);
6591 * i40e_handle_mdd_event
6592 * @pf: pointer to the PF structure
6594 * Called from the MDD irq handler to identify possibly malicious vfs
6596 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6598 struct i40e_hw *hw = &pf->hw;
6599 bool mdd_detected = false;
6600 bool pf_mdd_detected = false;
6605 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6608 /* find what triggered the MDD event */
6609 reg = rd32(hw, I40E_GL_MDET_TX);
6610 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6611 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6612 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6613 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6614 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6615 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6616 I40E_GL_MDET_TX_EVENT_SHIFT;
6617 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6618 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6619 pf->hw.func_caps.base_queue;
6620 if (netif_msg_tx_err(pf))
6621 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6622 event, queue, pf_num, vf_num);
6623 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6624 mdd_detected = true;
6626 reg = rd32(hw, I40E_GL_MDET_RX);
6627 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6628 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6629 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6630 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6631 I40E_GL_MDET_RX_EVENT_SHIFT;
6632 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6633 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6634 pf->hw.func_caps.base_queue;
6635 if (netif_msg_rx_err(pf))
6636 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6637 event, queue, func);
6638 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6639 mdd_detected = true;
6643 reg = rd32(hw, I40E_PF_MDET_TX);
6644 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6645 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6646 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6647 pf_mdd_detected = true;
6649 reg = rd32(hw, I40E_PF_MDET_RX);
6650 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6651 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6652 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6653 pf_mdd_detected = true;
6655 /* Queue belongs to the PF, initiate a reset */
6656 if (pf_mdd_detected) {
6657 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6658 i40e_service_event_schedule(pf);
6662 /* see if one of the VFs needs its hand slapped */
6663 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6665 reg = rd32(hw, I40E_VP_MDET_TX(i));
6666 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6667 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6668 vf->num_mdd_events++;
6669 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6673 reg = rd32(hw, I40E_VP_MDET_RX(i));
6674 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6675 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6676 vf->num_mdd_events++;
6677 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6681 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6682 dev_info(&pf->pdev->dev,
6683 "Too many MDD events on VF %d, disabled\n", i);
6684 dev_info(&pf->pdev->dev,
6685 "Use PF Control I/F to re-enable the VF\n");
6686 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6690 /* re-enable mdd interrupt cause */
6691 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6692 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6693 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6694 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6698 #ifdef CONFIG_I40E_VXLAN
6700 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6701 * @pf: board private structure
6703 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6705 struct i40e_hw *hw = &pf->hw;
6710 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6713 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6715 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6716 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6717 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6718 port = pf->vxlan_ports[i];
6720 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6721 I40E_AQC_TUNNEL_TYPE_VXLAN,
6724 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6727 dev_info(&pf->pdev->dev,
6728 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6729 port ? "add" : "delete",
6731 i40e_stat_str(&pf->hw, ret),
6732 i40e_aq_str(&pf->hw,
6733 pf->hw.aq.asq_last_status));
6734 pf->vxlan_ports[i] = 0;
6742 * i40e_service_task - Run the driver's async subtasks
6743 * @work: pointer to work_struct containing our data
6745 static void i40e_service_task(struct work_struct *work)
6747 struct i40e_pf *pf = container_of(work,
6750 unsigned long start_time = jiffies;
6752 /* don't bother with service tasks if a reset is in progress */
6753 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6754 i40e_service_event_complete(pf);
6758 i40e_reset_subtask(pf);
6759 i40e_handle_mdd_event(pf);
6760 i40e_vc_process_vflr_event(pf);
6761 i40e_watchdog_subtask(pf);
6762 i40e_fdir_reinit_subtask(pf);
6763 i40e_sync_filters_subtask(pf);
6764 #ifdef CONFIG_I40E_VXLAN
6765 i40e_sync_vxlan_filters_subtask(pf);
6767 i40e_clean_adminq_subtask(pf);
6769 i40e_service_event_complete(pf);
6771 /* If the tasks have taken longer than one timer cycle or there
6772 * is more work to be done, reschedule the service task now
6773 * rather than wait for the timer to tick again.
6775 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6776 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6777 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6778 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6779 i40e_service_event_schedule(pf);
6783 * i40e_service_timer - timer callback
6784 * @data: pointer to PF struct
6786 static void i40e_service_timer(unsigned long data)
6788 struct i40e_pf *pf = (struct i40e_pf *)data;
6790 mod_timer(&pf->service_timer,
6791 round_jiffies(jiffies + pf->service_timer_period));
6792 i40e_service_event_schedule(pf);
6796 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6797 * @vsi: the VSI being configured
6799 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6801 struct i40e_pf *pf = vsi->back;
6803 switch (vsi->type) {
6805 vsi->alloc_queue_pairs = pf->num_lan_qps;
6806 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6807 I40E_REQ_DESCRIPTOR_MULTIPLE);
6808 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6809 vsi->num_q_vectors = pf->num_lan_msix;
6811 vsi->num_q_vectors = 1;
6816 vsi->alloc_queue_pairs = 1;
6817 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6818 I40E_REQ_DESCRIPTOR_MULTIPLE);
6819 vsi->num_q_vectors = 1;
6822 case I40E_VSI_VMDQ2:
6823 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6824 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6825 I40E_REQ_DESCRIPTOR_MULTIPLE);
6826 vsi->num_q_vectors = pf->num_vmdq_msix;
6829 case I40E_VSI_SRIOV:
6830 vsi->alloc_queue_pairs = pf->num_vf_qps;
6831 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6832 I40E_REQ_DESCRIPTOR_MULTIPLE);
6837 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6838 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6839 I40E_REQ_DESCRIPTOR_MULTIPLE);
6840 vsi->num_q_vectors = pf->num_fcoe_msix;
6843 #endif /* I40E_FCOE */
6853 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6854 * @type: VSI pointer
6855 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6857 * On error: returns error code (negative)
6858 * On success: returns 0
6860 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6865 /* allocate memory for both Tx and Rx ring pointers */
6866 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6867 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6870 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6872 if (alloc_qvectors) {
6873 /* allocate memory for q_vector pointers */
6874 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6875 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6876 if (!vsi->q_vectors) {
6884 kfree(vsi->tx_rings);
6889 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6890 * @pf: board private structure
6891 * @type: type of VSI
6893 * On error: returns error code (negative)
6894 * On success: returns vsi index in PF (positive)
6896 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6899 struct i40e_vsi *vsi;
6903 /* Need to protect the allocation of the VSIs at the PF level */
6904 mutex_lock(&pf->switch_mutex);
6906 /* VSI list may be fragmented if VSI creation/destruction has
6907 * been happening. We can afford to do a quick scan to look
6908 * for any free VSIs in the list.
6910 * find next empty vsi slot, looping back around if necessary
6913 while (i < pf->num_alloc_vsi && pf->vsi[i])
6915 if (i >= pf->num_alloc_vsi) {
6917 while (i < pf->next_vsi && pf->vsi[i])
6921 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6922 vsi_idx = i; /* Found one! */
6925 goto unlock_pf; /* out of VSI slots! */
6929 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6936 set_bit(__I40E_DOWN, &vsi->state);
6939 vsi->rx_itr_setting = pf->rx_itr_default;
6940 vsi->tx_itr_setting = pf->tx_itr_default;
6941 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6942 pf->rss_table_size : 64;
6943 vsi->netdev_registered = false;
6944 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6945 INIT_LIST_HEAD(&vsi->mac_filter_list);
6946 vsi->irqs_ready = false;
6948 ret = i40e_set_num_rings_in_vsi(vsi);
6952 ret = i40e_vsi_alloc_arrays(vsi, true);
6956 /* Setup default MSIX irq handler for VSI */
6957 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6959 pf->vsi[vsi_idx] = vsi;
6964 pf->next_vsi = i - 1;
6967 mutex_unlock(&pf->switch_mutex);
6972 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6973 * @type: VSI pointer
6974 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6976 * On error: returns error code (negative)
6977 * On success: returns 0
6979 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6981 /* free the ring and vector containers */
6982 if (free_qvectors) {
6983 kfree(vsi->q_vectors);
6984 vsi->q_vectors = NULL;
6986 kfree(vsi->tx_rings);
6987 vsi->tx_rings = NULL;
6988 vsi->rx_rings = NULL;
6992 * i40e_vsi_clear - Deallocate the VSI provided
6993 * @vsi: the VSI being un-configured
6995 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7006 mutex_lock(&pf->switch_mutex);
7007 if (!pf->vsi[vsi->idx]) {
7008 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7009 vsi->idx, vsi->idx, vsi, vsi->type);
7013 if (pf->vsi[vsi->idx] != vsi) {
7014 dev_err(&pf->pdev->dev,
7015 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7016 pf->vsi[vsi->idx]->idx,
7018 pf->vsi[vsi->idx]->type,
7019 vsi->idx, vsi, vsi->type);
7023 /* updates the PF for this cleared vsi */
7024 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7025 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7027 i40e_vsi_free_arrays(vsi, true);
7029 pf->vsi[vsi->idx] = NULL;
7030 if (vsi->idx < pf->next_vsi)
7031 pf->next_vsi = vsi->idx;
7034 mutex_unlock(&pf->switch_mutex);
7042 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7043 * @vsi: the VSI being cleaned
7045 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7049 if (vsi->tx_rings && vsi->tx_rings[0]) {
7050 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7051 kfree_rcu(vsi->tx_rings[i], rcu);
7052 vsi->tx_rings[i] = NULL;
7053 vsi->rx_rings[i] = NULL;
7059 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7060 * @vsi: the VSI being configured
7062 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7064 struct i40e_ring *tx_ring, *rx_ring;
7065 struct i40e_pf *pf = vsi->back;
7068 /* Set basic values in the rings to be used later during open() */
7069 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7070 /* allocate space for both Tx and Rx in one shot */
7071 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7075 tx_ring->queue_index = i;
7076 tx_ring->reg_idx = vsi->base_queue + i;
7077 tx_ring->ring_active = false;
7079 tx_ring->netdev = vsi->netdev;
7080 tx_ring->dev = &pf->pdev->dev;
7081 tx_ring->count = vsi->num_desc;
7083 tx_ring->dcb_tc = 0;
7084 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7085 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7086 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7087 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7088 vsi->tx_rings[i] = tx_ring;
7090 rx_ring = &tx_ring[1];
7091 rx_ring->queue_index = i;
7092 rx_ring->reg_idx = vsi->base_queue + i;
7093 rx_ring->ring_active = false;
7095 rx_ring->netdev = vsi->netdev;
7096 rx_ring->dev = &pf->pdev->dev;
7097 rx_ring->count = vsi->num_desc;
7099 rx_ring->dcb_tc = 0;
7100 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7101 set_ring_16byte_desc_enabled(rx_ring);
7103 clear_ring_16byte_desc_enabled(rx_ring);
7104 vsi->rx_rings[i] = rx_ring;
7110 i40e_vsi_clear_rings(vsi);
7115 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7116 * @pf: board private structure
7117 * @vectors: the number of MSI-X vectors to request
7119 * Returns the number of vectors reserved, or error
7121 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7123 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7124 I40E_MIN_MSIX, vectors);
7126 dev_info(&pf->pdev->dev,
7127 "MSI-X vector reservation failed: %d\n", vectors);
7135 * i40e_init_msix - Setup the MSIX capability
7136 * @pf: board private structure
7138 * Work with the OS to set up the MSIX vectors needed.
7140 * Returns the number of vectors reserved or negative on failure
7142 static int i40e_init_msix(struct i40e_pf *pf)
7144 struct i40e_hw *hw = &pf->hw;
7149 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7152 /* The number of vectors we'll request will be comprised of:
7153 * - Add 1 for "other" cause for Admin Queue events, etc.
7154 * - The number of LAN queue pairs
7155 * - Queues being used for RSS.
7156 * We don't need as many as max_rss_size vectors.
7157 * use rss_size instead in the calculation since that
7158 * is governed by number of cpus in the system.
7159 * - assumes symmetric Tx/Rx pairing
7160 * - The number of VMDq pairs
7162 * - The number of FCOE qps.
7164 * Once we count this up, try the request.
7166 * If we can't get what we want, we'll simplify to nearly nothing
7167 * and try again. If that still fails, we punt.
7169 vectors_left = hw->func_caps.num_msix_vectors;
7172 /* reserve one vector for miscellaneous handler */
7178 /* reserve vectors for the main PF traffic queues */
7179 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7180 vectors_left -= pf->num_lan_msix;
7181 v_budget += pf->num_lan_msix;
7183 /* reserve one vector for sideband flow director */
7184 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7189 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7194 /* can we reserve enough for FCoE? */
7195 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7197 pf->num_fcoe_msix = 0;
7198 else if (vectors_left >= pf->num_fcoe_qps)
7199 pf->num_fcoe_msix = pf->num_fcoe_qps;
7201 pf->num_fcoe_msix = 1;
7202 v_budget += pf->num_fcoe_msix;
7203 vectors_left -= pf->num_fcoe_msix;
7207 /* any vectors left over go for VMDq support */
7208 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7209 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7210 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7212 /* if we're short on vectors for what's desired, we limit
7213 * the queues per vmdq. If this is still more than are
7214 * available, the user will need to change the number of
7215 * queues/vectors used by the PF later with the ethtool
7218 if (vmdq_vecs < vmdq_vecs_wanted)
7219 pf->num_vmdq_qps = 1;
7220 pf->num_vmdq_msix = pf->num_vmdq_qps;
7222 v_budget += vmdq_vecs;
7223 vectors_left -= vmdq_vecs;
7226 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7228 if (!pf->msix_entries)
7231 for (i = 0; i < v_budget; i++)
7232 pf->msix_entries[i].entry = i;
7233 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7235 if (v_actual != v_budget) {
7236 /* If we have limited resources, we will start with no vectors
7237 * for the special features and then allocate vectors to some
7238 * of these features based on the policy and at the end disable
7239 * the features that did not get any vectors.
7242 pf->num_fcoe_qps = 0;
7243 pf->num_fcoe_msix = 0;
7245 pf->num_vmdq_msix = 0;
7248 if (v_actual < I40E_MIN_MSIX) {
7249 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7250 kfree(pf->msix_entries);
7251 pf->msix_entries = NULL;
7254 } else if (v_actual == I40E_MIN_MSIX) {
7255 /* Adjust for minimal MSIX use */
7256 pf->num_vmdq_vsis = 0;
7257 pf->num_vmdq_qps = 0;
7258 pf->num_lan_qps = 1;
7259 pf->num_lan_msix = 1;
7261 } else if (v_actual != v_budget) {
7264 /* reserve the misc vector */
7267 /* Scale vector usage down */
7268 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7269 pf->num_vmdq_vsis = 1;
7270 pf->num_vmdq_qps = 1;
7271 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7273 /* partition out the remaining vectors */
7276 pf->num_lan_msix = 1;
7280 /* give one vector to FCoE */
7281 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7282 pf->num_lan_msix = 1;
7283 pf->num_fcoe_msix = 1;
7286 pf->num_lan_msix = 2;
7291 /* give one vector to FCoE */
7292 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7293 pf->num_fcoe_msix = 1;
7297 /* give the rest to the PF */
7298 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7303 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7304 (pf->num_vmdq_msix == 0)) {
7305 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7306 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7310 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7311 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7312 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7319 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7320 * @vsi: the VSI being configured
7321 * @v_idx: index of the vector in the vsi struct
7323 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7325 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7327 struct i40e_q_vector *q_vector;
7329 /* allocate q_vector */
7330 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7334 q_vector->vsi = vsi;
7335 q_vector->v_idx = v_idx;
7336 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7338 netif_napi_add(vsi->netdev, &q_vector->napi,
7339 i40e_napi_poll, NAPI_POLL_WEIGHT);
7341 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7342 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7344 /* tie q_vector and vsi together */
7345 vsi->q_vectors[v_idx] = q_vector;
7351 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7352 * @vsi: the VSI being configured
7354 * We allocate one q_vector per queue interrupt. If allocation fails we
7357 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7359 struct i40e_pf *pf = vsi->back;
7360 int v_idx, num_q_vectors;
7363 /* if not MSIX, give the one vector only to the LAN VSI */
7364 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7365 num_q_vectors = vsi->num_q_vectors;
7366 else if (vsi == pf->vsi[pf->lan_vsi])
7371 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7372 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7381 i40e_free_q_vector(vsi, v_idx);
7387 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7388 * @pf: board private structure to initialize
7390 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7395 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7396 vectors = i40e_init_msix(pf);
7398 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7400 I40E_FLAG_FCOE_ENABLED |
7402 I40E_FLAG_RSS_ENABLED |
7403 I40E_FLAG_DCB_CAPABLE |
7404 I40E_FLAG_SRIOV_ENABLED |
7405 I40E_FLAG_FD_SB_ENABLED |
7406 I40E_FLAG_FD_ATR_ENABLED |
7407 I40E_FLAG_VMDQ_ENABLED);
7409 /* rework the queue expectations without MSIX */
7410 i40e_determine_queue_usage(pf);
7414 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7415 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7416 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7417 vectors = pci_enable_msi(pf->pdev);
7419 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7421 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7423 vectors = 1; /* one MSI or Legacy vector */
7426 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7427 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7429 /* set up vector assignment tracking */
7430 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7431 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7432 if (!pf->irq_pile) {
7433 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7436 pf->irq_pile->num_entries = vectors;
7437 pf->irq_pile->search_hint = 0;
7439 /* track first vector for misc interrupts, ignore return */
7440 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7446 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7447 * @pf: board private structure
7449 * This sets up the handler for MSIX 0, which is used to manage the
7450 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7451 * when in MSI or Legacy interrupt mode.
7453 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7455 struct i40e_hw *hw = &pf->hw;
7458 /* Only request the irq if this is the first time through, and
7459 * not when we're rebuilding after a Reset
7461 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7462 err = request_irq(pf->msix_entries[0].vector,
7463 i40e_intr, 0, pf->int_name, pf);
7465 dev_info(&pf->pdev->dev,
7466 "request_irq for %s failed: %d\n",
7472 i40e_enable_misc_int_causes(pf);
7474 /* associate no queues to the misc vector */
7475 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7476 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7480 i40e_irq_dynamic_enable_icr0(pf);
7486 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7487 * @vsi: vsi structure
7488 * @seed: RSS hash seed
7490 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7492 struct i40e_aqc_get_set_rss_key_data rss_key;
7493 struct i40e_pf *pf = vsi->back;
7494 struct i40e_hw *hw = &pf->hw;
7495 bool pf_lut = false;
7499 memset(&rss_key, 0, sizeof(rss_key));
7500 memcpy(&rss_key, seed, sizeof(rss_key));
7502 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7506 /* Populate the LUT with max no. of queues in round robin fashion */
7507 for (i = 0; i < vsi->rss_table_size; i++)
7508 rss_lut[i] = i % vsi->rss_size;
7510 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7512 dev_info(&pf->pdev->dev,
7513 "Cannot set RSS key, err %s aq_err %s\n",
7514 i40e_stat_str(&pf->hw, ret),
7515 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7519 if (vsi->type == I40E_VSI_MAIN)
7522 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7523 vsi->rss_table_size);
7525 dev_info(&pf->pdev->dev,
7526 "Cannot set RSS lut, err %s aq_err %s\n",
7527 i40e_stat_str(&pf->hw, ret),
7528 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7534 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7535 * @vsi: VSI structure
7537 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7539 u8 seed[I40E_HKEY_ARRAY_SIZE];
7540 struct i40e_pf *pf = vsi->back;
7542 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7543 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7545 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7546 return i40e_config_rss_aq(vsi, seed);
7552 * i40e_config_rss_reg - Prepare for RSS if used
7553 * @pf: board private structure
7554 * @seed: RSS hash seed
7556 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7558 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7559 struct i40e_hw *hw = &pf->hw;
7560 u32 *seed_dw = (u32 *)seed;
7561 u32 current_queue = 0;
7565 /* Fill out hash function seed */
7566 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7567 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7569 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7571 for (j = 0; j < 4; j++) {
7572 if (current_queue == vsi->rss_size)
7574 lut |= ((current_queue) << (8 * j));
7577 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7585 * i40e_config_rss - Prepare for RSS if used
7586 * @pf: board private structure
7588 static int i40e_config_rss(struct i40e_pf *pf)
7590 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7591 u8 seed[I40E_HKEY_ARRAY_SIZE];
7592 struct i40e_hw *hw = &pf->hw;
7596 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7598 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7599 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7600 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7601 hena |= i40e_pf_get_default_rss_hena(pf);
7603 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7604 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7606 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7608 /* Determine the RSS table size based on the hardware capabilities */
7609 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7610 reg_val = (pf->rss_table_size == 512) ?
7611 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7612 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7613 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7615 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7616 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7618 return i40e_config_rss_reg(pf, seed);
7622 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7623 * @pf: board private structure
7624 * @queue_count: the requested queue count for rss.
7626 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7627 * count which may be different from the requested queue count.
7629 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7631 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7634 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7637 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7639 if (queue_count != vsi->num_queue_pairs) {
7640 vsi->req_queue_pairs = queue_count;
7641 i40e_prep_for_reset(pf);
7643 pf->rss_size = new_rss_size;
7645 i40e_reset_and_rebuild(pf, true);
7646 i40e_config_rss(pf);
7648 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7649 return pf->rss_size;
7653 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7654 * @pf: board private structure
7656 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7659 bool min_valid, max_valid;
7662 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7663 &min_valid, &max_valid);
7667 pf->npar_min_bw = min_bw;
7669 pf->npar_max_bw = max_bw;
7676 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7677 * @pf: board private structure
7679 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7681 struct i40e_aqc_configure_partition_bw_data bw_data;
7684 /* Set the valid bit for this PF */
7685 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7686 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7687 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7689 /* Set the new bandwidths */
7690 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7696 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7697 * @pf: board private structure
7699 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7701 /* Commit temporary BW setting to permanent NVM image */
7702 enum i40e_admin_queue_err last_aq_status;
7706 if (pf->hw.partition_id != 1) {
7707 dev_info(&pf->pdev->dev,
7708 "Commit BW only works on partition 1! This is partition %d",
7709 pf->hw.partition_id);
7710 ret = I40E_NOT_SUPPORTED;
7714 /* Acquire NVM for read access */
7715 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7716 last_aq_status = pf->hw.aq.asq_last_status;
7718 dev_info(&pf->pdev->dev,
7719 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7720 i40e_stat_str(&pf->hw, ret),
7721 i40e_aq_str(&pf->hw, last_aq_status));
7725 /* Read word 0x10 of NVM - SW compatibility word 1 */
7726 ret = i40e_aq_read_nvm(&pf->hw,
7727 I40E_SR_NVM_CONTROL_WORD,
7728 0x10, sizeof(nvm_word), &nvm_word,
7730 /* Save off last admin queue command status before releasing
7733 last_aq_status = pf->hw.aq.asq_last_status;
7734 i40e_release_nvm(&pf->hw);
7736 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7737 i40e_stat_str(&pf->hw, ret),
7738 i40e_aq_str(&pf->hw, last_aq_status));
7742 /* Wait a bit for NVM release to complete */
7745 /* Acquire NVM for write access */
7746 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7747 last_aq_status = pf->hw.aq.asq_last_status;
7749 dev_info(&pf->pdev->dev,
7750 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7751 i40e_stat_str(&pf->hw, ret),
7752 i40e_aq_str(&pf->hw, last_aq_status));
7755 /* Write it back out unchanged to initiate update NVM,
7756 * which will force a write of the shadow (alt) RAM to
7757 * the NVM - thus storing the bandwidth values permanently.
7759 ret = i40e_aq_update_nvm(&pf->hw,
7760 I40E_SR_NVM_CONTROL_WORD,
7761 0x10, sizeof(nvm_word),
7762 &nvm_word, true, NULL);
7763 /* Save off last admin queue command status before releasing
7766 last_aq_status = pf->hw.aq.asq_last_status;
7767 i40e_release_nvm(&pf->hw);
7769 dev_info(&pf->pdev->dev,
7770 "BW settings NOT SAVED, err %s aq_err %s\n",
7771 i40e_stat_str(&pf->hw, ret),
7772 i40e_aq_str(&pf->hw, last_aq_status));
7779 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7780 * @pf: board private structure to initialize
7782 * i40e_sw_init initializes the Adapter private data structure.
7783 * Fields are initialized based on PCI device information and
7784 * OS network device settings (MTU size).
7786 static int i40e_sw_init(struct i40e_pf *pf)
7791 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7792 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7793 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7794 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7795 if (I40E_DEBUG_USER & debug)
7796 pf->hw.debug_mask = debug;
7797 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7798 I40E_DEFAULT_MSG_ENABLE);
7801 /* Set default capability flags */
7802 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7803 I40E_FLAG_MSI_ENABLED |
7804 I40E_FLAG_MSIX_ENABLED;
7806 if (iommu_present(&pci_bus_type))
7807 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7809 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7811 /* Set default ITR */
7812 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7813 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7815 /* Depending on PF configurations, it is possible that the RSS
7816 * maximum might end up larger than the available queues
7818 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7820 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7821 pf->rss_size_max = min_t(int, pf->rss_size_max,
7822 pf->hw.func_caps.num_tx_qp);
7823 if (pf->hw.func_caps.rss) {
7824 pf->flags |= I40E_FLAG_RSS_ENABLED;
7825 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7828 /* MFP mode enabled */
7829 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7830 pf->flags |= I40E_FLAG_MFP_ENABLED;
7831 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7832 if (i40e_get_npar_bw_setting(pf))
7833 dev_warn(&pf->pdev->dev,
7834 "Could not get NPAR bw settings\n");
7836 dev_info(&pf->pdev->dev,
7837 "Min BW = %8.8x, Max BW = %8.8x\n",
7838 pf->npar_min_bw, pf->npar_max_bw);
7841 /* FW/NVM is not yet fixed in this regard */
7842 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7843 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7844 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7845 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7846 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7847 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7849 dev_info(&pf->pdev->dev,
7850 "Flow Director Sideband mode Disabled in MFP mode\n");
7852 pf->fdir_pf_filter_count =
7853 pf->hw.func_caps.fd_filters_guaranteed;
7854 pf->hw.fdir_shared_filter_count =
7855 pf->hw.func_caps.fd_filters_best_effort;
7858 if (pf->hw.func_caps.vmdq) {
7859 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7860 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7864 err = i40e_init_pf_fcoe(pf);
7866 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7868 #endif /* I40E_FCOE */
7869 #ifdef CONFIG_PCI_IOV
7870 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7871 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7872 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7873 pf->num_req_vfs = min_t(int,
7874 pf->hw.func_caps.num_vfs,
7877 #endif /* CONFIG_PCI_IOV */
7878 if (pf->hw.mac.type == I40E_MAC_X722) {
7879 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7880 I40E_FLAG_128_QP_RSS_CAPABLE |
7881 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7882 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7883 I40E_FLAG_WB_ON_ITR_CAPABLE |
7884 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7886 pf->eeprom_version = 0xDEAD;
7887 pf->lan_veb = I40E_NO_VEB;
7888 pf->lan_vsi = I40E_NO_VSI;
7890 /* set up queue assignment tracking */
7891 size = sizeof(struct i40e_lump_tracking)
7892 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7893 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7898 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7899 pf->qp_pile->search_hint = 0;
7901 pf->tx_timeout_recovery_level = 1;
7903 mutex_init(&pf->switch_mutex);
7905 /* If NPAR is enabled nudge the Tx scheduler */
7906 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
7907 i40e_set_npar_bw_setting(pf);
7914 * i40e_set_ntuple - set the ntuple feature flag and take action
7915 * @pf: board private structure to initialize
7916 * @features: the feature set that the stack is suggesting
7918 * returns a bool to indicate if reset needs to happen
7920 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7922 bool need_reset = false;
7924 /* Check if Flow Director n-tuple support was enabled or disabled. If
7925 * the state changed, we need to reset.
7927 if (features & NETIF_F_NTUPLE) {
7928 /* Enable filters and mark for reset */
7929 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7931 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7933 /* turn off filters, mark for reset and clear SW filter list */
7934 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7936 i40e_fdir_filter_exit(pf);
7938 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7939 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7940 /* reset fd counters */
7941 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7942 pf->fdir_pf_active_filters = 0;
7943 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7944 if (I40E_DEBUG_FD & pf->hw.debug_mask)
7945 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7946 /* if ATR was auto disabled it can be re-enabled. */
7947 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7948 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7949 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7955 * i40e_set_features - set the netdev feature flags
7956 * @netdev: ptr to the netdev being adjusted
7957 * @features: the feature set that the stack is suggesting
7959 static int i40e_set_features(struct net_device *netdev,
7960 netdev_features_t features)
7962 struct i40e_netdev_priv *np = netdev_priv(netdev);
7963 struct i40e_vsi *vsi = np->vsi;
7964 struct i40e_pf *pf = vsi->back;
7967 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7968 i40e_vlan_stripping_enable(vsi);
7970 i40e_vlan_stripping_disable(vsi);
7972 need_reset = i40e_set_ntuple(pf, features);
7975 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
7980 #ifdef CONFIG_I40E_VXLAN
7982 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7983 * @pf: board private structure
7984 * @port: The UDP port to look up
7986 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7988 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7992 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7993 if (pf->vxlan_ports[i] == port)
8001 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8002 * @netdev: This physical port's netdev
8003 * @sa_family: Socket Family that VXLAN is notifying us about
8004 * @port: New UDP port number that VXLAN started listening to
8006 static void i40e_add_vxlan_port(struct net_device *netdev,
8007 sa_family_t sa_family, __be16 port)
8009 struct i40e_netdev_priv *np = netdev_priv(netdev);
8010 struct i40e_vsi *vsi = np->vsi;
8011 struct i40e_pf *pf = vsi->back;
8015 if (sa_family == AF_INET6)
8018 idx = i40e_get_vxlan_port_idx(pf, port);
8020 /* Check if port already exists */
8021 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8022 netdev_info(netdev, "vxlan port %d already offloaded\n",
8027 /* Now check if there is space to add the new port */
8028 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8030 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8031 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8036 /* New port: add it and mark its index in the bitmap */
8037 pf->vxlan_ports[next_idx] = port;
8038 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8039 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8041 dev_info(&pf->pdev->dev, "adding vxlan port %d\n", ntohs(port));
8045 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8046 * @netdev: This physical port's netdev
8047 * @sa_family: Socket Family that VXLAN is notifying us about
8048 * @port: UDP port number that VXLAN stopped listening to
8050 static void i40e_del_vxlan_port(struct net_device *netdev,
8051 sa_family_t sa_family, __be16 port)
8053 struct i40e_netdev_priv *np = netdev_priv(netdev);
8054 struct i40e_vsi *vsi = np->vsi;
8055 struct i40e_pf *pf = vsi->back;
8058 if (sa_family == AF_INET6)
8061 idx = i40e_get_vxlan_port_idx(pf, port);
8063 /* Check if port already exists */
8064 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8065 /* if port exists, set it to 0 (mark for deletion)
8066 * and make it pending
8068 pf->vxlan_ports[idx] = 0;
8069 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8070 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8072 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n",
8075 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8081 static int i40e_get_phys_port_id(struct net_device *netdev,
8082 struct netdev_phys_item_id *ppid)
8084 struct i40e_netdev_priv *np = netdev_priv(netdev);
8085 struct i40e_pf *pf = np->vsi->back;
8086 struct i40e_hw *hw = &pf->hw;
8088 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8091 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8092 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8098 * i40e_ndo_fdb_add - add an entry to the hardware database
8099 * @ndm: the input from the stack
8100 * @tb: pointer to array of nladdr (unused)
8101 * @dev: the net device pointer
8102 * @addr: the MAC address entry being added
8103 * @flags: instructions from stack about fdb operation
8105 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8106 struct net_device *dev,
8107 const unsigned char *addr, u16 vid,
8110 struct i40e_netdev_priv *np = netdev_priv(dev);
8111 struct i40e_pf *pf = np->vsi->back;
8114 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8118 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8122 /* Hardware does not support aging addresses so if a
8123 * ndm_state is given only allow permanent addresses
8125 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8126 netdev_info(dev, "FDB only supports static addresses\n");
8130 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8131 err = dev_uc_add_excl(dev, addr);
8132 else if (is_multicast_ether_addr(addr))
8133 err = dev_mc_add_excl(dev, addr);
8137 /* Only return duplicate errors if NLM_F_EXCL is set */
8138 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8145 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8146 * @dev: the netdev being configured
8147 * @nlh: RTNL message
8149 * Inserts a new hardware bridge if not already created and
8150 * enables the bridging mode requested (VEB or VEPA). If the
8151 * hardware bridge has already been inserted and the request
8152 * is to change the mode then that requires a PF reset to
8153 * allow rebuild of the components with required hardware
8154 * bridge mode enabled.
8156 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8157 struct nlmsghdr *nlh,
8160 struct i40e_netdev_priv *np = netdev_priv(dev);
8161 struct i40e_vsi *vsi = np->vsi;
8162 struct i40e_pf *pf = vsi->back;
8163 struct i40e_veb *veb = NULL;
8164 struct nlattr *attr, *br_spec;
8167 /* Only for PF VSI for now */
8168 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8171 /* Find the HW bridge for PF VSI */
8172 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8173 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8177 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8179 nla_for_each_nested(attr, br_spec, rem) {
8182 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8185 mode = nla_get_u16(attr);
8186 if ((mode != BRIDGE_MODE_VEPA) &&
8187 (mode != BRIDGE_MODE_VEB))
8190 /* Insert a new HW bridge */
8192 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8193 vsi->tc_config.enabled_tc);
8195 veb->bridge_mode = mode;
8196 i40e_config_bridge_mode(veb);
8198 /* No Bridge HW offload available */
8202 } else if (mode != veb->bridge_mode) {
8203 /* Existing HW bridge but different mode needs reset */
8204 veb->bridge_mode = mode;
8205 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8206 if (mode == BRIDGE_MODE_VEB)
8207 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8209 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8210 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8219 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8222 * @seq: RTNL message seq #
8223 * @dev: the netdev being configured
8224 * @filter_mask: unused
8226 * Return the mode in which the hardware bridge is operating in
8229 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8230 struct net_device *dev,
8231 u32 filter_mask, int nlflags)
8233 struct i40e_netdev_priv *np = netdev_priv(dev);
8234 struct i40e_vsi *vsi = np->vsi;
8235 struct i40e_pf *pf = vsi->back;
8236 struct i40e_veb *veb = NULL;
8239 /* Only for PF VSI for now */
8240 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8243 /* Find the HW bridge for the PF VSI */
8244 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8245 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8252 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8253 nlflags, 0, 0, filter_mask, NULL);
8256 #define I40E_MAX_TUNNEL_HDR_LEN 80
8258 * i40e_features_check - Validate encapsulated packet conforms to limits
8260 * @netdev: This physical port's netdev
8261 * @features: Offload features that the stack believes apply
8263 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8264 struct net_device *dev,
8265 netdev_features_t features)
8267 if (skb->encapsulation &&
8268 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8269 I40E_MAX_TUNNEL_HDR_LEN))
8270 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8275 static const struct net_device_ops i40e_netdev_ops = {
8276 .ndo_open = i40e_open,
8277 .ndo_stop = i40e_close,
8278 .ndo_start_xmit = i40e_lan_xmit_frame,
8279 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8280 .ndo_set_rx_mode = i40e_set_rx_mode,
8281 .ndo_validate_addr = eth_validate_addr,
8282 .ndo_set_mac_address = i40e_set_mac,
8283 .ndo_change_mtu = i40e_change_mtu,
8284 .ndo_do_ioctl = i40e_ioctl,
8285 .ndo_tx_timeout = i40e_tx_timeout,
8286 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8287 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8288 #ifdef CONFIG_NET_POLL_CONTROLLER
8289 .ndo_poll_controller = i40e_netpoll,
8291 .ndo_setup_tc = i40e_setup_tc,
8293 .ndo_fcoe_enable = i40e_fcoe_enable,
8294 .ndo_fcoe_disable = i40e_fcoe_disable,
8296 .ndo_set_features = i40e_set_features,
8297 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8298 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8299 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8300 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8301 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8302 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8303 #ifdef CONFIG_I40E_VXLAN
8304 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8305 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8307 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8308 .ndo_fdb_add = i40e_ndo_fdb_add,
8309 .ndo_features_check = i40e_features_check,
8310 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8311 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8315 * i40e_config_netdev - Setup the netdev flags
8316 * @vsi: the VSI being configured
8318 * Returns 0 on success, negative value on failure
8320 static int i40e_config_netdev(struct i40e_vsi *vsi)
8322 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8323 struct i40e_pf *pf = vsi->back;
8324 struct i40e_hw *hw = &pf->hw;
8325 struct i40e_netdev_priv *np;
8326 struct net_device *netdev;
8327 u8 mac_addr[ETH_ALEN];
8330 etherdev_size = sizeof(struct i40e_netdev_priv);
8331 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8335 vsi->netdev = netdev;
8336 np = netdev_priv(netdev);
8339 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8340 NETIF_F_GSO_UDP_TUNNEL |
8343 netdev->features = NETIF_F_SG |
8347 NETIF_F_GSO_UDP_TUNNEL |
8348 NETIF_F_HW_VLAN_CTAG_TX |
8349 NETIF_F_HW_VLAN_CTAG_RX |
8350 NETIF_F_HW_VLAN_CTAG_FILTER |
8359 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8360 netdev->features |= NETIF_F_NTUPLE;
8362 /* copy netdev features into list of user selectable features */
8363 netdev->hw_features |= netdev->features;
8365 if (vsi->type == I40E_VSI_MAIN) {
8366 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8367 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8368 /* The following steps are necessary to prevent reception
8369 * of tagged packets - some older NVM configurations load a
8370 * default a MAC-VLAN filter that accepts any tagged packet
8371 * which must be replaced by a normal filter.
8373 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8374 i40e_add_filter(vsi, mac_addr,
8375 I40E_VLAN_ANY, false, true);
8377 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8378 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8379 pf->vsi[pf->lan_vsi]->netdev->name);
8380 random_ether_addr(mac_addr);
8381 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8383 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8385 ether_addr_copy(netdev->dev_addr, mac_addr);
8386 ether_addr_copy(netdev->perm_addr, mac_addr);
8387 /* vlan gets same features (except vlan offload)
8388 * after any tweaks for specific VSI types
8390 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8391 NETIF_F_HW_VLAN_CTAG_RX |
8392 NETIF_F_HW_VLAN_CTAG_FILTER);
8393 netdev->priv_flags |= IFF_UNICAST_FLT;
8394 netdev->priv_flags |= IFF_SUPP_NOFCS;
8395 /* Setup netdev TC information */
8396 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8398 netdev->netdev_ops = &i40e_netdev_ops;
8399 netdev->watchdog_timeo = 5 * HZ;
8400 i40e_set_ethtool_ops(netdev);
8402 i40e_fcoe_config_netdev(netdev, vsi);
8409 * i40e_vsi_delete - Delete a VSI from the switch
8410 * @vsi: the VSI being removed
8412 * Returns 0 on success, negative value on failure
8414 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8416 /* remove default VSI is not allowed */
8417 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8420 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8424 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8425 * @vsi: the VSI being queried
8427 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8429 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8431 struct i40e_veb *veb;
8432 struct i40e_pf *pf = vsi->back;
8434 /* Uplink is not a bridge so default to VEB */
8435 if (vsi->veb_idx == I40E_NO_VEB)
8438 veb = pf->veb[vsi->veb_idx];
8439 /* Uplink is a bridge in VEPA mode */
8440 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8443 /* Uplink is a bridge in VEB mode */
8448 * i40e_add_vsi - Add a VSI to the switch
8449 * @vsi: the VSI being configured
8451 * This initializes a VSI context depending on the VSI type to be added and
8452 * passes it down to the add_vsi aq command.
8454 static int i40e_add_vsi(struct i40e_vsi *vsi)
8457 struct i40e_mac_filter *f, *ftmp;
8458 struct i40e_pf *pf = vsi->back;
8459 struct i40e_hw *hw = &pf->hw;
8460 struct i40e_vsi_context ctxt;
8461 u8 enabled_tc = 0x1; /* TC0 enabled */
8464 memset(&ctxt, 0, sizeof(ctxt));
8465 switch (vsi->type) {
8467 /* The PF's main VSI is already setup as part of the
8468 * device initialization, so we'll not bother with
8469 * the add_vsi call, but we will retrieve the current
8472 ctxt.seid = pf->main_vsi_seid;
8473 ctxt.pf_num = pf->hw.pf_id;
8475 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8476 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8478 dev_info(&pf->pdev->dev,
8479 "couldn't get PF vsi config, err %s aq_err %s\n",
8480 i40e_stat_str(&pf->hw, ret),
8481 i40e_aq_str(&pf->hw,
8482 pf->hw.aq.asq_last_status));
8485 vsi->info = ctxt.info;
8486 vsi->info.valid_sections = 0;
8488 vsi->seid = ctxt.seid;
8489 vsi->id = ctxt.vsi_number;
8491 enabled_tc = i40e_pf_get_tc_map(pf);
8493 /* MFP mode setup queue map and update VSI */
8494 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8495 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8496 memset(&ctxt, 0, sizeof(ctxt));
8497 ctxt.seid = pf->main_vsi_seid;
8498 ctxt.pf_num = pf->hw.pf_id;
8500 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8501 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8503 dev_info(&pf->pdev->dev,
8504 "update vsi failed, err %s aq_err %s\n",
8505 i40e_stat_str(&pf->hw, ret),
8506 i40e_aq_str(&pf->hw,
8507 pf->hw.aq.asq_last_status));
8511 /* update the local VSI info queue map */
8512 i40e_vsi_update_queue_map(vsi, &ctxt);
8513 vsi->info.valid_sections = 0;
8515 /* Default/Main VSI is only enabled for TC0
8516 * reconfigure it to enable all TCs that are
8517 * available on the port in SFP mode.
8518 * For MFP case the iSCSI PF would use this
8519 * flow to enable LAN+iSCSI TC.
8521 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8523 dev_info(&pf->pdev->dev,
8524 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8526 i40e_stat_str(&pf->hw, ret),
8527 i40e_aq_str(&pf->hw,
8528 pf->hw.aq.asq_last_status));
8535 ctxt.pf_num = hw->pf_id;
8537 ctxt.uplink_seid = vsi->uplink_seid;
8538 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8539 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8540 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8541 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8542 ctxt.info.valid_sections |=
8543 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8544 ctxt.info.switch_id =
8545 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8547 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8550 case I40E_VSI_VMDQ2:
8551 ctxt.pf_num = hw->pf_id;
8553 ctxt.uplink_seid = vsi->uplink_seid;
8554 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8555 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8557 /* This VSI is connected to VEB so the switch_id
8558 * should be set to zero by default.
8560 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8561 ctxt.info.valid_sections |=
8562 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8563 ctxt.info.switch_id =
8564 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8567 /* Setup the VSI tx/rx queue map for TC0 only for now */
8568 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8571 case I40E_VSI_SRIOV:
8572 ctxt.pf_num = hw->pf_id;
8573 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8574 ctxt.uplink_seid = vsi->uplink_seid;
8575 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8576 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8578 /* This VSI is connected to VEB so the switch_id
8579 * should be set to zero by default.
8581 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8582 ctxt.info.valid_sections |=
8583 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8584 ctxt.info.switch_id =
8585 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8588 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8589 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8590 if (pf->vf[vsi->vf_id].spoofchk) {
8591 ctxt.info.valid_sections |=
8592 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8593 ctxt.info.sec_flags |=
8594 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8595 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8597 /* Setup the VSI tx/rx queue map for TC0 only for now */
8598 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8603 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8605 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8610 #endif /* I40E_FCOE */
8615 if (vsi->type != I40E_VSI_MAIN) {
8616 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8618 dev_info(&vsi->back->pdev->dev,
8619 "add vsi failed, err %s aq_err %s\n",
8620 i40e_stat_str(&pf->hw, ret),
8621 i40e_aq_str(&pf->hw,
8622 pf->hw.aq.asq_last_status));
8626 vsi->info = ctxt.info;
8627 vsi->info.valid_sections = 0;
8628 vsi->seid = ctxt.seid;
8629 vsi->id = ctxt.vsi_number;
8632 /* If macvlan filters already exist, force them to get loaded */
8633 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8637 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8638 struct i40e_aqc_remove_macvlan_element_data element;
8640 memset(&element, 0, sizeof(element));
8641 ether_addr_copy(element.mac_addr, f->macaddr);
8642 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8643 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8646 /* some older FW has a different default */
8648 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8649 i40e_aq_remove_macvlan(hw, vsi->seid,
8653 i40e_aq_mac_address_write(hw,
8654 I40E_AQC_WRITE_TYPE_LAA_WOL,
8659 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8660 pf->flags |= I40E_FLAG_FILTER_SYNC;
8663 /* Update VSI BW information */
8664 ret = i40e_vsi_get_bw_info(vsi);
8666 dev_info(&pf->pdev->dev,
8667 "couldn't get vsi bw info, err %s aq_err %s\n",
8668 i40e_stat_str(&pf->hw, ret),
8669 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8670 /* VSI is already added so not tearing that up */
8679 * i40e_vsi_release - Delete a VSI and free its resources
8680 * @vsi: the VSI being removed
8682 * Returns 0 on success or < 0 on error
8684 int i40e_vsi_release(struct i40e_vsi *vsi)
8686 struct i40e_mac_filter *f, *ftmp;
8687 struct i40e_veb *veb = NULL;
8694 /* release of a VEB-owner or last VSI is not allowed */
8695 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8696 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8697 vsi->seid, vsi->uplink_seid);
8700 if (vsi == pf->vsi[pf->lan_vsi] &&
8701 !test_bit(__I40E_DOWN, &pf->state)) {
8702 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8706 uplink_seid = vsi->uplink_seid;
8707 if (vsi->type != I40E_VSI_SRIOV) {
8708 if (vsi->netdev_registered) {
8709 vsi->netdev_registered = false;
8711 /* results in a call to i40e_close() */
8712 unregister_netdev(vsi->netdev);
8715 i40e_vsi_close(vsi);
8717 i40e_vsi_disable_irq(vsi);
8720 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8721 i40e_del_filter(vsi, f->macaddr, f->vlan,
8722 f->is_vf, f->is_netdev);
8723 i40e_sync_vsi_filters(vsi);
8725 i40e_vsi_delete(vsi);
8726 i40e_vsi_free_q_vectors(vsi);
8728 free_netdev(vsi->netdev);
8731 i40e_vsi_clear_rings(vsi);
8732 i40e_vsi_clear(vsi);
8734 /* If this was the last thing on the VEB, except for the
8735 * controlling VSI, remove the VEB, which puts the controlling
8736 * VSI onto the next level down in the switch.
8738 * Well, okay, there's one more exception here: don't remove
8739 * the orphan VEBs yet. We'll wait for an explicit remove request
8740 * from up the network stack.
8742 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8744 pf->vsi[i]->uplink_seid == uplink_seid &&
8745 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8746 n++; /* count the VSIs */
8749 for (i = 0; i < I40E_MAX_VEB; i++) {
8752 if (pf->veb[i]->uplink_seid == uplink_seid)
8753 n++; /* count the VEBs */
8754 if (pf->veb[i]->seid == uplink_seid)
8757 if (n == 0 && veb && veb->uplink_seid != 0)
8758 i40e_veb_release(veb);
8764 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8765 * @vsi: ptr to the VSI
8767 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8768 * corresponding SW VSI structure and initializes num_queue_pairs for the
8769 * newly allocated VSI.
8771 * Returns 0 on success or negative on failure
8773 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8776 struct i40e_pf *pf = vsi->back;
8778 if (vsi->q_vectors[0]) {
8779 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8784 if (vsi->base_vector) {
8785 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8786 vsi->seid, vsi->base_vector);
8790 ret = i40e_vsi_alloc_q_vectors(vsi);
8792 dev_info(&pf->pdev->dev,
8793 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8794 vsi->num_q_vectors, vsi->seid, ret);
8795 vsi->num_q_vectors = 0;
8796 goto vector_setup_out;
8799 if (vsi->num_q_vectors)
8800 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8801 vsi->num_q_vectors, vsi->idx);
8802 if (vsi->base_vector < 0) {
8803 dev_info(&pf->pdev->dev,
8804 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8805 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8806 i40e_vsi_free_q_vectors(vsi);
8808 goto vector_setup_out;
8816 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8817 * @vsi: pointer to the vsi.
8819 * This re-allocates a vsi's queue resources.
8821 * Returns pointer to the successfully allocated and configured VSI sw struct
8822 * on success, otherwise returns NULL on failure.
8824 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8826 struct i40e_pf *pf = vsi->back;
8830 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8831 i40e_vsi_clear_rings(vsi);
8833 i40e_vsi_free_arrays(vsi, false);
8834 i40e_set_num_rings_in_vsi(vsi);
8835 ret = i40e_vsi_alloc_arrays(vsi, false);
8839 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8841 dev_info(&pf->pdev->dev,
8842 "failed to get tracking for %d queues for VSI %d err %d\n",
8843 vsi->alloc_queue_pairs, vsi->seid, ret);
8846 vsi->base_queue = ret;
8848 /* Update the FW view of the VSI. Force a reset of TC and queue
8849 * layout configurations.
8851 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8852 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8853 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8854 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8856 /* assign it some queues */
8857 ret = i40e_alloc_rings(vsi);
8861 /* map all of the rings to the q_vectors */
8862 i40e_vsi_map_rings_to_vectors(vsi);
8866 i40e_vsi_free_q_vectors(vsi);
8867 if (vsi->netdev_registered) {
8868 vsi->netdev_registered = false;
8869 unregister_netdev(vsi->netdev);
8870 free_netdev(vsi->netdev);
8873 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8875 i40e_vsi_clear(vsi);
8880 * i40e_vsi_setup - Set up a VSI by a given type
8881 * @pf: board private structure
8883 * @uplink_seid: the switch element to link to
8884 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8886 * This allocates the sw VSI structure and its queue resources, then add a VSI
8887 * to the identified VEB.
8889 * Returns pointer to the successfully allocated and configure VSI sw struct on
8890 * success, otherwise returns NULL on failure.
8892 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8893 u16 uplink_seid, u32 param1)
8895 struct i40e_vsi *vsi = NULL;
8896 struct i40e_veb *veb = NULL;
8900 /* The requested uplink_seid must be either
8901 * - the PF's port seid
8902 * no VEB is needed because this is the PF
8903 * or this is a Flow Director special case VSI
8904 * - seid of an existing VEB
8905 * - seid of a VSI that owns an existing VEB
8906 * - seid of a VSI that doesn't own a VEB
8907 * a new VEB is created and the VSI becomes the owner
8908 * - seid of the PF VSI, which is what creates the first VEB
8909 * this is a special case of the previous
8911 * Find which uplink_seid we were given and create a new VEB if needed
8913 for (i = 0; i < I40E_MAX_VEB; i++) {
8914 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8920 if (!veb && uplink_seid != pf->mac_seid) {
8922 for (i = 0; i < pf->num_alloc_vsi; i++) {
8923 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8929 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8934 if (vsi->uplink_seid == pf->mac_seid)
8935 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8936 vsi->tc_config.enabled_tc);
8937 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8938 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8939 vsi->tc_config.enabled_tc);
8941 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8942 dev_info(&vsi->back->pdev->dev,
8943 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8947 /* We come up by default in VEPA mode if SRIOV is not
8948 * already enabled, in which case we can't force VEPA
8951 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
8952 veb->bridge_mode = BRIDGE_MODE_VEPA;
8953 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8955 i40e_config_bridge_mode(veb);
8957 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8958 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8962 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8966 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8967 uplink_seid = veb->seid;
8970 /* get vsi sw struct */
8971 v_idx = i40e_vsi_mem_alloc(pf, type);
8974 vsi = pf->vsi[v_idx];
8978 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8980 if (type == I40E_VSI_MAIN)
8981 pf->lan_vsi = v_idx;
8982 else if (type == I40E_VSI_SRIOV)
8983 vsi->vf_id = param1;
8984 /* assign it some queues */
8985 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8988 dev_info(&pf->pdev->dev,
8989 "failed to get tracking for %d queues for VSI %d err=%d\n",
8990 vsi->alloc_queue_pairs, vsi->seid, ret);
8993 vsi->base_queue = ret;
8995 /* get a VSI from the hardware */
8996 vsi->uplink_seid = uplink_seid;
8997 ret = i40e_add_vsi(vsi);
9001 switch (vsi->type) {
9002 /* setup the netdev if needed */
9004 case I40E_VSI_VMDQ2:
9006 ret = i40e_config_netdev(vsi);
9009 ret = register_netdev(vsi->netdev);
9012 vsi->netdev_registered = true;
9013 netif_carrier_off(vsi->netdev);
9014 #ifdef CONFIG_I40E_DCB
9015 /* Setup DCB netlink interface */
9016 i40e_dcbnl_setup(vsi);
9017 #endif /* CONFIG_I40E_DCB */
9021 /* set up vectors and rings if needed */
9022 ret = i40e_vsi_setup_vectors(vsi);
9026 ret = i40e_alloc_rings(vsi);
9030 /* map all of the rings to the q_vectors */
9031 i40e_vsi_map_rings_to_vectors(vsi);
9033 i40e_vsi_reset_stats(vsi);
9037 /* no netdev or rings for the other VSI types */
9041 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9042 (vsi->type == I40E_VSI_VMDQ2)) {
9043 ret = i40e_vsi_config_rss(vsi);
9048 i40e_vsi_free_q_vectors(vsi);
9050 if (vsi->netdev_registered) {
9051 vsi->netdev_registered = false;
9052 unregister_netdev(vsi->netdev);
9053 free_netdev(vsi->netdev);
9057 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9059 i40e_vsi_clear(vsi);
9065 * i40e_veb_get_bw_info - Query VEB BW information
9066 * @veb: the veb to query
9068 * Query the Tx scheduler BW configuration data for given VEB
9070 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9072 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9073 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9074 struct i40e_pf *pf = veb->pf;
9075 struct i40e_hw *hw = &pf->hw;
9080 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9083 dev_info(&pf->pdev->dev,
9084 "query veb bw config failed, err %s aq_err %s\n",
9085 i40e_stat_str(&pf->hw, ret),
9086 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9090 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9093 dev_info(&pf->pdev->dev,
9094 "query veb bw ets config failed, err %s aq_err %s\n",
9095 i40e_stat_str(&pf->hw, ret),
9096 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9100 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9101 veb->bw_max_quanta = ets_data.tc_bw_max;
9102 veb->is_abs_credits = bw_data.absolute_credits_enable;
9103 veb->enabled_tc = ets_data.tc_valid_bits;
9104 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9105 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9106 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9107 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9108 veb->bw_tc_limit_credits[i] =
9109 le16_to_cpu(bw_data.tc_bw_limits[i]);
9110 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9118 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9119 * @pf: board private structure
9121 * On error: returns error code (negative)
9122 * On success: returns vsi index in PF (positive)
9124 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9127 struct i40e_veb *veb;
9130 /* Need to protect the allocation of switch elements at the PF level */
9131 mutex_lock(&pf->switch_mutex);
9133 /* VEB list may be fragmented if VEB creation/destruction has
9134 * been happening. We can afford to do a quick scan to look
9135 * for any free slots in the list.
9137 * find next empty veb slot, looping back around if necessary
9140 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9142 if (i >= I40E_MAX_VEB) {
9144 goto err_alloc_veb; /* out of VEB slots! */
9147 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9154 veb->enabled_tc = 1;
9159 mutex_unlock(&pf->switch_mutex);
9164 * i40e_switch_branch_release - Delete a branch of the switch tree
9165 * @branch: where to start deleting
9167 * This uses recursion to find the tips of the branch to be
9168 * removed, deleting until we get back to and can delete this VEB.
9170 static void i40e_switch_branch_release(struct i40e_veb *branch)
9172 struct i40e_pf *pf = branch->pf;
9173 u16 branch_seid = branch->seid;
9174 u16 veb_idx = branch->idx;
9177 /* release any VEBs on this VEB - RECURSION */
9178 for (i = 0; i < I40E_MAX_VEB; i++) {
9181 if (pf->veb[i]->uplink_seid == branch->seid)
9182 i40e_switch_branch_release(pf->veb[i]);
9185 /* Release the VSIs on this VEB, but not the owner VSI.
9187 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9188 * the VEB itself, so don't use (*branch) after this loop.
9190 for (i = 0; i < pf->num_alloc_vsi; i++) {
9193 if (pf->vsi[i]->uplink_seid == branch_seid &&
9194 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9195 i40e_vsi_release(pf->vsi[i]);
9199 /* There's one corner case where the VEB might not have been
9200 * removed, so double check it here and remove it if needed.
9201 * This case happens if the veb was created from the debugfs
9202 * commands and no VSIs were added to it.
9204 if (pf->veb[veb_idx])
9205 i40e_veb_release(pf->veb[veb_idx]);
9209 * i40e_veb_clear - remove veb struct
9210 * @veb: the veb to remove
9212 static void i40e_veb_clear(struct i40e_veb *veb)
9218 struct i40e_pf *pf = veb->pf;
9220 mutex_lock(&pf->switch_mutex);
9221 if (pf->veb[veb->idx] == veb)
9222 pf->veb[veb->idx] = NULL;
9223 mutex_unlock(&pf->switch_mutex);
9230 * i40e_veb_release - Delete a VEB and free its resources
9231 * @veb: the VEB being removed
9233 void i40e_veb_release(struct i40e_veb *veb)
9235 struct i40e_vsi *vsi = NULL;
9241 /* find the remaining VSI and check for extras */
9242 for (i = 0; i < pf->num_alloc_vsi; i++) {
9243 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9249 dev_info(&pf->pdev->dev,
9250 "can't remove VEB %d with %d VSIs left\n",
9255 /* move the remaining VSI to uplink veb */
9256 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9257 if (veb->uplink_seid) {
9258 vsi->uplink_seid = veb->uplink_seid;
9259 if (veb->uplink_seid == pf->mac_seid)
9260 vsi->veb_idx = I40E_NO_VEB;
9262 vsi->veb_idx = veb->veb_idx;
9265 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9266 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9269 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9270 i40e_veb_clear(veb);
9274 * i40e_add_veb - create the VEB in the switch
9275 * @veb: the VEB to be instantiated
9276 * @vsi: the controlling VSI
9278 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9280 struct i40e_pf *pf = veb->pf;
9281 bool is_default = false;
9282 bool is_cloud = false;
9285 /* get a VEB from the hardware */
9286 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9287 veb->enabled_tc, is_default,
9288 is_cloud, &veb->seid, NULL);
9290 dev_info(&pf->pdev->dev,
9291 "couldn't add VEB, err %s aq_err %s\n",
9292 i40e_stat_str(&pf->hw, ret),
9293 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9297 /* get statistics counter */
9298 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9299 &veb->stats_idx, NULL, NULL, NULL);
9301 dev_info(&pf->pdev->dev,
9302 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9303 i40e_stat_str(&pf->hw, ret),
9304 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9307 ret = i40e_veb_get_bw_info(veb);
9309 dev_info(&pf->pdev->dev,
9310 "couldn't get VEB bw info, err %s aq_err %s\n",
9311 i40e_stat_str(&pf->hw, ret),
9312 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9313 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9317 vsi->uplink_seid = veb->seid;
9318 vsi->veb_idx = veb->idx;
9319 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9325 * i40e_veb_setup - Set up a VEB
9326 * @pf: board private structure
9327 * @flags: VEB setup flags
9328 * @uplink_seid: the switch element to link to
9329 * @vsi_seid: the initial VSI seid
9330 * @enabled_tc: Enabled TC bit-map
9332 * This allocates the sw VEB structure and links it into the switch
9333 * It is possible and legal for this to be a duplicate of an already
9334 * existing VEB. It is also possible for both uplink and vsi seids
9335 * to be zero, in order to create a floating VEB.
9337 * Returns pointer to the successfully allocated VEB sw struct on
9338 * success, otherwise returns NULL on failure.
9340 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9341 u16 uplink_seid, u16 vsi_seid,
9344 struct i40e_veb *veb, *uplink_veb = NULL;
9345 int vsi_idx, veb_idx;
9348 /* if one seid is 0, the other must be 0 to create a floating relay */
9349 if ((uplink_seid == 0 || vsi_seid == 0) &&
9350 (uplink_seid + vsi_seid != 0)) {
9351 dev_info(&pf->pdev->dev,
9352 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9353 uplink_seid, vsi_seid);
9357 /* make sure there is such a vsi and uplink */
9358 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9359 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9361 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9362 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9367 if (uplink_seid && uplink_seid != pf->mac_seid) {
9368 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9369 if (pf->veb[veb_idx] &&
9370 pf->veb[veb_idx]->seid == uplink_seid) {
9371 uplink_veb = pf->veb[veb_idx];
9376 dev_info(&pf->pdev->dev,
9377 "uplink seid %d not found\n", uplink_seid);
9382 /* get veb sw struct */
9383 veb_idx = i40e_veb_mem_alloc(pf);
9386 veb = pf->veb[veb_idx];
9388 veb->uplink_seid = uplink_seid;
9389 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9390 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9392 /* create the VEB in the switch */
9393 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9396 if (vsi_idx == pf->lan_vsi)
9397 pf->lan_veb = veb->idx;
9402 i40e_veb_clear(veb);
9408 * i40e_setup_pf_switch_element - set PF vars based on switch type
9409 * @pf: board private structure
9410 * @ele: element we are building info from
9411 * @num_reported: total number of elements
9412 * @printconfig: should we print the contents
9414 * helper function to assist in extracting a few useful SEID values.
9416 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9417 struct i40e_aqc_switch_config_element_resp *ele,
9418 u16 num_reported, bool printconfig)
9420 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9421 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9422 u8 element_type = ele->element_type;
9423 u16 seid = le16_to_cpu(ele->seid);
9426 dev_info(&pf->pdev->dev,
9427 "type=%d seid=%d uplink=%d downlink=%d\n",
9428 element_type, seid, uplink_seid, downlink_seid);
9430 switch (element_type) {
9431 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9432 pf->mac_seid = seid;
9434 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9436 if (uplink_seid != pf->mac_seid)
9438 if (pf->lan_veb == I40E_NO_VEB) {
9441 /* find existing or else empty VEB */
9442 for (v = 0; v < I40E_MAX_VEB; v++) {
9443 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9448 if (pf->lan_veb == I40E_NO_VEB) {
9449 v = i40e_veb_mem_alloc(pf);
9456 pf->veb[pf->lan_veb]->seid = seid;
9457 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9458 pf->veb[pf->lan_veb]->pf = pf;
9459 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9461 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9462 if (num_reported != 1)
9464 /* This is immediately after a reset so we can assume this is
9467 pf->mac_seid = uplink_seid;
9468 pf->pf_seid = downlink_seid;
9469 pf->main_vsi_seid = seid;
9471 dev_info(&pf->pdev->dev,
9472 "pf_seid=%d main_vsi_seid=%d\n",
9473 pf->pf_seid, pf->main_vsi_seid);
9475 case I40E_SWITCH_ELEMENT_TYPE_PF:
9476 case I40E_SWITCH_ELEMENT_TYPE_VF:
9477 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9478 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9479 case I40E_SWITCH_ELEMENT_TYPE_PE:
9480 case I40E_SWITCH_ELEMENT_TYPE_PA:
9481 /* ignore these for now */
9484 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9485 element_type, seid);
9491 * i40e_fetch_switch_configuration - Get switch config from firmware
9492 * @pf: board private structure
9493 * @printconfig: should we print the contents
9495 * Get the current switch configuration from the device and
9496 * extract a few useful SEID values.
9498 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9500 struct i40e_aqc_get_switch_config_resp *sw_config;
9506 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9510 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9512 u16 num_reported, num_total;
9514 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9518 dev_info(&pf->pdev->dev,
9519 "get switch config failed err %s aq_err %s\n",
9520 i40e_stat_str(&pf->hw, ret),
9521 i40e_aq_str(&pf->hw,
9522 pf->hw.aq.asq_last_status));
9527 num_reported = le16_to_cpu(sw_config->header.num_reported);
9528 num_total = le16_to_cpu(sw_config->header.num_total);
9531 dev_info(&pf->pdev->dev,
9532 "header: %d reported %d total\n",
9533 num_reported, num_total);
9535 for (i = 0; i < num_reported; i++) {
9536 struct i40e_aqc_switch_config_element_resp *ele =
9537 &sw_config->element[i];
9539 i40e_setup_pf_switch_element(pf, ele, num_reported,
9542 } while (next_seid != 0);
9549 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9550 * @pf: board private structure
9551 * @reinit: if the Main VSI needs to re-initialized.
9553 * Returns 0 on success, negative value on failure
9555 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9559 /* find out what's out there already */
9560 ret = i40e_fetch_switch_configuration(pf, false);
9562 dev_info(&pf->pdev->dev,
9563 "couldn't fetch switch config, err %s aq_err %s\n",
9564 i40e_stat_str(&pf->hw, ret),
9565 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9568 i40e_pf_reset_stats(pf);
9570 /* first time setup */
9571 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9572 struct i40e_vsi *vsi = NULL;
9575 /* Set up the PF VSI associated with the PF's main VSI
9576 * that is already in the HW switch
9578 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9579 uplink_seid = pf->veb[pf->lan_veb]->seid;
9581 uplink_seid = pf->mac_seid;
9582 if (pf->lan_vsi == I40E_NO_VSI)
9583 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9585 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9587 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9588 i40e_fdir_teardown(pf);
9592 /* force a reset of TC and queue layout configurations */
9593 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9594 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9595 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9596 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9598 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9600 i40e_fdir_sb_setup(pf);
9602 /* Setup static PF queue filter control settings */
9603 ret = i40e_setup_pf_filter_control(pf);
9605 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9607 /* Failure here should not stop continuing other steps */
9610 /* enable RSS in the HW, even for only one queue, as the stack can use
9613 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9614 i40e_config_rss(pf);
9616 /* fill in link information and enable LSE reporting */
9617 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9618 i40e_link_event(pf);
9620 /* Initialize user-specific link properties */
9621 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9622 I40E_AQ_AN_COMPLETED) ? true : false);
9630 * i40e_determine_queue_usage - Work out queue distribution
9631 * @pf: board private structure
9633 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9637 pf->num_lan_qps = 0;
9639 pf->num_fcoe_qps = 0;
9642 /* Find the max queues to be put into basic use. We'll always be
9643 * using TC0, whether or not DCB is running, and TC0 will get the
9646 queues_left = pf->hw.func_caps.num_tx_qp;
9648 if ((queues_left == 1) ||
9649 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9650 /* one qp for PF, no queues for anything else */
9652 pf->rss_size = pf->num_lan_qps = 1;
9654 /* make sure all the fancies are disabled */
9655 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9657 I40E_FLAG_FCOE_ENABLED |
9659 I40E_FLAG_FD_SB_ENABLED |
9660 I40E_FLAG_FD_ATR_ENABLED |
9661 I40E_FLAG_DCB_CAPABLE |
9662 I40E_FLAG_SRIOV_ENABLED |
9663 I40E_FLAG_VMDQ_ENABLED);
9664 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9665 I40E_FLAG_FD_SB_ENABLED |
9666 I40E_FLAG_FD_ATR_ENABLED |
9667 I40E_FLAG_DCB_CAPABLE))) {
9669 pf->rss_size = pf->num_lan_qps = 1;
9670 queues_left -= pf->num_lan_qps;
9672 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9674 I40E_FLAG_FCOE_ENABLED |
9676 I40E_FLAG_FD_SB_ENABLED |
9677 I40E_FLAG_FD_ATR_ENABLED |
9678 I40E_FLAG_DCB_ENABLED |
9679 I40E_FLAG_VMDQ_ENABLED);
9681 /* Not enough queues for all TCs */
9682 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9683 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9684 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9685 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9687 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9689 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9690 pf->hw.func_caps.num_tx_qp);
9692 queues_left -= pf->num_lan_qps;
9696 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9697 if (I40E_DEFAULT_FCOE <= queues_left) {
9698 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9699 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9700 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9702 pf->num_fcoe_qps = 0;
9703 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9704 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9707 queues_left -= pf->num_fcoe_qps;
9711 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9712 if (queues_left > 1) {
9713 queues_left -= 1; /* save 1 queue for FD */
9715 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9716 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9720 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9721 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9722 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9723 (queues_left / pf->num_vf_qps));
9724 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9727 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9728 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9729 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9730 (queues_left / pf->num_vmdq_qps));
9731 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9734 pf->queues_left = queues_left;
9736 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9741 * i40e_setup_pf_filter_control - Setup PF static filter control
9742 * @pf: PF to be setup
9744 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9745 * settings. If PE/FCoE are enabled then it will also set the per PF
9746 * based filter sizes required for them. It also enables Flow director,
9747 * ethertype and macvlan type filter settings for the pf.
9749 * Returns 0 on success, negative on failure
9751 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9753 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9755 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9757 /* Flow Director is enabled */
9758 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9759 settings->enable_fdir = true;
9761 /* Ethtype and MACVLAN filters enabled for PF */
9762 settings->enable_ethtype = true;
9763 settings->enable_macvlan = true;
9765 if (i40e_set_filter_control(&pf->hw, settings))
9771 #define INFO_STRING_LEN 255
9772 static void i40e_print_features(struct i40e_pf *pf)
9774 struct i40e_hw *hw = &pf->hw;
9777 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9779 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9785 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9786 #ifdef CONFIG_PCI_IOV
9787 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9789 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9790 pf->hw.func_caps.num_vsis,
9791 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9792 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9794 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9795 buf += sprintf(buf, "RSS ");
9796 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9797 buf += sprintf(buf, "FD_ATR ");
9798 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9799 buf += sprintf(buf, "FD_SB ");
9800 buf += sprintf(buf, "NTUPLE ");
9802 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9803 buf += sprintf(buf, "DCB ");
9804 if (pf->flags & I40E_FLAG_PTP)
9805 buf += sprintf(buf, "PTP ");
9807 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9808 buf += sprintf(buf, "FCOE ");
9811 BUG_ON(buf > (string + INFO_STRING_LEN));
9812 dev_info(&pf->pdev->dev, "%s\n", string);
9817 * i40e_probe - Device initialization routine
9818 * @pdev: PCI device information struct
9819 * @ent: entry in i40e_pci_tbl
9821 * i40e_probe initializes a PF identified by a pci_dev structure.
9822 * The OS initialization, configuring of the PF private structure,
9823 * and a hardware reset occur.
9825 * Returns 0 on success, negative on failure
9827 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9829 struct i40e_aq_get_phy_abilities_resp abilities;
9830 unsigned long ioremap_len;
9833 static u16 pfs_found;
9839 err = pci_enable_device_mem(pdev);
9843 /* set up for high or low dma */
9844 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9846 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9849 "DMA configuration failed: 0x%x\n", err);
9854 /* set up pci connections */
9855 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9856 IORESOURCE_MEM), i40e_driver_name);
9858 dev_info(&pdev->dev,
9859 "pci_request_selected_regions failed %d\n", err);
9863 pci_enable_pcie_error_reporting(pdev);
9864 pci_set_master(pdev);
9866 /* Now that we have a PCI connection, we need to do the
9867 * low level device setup. This is primarily setting up
9868 * the Admin Queue structures and then querying for the
9869 * device's current profile information.
9871 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9878 set_bit(__I40E_DOWN, &pf->state);
9883 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9884 I40E_MAX_CSR_SPACE);
9886 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
9889 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9890 (unsigned int)pci_resource_start(pdev, 0),
9891 (unsigned int)pci_resource_len(pdev, 0), err);
9894 hw->vendor_id = pdev->vendor;
9895 hw->device_id = pdev->device;
9896 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9897 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9898 hw->subsystem_device_id = pdev->subsystem_device;
9899 hw->bus.device = PCI_SLOT(pdev->devfn);
9900 hw->bus.func = PCI_FUNC(pdev->devfn);
9901 pf->instance = pfs_found;
9904 pf->msg_enable = pf->hw.debug_mask;
9905 pf->msg_enable = debug;
9908 /* do a special CORER for clearing PXE mode once at init */
9909 if (hw->revision_id == 0 &&
9910 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9911 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9916 i40e_clear_pxe_mode(hw);
9919 /* Reset here to make sure all is clean and to define PF 'n' */
9921 err = i40e_pf_reset(hw);
9923 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9928 hw->aq.num_arq_entries = I40E_AQ_LEN;
9929 hw->aq.num_asq_entries = I40E_AQ_LEN;
9930 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9931 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9932 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9934 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9936 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9938 err = i40e_init_shared_code(hw);
9940 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
9945 /* set up a default setting for link flow control */
9946 pf->hw.fc.requested_mode = I40E_FC_NONE;
9948 err = i40e_init_adminq(hw);
9949 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9951 dev_info(&pdev->dev,
9952 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9956 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9957 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9958 dev_info(&pdev->dev,
9959 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9960 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9961 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9962 dev_info(&pdev->dev,
9963 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9965 i40e_verify_eeprom(pf);
9967 /* Rev 0 hardware was never productized */
9968 if (hw->revision_id < 1)
9969 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9971 i40e_clear_pxe_mode(hw);
9972 err = i40e_get_capabilities(pf);
9974 goto err_adminq_setup;
9976 err = i40e_sw_init(pf);
9978 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9982 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9983 hw->func_caps.num_rx_qp,
9984 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9986 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9987 goto err_init_lan_hmc;
9990 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9992 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9994 goto err_configure_lan_hmc;
9997 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
9998 * Ignore error return codes because if it was already disabled via
9999 * hardware settings this will fail
10001 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10002 (pf->hw.aq.fw_maj_ver < 4)) {
10003 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10004 i40e_aq_stop_lldp(hw, true, NULL);
10007 i40e_get_mac_addr(hw, hw->mac.addr);
10008 if (!is_valid_ether_addr(hw->mac.addr)) {
10009 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10013 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10014 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10015 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10016 if (is_valid_ether_addr(hw->mac.port_addr))
10017 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10019 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10021 dev_info(&pdev->dev,
10022 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10023 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10024 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10026 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10028 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10029 #endif /* I40E_FCOE */
10031 pci_set_drvdata(pdev, pf);
10032 pci_save_state(pdev);
10033 #ifdef CONFIG_I40E_DCB
10034 err = i40e_init_pf_dcb(pf);
10036 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10037 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10038 /* Continue without DCB enabled */
10040 #endif /* CONFIG_I40E_DCB */
10042 /* set up periodic task facility */
10043 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10044 pf->service_timer_period = HZ;
10046 INIT_WORK(&pf->service_task, i40e_service_task);
10047 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10048 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10049 pf->link_check_timeout = jiffies;
10051 /* WoL defaults to disabled */
10052 pf->wol_en = false;
10053 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10055 /* set up the main switch operations */
10056 i40e_determine_queue_usage(pf);
10057 err = i40e_init_interrupt_scheme(pf);
10059 goto err_switch_setup;
10061 /* The number of VSIs reported by the FW is the minimum guaranteed
10062 * to us; HW supports far more and we share the remaining pool with
10063 * the other PFs. We allocate space for more than the guarantee with
10064 * the understanding that we might not get them all later.
10066 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10067 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10069 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10071 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10072 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10073 pf->vsi = kzalloc(len, GFP_KERNEL);
10076 goto err_switch_setup;
10079 #ifdef CONFIG_PCI_IOV
10080 /* prep for VF support */
10081 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10082 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10083 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10084 if (pci_num_vf(pdev))
10085 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10088 err = i40e_setup_pf_switch(pf, false);
10090 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10093 /* if FDIR VSI was set up, start it now */
10094 for (i = 0; i < pf->num_alloc_vsi; i++) {
10095 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10096 i40e_vsi_open(pf->vsi[i]);
10101 /* driver is only interested in link up/down and module qualification
10102 * reports from firmware
10104 err = i40e_aq_set_phy_int_mask(&pf->hw,
10105 I40E_AQ_EVENT_LINK_UPDOWN |
10106 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10108 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10109 i40e_stat_str(&pf->hw, err),
10110 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10112 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10113 (pf->hw.aq.fw_maj_ver < 4)) {
10115 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10117 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10118 i40e_stat_str(&pf->hw, err),
10119 i40e_aq_str(&pf->hw,
10120 pf->hw.aq.asq_last_status));
10122 /* The main driver is (mostly) up and happy. We need to set this state
10123 * before setting up the misc vector or we get a race and the vector
10124 * ends up disabled forever.
10126 clear_bit(__I40E_DOWN, &pf->state);
10128 /* In case of MSIX we are going to setup the misc vector right here
10129 * to handle admin queue events etc. In case of legacy and MSI
10130 * the misc functionality and queue processing is combined in
10131 * the same vector and that gets setup at open.
10133 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10134 err = i40e_setup_misc_vector(pf);
10136 dev_info(&pdev->dev,
10137 "setup of misc vector failed: %d\n", err);
10142 #ifdef CONFIG_PCI_IOV
10143 /* prep for VF support */
10144 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10145 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10146 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10149 /* disable link interrupts for VFs */
10150 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10151 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10152 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10155 if (pci_num_vf(pdev)) {
10156 dev_info(&pdev->dev,
10157 "Active VFs found, allocating resources.\n");
10158 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10160 dev_info(&pdev->dev,
10161 "Error %d allocating resources for existing VFs\n",
10165 #endif /* CONFIG_PCI_IOV */
10169 i40e_dbg_pf_init(pf);
10171 /* tell the firmware that we're starting */
10172 i40e_send_version(pf);
10174 /* since everything's happy, start the service_task timer */
10175 mod_timer(&pf->service_timer,
10176 round_jiffies(jiffies + pf->service_timer_period));
10179 /* create FCoE interface */
10180 i40e_fcoe_vsi_setup(pf);
10183 /* Get the negotiated link width and speed from PCI config space */
10184 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10186 i40e_set_pci_config_data(hw, link_status);
10188 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10189 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10190 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10191 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10193 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10194 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10195 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10196 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10199 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10200 hw->bus.speed < i40e_bus_speed_8000) {
10201 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10202 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10205 /* get the requested speeds from the fw */
10206 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10208 dev_info(&pf->pdev->dev,
10209 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10210 i40e_stat_str(&pf->hw, err),
10211 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10212 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10214 /* print a string summarizing features */
10215 i40e_print_features(pf);
10219 /* Unwind what we've done if something failed in the setup */
10221 set_bit(__I40E_DOWN, &pf->state);
10222 i40e_clear_interrupt_scheme(pf);
10225 i40e_reset_interrupt_capability(pf);
10226 del_timer_sync(&pf->service_timer);
10228 err_configure_lan_hmc:
10229 (void)i40e_shutdown_lan_hmc(hw);
10231 kfree(pf->qp_pile);
10234 (void)i40e_shutdown_adminq(hw);
10236 iounmap(hw->hw_addr);
10240 pci_disable_pcie_error_reporting(pdev);
10241 pci_release_selected_regions(pdev,
10242 pci_select_bars(pdev, IORESOURCE_MEM));
10245 pci_disable_device(pdev);
10250 * i40e_remove - Device removal routine
10251 * @pdev: PCI device information struct
10253 * i40e_remove is called by the PCI subsystem to alert the driver
10254 * that is should release a PCI device. This could be caused by a
10255 * Hot-Plug event, or because the driver is going to be removed from
10258 static void i40e_remove(struct pci_dev *pdev)
10260 struct i40e_pf *pf = pci_get_drvdata(pdev);
10261 i40e_status ret_code;
10264 i40e_dbg_pf_exit(pf);
10268 /* no more scheduling of any task */
10269 set_bit(__I40E_DOWN, &pf->state);
10270 del_timer_sync(&pf->service_timer);
10271 cancel_work_sync(&pf->service_task);
10272 i40e_fdir_teardown(pf);
10274 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10276 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10279 i40e_fdir_teardown(pf);
10281 /* If there is a switch structure or any orphans, remove them.
10282 * This will leave only the PF's VSI remaining.
10284 for (i = 0; i < I40E_MAX_VEB; i++) {
10288 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10289 pf->veb[i]->uplink_seid == 0)
10290 i40e_switch_branch_release(pf->veb[i]);
10293 /* Now we can shutdown the PF's VSI, just before we kill
10296 if (pf->vsi[pf->lan_vsi])
10297 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10299 /* shutdown and destroy the HMC */
10300 if (pf->hw.hmc.hmc_obj) {
10301 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10303 dev_warn(&pdev->dev,
10304 "Failed to destroy the HMC resources: %d\n",
10308 /* shutdown the adminq */
10309 ret_code = i40e_shutdown_adminq(&pf->hw);
10311 dev_warn(&pdev->dev,
10312 "Failed to destroy the Admin Queue resources: %d\n",
10315 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10316 i40e_clear_interrupt_scheme(pf);
10317 for (i = 0; i < pf->num_alloc_vsi; i++) {
10319 i40e_vsi_clear_rings(pf->vsi[i]);
10320 i40e_vsi_clear(pf->vsi[i]);
10325 for (i = 0; i < I40E_MAX_VEB; i++) {
10330 kfree(pf->qp_pile);
10333 iounmap(pf->hw.hw_addr);
10335 pci_release_selected_regions(pdev,
10336 pci_select_bars(pdev, IORESOURCE_MEM));
10338 pci_disable_pcie_error_reporting(pdev);
10339 pci_disable_device(pdev);
10343 * i40e_pci_error_detected - warning that something funky happened in PCI land
10344 * @pdev: PCI device information struct
10346 * Called to warn that something happened and the error handling steps
10347 * are in progress. Allows the driver to quiesce things, be ready for
10350 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10351 enum pci_channel_state error)
10353 struct i40e_pf *pf = pci_get_drvdata(pdev);
10355 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10357 /* shutdown all operations */
10358 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10360 i40e_prep_for_reset(pf);
10364 /* Request a slot reset */
10365 return PCI_ERS_RESULT_NEED_RESET;
10369 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10370 * @pdev: PCI device information struct
10372 * Called to find if the driver can work with the device now that
10373 * the pci slot has been reset. If a basic connection seems good
10374 * (registers are readable and have sane content) then return a
10375 * happy little PCI_ERS_RESULT_xxx.
10377 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10379 struct i40e_pf *pf = pci_get_drvdata(pdev);
10380 pci_ers_result_t result;
10384 dev_info(&pdev->dev, "%s\n", __func__);
10385 if (pci_enable_device_mem(pdev)) {
10386 dev_info(&pdev->dev,
10387 "Cannot re-enable PCI device after reset.\n");
10388 result = PCI_ERS_RESULT_DISCONNECT;
10390 pci_set_master(pdev);
10391 pci_restore_state(pdev);
10392 pci_save_state(pdev);
10393 pci_wake_from_d3(pdev, false);
10395 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10397 result = PCI_ERS_RESULT_RECOVERED;
10399 result = PCI_ERS_RESULT_DISCONNECT;
10402 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10404 dev_info(&pdev->dev,
10405 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10407 /* non-fatal, continue */
10414 * i40e_pci_error_resume - restart operations after PCI error recovery
10415 * @pdev: PCI device information struct
10417 * Called to allow the driver to bring things back up after PCI error
10418 * and/or reset recovery has finished.
10420 static void i40e_pci_error_resume(struct pci_dev *pdev)
10422 struct i40e_pf *pf = pci_get_drvdata(pdev);
10424 dev_info(&pdev->dev, "%s\n", __func__);
10425 if (test_bit(__I40E_SUSPENDED, &pf->state))
10429 i40e_handle_reset_warning(pf);
10434 * i40e_shutdown - PCI callback for shutting down
10435 * @pdev: PCI device information struct
10437 static void i40e_shutdown(struct pci_dev *pdev)
10439 struct i40e_pf *pf = pci_get_drvdata(pdev);
10440 struct i40e_hw *hw = &pf->hw;
10442 set_bit(__I40E_SUSPENDED, &pf->state);
10443 set_bit(__I40E_DOWN, &pf->state);
10445 i40e_prep_for_reset(pf);
10448 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10449 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10451 i40e_clear_interrupt_scheme(pf);
10453 if (system_state == SYSTEM_POWER_OFF) {
10454 pci_wake_from_d3(pdev, pf->wol_en);
10455 pci_set_power_state(pdev, PCI_D3hot);
10461 * i40e_suspend - PCI callback for moving to D3
10462 * @pdev: PCI device information struct
10464 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10466 struct i40e_pf *pf = pci_get_drvdata(pdev);
10467 struct i40e_hw *hw = &pf->hw;
10469 set_bit(__I40E_SUSPENDED, &pf->state);
10470 set_bit(__I40E_DOWN, &pf->state);
10471 del_timer_sync(&pf->service_timer);
10472 cancel_work_sync(&pf->service_task);
10473 i40e_fdir_teardown(pf);
10476 i40e_prep_for_reset(pf);
10479 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10480 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10482 pci_wake_from_d3(pdev, pf->wol_en);
10483 pci_set_power_state(pdev, PCI_D3hot);
10489 * i40e_resume - PCI callback for waking up from D3
10490 * @pdev: PCI device information struct
10492 static int i40e_resume(struct pci_dev *pdev)
10494 struct i40e_pf *pf = pci_get_drvdata(pdev);
10497 pci_set_power_state(pdev, PCI_D0);
10498 pci_restore_state(pdev);
10499 /* pci_restore_state() clears dev->state_saves, so
10500 * call pci_save_state() again to restore it.
10502 pci_save_state(pdev);
10504 err = pci_enable_device_mem(pdev);
10506 dev_err(&pdev->dev,
10507 "%s: Cannot enable PCI device from suspend\n",
10511 pci_set_master(pdev);
10513 /* no wakeup events while running */
10514 pci_wake_from_d3(pdev, false);
10516 /* handling the reset will rebuild the device state */
10517 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10518 clear_bit(__I40E_DOWN, &pf->state);
10520 i40e_reset_and_rebuild(pf, false);
10528 static const struct pci_error_handlers i40e_err_handler = {
10529 .error_detected = i40e_pci_error_detected,
10530 .slot_reset = i40e_pci_error_slot_reset,
10531 .resume = i40e_pci_error_resume,
10534 static struct pci_driver i40e_driver = {
10535 .name = i40e_driver_name,
10536 .id_table = i40e_pci_tbl,
10537 .probe = i40e_probe,
10538 .remove = i40e_remove,
10540 .suspend = i40e_suspend,
10541 .resume = i40e_resume,
10543 .shutdown = i40e_shutdown,
10544 .err_handler = &i40e_err_handler,
10545 .sriov_configure = i40e_pci_sriov_configure,
10549 * i40e_init_module - Driver registration routine
10551 * i40e_init_module is the first routine called when the driver is
10552 * loaded. All it does is register with the PCI subsystem.
10554 static int __init i40e_init_module(void)
10556 pr_info("%s: %s - version %s\n", i40e_driver_name,
10557 i40e_driver_string, i40e_driver_version_str);
10558 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10561 return pci_register_driver(&i40e_driver);
10563 module_init(i40e_init_module);
10566 * i40e_exit_module - Driver exit cleanup routine
10568 * i40e_exit_module is called just before the driver is removed
10571 static void __exit i40e_exit_module(void)
10573 pci_unregister_driver(&i40e_driver);
10576 module_exit(i40e_exit_module);