1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 6
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 /* required last entry */
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL");
95 MODULE_VERSION(DRV_VERSION);
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
104 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
105 u64 size, u32 alignment)
107 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
109 mem->size = ALIGN(size, alignment);
110 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
111 &mem->pa, GFP_KERNEL);
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
123 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
125 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
127 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
141 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 mem->va = kzalloc(size, GFP_KERNEL);
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
158 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
160 /* it's ok to kfree a NULL pointer */
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
175 * Returns the base item index of the lump, or negative for error
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
181 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
187 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
188 dev_info(&pf->pdev->dev,
189 "param err: pile=%p needed=%d id=0x%04x\n",
194 /* start the linear search with an imperfect hint */
195 i = pile->search_hint;
196 while (i < pile->num_entries) {
197 /* skip already allocated entries */
198 if (pile->list[i] & I40E_PILE_VALID_BIT) {
203 /* do we have enough in this lump? */
204 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
205 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
210 /* there was enough, so assign it to the requestor */
211 for (j = 0; j < needed; j++)
212 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
214 pile->search_hint = i + j;
217 /* not enough, so skip over it and continue looking */
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
231 * Returns the count of items in the lump
233 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
235 int valid_id = (id | I40E_PILE_VALID_BIT);
239 if (!pile || index >= pile->num_entries)
243 i < pile->num_entries && pile->list[i] == valid_id;
249 if (count && index < pile->search_hint)
250 pile->search_hint = index;
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf - the pf structure to search for the vsi
258 * @id - id of the vsi it is searching for
260 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 for (i = 0; i < pf->num_alloc_vsi; i++)
265 if (pf->vsi[i] && (pf->vsi[i]->id == id))
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
275 * If not already scheduled, this puts the task into the work queue
277 static void i40e_service_event_schedule(struct i40e_pf *pf)
279 if (!test_bit(__I40E_DOWN, &pf->state) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
281 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
282 schedule_work(&pf->service_task);
286 * i40e_tx_timeout - Respond to a Tx Hang
287 * @netdev: network interface device structure
289 * If any port has noticed a Tx timeout, it is likely that the whole
290 * device is munged, not just the one netdev port, so go for the full
294 void i40e_tx_timeout(struct net_device *netdev)
296 static void i40e_tx_timeout(struct net_device *netdev)
299 struct i40e_netdev_priv *np = netdev_priv(netdev);
300 struct i40e_vsi *vsi = np->vsi;
301 struct i40e_pf *pf = vsi->back;
303 pf->tx_timeout_count++;
305 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
306 pf->tx_timeout_recovery_level = 1;
307 pf->tx_timeout_last_recovery = jiffies;
308 netdev_info(netdev, "tx_timeout recovery level %d\n",
309 pf->tx_timeout_recovery_level);
311 switch (pf->tx_timeout_recovery_level) {
313 /* disable and re-enable queues for the VSI */
314 if (in_interrupt()) {
315 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
316 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
318 i40e_vsi_reinit_locked(vsi);
322 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
325 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
328 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
331 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
332 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
333 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
336 i40e_service_event_schedule(pf);
337 pf->tx_timeout_recovery_level++;
341 * i40e_release_rx_desc - Store the new tail and head values
342 * @rx_ring: ring to bump
343 * @val: new head index
345 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
347 rx_ring->next_to_use = val;
349 /* Force memory writes to complete before letting h/w
350 * know there are new descriptors to fetch. (Only
351 * applicable for weak-ordered memory model archs,
355 writel(val, rx_ring->tail);
359 * i40e_get_vsi_stats_struct - Get System Network Statistics
360 * @vsi: the VSI we care about
362 * Returns the address of the device statistics structure.
363 * The statistics are actually updated from the service task.
365 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
367 return &vsi->net_stats;
371 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
372 * @netdev: network interface device structure
374 * Returns the address of the device statistics structure.
375 * The statistics are actually updated from the service task.
378 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
379 struct net_device *netdev,
380 struct rtnl_link_stats64 *stats)
382 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
383 struct net_device *netdev,
384 struct rtnl_link_stats64 *stats)
387 struct i40e_netdev_priv *np = netdev_priv(netdev);
388 struct i40e_ring *tx_ring, *rx_ring;
389 struct i40e_vsi *vsi = np->vsi;
390 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
393 if (test_bit(__I40E_DOWN, &vsi->state))
400 for (i = 0; i < vsi->num_queue_pairs; i++) {
404 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
409 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
410 packets = tx_ring->stats.packets;
411 bytes = tx_ring->stats.bytes;
412 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
414 stats->tx_packets += packets;
415 stats->tx_bytes += bytes;
416 rx_ring = &tx_ring[1];
419 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
420 packets = rx_ring->stats.packets;
421 bytes = rx_ring->stats.bytes;
422 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
424 stats->rx_packets += packets;
425 stats->rx_bytes += bytes;
429 /* following stats updated by i40e_watchdog_subtask() */
430 stats->multicast = vsi_stats->multicast;
431 stats->tx_errors = vsi_stats->tx_errors;
432 stats->tx_dropped = vsi_stats->tx_dropped;
433 stats->rx_errors = vsi_stats->rx_errors;
434 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
435 stats->rx_length_errors = vsi_stats->rx_length_errors;
441 * i40e_vsi_reset_stats - Resets all stats of the given vsi
442 * @vsi: the VSI to have its stats reset
444 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
446 struct rtnl_link_stats64 *ns;
452 ns = i40e_get_vsi_stats_struct(vsi);
453 memset(ns, 0, sizeof(*ns));
454 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
455 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
456 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
457 if (vsi->rx_rings && vsi->rx_rings[0]) {
458 for (i = 0; i < vsi->num_queue_pairs; i++) {
459 memset(&vsi->rx_rings[i]->stats, 0 ,
460 sizeof(vsi->rx_rings[i]->stats));
461 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
462 sizeof(vsi->rx_rings[i]->rx_stats));
463 memset(&vsi->tx_rings[i]->stats, 0 ,
464 sizeof(vsi->tx_rings[i]->stats));
465 memset(&vsi->tx_rings[i]->tx_stats, 0,
466 sizeof(vsi->tx_rings[i]->tx_stats));
469 vsi->stat_offsets_loaded = false;
473 * i40e_pf_reset_stats - Reset all of the stats for the given PF
474 * @pf: the PF to be reset
476 void i40e_pf_reset_stats(struct i40e_pf *pf)
480 memset(&pf->stats, 0, sizeof(pf->stats));
481 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
482 pf->stat_offsets_loaded = false;
484 for (i = 0; i < I40E_MAX_VEB; i++) {
486 memset(&pf->veb[i]->stats, 0,
487 sizeof(pf->veb[i]->stats));
488 memset(&pf->veb[i]->stats_offsets, 0,
489 sizeof(pf->veb[i]->stats_offsets));
490 pf->veb[i]->stat_offsets_loaded = false;
496 * i40e_stat_update48 - read and update a 48 bit stat from the chip
497 * @hw: ptr to the hardware info
498 * @hireg: the high 32 bit reg to read
499 * @loreg: the low 32 bit reg to read
500 * @offset_loaded: has the initial offset been loaded yet
501 * @offset: ptr to current offset value
502 * @stat: ptr to the stat
504 * Since the device stats are not reset at PFReset, they likely will not
505 * be zeroed when the driver starts. We'll save the first values read
506 * and use them as offsets to be subtracted from the raw values in order
507 * to report stats that count from zero. In the process, we also manage
508 * the potential roll-over.
510 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
511 bool offset_loaded, u64 *offset, u64 *stat)
515 if (hw->device_id == I40E_DEV_ID_QEMU) {
516 new_data = rd32(hw, loreg);
517 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
519 new_data = rd64(hw, loreg);
523 if (likely(new_data >= *offset))
524 *stat = new_data - *offset;
526 *stat = (new_data + BIT_ULL(48)) - *offset;
527 *stat &= 0xFFFFFFFFFFFFULL;
531 * i40e_stat_update32 - read and update a 32 bit stat from the chip
532 * @hw: ptr to the hardware info
533 * @reg: the hw reg to read
534 * @offset_loaded: has the initial offset been loaded yet
535 * @offset: ptr to current offset value
536 * @stat: ptr to the stat
538 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
539 bool offset_loaded, u64 *offset, u64 *stat)
543 new_data = rd32(hw, reg);
546 if (likely(new_data >= *offset))
547 *stat = (u32)(new_data - *offset);
549 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
553 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
554 * @vsi: the VSI to be updated
556 void i40e_update_eth_stats(struct i40e_vsi *vsi)
558 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
559 struct i40e_pf *pf = vsi->back;
560 struct i40e_hw *hw = &pf->hw;
561 struct i40e_eth_stats *oes;
562 struct i40e_eth_stats *es; /* device's eth stats */
564 es = &vsi->eth_stats;
565 oes = &vsi->eth_stats_offsets;
567 /* Gather up the stats that the hw collects */
568 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->tx_errors, &es->tx_errors);
571 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
572 vsi->stat_offsets_loaded,
573 &oes->rx_discards, &es->rx_discards);
574 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
577 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
578 vsi->stat_offsets_loaded,
579 &oes->tx_errors, &es->tx_errors);
581 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
582 I40E_GLV_GORCL(stat_idx),
583 vsi->stat_offsets_loaded,
584 &oes->rx_bytes, &es->rx_bytes);
585 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
586 I40E_GLV_UPRCL(stat_idx),
587 vsi->stat_offsets_loaded,
588 &oes->rx_unicast, &es->rx_unicast);
589 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
590 I40E_GLV_MPRCL(stat_idx),
591 vsi->stat_offsets_loaded,
592 &oes->rx_multicast, &es->rx_multicast);
593 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
594 I40E_GLV_BPRCL(stat_idx),
595 vsi->stat_offsets_loaded,
596 &oes->rx_broadcast, &es->rx_broadcast);
598 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
599 I40E_GLV_GOTCL(stat_idx),
600 vsi->stat_offsets_loaded,
601 &oes->tx_bytes, &es->tx_bytes);
602 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
603 I40E_GLV_UPTCL(stat_idx),
604 vsi->stat_offsets_loaded,
605 &oes->tx_unicast, &es->tx_unicast);
606 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
607 I40E_GLV_MPTCL(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->tx_multicast, &es->tx_multicast);
610 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
611 I40E_GLV_BPTCL(stat_idx),
612 vsi->stat_offsets_loaded,
613 &oes->tx_broadcast, &es->tx_broadcast);
614 vsi->stat_offsets_loaded = true;
618 * i40e_update_veb_stats - Update Switch component statistics
619 * @veb: the VEB being updated
621 static void i40e_update_veb_stats(struct i40e_veb *veb)
623 struct i40e_pf *pf = veb->pf;
624 struct i40e_hw *hw = &pf->hw;
625 struct i40e_eth_stats *oes;
626 struct i40e_eth_stats *es; /* device's eth stats */
627 struct i40e_veb_tc_stats *veb_oes;
628 struct i40e_veb_tc_stats *veb_es;
631 idx = veb->stats_idx;
633 oes = &veb->stats_offsets;
634 veb_es = &veb->tc_stats;
635 veb_oes = &veb->tc_stats_offsets;
637 /* Gather up the stats that the hw collects */
638 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_discards, &es->tx_discards);
641 if (hw->revision_id > 0)
642 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
643 veb->stat_offsets_loaded,
644 &oes->rx_unknown_protocol,
645 &es->rx_unknown_protocol);
646 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
647 veb->stat_offsets_loaded,
648 &oes->rx_bytes, &es->rx_bytes);
649 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
650 veb->stat_offsets_loaded,
651 &oes->rx_unicast, &es->rx_unicast);
652 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
653 veb->stat_offsets_loaded,
654 &oes->rx_multicast, &es->rx_multicast);
655 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
656 veb->stat_offsets_loaded,
657 &oes->rx_broadcast, &es->rx_broadcast);
659 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
660 veb->stat_offsets_loaded,
661 &oes->tx_bytes, &es->tx_bytes);
662 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
663 veb->stat_offsets_loaded,
664 &oes->tx_unicast, &es->tx_unicast);
665 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
666 veb->stat_offsets_loaded,
667 &oes->tx_multicast, &es->tx_multicast);
668 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
669 veb->stat_offsets_loaded,
670 &oes->tx_broadcast, &es->tx_broadcast);
671 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
672 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
673 I40E_GLVEBTC_RPCL(i, idx),
674 veb->stat_offsets_loaded,
675 &veb_oes->tc_rx_packets[i],
676 &veb_es->tc_rx_packets[i]);
677 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
678 I40E_GLVEBTC_RBCL(i, idx),
679 veb->stat_offsets_loaded,
680 &veb_oes->tc_rx_bytes[i],
681 &veb_es->tc_rx_bytes[i]);
682 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
683 I40E_GLVEBTC_TPCL(i, idx),
684 veb->stat_offsets_loaded,
685 &veb_oes->tc_tx_packets[i],
686 &veb_es->tc_tx_packets[i]);
687 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
688 I40E_GLVEBTC_TBCL(i, idx),
689 veb->stat_offsets_loaded,
690 &veb_oes->tc_tx_bytes[i],
691 &veb_es->tc_tx_bytes[i]);
693 veb->stat_offsets_loaded = true;
698 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
699 * @vsi: the VSI that is capable of doing FCoE
701 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
703 struct i40e_pf *pf = vsi->back;
704 struct i40e_hw *hw = &pf->hw;
705 struct i40e_fcoe_stats *ofs;
706 struct i40e_fcoe_stats *fs; /* device's eth stats */
709 if (vsi->type != I40E_VSI_FCOE)
712 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
713 fs = &vsi->fcoe_stats;
714 ofs = &vsi->fcoe_stats_offsets;
716 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
717 vsi->fcoe_stat_offsets_loaded,
718 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
719 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
720 vsi->fcoe_stat_offsets_loaded,
721 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
722 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
723 vsi->fcoe_stat_offsets_loaded,
724 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
725 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
726 vsi->fcoe_stat_offsets_loaded,
727 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
728 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
729 vsi->fcoe_stat_offsets_loaded,
730 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
731 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
732 vsi->fcoe_stat_offsets_loaded,
733 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
734 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
735 vsi->fcoe_stat_offsets_loaded,
736 &ofs->fcoe_last_error, &fs->fcoe_last_error);
737 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
738 vsi->fcoe_stat_offsets_loaded,
739 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
741 vsi->fcoe_stat_offsets_loaded = true;
746 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
747 * @pf: the corresponding PF
749 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
751 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
753 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
754 struct i40e_hw_port_stats *nsd = &pf->stats;
755 struct i40e_hw *hw = &pf->hw;
759 if ((hw->fc.current_mode != I40E_FC_FULL) &&
760 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
763 xoff = nsd->link_xoff_rx;
764 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
765 pf->stat_offsets_loaded,
766 &osd->link_xoff_rx, &nsd->link_xoff_rx);
768 /* No new LFC xoff rx */
769 if (!(nsd->link_xoff_rx - xoff))
772 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
773 for (v = 0; v < pf->num_alloc_vsi; v++) {
774 struct i40e_vsi *vsi = pf->vsi[v];
776 if (!vsi || !vsi->tx_rings[0])
779 for (i = 0; i < vsi->num_queue_pairs; i++) {
780 struct i40e_ring *ring = vsi->tx_rings[i];
781 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
787 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
788 * @pf: the corresponding PF
790 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
792 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
794 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
795 struct i40e_hw_port_stats *nsd = &pf->stats;
796 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
797 struct i40e_dcbx_config *dcb_cfg;
798 struct i40e_hw *hw = &pf->hw;
802 dcb_cfg = &hw->local_dcbx_config;
804 /* Collect Link XOFF stats when PFC is disabled */
805 if (!dcb_cfg->pfc.pfcenable) {
806 i40e_update_link_xoff_rx(pf);
810 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
811 u64 prio_xoff = nsd->priority_xoff_rx[i];
812 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
813 pf->stat_offsets_loaded,
814 &osd->priority_xoff_rx[i],
815 &nsd->priority_xoff_rx[i]);
817 /* No new PFC xoff rx */
818 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
820 /* Get the TC for given priority */
821 tc = dcb_cfg->etscfg.prioritytable[i];
825 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
826 for (v = 0; v < pf->num_alloc_vsi; v++) {
827 struct i40e_vsi *vsi = pf->vsi[v];
829 if (!vsi || !vsi->tx_rings[0])
832 for (i = 0; i < vsi->num_queue_pairs; i++) {
833 struct i40e_ring *ring = vsi->tx_rings[i];
837 clear_bit(__I40E_HANG_CHECK_ARMED,
844 * i40e_update_vsi_stats - Update the vsi statistics counters.
845 * @vsi: the VSI to be updated
847 * There are a few instances where we store the same stat in a
848 * couple of different structs. This is partly because we have
849 * the netdev stats that need to be filled out, which is slightly
850 * different from the "eth_stats" defined by the chip and used in
851 * VF communications. We sort it out here.
853 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
855 struct i40e_pf *pf = vsi->back;
856 struct rtnl_link_stats64 *ons;
857 struct rtnl_link_stats64 *ns; /* netdev stats */
858 struct i40e_eth_stats *oes;
859 struct i40e_eth_stats *es; /* device's eth stats */
860 u32 tx_restart, tx_busy;
869 if (test_bit(__I40E_DOWN, &vsi->state) ||
870 test_bit(__I40E_CONFIG_BUSY, &pf->state))
873 ns = i40e_get_vsi_stats_struct(vsi);
874 ons = &vsi->net_stats_offsets;
875 es = &vsi->eth_stats;
876 oes = &vsi->eth_stats_offsets;
878 /* Gather up the netdev and vsi stats that the driver collects
879 * on the fly during packet processing
883 tx_restart = tx_busy = 0;
887 for (q = 0; q < vsi->num_queue_pairs; q++) {
889 p = ACCESS_ONCE(vsi->tx_rings[q]);
892 start = u64_stats_fetch_begin_irq(&p->syncp);
893 packets = p->stats.packets;
894 bytes = p->stats.bytes;
895 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
898 tx_restart += p->tx_stats.restart_queue;
899 tx_busy += p->tx_stats.tx_busy;
901 /* Rx queue is part of the same block as Tx queue */
904 start = u64_stats_fetch_begin_irq(&p->syncp);
905 packets = p->stats.packets;
906 bytes = p->stats.bytes;
907 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
910 rx_buf += p->rx_stats.alloc_buff_failed;
911 rx_page += p->rx_stats.alloc_page_failed;
914 vsi->tx_restart = tx_restart;
915 vsi->tx_busy = tx_busy;
916 vsi->rx_page_failed = rx_page;
917 vsi->rx_buf_failed = rx_buf;
919 ns->rx_packets = rx_p;
921 ns->tx_packets = tx_p;
924 /* update netdev stats from eth stats */
925 i40e_update_eth_stats(vsi);
926 ons->tx_errors = oes->tx_errors;
927 ns->tx_errors = es->tx_errors;
928 ons->multicast = oes->rx_multicast;
929 ns->multicast = es->rx_multicast;
930 ons->rx_dropped = oes->rx_discards;
931 ns->rx_dropped = es->rx_discards;
932 ons->tx_dropped = oes->tx_discards;
933 ns->tx_dropped = es->tx_discards;
935 /* pull in a couple PF stats if this is the main vsi */
936 if (vsi == pf->vsi[pf->lan_vsi]) {
937 ns->rx_crc_errors = pf->stats.crc_errors;
938 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
939 ns->rx_length_errors = pf->stats.rx_length_errors;
944 * i40e_update_pf_stats - Update the PF statistics counters.
945 * @pf: the PF to be updated
947 static void i40e_update_pf_stats(struct i40e_pf *pf)
949 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
950 struct i40e_hw_port_stats *nsd = &pf->stats;
951 struct i40e_hw *hw = &pf->hw;
955 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
956 I40E_GLPRT_GORCL(hw->port),
957 pf->stat_offsets_loaded,
958 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
959 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
960 I40E_GLPRT_GOTCL(hw->port),
961 pf->stat_offsets_loaded,
962 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
963 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->eth.rx_discards,
966 &nsd->eth.rx_discards);
967 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
968 I40E_GLPRT_UPRCL(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->eth.rx_unicast,
971 &nsd->eth.rx_unicast);
972 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
973 I40E_GLPRT_MPRCL(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->eth.rx_multicast,
976 &nsd->eth.rx_multicast);
977 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
978 I40E_GLPRT_BPRCL(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->eth.rx_broadcast,
981 &nsd->eth.rx_broadcast);
982 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
983 I40E_GLPRT_UPTCL(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->eth.tx_unicast,
986 &nsd->eth.tx_unicast);
987 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
988 I40E_GLPRT_MPTCL(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->eth.tx_multicast,
991 &nsd->eth.tx_multicast);
992 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
993 I40E_GLPRT_BPTCL(hw->port),
994 pf->stat_offsets_loaded,
995 &osd->eth.tx_broadcast,
996 &nsd->eth.tx_broadcast);
998 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
999 pf->stat_offsets_loaded,
1000 &osd->tx_dropped_link_down,
1001 &nsd->tx_dropped_link_down);
1003 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->crc_errors, &nsd->crc_errors);
1007 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->illegal_bytes, &nsd->illegal_bytes);
1011 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->mac_local_faults,
1014 &nsd->mac_local_faults);
1015 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->mac_remote_faults,
1018 &nsd->mac_remote_faults);
1020 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_length_errors,
1023 &nsd->rx_length_errors);
1025 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->link_xon_rx, &nsd->link_xon_rx);
1028 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->link_xon_tx, &nsd->link_xon_tx);
1031 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1032 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1036 for (i = 0; i < 8; i++) {
1037 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1038 pf->stat_offsets_loaded,
1039 &osd->priority_xon_rx[i],
1040 &nsd->priority_xon_rx[i]);
1041 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1042 pf->stat_offsets_loaded,
1043 &osd->priority_xon_tx[i],
1044 &nsd->priority_xon_tx[i]);
1045 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1046 pf->stat_offsets_loaded,
1047 &osd->priority_xoff_tx[i],
1048 &nsd->priority_xoff_tx[i]);
1049 i40e_stat_update32(hw,
1050 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1051 pf->stat_offsets_loaded,
1052 &osd->priority_xon_2_xoff[i],
1053 &nsd->priority_xon_2_xoff[i]);
1056 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1057 I40E_GLPRT_PRC64L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->rx_size_64, &nsd->rx_size_64);
1060 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1061 I40E_GLPRT_PRC127L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->rx_size_127, &nsd->rx_size_127);
1064 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1065 I40E_GLPRT_PRC255L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->rx_size_255, &nsd->rx_size_255);
1068 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1069 I40E_GLPRT_PRC511L(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->rx_size_511, &nsd->rx_size_511);
1072 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1073 I40E_GLPRT_PRC1023L(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->rx_size_1023, &nsd->rx_size_1023);
1076 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1077 I40E_GLPRT_PRC1522L(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_size_1522, &nsd->rx_size_1522);
1080 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1081 I40E_GLPRT_PRC9522L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_size_big, &nsd->rx_size_big);
1085 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1086 I40E_GLPRT_PTC64L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->tx_size_64, &nsd->tx_size_64);
1089 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1090 I40E_GLPRT_PTC127L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->tx_size_127, &nsd->tx_size_127);
1093 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1094 I40E_GLPRT_PTC255L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->tx_size_255, &nsd->tx_size_255);
1097 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1098 I40E_GLPRT_PTC511L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->tx_size_511, &nsd->tx_size_511);
1101 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1102 I40E_GLPRT_PTC1023L(hw->port),
1103 pf->stat_offsets_loaded,
1104 &osd->tx_size_1023, &nsd->tx_size_1023);
1105 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1106 I40E_GLPRT_PTC1522L(hw->port),
1107 pf->stat_offsets_loaded,
1108 &osd->tx_size_1522, &nsd->tx_size_1522);
1109 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1110 I40E_GLPRT_PTC9522L(hw->port),
1111 pf->stat_offsets_loaded,
1112 &osd->tx_size_big, &nsd->tx_size_big);
1114 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1115 pf->stat_offsets_loaded,
1116 &osd->rx_undersize, &nsd->rx_undersize);
1117 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1118 pf->stat_offsets_loaded,
1119 &osd->rx_fragments, &nsd->rx_fragments);
1120 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->rx_oversize, &nsd->rx_oversize);
1123 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->rx_jabber, &nsd->rx_jabber);
1128 i40e_stat_update32(hw,
1129 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1130 pf->stat_offsets_loaded,
1131 &osd->fd_atr_match, &nsd->fd_atr_match);
1132 i40e_stat_update32(hw,
1133 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1134 pf->stat_offsets_loaded,
1135 &osd->fd_sb_match, &nsd->fd_sb_match);
1136 i40e_stat_update32(hw,
1137 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1138 pf->stat_offsets_loaded,
1139 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1141 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1142 nsd->tx_lpi_status =
1143 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1144 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1145 nsd->rx_lpi_status =
1146 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1147 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1148 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1149 pf->stat_offsets_loaded,
1150 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1151 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1152 pf->stat_offsets_loaded,
1153 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1155 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1156 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1157 nsd->fd_sb_status = true;
1159 nsd->fd_sb_status = false;
1161 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1162 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1163 nsd->fd_atr_status = true;
1165 nsd->fd_atr_status = false;
1167 pf->stat_offsets_loaded = true;
1171 * i40e_update_stats - Update the various statistics counters.
1172 * @vsi: the VSI to be updated
1174 * Update the various stats for this VSI and its related entities.
1176 void i40e_update_stats(struct i40e_vsi *vsi)
1178 struct i40e_pf *pf = vsi->back;
1180 if (vsi == pf->vsi[pf->lan_vsi])
1181 i40e_update_pf_stats(pf);
1183 i40e_update_vsi_stats(vsi);
1185 i40e_update_fcoe_stats(vsi);
1190 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1191 * @vsi: the VSI to be searched
1192 * @macaddr: the MAC address
1194 * @is_vf: make sure its a VF filter, else doesn't matter
1195 * @is_netdev: make sure its a netdev filter, else doesn't matter
1197 * Returns ptr to the filter object or NULL
1199 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1200 u8 *macaddr, s16 vlan,
1201 bool is_vf, bool is_netdev)
1203 struct i40e_mac_filter *f;
1205 if (!vsi || !macaddr)
1208 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1209 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1210 (vlan == f->vlan) &&
1211 (!is_vf || f->is_vf) &&
1212 (!is_netdev || f->is_netdev))
1219 * i40e_find_mac - Find a mac addr in the macvlan filters list
1220 * @vsi: the VSI to be searched
1221 * @macaddr: the MAC address we are searching for
1222 * @is_vf: make sure its a VF filter, else doesn't matter
1223 * @is_netdev: make sure its a netdev filter, else doesn't matter
1225 * Returns the first filter with the provided MAC address or NULL if
1226 * MAC address was not found
1228 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1229 bool is_vf, bool is_netdev)
1231 struct i40e_mac_filter *f;
1233 if (!vsi || !macaddr)
1236 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1237 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1238 (!is_vf || f->is_vf) &&
1239 (!is_netdev || f->is_netdev))
1246 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1247 * @vsi: the VSI to be searched
1249 * Returns true if VSI is in vlan mode or false otherwise
1251 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1253 struct i40e_mac_filter *f;
1255 /* Only -1 for all the filters denotes not in vlan mode
1256 * so we have to go through all the list in order to make sure
1258 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1267 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1268 * @vsi: the VSI to be searched
1269 * @macaddr: the mac address to be filtered
1270 * @is_vf: true if it is a VF
1271 * @is_netdev: true if it is a netdev
1273 * Goes through all the macvlan filters and adds a
1274 * macvlan filter for each unique vlan that already exists
1276 * Returns first filter found on success, else NULL
1278 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1279 bool is_vf, bool is_netdev)
1281 struct i40e_mac_filter *f;
1283 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1285 f->vlan = le16_to_cpu(vsi->info.pvid);
1286 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1287 is_vf, is_netdev)) {
1288 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1294 return list_first_entry_or_null(&vsi->mac_filter_list,
1295 struct i40e_mac_filter, list);
1299 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1300 * @vsi: the PF Main VSI - inappropriate for any other VSI
1301 * @macaddr: the MAC address
1303 * Some older firmware configurations set up a default promiscuous VLAN
1304 * filter that needs to be removed.
1306 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1308 struct i40e_aqc_remove_macvlan_element_data element;
1309 struct i40e_pf *pf = vsi->back;
1312 /* Only appropriate for the PF main VSI */
1313 if (vsi->type != I40E_VSI_MAIN)
1316 memset(&element, 0, sizeof(element));
1317 ether_addr_copy(element.mac_addr, macaddr);
1318 element.vlan_tag = 0;
1319 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1320 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1321 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1329 * i40e_add_filter - Add a mac/vlan filter to the VSI
1330 * @vsi: the VSI to be searched
1331 * @macaddr: the MAC address
1333 * @is_vf: make sure its a VF filter, else doesn't matter
1334 * @is_netdev: make sure its a netdev filter, else doesn't matter
1336 * Returns ptr to the filter object or NULL when no memory available.
1338 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1339 u8 *macaddr, s16 vlan,
1340 bool is_vf, bool is_netdev)
1342 struct i40e_mac_filter *f;
1344 if (!vsi || !macaddr)
1347 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1349 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1351 goto add_filter_out;
1353 ether_addr_copy(f->macaddr, macaddr);
1357 INIT_LIST_HEAD(&f->list);
1358 list_add(&f->list, &vsi->mac_filter_list);
1361 /* increment counter and add a new flag if needed */
1367 } else if (is_netdev) {
1368 if (!f->is_netdev) {
1369 f->is_netdev = true;
1376 /* changed tells sync_filters_subtask to
1377 * push the filter down to the firmware
1380 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1381 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1389 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1390 * @vsi: the VSI to be searched
1391 * @macaddr: the MAC address
1393 * @is_vf: make sure it's a VF filter, else doesn't matter
1394 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1396 void i40e_del_filter(struct i40e_vsi *vsi,
1397 u8 *macaddr, s16 vlan,
1398 bool is_vf, bool is_netdev)
1400 struct i40e_mac_filter *f;
1402 if (!vsi || !macaddr)
1405 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1406 if (!f || f->counter == 0)
1414 } else if (is_netdev) {
1416 f->is_netdev = false;
1420 /* make sure we don't remove a filter in use by VF or netdev */
1422 min_f += (f->is_vf ? 1 : 0);
1423 min_f += (f->is_netdev ? 1 : 0);
1425 if (f->counter > min_f)
1429 /* counter == 0 tells sync_filters_subtask to
1430 * remove the filter from the firmware's list
1432 if (f->counter == 0) {
1434 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1435 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1440 * i40e_set_mac - NDO callback to set mac address
1441 * @netdev: network interface device structure
1442 * @p: pointer to an address structure
1444 * Returns 0 on success, negative on failure
1447 int i40e_set_mac(struct net_device *netdev, void *p)
1449 static int i40e_set_mac(struct net_device *netdev, void *p)
1452 struct i40e_netdev_priv *np = netdev_priv(netdev);
1453 struct i40e_vsi *vsi = np->vsi;
1454 struct i40e_pf *pf = vsi->back;
1455 struct i40e_hw *hw = &pf->hw;
1456 struct sockaddr *addr = p;
1457 struct i40e_mac_filter *f;
1459 if (!is_valid_ether_addr(addr->sa_data))
1460 return -EADDRNOTAVAIL;
1462 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1463 netdev_info(netdev, "already using mac address %pM\n",
1468 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1469 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1470 return -EADDRNOTAVAIL;
1472 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1473 netdev_info(netdev, "returning to hw mac address %pM\n",
1476 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1478 if (vsi->type == I40E_VSI_MAIN) {
1480 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1481 I40E_AQC_WRITE_TYPE_LAA_WOL,
1482 addr->sa_data, NULL);
1485 "Addr change for Main VSI failed: %d\n",
1487 return -EADDRNOTAVAIL;
1491 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1492 struct i40e_aqc_remove_macvlan_element_data element;
1494 memset(&element, 0, sizeof(element));
1495 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1496 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1497 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1499 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1503 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1504 struct i40e_aqc_add_macvlan_element_data element;
1506 memset(&element, 0, sizeof(element));
1507 ether_addr_copy(element.mac_addr, hw->mac.addr);
1508 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1509 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1511 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1517 i40e_sync_vsi_filters(vsi);
1518 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1524 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1525 * @vsi: the VSI being setup
1526 * @ctxt: VSI context structure
1527 * @enabled_tc: Enabled TCs bitmap
1528 * @is_add: True if called before Add VSI
1530 * Setup VSI queue mapping for enabled traffic classes.
1533 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1534 struct i40e_vsi_context *ctxt,
1538 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1539 struct i40e_vsi_context *ctxt,
1544 struct i40e_pf *pf = vsi->back;
1554 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1557 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1558 /* Find numtc from enabled TC bitmap */
1559 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1560 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1564 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1568 /* At least TC0 is enabled in case of non-DCB case */
1572 vsi->tc_config.numtc = numtc;
1573 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1574 /* Number of queues per enabled TC */
1575 /* In MFP case we can have a much lower count of MSIx
1576 * vectors available and so we need to lower the used
1579 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1580 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1582 qcount = vsi->alloc_queue_pairs;
1583 num_tc_qps = qcount / numtc;
1584 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1586 /* Setup queue offset/count for all TCs for given VSI */
1587 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1588 /* See if the given TC is enabled for the given VSI */
1589 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1593 switch (vsi->type) {
1595 qcount = min_t(int, pf->rss_size, num_tc_qps);
1599 qcount = num_tc_qps;
1603 case I40E_VSI_SRIOV:
1604 case I40E_VSI_VMDQ2:
1606 qcount = num_tc_qps;
1610 vsi->tc_config.tc_info[i].qoffset = offset;
1611 vsi->tc_config.tc_info[i].qcount = qcount;
1613 /* find the next higher power-of-2 of num queue pairs */
1616 while (num_qps && (BIT_ULL(pow) < qcount)) {
1621 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1623 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1624 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1628 /* TC is not enabled so set the offset to
1629 * default queue and allocate one queue
1632 vsi->tc_config.tc_info[i].qoffset = 0;
1633 vsi->tc_config.tc_info[i].qcount = 1;
1634 vsi->tc_config.tc_info[i].netdev_tc = 0;
1638 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1641 /* Set actual Tx/Rx queue pairs */
1642 vsi->num_queue_pairs = offset;
1643 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1644 if (vsi->req_queue_pairs > 0)
1645 vsi->num_queue_pairs = vsi->req_queue_pairs;
1646 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1647 vsi->num_queue_pairs = pf->num_lan_msix;
1650 /* Scheduler section valid can only be set for ADD VSI */
1652 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1654 ctxt->info.up_enable_bits = enabled_tc;
1656 if (vsi->type == I40E_VSI_SRIOV) {
1657 ctxt->info.mapping_flags |=
1658 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1659 for (i = 0; i < vsi->num_queue_pairs; i++)
1660 ctxt->info.queue_mapping[i] =
1661 cpu_to_le16(vsi->base_queue + i);
1663 ctxt->info.mapping_flags |=
1664 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1665 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1667 ctxt->info.valid_sections |= cpu_to_le16(sections);
1671 * i40e_set_rx_mode - NDO callback to set the netdev filters
1672 * @netdev: network interface device structure
1675 void i40e_set_rx_mode(struct net_device *netdev)
1677 static void i40e_set_rx_mode(struct net_device *netdev)
1680 struct i40e_netdev_priv *np = netdev_priv(netdev);
1681 struct i40e_mac_filter *f, *ftmp;
1682 struct i40e_vsi *vsi = np->vsi;
1683 struct netdev_hw_addr *uca;
1684 struct netdev_hw_addr *mca;
1685 struct netdev_hw_addr *ha;
1687 /* add addr if not already in the filter list */
1688 netdev_for_each_uc_addr(uca, netdev) {
1689 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1690 if (i40e_is_vsi_in_vlan(vsi))
1691 i40e_put_mac_in_vlan(vsi, uca->addr,
1694 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1699 netdev_for_each_mc_addr(mca, netdev) {
1700 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1701 if (i40e_is_vsi_in_vlan(vsi))
1702 i40e_put_mac_in_vlan(vsi, mca->addr,
1705 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1710 /* remove filter if not in netdev list */
1711 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1717 if (is_multicast_ether_addr(f->macaddr)) {
1718 netdev_for_each_mc_addr(mca, netdev) {
1719 if (ether_addr_equal(mca->addr, f->macaddr)) {
1725 netdev_for_each_uc_addr(uca, netdev) {
1726 if (ether_addr_equal(uca->addr, f->macaddr)) {
1732 for_each_dev_addr(netdev, ha) {
1733 if (ether_addr_equal(ha->addr, f->macaddr)) {
1741 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1744 /* check for other flag changes */
1745 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1746 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1747 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1752 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1753 * @vsi: ptr to the VSI
1755 * Push any outstanding VSI filter changes through the AdminQ.
1757 * Returns 0 or error value
1759 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1761 struct i40e_mac_filter *f, *ftmp;
1762 bool promisc_forced_on = false;
1763 bool add_happened = false;
1764 int filter_list_len = 0;
1765 u32 changed_flags = 0;
1766 i40e_status ret = 0;
1773 /* empty array typed pointers, kcalloc later */
1774 struct i40e_aqc_add_macvlan_element_data *add_list;
1775 struct i40e_aqc_remove_macvlan_element_data *del_list;
1777 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1778 usleep_range(1000, 2000);
1782 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1783 vsi->current_netdev_flags = vsi->netdev->flags;
1786 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1787 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1789 filter_list_len = pf->hw.aq.asq_buf_size /
1790 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1791 del_list = kcalloc(filter_list_len,
1792 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1797 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1801 if (f->counter != 0)
1806 /* add to delete list */
1807 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1808 del_list[num_del].vlan_tag =
1809 cpu_to_le16((u16)(f->vlan ==
1810 I40E_VLAN_ANY ? 0 : f->vlan));
1812 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1813 del_list[num_del].flags = cmd_flags;
1816 /* unlink from filter list */
1820 /* flush a full buffer */
1821 if (num_del == filter_list_len) {
1822 ret = i40e_aq_remove_macvlan(&pf->hw,
1823 vsi->seid, del_list, num_del,
1825 aq_err = pf->hw.aq.asq_last_status;
1827 memset(del_list, 0, sizeof(*del_list));
1829 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1830 dev_info(&pf->pdev->dev,
1831 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1832 i40e_stat_str(&pf->hw, ret),
1833 i40e_aq_str(&pf->hw, aq_err));
1837 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1838 del_list, num_del, NULL);
1839 aq_err = pf->hw.aq.asq_last_status;
1842 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1843 dev_info(&pf->pdev->dev,
1844 "ignoring delete macvlan error, err %s aq_err %s\n",
1845 i40e_stat_str(&pf->hw, ret),
1846 i40e_aq_str(&pf->hw, aq_err));
1852 /* do all the adds now */
1853 filter_list_len = pf->hw.aq.asq_buf_size /
1854 sizeof(struct i40e_aqc_add_macvlan_element_data),
1855 add_list = kcalloc(filter_list_len,
1856 sizeof(struct i40e_aqc_add_macvlan_element_data),
1861 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1865 if (f->counter == 0)
1868 add_happened = true;
1871 /* add to add array */
1872 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1873 add_list[num_add].vlan_tag =
1875 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1876 add_list[num_add].queue_number = 0;
1878 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1879 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1882 /* flush a full buffer */
1883 if (num_add == filter_list_len) {
1884 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1887 aq_err = pf->hw.aq.asq_last_status;
1892 memset(add_list, 0, sizeof(*add_list));
1896 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1897 add_list, num_add, NULL);
1898 aq_err = pf->hw.aq.asq_last_status;
1904 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1905 dev_info(&pf->pdev->dev,
1906 "add filter failed, err %s aq_err %s\n",
1907 i40e_stat_str(&pf->hw, ret),
1908 i40e_aq_str(&pf->hw, aq_err));
1909 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1910 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1912 promisc_forced_on = true;
1913 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1915 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1920 /* check for changes in promiscuous modes */
1921 if (changed_flags & IFF_ALLMULTI) {
1922 bool cur_multipromisc;
1923 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1924 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1929 dev_info(&pf->pdev->dev,
1930 "set multi promisc failed, err %s aq_err %s\n",
1931 i40e_stat_str(&pf->hw, ret),
1932 i40e_aq_str(&pf->hw,
1933 pf->hw.aq.asq_last_status));
1935 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1937 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1938 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1940 ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1944 dev_info(&pf->pdev->dev,
1945 "set uni promisc failed, err %s, aq_err %s\n",
1946 i40e_stat_str(&pf->hw, ret),
1947 i40e_aq_str(&pf->hw,
1948 pf->hw.aq.asq_last_status));
1949 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1953 dev_info(&pf->pdev->dev,
1954 "set brdcast promisc failed, err %s, aq_err %s\n",
1955 i40e_stat_str(&pf->hw, ret),
1956 i40e_aq_str(&pf->hw,
1957 pf->hw.aq.asq_last_status));
1960 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1965 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1966 * @pf: board private structure
1968 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1972 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1974 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1976 for (v = 0; v < pf->num_alloc_vsi; v++) {
1978 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1979 i40e_sync_vsi_filters(pf->vsi[v]);
1984 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1985 * @netdev: network interface device structure
1986 * @new_mtu: new value for maximum frame size
1988 * Returns 0 on success, negative on failure
1990 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1992 struct i40e_netdev_priv *np = netdev_priv(netdev);
1993 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1994 struct i40e_vsi *vsi = np->vsi;
1996 /* MTU < 68 is an error and causes problems on some kernels */
1997 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2000 netdev_info(netdev, "changing MTU from %d to %d\n",
2001 netdev->mtu, new_mtu);
2002 netdev->mtu = new_mtu;
2003 if (netif_running(netdev))
2004 i40e_vsi_reinit_locked(vsi);
2010 * i40e_ioctl - Access the hwtstamp interface
2011 * @netdev: network interface device structure
2012 * @ifr: interface request data
2013 * @cmd: ioctl command
2015 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2017 struct i40e_netdev_priv *np = netdev_priv(netdev);
2018 struct i40e_pf *pf = np->vsi->back;
2022 return i40e_ptp_get_ts_config(pf, ifr);
2024 return i40e_ptp_set_ts_config(pf, ifr);
2031 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2032 * @vsi: the vsi being adjusted
2034 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2036 struct i40e_vsi_context ctxt;
2039 if ((vsi->info.valid_sections &
2040 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2041 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2042 return; /* already enabled */
2044 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2045 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2046 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2048 ctxt.seid = vsi->seid;
2049 ctxt.info = vsi->info;
2050 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2052 dev_info(&vsi->back->pdev->dev,
2053 "update vlan stripping failed, err %s aq_err %s\n",
2054 i40e_stat_str(&vsi->back->hw, ret),
2055 i40e_aq_str(&vsi->back->hw,
2056 vsi->back->hw.aq.asq_last_status));
2061 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2062 * @vsi: the vsi being adjusted
2064 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2066 struct i40e_vsi_context ctxt;
2069 if ((vsi->info.valid_sections &
2070 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2071 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2072 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2073 return; /* already disabled */
2075 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2076 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2077 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2079 ctxt.seid = vsi->seid;
2080 ctxt.info = vsi->info;
2081 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2083 dev_info(&vsi->back->pdev->dev,
2084 "update vlan stripping failed, err %s aq_err %s\n",
2085 i40e_stat_str(&vsi->back->hw, ret),
2086 i40e_aq_str(&vsi->back->hw,
2087 vsi->back->hw.aq.asq_last_status));
2092 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2093 * @netdev: network interface to be adjusted
2094 * @features: netdev features to test if VLAN offload is enabled or not
2096 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2098 struct i40e_netdev_priv *np = netdev_priv(netdev);
2099 struct i40e_vsi *vsi = np->vsi;
2101 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2102 i40e_vlan_stripping_enable(vsi);
2104 i40e_vlan_stripping_disable(vsi);
2108 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2109 * @vsi: the vsi being configured
2110 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2112 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2114 struct i40e_mac_filter *f, *add_f;
2115 bool is_netdev, is_vf;
2117 is_vf = (vsi->type == I40E_VSI_SRIOV);
2118 is_netdev = !!(vsi->netdev);
2121 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2124 dev_info(&vsi->back->pdev->dev,
2125 "Could not add vlan filter %d for %pM\n",
2126 vid, vsi->netdev->dev_addr);
2131 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2132 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2134 dev_info(&vsi->back->pdev->dev,
2135 "Could not add vlan filter %d for %pM\n",
2141 /* Now if we add a vlan tag, make sure to check if it is the first
2142 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2143 * with 0, so we now accept untagged and specified tagged traffic
2144 * (and not any taged and untagged)
2147 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2149 is_vf, is_netdev)) {
2150 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2151 I40E_VLAN_ANY, is_vf, is_netdev);
2152 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2155 dev_info(&vsi->back->pdev->dev,
2156 "Could not add filter 0 for %pM\n",
2157 vsi->netdev->dev_addr);
2163 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2164 if (vid > 0 && !vsi->info.pvid) {
2165 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2166 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2167 is_vf, is_netdev)) {
2168 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2170 add_f = i40e_add_filter(vsi, f->macaddr,
2171 0, is_vf, is_netdev);
2173 dev_info(&vsi->back->pdev->dev,
2174 "Could not add filter 0 for %pM\n",
2182 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2183 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2186 return i40e_sync_vsi_filters(vsi);
2190 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2191 * @vsi: the vsi being configured
2192 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2194 * Return: 0 on success or negative otherwise
2196 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2198 struct net_device *netdev = vsi->netdev;
2199 struct i40e_mac_filter *f, *add_f;
2200 bool is_vf, is_netdev;
2201 int filter_count = 0;
2203 is_vf = (vsi->type == I40E_VSI_SRIOV);
2204 is_netdev = !!(netdev);
2207 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2209 list_for_each_entry(f, &vsi->mac_filter_list, list)
2210 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2212 /* go through all the filters for this VSI and if there is only
2213 * vid == 0 it means there are no other filters, so vid 0 must
2214 * be replaced with -1. This signifies that we should from now
2215 * on accept any traffic (with any tag present, or untagged)
2217 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2220 ether_addr_equal(netdev->dev_addr, f->macaddr))
2228 if (!filter_count && is_netdev) {
2229 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2230 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2233 dev_info(&vsi->back->pdev->dev,
2234 "Could not add filter %d for %pM\n",
2235 I40E_VLAN_ANY, netdev->dev_addr);
2240 if (!filter_count) {
2241 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2242 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2243 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2246 dev_info(&vsi->back->pdev->dev,
2247 "Could not add filter %d for %pM\n",
2248 I40E_VLAN_ANY, f->macaddr);
2254 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2255 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2258 return i40e_sync_vsi_filters(vsi);
2262 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2263 * @netdev: network interface to be adjusted
2264 * @vid: vlan id to be added
2266 * net_device_ops implementation for adding vlan ids
2269 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2270 __always_unused __be16 proto, u16 vid)
2272 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2273 __always_unused __be16 proto, u16 vid)
2276 struct i40e_netdev_priv *np = netdev_priv(netdev);
2277 struct i40e_vsi *vsi = np->vsi;
2283 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2285 /* If the network stack called us with vid = 0 then
2286 * it is asking to receive priority tagged packets with
2287 * vlan id 0. Our HW receives them by default when configured
2288 * to receive untagged packets so there is no need to add an
2289 * extra filter for vlan 0 tagged packets.
2292 ret = i40e_vsi_add_vlan(vsi, vid);
2294 if (!ret && (vid < VLAN_N_VID))
2295 set_bit(vid, vsi->active_vlans);
2301 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2302 * @netdev: network interface to be adjusted
2303 * @vid: vlan id to be removed
2305 * net_device_ops implementation for removing vlan ids
2308 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2309 __always_unused __be16 proto, u16 vid)
2311 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2312 __always_unused __be16 proto, u16 vid)
2315 struct i40e_netdev_priv *np = netdev_priv(netdev);
2316 struct i40e_vsi *vsi = np->vsi;
2318 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2320 /* return code is ignored as there is nothing a user
2321 * can do about failure to remove and a log message was
2322 * already printed from the other function
2324 i40e_vsi_kill_vlan(vsi, vid);
2326 clear_bit(vid, vsi->active_vlans);
2332 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2333 * @vsi: the vsi being brought back up
2335 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2342 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2344 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2345 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2350 * i40e_vsi_add_pvid - Add pvid for the VSI
2351 * @vsi: the vsi being adjusted
2352 * @vid: the vlan id to set as a PVID
2354 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2356 struct i40e_vsi_context ctxt;
2359 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2360 vsi->info.pvid = cpu_to_le16(vid);
2361 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2362 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2363 I40E_AQ_VSI_PVLAN_EMOD_STR;
2365 ctxt.seid = vsi->seid;
2366 ctxt.info = vsi->info;
2367 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2369 dev_info(&vsi->back->pdev->dev,
2370 "add pvid failed, err %s aq_err %s\n",
2371 i40e_stat_str(&vsi->back->hw, ret),
2372 i40e_aq_str(&vsi->back->hw,
2373 vsi->back->hw.aq.asq_last_status));
2381 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2382 * @vsi: the vsi being adjusted
2384 * Just use the vlan_rx_register() service to put it back to normal
2386 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2388 i40e_vlan_stripping_disable(vsi);
2394 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2395 * @vsi: ptr to the VSI
2397 * If this function returns with an error, then it's possible one or
2398 * more of the rings is populated (while the rest are not). It is the
2399 * callers duty to clean those orphaned rings.
2401 * Return 0 on success, negative on failure
2403 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2407 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2408 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2414 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2415 * @vsi: ptr to the VSI
2417 * Free VSI's transmit software resources
2419 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2426 for (i = 0; i < vsi->num_queue_pairs; i++)
2427 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2428 i40e_free_tx_resources(vsi->tx_rings[i]);
2432 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2433 * @vsi: ptr to the VSI
2435 * If this function returns with an error, then it's possible one or
2436 * more of the rings is populated (while the rest are not). It is the
2437 * callers duty to clean those orphaned rings.
2439 * Return 0 on success, negative on failure
2441 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2445 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2446 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2448 i40e_fcoe_setup_ddp_resources(vsi);
2454 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2455 * @vsi: ptr to the VSI
2457 * Free all receive software resources
2459 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2466 for (i = 0; i < vsi->num_queue_pairs; i++)
2467 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2468 i40e_free_rx_resources(vsi->rx_rings[i]);
2470 i40e_fcoe_free_ddp_resources(vsi);
2475 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2476 * @ring: The Tx ring to configure
2478 * This enables/disables XPS for a given Tx descriptor ring
2479 * based on the TCs enabled for the VSI that ring belongs to.
2481 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2483 struct i40e_vsi *vsi = ring->vsi;
2486 if (!ring->q_vector || !ring->netdev)
2489 /* Single TC mode enable XPS */
2490 if (vsi->tc_config.numtc <= 1) {
2491 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2492 netif_set_xps_queue(ring->netdev,
2493 &ring->q_vector->affinity_mask,
2495 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2496 /* Disable XPS to allow selection based on TC */
2497 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2498 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2499 free_cpumask_var(mask);
2504 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2505 * @ring: The Tx ring to configure
2507 * Configure the Tx descriptor ring in the HMC context.
2509 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2511 struct i40e_vsi *vsi = ring->vsi;
2512 u16 pf_q = vsi->base_queue + ring->queue_index;
2513 struct i40e_hw *hw = &vsi->back->hw;
2514 struct i40e_hmc_obj_txq tx_ctx;
2515 i40e_status err = 0;
2518 /* some ATR related tx ring init */
2519 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2520 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2521 ring->atr_count = 0;
2523 ring->atr_sample_rate = 0;
2527 i40e_config_xps_tx_ring(ring);
2529 /* clear the context structure first */
2530 memset(&tx_ctx, 0, sizeof(tx_ctx));
2532 tx_ctx.new_context = 1;
2533 tx_ctx.base = (ring->dma / 128);
2534 tx_ctx.qlen = ring->count;
2535 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2536 I40E_FLAG_FD_ATR_ENABLED));
2538 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2540 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2541 /* FDIR VSI tx ring can still use RS bit and writebacks */
2542 if (vsi->type != I40E_VSI_FDIR)
2543 tx_ctx.head_wb_ena = 1;
2544 tx_ctx.head_wb_addr = ring->dma +
2545 (ring->count * sizeof(struct i40e_tx_desc));
2547 /* As part of VSI creation/update, FW allocates certain
2548 * Tx arbitration queue sets for each TC enabled for
2549 * the VSI. The FW returns the handles to these queue
2550 * sets as part of the response buffer to Add VSI,
2551 * Update VSI, etc. AQ commands. It is expected that
2552 * these queue set handles be associated with the Tx
2553 * queues by the driver as part of the TX queue context
2554 * initialization. This has to be done regardless of
2555 * DCB as by default everything is mapped to TC0.
2557 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2558 tx_ctx.rdylist_act = 0;
2560 /* clear the context in the HMC */
2561 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2563 dev_info(&vsi->back->pdev->dev,
2564 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2565 ring->queue_index, pf_q, err);
2569 /* set the context in the HMC */
2570 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2572 dev_info(&vsi->back->pdev->dev,
2573 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2574 ring->queue_index, pf_q, err);
2578 /* Now associate this queue with this PCI function */
2579 if (vsi->type == I40E_VSI_VMDQ2) {
2580 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2581 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2582 I40E_QTX_CTL_VFVM_INDX_MASK;
2584 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2587 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2588 I40E_QTX_CTL_PF_INDX_MASK);
2589 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2592 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2594 /* cache tail off for easier writes later */
2595 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2601 * i40e_configure_rx_ring - Configure a receive ring context
2602 * @ring: The Rx ring to configure
2604 * Configure the Rx descriptor ring in the HMC context.
2606 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2608 struct i40e_vsi *vsi = ring->vsi;
2609 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2610 u16 pf_q = vsi->base_queue + ring->queue_index;
2611 struct i40e_hw *hw = &vsi->back->hw;
2612 struct i40e_hmc_obj_rxq rx_ctx;
2613 i40e_status err = 0;
2617 /* clear the context structure first */
2618 memset(&rx_ctx, 0, sizeof(rx_ctx));
2620 ring->rx_buf_len = vsi->rx_buf_len;
2621 ring->rx_hdr_len = vsi->rx_hdr_len;
2623 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2624 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2626 rx_ctx.base = (ring->dma / 128);
2627 rx_ctx.qlen = ring->count;
2629 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2630 set_ring_16byte_desc_enabled(ring);
2636 rx_ctx.dtype = vsi->dtype;
2638 set_ring_ps_enabled(ring);
2639 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2641 I40E_RX_SPLIT_TCP_UDP |
2644 rx_ctx.hsplit_0 = 0;
2647 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2648 (chain_len * ring->rx_buf_len));
2649 if (hw->revision_id == 0)
2650 rx_ctx.lrxqthresh = 0;
2652 rx_ctx.lrxqthresh = 2;
2653 rx_ctx.crcstrip = 1;
2657 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2659 /* set the prefena field to 1 because the manual says to */
2662 /* clear the context in the HMC */
2663 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2665 dev_info(&vsi->back->pdev->dev,
2666 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2667 ring->queue_index, pf_q, err);
2671 /* set the context in the HMC */
2672 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2674 dev_info(&vsi->back->pdev->dev,
2675 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2676 ring->queue_index, pf_q, err);
2680 /* cache tail for quicker writes, and clear the reg before use */
2681 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2682 writel(0, ring->tail);
2684 if (ring_is_ps_enabled(ring)) {
2685 i40e_alloc_rx_headers(ring);
2686 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2688 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2695 * i40e_vsi_configure_tx - Configure the VSI for Tx
2696 * @vsi: VSI structure describing this set of rings and resources
2698 * Configure the Tx VSI for operation.
2700 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2705 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2706 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2712 * i40e_vsi_configure_rx - Configure the VSI for Rx
2713 * @vsi: the VSI being configured
2715 * Configure the Rx VSI for operation.
2717 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2722 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2723 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2724 + ETH_FCS_LEN + VLAN_HLEN;
2726 vsi->max_frame = I40E_RXBUFFER_2048;
2728 /* figure out correct receive buffer length */
2729 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2730 I40E_FLAG_RX_PS_ENABLED)) {
2731 case I40E_FLAG_RX_1BUF_ENABLED:
2732 vsi->rx_hdr_len = 0;
2733 vsi->rx_buf_len = vsi->max_frame;
2734 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2736 case I40E_FLAG_RX_PS_ENABLED:
2737 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2738 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2739 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2742 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2743 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2744 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2749 /* setup rx buffer for FCoE */
2750 if ((vsi->type == I40E_VSI_FCOE) &&
2751 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2752 vsi->rx_hdr_len = 0;
2753 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2754 vsi->max_frame = I40E_RXBUFFER_3072;
2755 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2758 #endif /* I40E_FCOE */
2759 /* round up for the chip's needs */
2760 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2761 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2762 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2763 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2765 /* set up individual rings */
2766 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2767 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2773 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2774 * @vsi: ptr to the VSI
2776 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2778 struct i40e_ring *tx_ring, *rx_ring;
2779 u16 qoffset, qcount;
2782 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2783 /* Reset the TC information */
2784 for (i = 0; i < vsi->num_queue_pairs; i++) {
2785 rx_ring = vsi->rx_rings[i];
2786 tx_ring = vsi->tx_rings[i];
2787 rx_ring->dcb_tc = 0;
2788 tx_ring->dcb_tc = 0;
2792 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2793 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2796 qoffset = vsi->tc_config.tc_info[n].qoffset;
2797 qcount = vsi->tc_config.tc_info[n].qcount;
2798 for (i = qoffset; i < (qoffset + qcount); i++) {
2799 rx_ring = vsi->rx_rings[i];
2800 tx_ring = vsi->tx_rings[i];
2801 rx_ring->dcb_tc = n;
2802 tx_ring->dcb_tc = n;
2808 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2809 * @vsi: ptr to the VSI
2811 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2814 i40e_set_rx_mode(vsi->netdev);
2818 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2819 * @vsi: Pointer to the targeted VSI
2821 * This function replays the hlist on the hw where all the SB Flow Director
2822 * filters were saved.
2824 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2826 struct i40e_fdir_filter *filter;
2827 struct i40e_pf *pf = vsi->back;
2828 struct hlist_node *node;
2830 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2833 hlist_for_each_entry_safe(filter, node,
2834 &pf->fdir_filter_list, fdir_node) {
2835 i40e_add_del_fdir(vsi, filter, true);
2840 * i40e_vsi_configure - Set up the VSI for action
2841 * @vsi: the VSI being configured
2843 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2847 i40e_set_vsi_rx_mode(vsi);
2848 i40e_restore_vlan(vsi);
2849 i40e_vsi_config_dcb_rings(vsi);
2850 err = i40e_vsi_configure_tx(vsi);
2852 err = i40e_vsi_configure_rx(vsi);
2858 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2859 * @vsi: the VSI being configured
2861 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2863 struct i40e_pf *pf = vsi->back;
2864 struct i40e_q_vector *q_vector;
2865 struct i40e_hw *hw = &pf->hw;
2871 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2872 * and PFINT_LNKLSTn registers, e.g.:
2873 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2875 qp = vsi->base_queue;
2876 vector = vsi->base_vector;
2877 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2878 q_vector = vsi->q_vectors[i];
2879 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2880 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2881 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2883 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2884 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2885 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2888 /* Linked list for the queuepairs assigned to this vector */
2889 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2890 for (q = 0; q < q_vector->num_ringpairs; q++) {
2891 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2892 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2893 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2894 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2896 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2898 wr32(hw, I40E_QINT_RQCTL(qp), val);
2900 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2901 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2902 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2903 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2905 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2907 /* Terminate the linked list */
2908 if (q == (q_vector->num_ringpairs - 1))
2909 val |= (I40E_QUEUE_END_OF_LIST
2910 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2912 wr32(hw, I40E_QINT_TQCTL(qp), val);
2921 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2922 * @hw: ptr to the hardware info
2924 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2926 struct i40e_hw *hw = &pf->hw;
2929 /* clear things first */
2930 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2931 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2933 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2934 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2935 I40E_PFINT_ICR0_ENA_GRST_MASK |
2936 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2937 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2938 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2939 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2940 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2942 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2943 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2945 if (pf->flags & I40E_FLAG_PTP)
2946 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2948 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2950 /* SW_ITR_IDX = 0, but don't change INTENA */
2951 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2952 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2954 /* OTHER_ITR_IDX = 0 */
2955 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2959 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2960 * @vsi: the VSI being configured
2962 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2964 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2965 struct i40e_pf *pf = vsi->back;
2966 struct i40e_hw *hw = &pf->hw;
2969 /* set the ITR configuration */
2970 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2971 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2972 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2973 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2974 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2975 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2977 i40e_enable_misc_int_causes(pf);
2979 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2980 wr32(hw, I40E_PFINT_LNKLST0, 0);
2982 /* Associate the queue pair to the vector and enable the queue int */
2983 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2984 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2985 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2987 wr32(hw, I40E_QINT_RQCTL(0), val);
2989 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2990 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2991 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2993 wr32(hw, I40E_QINT_TQCTL(0), val);
2998 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2999 * @pf: board private structure
3001 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3003 struct i40e_hw *hw = &pf->hw;
3005 wr32(hw, I40E_PFINT_DYN_CTL0,
3006 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3011 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3012 * @pf: board private structure
3014 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3016 struct i40e_hw *hw = &pf->hw;
3019 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3020 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3021 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3023 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3028 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3029 * @vsi: pointer to a vsi
3030 * @vector: enable a particular Hw Interrupt vector
3032 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3034 struct i40e_pf *pf = vsi->back;
3035 struct i40e_hw *hw = &pf->hw;
3038 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3039 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3040 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3041 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3042 /* skip the flush */
3046 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3047 * @vsi: pointer to a vsi
3048 * @vector: disable a particular Hw Interrupt vector
3050 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3052 struct i40e_pf *pf = vsi->back;
3053 struct i40e_hw *hw = &pf->hw;
3056 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3057 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3062 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3063 * @irq: interrupt number
3064 * @data: pointer to a q_vector
3066 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3068 struct i40e_q_vector *q_vector = data;
3070 if (!q_vector->tx.ring && !q_vector->rx.ring)
3073 napi_schedule(&q_vector->napi);
3079 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3080 * @vsi: the VSI being configured
3081 * @basename: name for the vector
3083 * Allocates MSI-X vectors and requests interrupts from the kernel.
3085 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3087 int q_vectors = vsi->num_q_vectors;
3088 struct i40e_pf *pf = vsi->back;
3089 int base = vsi->base_vector;
3094 for (vector = 0; vector < q_vectors; vector++) {
3095 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3097 if (q_vector->tx.ring && q_vector->rx.ring) {
3098 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3099 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3101 } else if (q_vector->rx.ring) {
3102 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3103 "%s-%s-%d", basename, "rx", rx_int_idx++);
3104 } else if (q_vector->tx.ring) {
3105 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3106 "%s-%s-%d", basename, "tx", tx_int_idx++);
3108 /* skip this unused q_vector */
3111 err = request_irq(pf->msix_entries[base + vector].vector,
3117 dev_info(&pf->pdev->dev,
3118 "%s: request_irq failed, error: %d\n",
3120 goto free_queue_irqs;
3122 /* assign the mask for this irq */
3123 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3124 &q_vector->affinity_mask);
3127 vsi->irqs_ready = true;
3133 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3135 free_irq(pf->msix_entries[base + vector].vector,
3136 &(vsi->q_vectors[vector]));
3142 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3143 * @vsi: the VSI being un-configured
3145 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3147 struct i40e_pf *pf = vsi->back;
3148 struct i40e_hw *hw = &pf->hw;
3149 int base = vsi->base_vector;
3152 for (i = 0; i < vsi->num_queue_pairs; i++) {
3153 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3154 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3157 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3158 for (i = vsi->base_vector;
3159 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3160 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3163 for (i = 0; i < vsi->num_q_vectors; i++)
3164 synchronize_irq(pf->msix_entries[i + base].vector);
3166 /* Legacy and MSI mode - this stops all interrupt handling */
3167 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3168 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3170 synchronize_irq(pf->pdev->irq);
3175 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3176 * @vsi: the VSI being configured
3178 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3180 struct i40e_pf *pf = vsi->back;
3183 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3184 for (i = vsi->base_vector;
3185 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3186 i40e_irq_dynamic_enable(vsi, i);
3188 i40e_irq_dynamic_enable_icr0(pf);
3191 i40e_flush(&pf->hw);
3196 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3197 * @pf: board private structure
3199 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3202 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3203 i40e_flush(&pf->hw);
3207 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3208 * @irq: interrupt number
3209 * @data: pointer to a q_vector
3211 * This is the handler used for all MSI/Legacy interrupts, and deals
3212 * with both queue and non-queue interrupts. This is also used in
3213 * MSIX mode to handle the non-queue interrupts.
3215 static irqreturn_t i40e_intr(int irq, void *data)
3217 struct i40e_pf *pf = (struct i40e_pf *)data;
3218 struct i40e_hw *hw = &pf->hw;
3219 irqreturn_t ret = IRQ_NONE;
3220 u32 icr0, icr0_remaining;
3223 icr0 = rd32(hw, I40E_PFINT_ICR0);
3224 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3226 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3227 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3230 /* if interrupt but no bits showing, must be SWINT */
3231 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3232 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3235 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3236 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3237 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3238 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3239 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3242 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3243 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3245 /* temporarily disable queue cause for NAPI processing */
3246 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3247 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3248 wr32(hw, I40E_QINT_RQCTL(0), qval);
3250 qval = rd32(hw, I40E_QINT_TQCTL(0));
3251 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3252 wr32(hw, I40E_QINT_TQCTL(0), qval);
3254 if (!test_bit(__I40E_DOWN, &pf->state))
3255 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3258 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3259 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3260 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3263 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3264 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3265 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3268 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3269 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3270 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3273 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3274 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3275 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3276 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3277 val = rd32(hw, I40E_GLGEN_RSTAT);
3278 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3279 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3280 if (val == I40E_RESET_CORER) {
3282 } else if (val == I40E_RESET_GLOBR) {
3284 } else if (val == I40E_RESET_EMPR) {
3286 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3290 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3291 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3292 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3293 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3294 rd32(hw, I40E_PFHMC_ERRORINFO),
3295 rd32(hw, I40E_PFHMC_ERRORDATA));
3298 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3299 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3301 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3302 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3303 i40e_ptp_tx_hwtstamp(pf);
3307 /* If a critical error is pending we have no choice but to reset the
3309 * Report and mask out any remaining unexpected interrupts.
3311 icr0_remaining = icr0 & ena_mask;
3312 if (icr0_remaining) {
3313 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3315 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3316 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3317 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3318 dev_info(&pf->pdev->dev, "device will be reset\n");
3319 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3320 i40e_service_event_schedule(pf);
3322 ena_mask &= ~icr0_remaining;
3327 /* re-enable interrupt causes */
3328 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3329 if (!test_bit(__I40E_DOWN, &pf->state)) {
3330 i40e_service_event_schedule(pf);
3331 i40e_irq_dynamic_enable_icr0(pf);
3338 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3339 * @tx_ring: tx ring to clean
3340 * @budget: how many cleans we're allowed
3342 * Returns true if there's any budget left (e.g. the clean is finished)
3344 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3346 struct i40e_vsi *vsi = tx_ring->vsi;
3347 u16 i = tx_ring->next_to_clean;
3348 struct i40e_tx_buffer *tx_buf;
3349 struct i40e_tx_desc *tx_desc;
3351 tx_buf = &tx_ring->tx_bi[i];
3352 tx_desc = I40E_TX_DESC(tx_ring, i);
3353 i -= tx_ring->count;
3356 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3358 /* if next_to_watch is not set then there is no work pending */
3362 /* prevent any other reads prior to eop_desc */
3363 read_barrier_depends();
3365 /* if the descriptor isn't done, no work yet to do */
3366 if (!(eop_desc->cmd_type_offset_bsz &
3367 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3370 /* clear next_to_watch to prevent false hangs */
3371 tx_buf->next_to_watch = NULL;
3373 tx_desc->buffer_addr = 0;
3374 tx_desc->cmd_type_offset_bsz = 0;
3375 /* move past filter desc */
3380 i -= tx_ring->count;
3381 tx_buf = tx_ring->tx_bi;
3382 tx_desc = I40E_TX_DESC(tx_ring, 0);
3384 /* unmap skb header data */
3385 dma_unmap_single(tx_ring->dev,
3386 dma_unmap_addr(tx_buf, dma),
3387 dma_unmap_len(tx_buf, len),
3389 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3390 kfree(tx_buf->raw_buf);
3392 tx_buf->raw_buf = NULL;
3393 tx_buf->tx_flags = 0;
3394 tx_buf->next_to_watch = NULL;
3395 dma_unmap_len_set(tx_buf, len, 0);
3396 tx_desc->buffer_addr = 0;
3397 tx_desc->cmd_type_offset_bsz = 0;
3399 /* move us past the eop_desc for start of next FD desc */
3404 i -= tx_ring->count;
3405 tx_buf = tx_ring->tx_bi;
3406 tx_desc = I40E_TX_DESC(tx_ring, 0);
3409 /* update budget accounting */
3411 } while (likely(budget));
3413 i += tx_ring->count;
3414 tx_ring->next_to_clean = i;
3416 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3417 i40e_irq_dynamic_enable(vsi,
3418 tx_ring->q_vector->v_idx + vsi->base_vector);
3424 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3425 * @irq: interrupt number
3426 * @data: pointer to a q_vector
3428 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3430 struct i40e_q_vector *q_vector = data;
3431 struct i40e_vsi *vsi;
3433 if (!q_vector->tx.ring)
3436 vsi = q_vector->tx.ring->vsi;
3437 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3443 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3444 * @vsi: the VSI being configured
3445 * @v_idx: vector index
3446 * @qp_idx: queue pair index
3448 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3450 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3451 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3452 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3454 tx_ring->q_vector = q_vector;
3455 tx_ring->next = q_vector->tx.ring;
3456 q_vector->tx.ring = tx_ring;
3457 q_vector->tx.count++;
3459 rx_ring->q_vector = q_vector;
3460 rx_ring->next = q_vector->rx.ring;
3461 q_vector->rx.ring = rx_ring;
3462 q_vector->rx.count++;
3466 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3467 * @vsi: the VSI being configured
3469 * This function maps descriptor rings to the queue-specific vectors
3470 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3471 * one vector per queue pair, but on a constrained vector budget, we
3472 * group the queue pairs as "efficiently" as possible.
3474 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3476 int qp_remaining = vsi->num_queue_pairs;
3477 int q_vectors = vsi->num_q_vectors;
3482 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3483 * group them so there are multiple queues per vector.
3484 * It is also important to go through all the vectors available to be
3485 * sure that if we don't use all the vectors, that the remaining vectors
3486 * are cleared. This is especially important when decreasing the
3487 * number of queues in use.
3489 for (; v_start < q_vectors; v_start++) {
3490 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3492 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3494 q_vector->num_ringpairs = num_ringpairs;
3496 q_vector->rx.count = 0;
3497 q_vector->tx.count = 0;
3498 q_vector->rx.ring = NULL;
3499 q_vector->tx.ring = NULL;
3501 while (num_ringpairs--) {
3502 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3510 * i40e_vsi_request_irq - Request IRQ from the OS
3511 * @vsi: the VSI being configured
3512 * @basename: name for the vector
3514 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3516 struct i40e_pf *pf = vsi->back;
3519 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3520 err = i40e_vsi_request_irq_msix(vsi, basename);
3521 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3522 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3525 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3529 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3534 #ifdef CONFIG_NET_POLL_CONTROLLER
3536 * i40e_netpoll - A Polling 'interrupt'handler
3537 * @netdev: network interface device structure
3539 * This is used by netconsole to send skbs without having to re-enable
3540 * interrupts. It's not called while the normal interrupt routine is executing.
3543 void i40e_netpoll(struct net_device *netdev)
3545 static void i40e_netpoll(struct net_device *netdev)
3548 struct i40e_netdev_priv *np = netdev_priv(netdev);
3549 struct i40e_vsi *vsi = np->vsi;
3550 struct i40e_pf *pf = vsi->back;
3553 /* if interface is down do nothing */
3554 if (test_bit(__I40E_DOWN, &vsi->state))
3557 pf->flags |= I40E_FLAG_IN_NETPOLL;
3558 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3559 for (i = 0; i < vsi->num_q_vectors; i++)
3560 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3562 i40e_intr(pf->pdev->irq, netdev);
3564 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3569 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3570 * @pf: the PF being configured
3571 * @pf_q: the PF queue
3572 * @enable: enable or disable state of the queue
3574 * This routine will wait for the given Tx queue of the PF to reach the
3575 * enabled or disabled state.
3576 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3577 * multiple retries; else will return 0 in case of success.
3579 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3584 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3585 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3586 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3589 usleep_range(10, 20);
3591 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3598 * i40e_vsi_control_tx - Start or stop a VSI's rings
3599 * @vsi: the VSI being configured
3600 * @enable: start or stop the rings
3602 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3604 struct i40e_pf *pf = vsi->back;
3605 struct i40e_hw *hw = &pf->hw;
3606 int i, j, pf_q, ret = 0;
3609 pf_q = vsi->base_queue;
3610 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3612 /* warn the TX unit of coming changes */
3613 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3615 usleep_range(10, 20);
3617 for (j = 0; j < 50; j++) {
3618 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3619 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3620 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3622 usleep_range(1000, 2000);
3624 /* Skip if the queue is already in the requested state */
3625 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3628 /* turn on/off the queue */
3630 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3631 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3633 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3636 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3637 /* No waiting for the Tx queue to disable */
3638 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3641 /* wait for the change to finish */
3642 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3644 dev_info(&pf->pdev->dev,
3645 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3646 __func__, vsi->seid, pf_q,
3647 (enable ? "en" : "dis"));
3652 if (hw->revision_id == 0)
3658 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3659 * @pf: the PF being configured
3660 * @pf_q: the PF queue
3661 * @enable: enable or disable state of the queue
3663 * This routine will wait for the given Rx queue of the PF to reach the
3664 * enabled or disabled state.
3665 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3666 * multiple retries; else will return 0 in case of success.
3668 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3673 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3674 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3675 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3678 usleep_range(10, 20);
3680 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3687 * i40e_vsi_control_rx - Start or stop a VSI's rings
3688 * @vsi: the VSI being configured
3689 * @enable: start or stop the rings
3691 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3693 struct i40e_pf *pf = vsi->back;
3694 struct i40e_hw *hw = &pf->hw;
3695 int i, j, pf_q, ret = 0;
3698 pf_q = vsi->base_queue;
3699 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3700 for (j = 0; j < 50; j++) {
3701 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3702 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3703 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3705 usleep_range(1000, 2000);
3708 /* Skip if the queue is already in the requested state */
3709 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3712 /* turn on/off the queue */
3714 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3716 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3717 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3719 /* wait for the change to finish */
3720 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3722 dev_info(&pf->pdev->dev,
3723 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3724 __func__, vsi->seid, pf_q,
3725 (enable ? "en" : "dis"));
3734 * i40e_vsi_control_rings - Start or stop a VSI's rings
3735 * @vsi: the VSI being configured
3736 * @enable: start or stop the rings
3738 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3742 /* do rx first for enable and last for disable */
3744 ret = i40e_vsi_control_rx(vsi, request);
3747 ret = i40e_vsi_control_tx(vsi, request);
3749 /* Ignore return value, we need to shutdown whatever we can */
3750 i40e_vsi_control_tx(vsi, request);
3751 i40e_vsi_control_rx(vsi, request);
3758 * i40e_vsi_free_irq - Free the irq association with the OS
3759 * @vsi: the VSI being configured
3761 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3763 struct i40e_pf *pf = vsi->back;
3764 struct i40e_hw *hw = &pf->hw;
3765 int base = vsi->base_vector;
3769 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3770 if (!vsi->q_vectors)
3773 if (!vsi->irqs_ready)
3776 vsi->irqs_ready = false;
3777 for (i = 0; i < vsi->num_q_vectors; i++) {
3778 u16 vector = i + base;
3780 /* free only the irqs that were actually requested */
3781 if (!vsi->q_vectors[i] ||
3782 !vsi->q_vectors[i]->num_ringpairs)
3785 /* clear the affinity_mask in the IRQ descriptor */
3786 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3788 free_irq(pf->msix_entries[vector].vector,
3791 /* Tear down the interrupt queue link list
3793 * We know that they come in pairs and always
3794 * the Rx first, then the Tx. To clear the
3795 * link list, stick the EOL value into the
3796 * next_q field of the registers.
3798 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3799 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3800 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3801 val |= I40E_QUEUE_END_OF_LIST
3802 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3803 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3805 while (qp != I40E_QUEUE_END_OF_LIST) {
3808 val = rd32(hw, I40E_QINT_RQCTL(qp));
3810 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3811 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3812 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3813 I40E_QINT_RQCTL_INTEVENT_MASK);
3815 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3816 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3818 wr32(hw, I40E_QINT_RQCTL(qp), val);
3820 val = rd32(hw, I40E_QINT_TQCTL(qp));
3822 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3823 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3825 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3826 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3827 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3828 I40E_QINT_TQCTL_INTEVENT_MASK);
3830 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3831 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3833 wr32(hw, I40E_QINT_TQCTL(qp), val);
3838 free_irq(pf->pdev->irq, pf);
3840 val = rd32(hw, I40E_PFINT_LNKLST0);
3841 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3842 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3843 val |= I40E_QUEUE_END_OF_LIST
3844 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3845 wr32(hw, I40E_PFINT_LNKLST0, val);
3847 val = rd32(hw, I40E_QINT_RQCTL(qp));
3848 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3849 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3850 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3851 I40E_QINT_RQCTL_INTEVENT_MASK);
3853 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3854 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3856 wr32(hw, I40E_QINT_RQCTL(qp), val);
3858 val = rd32(hw, I40E_QINT_TQCTL(qp));
3860 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3861 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3862 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3863 I40E_QINT_TQCTL_INTEVENT_MASK);
3865 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3866 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3868 wr32(hw, I40E_QINT_TQCTL(qp), val);
3873 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3874 * @vsi: the VSI being configured
3875 * @v_idx: Index of vector to be freed
3877 * This function frees the memory allocated to the q_vector. In addition if
3878 * NAPI is enabled it will delete any references to the NAPI struct prior
3879 * to freeing the q_vector.
3881 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3883 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3884 struct i40e_ring *ring;
3889 /* disassociate q_vector from rings */
3890 i40e_for_each_ring(ring, q_vector->tx)
3891 ring->q_vector = NULL;
3893 i40e_for_each_ring(ring, q_vector->rx)
3894 ring->q_vector = NULL;
3896 /* only VSI w/ an associated netdev is set up w/ NAPI */
3898 netif_napi_del(&q_vector->napi);
3900 vsi->q_vectors[v_idx] = NULL;
3902 kfree_rcu(q_vector, rcu);
3906 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3907 * @vsi: the VSI being un-configured
3909 * This frees the memory allocated to the q_vectors and
3910 * deletes references to the NAPI struct.
3912 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3916 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3917 i40e_free_q_vector(vsi, v_idx);
3921 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3922 * @pf: board private structure
3924 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3926 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3927 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3928 pci_disable_msix(pf->pdev);
3929 kfree(pf->msix_entries);
3930 pf->msix_entries = NULL;
3931 kfree(pf->irq_pile);
3932 pf->irq_pile = NULL;
3933 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3934 pci_disable_msi(pf->pdev);
3936 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3940 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3941 * @pf: board private structure
3943 * We go through and clear interrupt specific resources and reset the structure
3944 * to pre-load conditions
3946 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3950 i40e_stop_misc_vector(pf);
3951 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3952 synchronize_irq(pf->msix_entries[0].vector);
3953 free_irq(pf->msix_entries[0].vector, pf);
3956 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3957 for (i = 0; i < pf->num_alloc_vsi; i++)
3959 i40e_vsi_free_q_vectors(pf->vsi[i]);
3960 i40e_reset_interrupt_capability(pf);
3964 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3965 * @vsi: the VSI being configured
3967 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3974 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3975 napi_enable(&vsi->q_vectors[q_idx]->napi);
3979 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3980 * @vsi: the VSI being configured
3982 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3989 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3990 napi_disable(&vsi->q_vectors[q_idx]->napi);
3994 * i40e_vsi_close - Shut down a VSI
3995 * @vsi: the vsi to be quelled
3997 static void i40e_vsi_close(struct i40e_vsi *vsi)
3999 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4001 i40e_vsi_free_irq(vsi);
4002 i40e_vsi_free_tx_resources(vsi);
4003 i40e_vsi_free_rx_resources(vsi);
4007 * i40e_quiesce_vsi - Pause a given VSI
4008 * @vsi: the VSI being paused
4010 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4012 if (test_bit(__I40E_DOWN, &vsi->state))
4015 /* No need to disable FCoE VSI when Tx suspended */
4016 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4017 vsi->type == I40E_VSI_FCOE) {
4018 dev_dbg(&vsi->back->pdev->dev,
4019 "%s: VSI seid %d skipping FCoE VSI disable\n",
4020 __func__, vsi->seid);
4024 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4025 if (vsi->netdev && netif_running(vsi->netdev)) {
4026 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4028 i40e_vsi_close(vsi);
4033 * i40e_unquiesce_vsi - Resume a given VSI
4034 * @vsi: the VSI being resumed
4036 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4038 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4041 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4042 if (vsi->netdev && netif_running(vsi->netdev))
4043 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4045 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4049 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4052 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4056 for (v = 0; v < pf->num_alloc_vsi; v++) {
4058 i40e_quiesce_vsi(pf->vsi[v]);
4063 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4066 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4070 for (v = 0; v < pf->num_alloc_vsi; v++) {
4072 i40e_unquiesce_vsi(pf->vsi[v]);
4076 #ifdef CONFIG_I40E_DCB
4078 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4079 * @vsi: the VSI being configured
4081 * This function waits for the given VSI's Tx queues to be disabled.
4083 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4085 struct i40e_pf *pf = vsi->back;
4088 pf_q = vsi->base_queue;
4089 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4090 /* Check and wait for the disable status of the queue */
4091 ret = i40e_pf_txq_wait(pf, pf_q, false);
4093 dev_info(&pf->pdev->dev,
4094 "%s: VSI seid %d Tx ring %d disable timeout\n",
4095 __func__, vsi->seid, pf_q);
4104 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4107 * This function waits for the Tx queues to be in disabled state for all the
4108 * VSIs that are managed by this PF.
4110 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4114 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4115 /* No need to wait for FCoE VSI queues */
4116 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4117 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4128 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4129 * @pf: pointer to PF
4131 * Get TC map for ISCSI PF type that will include iSCSI TC
4134 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4136 struct i40e_dcb_app_priority_table app;
4137 struct i40e_hw *hw = &pf->hw;
4138 u8 enabled_tc = 1; /* TC0 is always enabled */
4140 /* Get the iSCSI APP TLV */
4141 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4143 for (i = 0; i < dcbcfg->numapps; i++) {
4144 app = dcbcfg->app[i];
4145 if (app.selector == I40E_APP_SEL_TCPIP &&
4146 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4147 tc = dcbcfg->etscfg.prioritytable[app.priority];
4148 enabled_tc |= BIT_ULL(tc);
4157 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4158 * @dcbcfg: the corresponding DCBx configuration structure
4160 * Return the number of TCs from given DCBx configuration
4162 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4167 /* Scan the ETS Config Priority Table to find
4168 * traffic class enabled for a given priority
4169 * and use the traffic class index to get the
4170 * number of traffic classes enabled
4172 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4173 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4174 num_tc = dcbcfg->etscfg.prioritytable[i];
4177 /* Traffic class index starts from zero so
4178 * increment to return the actual count
4184 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4185 * @dcbcfg: the corresponding DCBx configuration structure
4187 * Query the current DCB configuration and return the number of
4188 * traffic classes enabled from the given DCBX config
4190 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4192 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4196 for (i = 0; i < num_tc; i++)
4197 enabled_tc |= BIT(i);
4203 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4204 * @pf: PF being queried
4206 * Return number of traffic classes enabled for the given PF
4208 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4210 struct i40e_hw *hw = &pf->hw;
4213 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4215 /* If DCB is not enabled then always in single TC */
4216 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4219 /* SFP mode will be enabled for all TCs on port */
4220 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4221 return i40e_dcb_get_num_tc(dcbcfg);
4223 /* MFP mode return count of enabled TCs for this PF */
4224 if (pf->hw.func_caps.iscsi)
4225 enabled_tc = i40e_get_iscsi_tc_map(pf);
4227 return 1; /* Only TC0 */
4229 /* At least have TC0 */
4230 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4231 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4232 if (enabled_tc & BIT_ULL(i))
4239 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4240 * @pf: PF being queried
4242 * Return a bitmap for first enabled traffic class for this PF.
4244 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4246 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4250 return 0x1; /* TC0 */
4252 /* Find the first enabled TC */
4253 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4254 if (enabled_tc & BIT_ULL(i))
4262 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4263 * @pf: PF being queried
4265 * Return a bitmap for enabled traffic classes for this PF.
4267 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4269 /* If DCB is not enabled for this PF then just return default TC */
4270 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4271 return i40e_pf_get_default_tc(pf);
4273 /* SFP mode we want PF to be enabled for all TCs */
4274 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4275 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4277 /* MFP enabled and iSCSI PF type */
4278 if (pf->hw.func_caps.iscsi)
4279 return i40e_get_iscsi_tc_map(pf);
4281 return i40e_pf_get_default_tc(pf);
4285 * i40e_vsi_get_bw_info - Query VSI BW Information
4286 * @vsi: the VSI being queried
4288 * Returns 0 on success, negative value on failure
4290 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4292 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4293 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4294 struct i40e_pf *pf = vsi->back;
4295 struct i40e_hw *hw = &pf->hw;
4300 /* Get the VSI level BW configuration */
4301 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4303 dev_info(&pf->pdev->dev,
4304 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4305 i40e_stat_str(&pf->hw, ret),
4306 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4310 /* Get the VSI level BW configuration per TC */
4311 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4314 dev_info(&pf->pdev->dev,
4315 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4316 i40e_stat_str(&pf->hw, ret),
4317 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4321 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4322 dev_info(&pf->pdev->dev,
4323 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4324 bw_config.tc_valid_bits,
4325 bw_ets_config.tc_valid_bits);
4326 /* Still continuing */
4329 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4330 vsi->bw_max_quanta = bw_config.max_bw;
4331 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4332 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4333 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4334 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4335 vsi->bw_ets_limit_credits[i] =
4336 le16_to_cpu(bw_ets_config.credits[i]);
4337 /* 3 bits out of 4 for each TC */
4338 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4345 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4346 * @vsi: the VSI being configured
4347 * @enabled_tc: TC bitmap
4348 * @bw_credits: BW shared credits per TC
4350 * Returns 0 on success, negative value on failure
4352 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4355 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4359 bw_data.tc_valid_bits = enabled_tc;
4360 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4361 bw_data.tc_bw_credits[i] = bw_share[i];
4363 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4366 dev_info(&vsi->back->pdev->dev,
4367 "AQ command Config VSI BW allocation per TC failed = %d\n",
4368 vsi->back->hw.aq.asq_last_status);
4372 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4373 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4379 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4380 * @vsi: the VSI being configured
4381 * @enabled_tc: TC map to be enabled
4384 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4386 struct net_device *netdev = vsi->netdev;
4387 struct i40e_pf *pf = vsi->back;
4388 struct i40e_hw *hw = &pf->hw;
4391 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4397 netdev_reset_tc(netdev);
4401 /* Set up actual enabled TCs on the VSI */
4402 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4405 /* set per TC queues for the VSI */
4406 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4407 /* Only set TC queues for enabled tcs
4409 * e.g. For a VSI that has TC0 and TC3 enabled the
4410 * enabled_tc bitmap would be 0x00001001; the driver
4411 * will set the numtc for netdev as 2 that will be
4412 * referenced by the netdev layer as TC 0 and 1.
4414 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4415 netdev_set_tc_queue(netdev,
4416 vsi->tc_config.tc_info[i].netdev_tc,
4417 vsi->tc_config.tc_info[i].qcount,
4418 vsi->tc_config.tc_info[i].qoffset);
4421 /* Assign UP2TC map for the VSI */
4422 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4423 /* Get the actual TC# for the UP */
4424 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4425 /* Get the mapped netdev TC# for the UP */
4426 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4427 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4432 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4433 * @vsi: the VSI being configured
4434 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4436 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4437 struct i40e_vsi_context *ctxt)
4439 /* copy just the sections touched not the entire info
4440 * since not all sections are valid as returned by
4443 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4444 memcpy(&vsi->info.queue_mapping,
4445 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4446 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4447 sizeof(vsi->info.tc_mapping));
4451 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4452 * @vsi: VSI to be configured
4453 * @enabled_tc: TC bitmap
4455 * This configures a particular VSI for TCs that are mapped to the
4456 * given TC bitmap. It uses default bandwidth share for TCs across
4457 * VSIs to configure TC for a particular VSI.
4460 * It is expected that the VSI queues have been quisced before calling
4463 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4465 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4466 struct i40e_vsi_context ctxt;
4470 /* Check if enabled_tc is same as existing or new TCs */
4471 if (vsi->tc_config.enabled_tc == enabled_tc)
4474 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4475 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4476 if (enabled_tc & BIT_ULL(i))
4480 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4482 dev_info(&vsi->back->pdev->dev,
4483 "Failed configuring TC map %d for VSI %d\n",
4484 enabled_tc, vsi->seid);
4488 /* Update Queue Pairs Mapping for currently enabled UPs */
4489 ctxt.seid = vsi->seid;
4490 ctxt.pf_num = vsi->back->hw.pf_id;
4492 ctxt.uplink_seid = vsi->uplink_seid;
4493 ctxt.info = vsi->info;
4494 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4496 /* Update the VSI after updating the VSI queue-mapping information */
4497 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4499 dev_info(&vsi->back->pdev->dev,
4500 "Update vsi tc config failed, err %s aq_err %s\n",
4501 i40e_stat_str(&vsi->back->hw, ret),
4502 i40e_aq_str(&vsi->back->hw,
4503 vsi->back->hw.aq.asq_last_status));
4506 /* update the local VSI info with updated queue map */
4507 i40e_vsi_update_queue_map(vsi, &ctxt);
4508 vsi->info.valid_sections = 0;
4510 /* Update current VSI BW information */
4511 ret = i40e_vsi_get_bw_info(vsi);
4513 dev_info(&vsi->back->pdev->dev,
4514 "Failed updating vsi bw info, err %s aq_err %s\n",
4515 i40e_stat_str(&vsi->back->hw, ret),
4516 i40e_aq_str(&vsi->back->hw,
4517 vsi->back->hw.aq.asq_last_status));
4521 /* Update the netdev TC setup */
4522 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4528 * i40e_veb_config_tc - Configure TCs for given VEB
4530 * @enabled_tc: TC bitmap
4532 * Configures given TC bitmap for VEB (switching) element
4534 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4536 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4537 struct i40e_pf *pf = veb->pf;
4541 /* No TCs or already enabled TCs just return */
4542 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4545 bw_data.tc_valid_bits = enabled_tc;
4546 /* bw_data.absolute_credits is not set (relative) */
4548 /* Enable ETS TCs with equal BW Share for now */
4549 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4550 if (enabled_tc & BIT_ULL(i))
4551 bw_data.tc_bw_share_credits[i] = 1;
4554 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4557 dev_info(&pf->pdev->dev,
4558 "VEB bw config failed, err %s aq_err %s\n",
4559 i40e_stat_str(&pf->hw, ret),
4560 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4564 /* Update the BW information */
4565 ret = i40e_veb_get_bw_info(veb);
4567 dev_info(&pf->pdev->dev,
4568 "Failed getting veb bw config, err %s aq_err %s\n",
4569 i40e_stat_str(&pf->hw, ret),
4570 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4577 #ifdef CONFIG_I40E_DCB
4579 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4582 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4583 * the caller would've quiesce all the VSIs before calling
4586 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4592 /* Enable the TCs available on PF to all VEBs */
4593 tc_map = i40e_pf_get_tc_map(pf);
4594 for (v = 0; v < I40E_MAX_VEB; v++) {
4597 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4599 dev_info(&pf->pdev->dev,
4600 "Failed configuring TC for VEB seid=%d\n",
4602 /* Will try to configure as many components */
4606 /* Update each VSI */
4607 for (v = 0; v < pf->num_alloc_vsi; v++) {
4611 /* - Enable all TCs for the LAN VSI
4613 * - For FCoE VSI only enable the TC configured
4614 * as per the APP TLV
4616 * - For all others keep them at TC0 for now
4618 if (v == pf->lan_vsi)
4619 tc_map = i40e_pf_get_tc_map(pf);
4621 tc_map = i40e_pf_get_default_tc(pf);
4623 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4624 tc_map = i40e_get_fcoe_tc_map(pf);
4625 #endif /* #ifdef I40E_FCOE */
4627 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4629 dev_info(&pf->pdev->dev,
4630 "Failed configuring TC for VSI seid=%d\n",
4632 /* Will try to configure as many components */
4634 /* Re-configure VSI vectors based on updated TC map */
4635 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4636 if (pf->vsi[v]->netdev)
4637 i40e_dcbnl_set_all(pf->vsi[v]);
4643 * i40e_resume_port_tx - Resume port Tx
4646 * Resume a port's Tx and issue a PF reset in case of failure to
4649 static int i40e_resume_port_tx(struct i40e_pf *pf)
4651 struct i40e_hw *hw = &pf->hw;
4654 ret = i40e_aq_resume_port_tx(hw, NULL);
4656 dev_info(&pf->pdev->dev,
4657 "Resume Port Tx failed, err %s aq_err %s\n",
4658 i40e_stat_str(&pf->hw, ret),
4659 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4660 /* Schedule PF reset to recover */
4661 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4662 i40e_service_event_schedule(pf);
4669 * i40e_init_pf_dcb - Initialize DCB configuration
4670 * @pf: PF being configured
4672 * Query the current DCB configuration and cache it
4673 * in the hardware structure
4675 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4677 struct i40e_hw *hw = &pf->hw;
4680 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4681 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4682 (pf->hw.aq.fw_maj_ver < 4))
4685 /* Get the initial DCB configuration */
4686 err = i40e_init_dcb(hw);
4688 /* Device/Function is not DCBX capable */
4689 if ((!hw->func_caps.dcb) ||
4690 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4691 dev_info(&pf->pdev->dev,
4692 "DCBX offload is not supported or is disabled for this PF.\n");
4694 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4698 /* When status is not DISABLED then DCBX in FW */
4699 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4700 DCB_CAP_DCBX_VER_IEEE;
4702 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4703 /* Enable DCB tagging only when more than one TC */
4704 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4705 pf->flags |= I40E_FLAG_DCB_ENABLED;
4706 dev_dbg(&pf->pdev->dev,
4707 "DCBX offload is supported for this PF.\n");
4710 dev_info(&pf->pdev->dev,
4711 "Query for DCB configuration failed, err %s aq_err %s\n",
4712 i40e_stat_str(&pf->hw, err),
4713 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4719 #endif /* CONFIG_I40E_DCB */
4720 #define SPEED_SIZE 14
4723 * i40e_print_link_message - print link up or down
4724 * @vsi: the VSI for which link needs a message
4726 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4728 char speed[SPEED_SIZE] = "Unknown";
4729 char fc[FC_SIZE] = "RX/TX";
4732 netdev_info(vsi->netdev, "NIC Link is Down\n");
4736 /* Warn user if link speed on NPAR enabled partition is not at
4739 if (vsi->back->hw.func_caps.npar_enable &&
4740 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4741 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4742 netdev_warn(vsi->netdev,
4743 "The partition detected link speed that is less than 10Gbps\n");
4745 switch (vsi->back->hw.phy.link_info.link_speed) {
4746 case I40E_LINK_SPEED_40GB:
4747 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4749 case I40E_LINK_SPEED_20GB:
4750 strncpy(speed, "20 Gbps", SPEED_SIZE);
4752 case I40E_LINK_SPEED_10GB:
4753 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4755 case I40E_LINK_SPEED_1GB:
4756 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4758 case I40E_LINK_SPEED_100MB:
4759 strncpy(speed, "100 Mbps", SPEED_SIZE);
4765 switch (vsi->back->hw.fc.current_mode) {
4767 strlcpy(fc, "RX/TX", FC_SIZE);
4769 case I40E_FC_TX_PAUSE:
4770 strlcpy(fc, "TX", FC_SIZE);
4772 case I40E_FC_RX_PAUSE:
4773 strlcpy(fc, "RX", FC_SIZE);
4776 strlcpy(fc, "None", FC_SIZE);
4780 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4785 * i40e_up_complete - Finish the last steps of bringing up a connection
4786 * @vsi: the VSI being configured
4788 static int i40e_up_complete(struct i40e_vsi *vsi)
4790 struct i40e_pf *pf = vsi->back;
4793 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4794 i40e_vsi_configure_msix(vsi);
4796 i40e_configure_msi_and_legacy(vsi);
4799 err = i40e_vsi_control_rings(vsi, true);
4803 clear_bit(__I40E_DOWN, &vsi->state);
4804 i40e_napi_enable_all(vsi);
4805 i40e_vsi_enable_irq(vsi);
4807 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4809 i40e_print_link_message(vsi, true);
4810 netif_tx_start_all_queues(vsi->netdev);
4811 netif_carrier_on(vsi->netdev);
4812 } else if (vsi->netdev) {
4813 i40e_print_link_message(vsi, false);
4814 /* need to check for qualified module here*/
4815 if ((pf->hw.phy.link_info.link_info &
4816 I40E_AQ_MEDIA_AVAILABLE) &&
4817 (!(pf->hw.phy.link_info.an_info &
4818 I40E_AQ_QUALIFIED_MODULE)))
4819 netdev_err(vsi->netdev,
4820 "the driver failed to link because an unqualified module was detected.");
4823 /* replay FDIR SB filters */
4824 if (vsi->type == I40E_VSI_FDIR) {
4825 /* reset fd counters */
4826 pf->fd_add_err = pf->fd_atr_cnt = 0;
4827 if (pf->fd_tcp_rule > 0) {
4828 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4829 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4830 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4831 pf->fd_tcp_rule = 0;
4833 i40e_fdir_filter_restore(vsi);
4835 i40e_service_event_schedule(pf);
4841 * i40e_vsi_reinit_locked - Reset the VSI
4842 * @vsi: the VSI being configured
4844 * Rebuild the ring structs after some configuration
4845 * has changed, e.g. MTU size.
4847 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4849 struct i40e_pf *pf = vsi->back;
4851 WARN_ON(in_interrupt());
4852 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4853 usleep_range(1000, 2000);
4856 /* Give a VF some time to respond to the reset. The
4857 * two second wait is based upon the watchdog cycle in
4860 if (vsi->type == I40E_VSI_SRIOV)
4863 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4867 * i40e_up - Bring the connection back up after being down
4868 * @vsi: the VSI being configured
4870 int i40e_up(struct i40e_vsi *vsi)
4874 err = i40e_vsi_configure(vsi);
4876 err = i40e_up_complete(vsi);
4882 * i40e_down - Shutdown the connection processing
4883 * @vsi: the VSI being stopped
4885 void i40e_down(struct i40e_vsi *vsi)
4889 /* It is assumed that the caller of this function
4890 * sets the vsi->state __I40E_DOWN bit.
4893 netif_carrier_off(vsi->netdev);
4894 netif_tx_disable(vsi->netdev);
4896 i40e_vsi_disable_irq(vsi);
4897 i40e_vsi_control_rings(vsi, false);
4898 i40e_napi_disable_all(vsi);
4900 for (i = 0; i < vsi->num_queue_pairs; i++) {
4901 i40e_clean_tx_ring(vsi->tx_rings[i]);
4902 i40e_clean_rx_ring(vsi->rx_rings[i]);
4907 * i40e_setup_tc - configure multiple traffic classes
4908 * @netdev: net device to configure
4909 * @tc: number of traffic classes to enable
4912 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4914 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4917 struct i40e_netdev_priv *np = netdev_priv(netdev);
4918 struct i40e_vsi *vsi = np->vsi;
4919 struct i40e_pf *pf = vsi->back;
4924 /* Check if DCB enabled to continue */
4925 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4926 netdev_info(netdev, "DCB is not enabled for adapter\n");
4930 /* Check if MFP enabled */
4931 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4932 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4936 /* Check whether tc count is within enabled limit */
4937 if (tc > i40e_pf_get_num_tc(pf)) {
4938 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4942 /* Generate TC map for number of tc requested */
4943 for (i = 0; i < tc; i++)
4944 enabled_tc |= BIT_ULL(i);
4946 /* Requesting same TC configuration as already enabled */
4947 if (enabled_tc == vsi->tc_config.enabled_tc)
4950 /* Quiesce VSI queues */
4951 i40e_quiesce_vsi(vsi);
4953 /* Configure VSI for enabled TCs */
4954 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4956 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4962 i40e_unquiesce_vsi(vsi);
4969 * i40e_open - Called when a network interface is made active
4970 * @netdev: network interface device structure
4972 * The open entry point is called when a network interface is made
4973 * active by the system (IFF_UP). At this point all resources needed
4974 * for transmit and receive operations are allocated, the interrupt
4975 * handler is registered with the OS, the netdev watchdog subtask is
4976 * enabled, and the stack is notified that the interface is ready.
4978 * Returns 0 on success, negative value on failure
4980 int i40e_open(struct net_device *netdev)
4982 struct i40e_netdev_priv *np = netdev_priv(netdev);
4983 struct i40e_vsi *vsi = np->vsi;
4984 struct i40e_pf *pf = vsi->back;
4987 /* disallow open during test or if eeprom is broken */
4988 if (test_bit(__I40E_TESTING, &pf->state) ||
4989 test_bit(__I40E_BAD_EEPROM, &pf->state))
4992 netif_carrier_off(netdev);
4994 err = i40e_vsi_open(vsi);
4998 /* configure global TSO hardware offload settings */
4999 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5000 TCP_FLAG_FIN) >> 16);
5001 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5003 TCP_FLAG_CWR) >> 16);
5004 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5006 #ifdef CONFIG_I40E_VXLAN
5007 vxlan_get_rx_port(netdev);
5015 * @vsi: the VSI to open
5017 * Finish initialization of the VSI.
5019 * Returns 0 on success, negative value on failure
5021 int i40e_vsi_open(struct i40e_vsi *vsi)
5023 struct i40e_pf *pf = vsi->back;
5024 char int_name[I40E_INT_NAME_STR_LEN];
5027 /* allocate descriptors */
5028 err = i40e_vsi_setup_tx_resources(vsi);
5031 err = i40e_vsi_setup_rx_resources(vsi);
5035 err = i40e_vsi_configure(vsi);
5040 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5041 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5042 err = i40e_vsi_request_irq(vsi, int_name);
5046 /* Notify the stack of the actual queue counts. */
5047 err = netif_set_real_num_tx_queues(vsi->netdev,
5048 vsi->num_queue_pairs);
5050 goto err_set_queues;
5052 err = netif_set_real_num_rx_queues(vsi->netdev,
5053 vsi->num_queue_pairs);
5055 goto err_set_queues;
5057 } else if (vsi->type == I40E_VSI_FDIR) {
5058 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5059 dev_driver_string(&pf->pdev->dev),
5060 dev_name(&pf->pdev->dev));
5061 err = i40e_vsi_request_irq(vsi, int_name);
5068 err = i40e_up_complete(vsi);
5070 goto err_up_complete;
5077 i40e_vsi_free_irq(vsi);
5079 i40e_vsi_free_rx_resources(vsi);
5081 i40e_vsi_free_tx_resources(vsi);
5082 if (vsi == pf->vsi[pf->lan_vsi])
5083 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5089 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5090 * @pf: Pointer to PF
5092 * This function destroys the hlist where all the Flow Director
5093 * filters were saved.
5095 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5097 struct i40e_fdir_filter *filter;
5098 struct hlist_node *node2;
5100 hlist_for_each_entry_safe(filter, node2,
5101 &pf->fdir_filter_list, fdir_node) {
5102 hlist_del(&filter->fdir_node);
5105 pf->fdir_pf_active_filters = 0;
5109 * i40e_close - Disables a network interface
5110 * @netdev: network interface device structure
5112 * The close entry point is called when an interface is de-activated
5113 * by the OS. The hardware is still under the driver's control, but
5114 * this netdev interface is disabled.
5116 * Returns 0, this is not allowed to fail
5119 int i40e_close(struct net_device *netdev)
5121 static int i40e_close(struct net_device *netdev)
5124 struct i40e_netdev_priv *np = netdev_priv(netdev);
5125 struct i40e_vsi *vsi = np->vsi;
5127 i40e_vsi_close(vsi);
5133 * i40e_do_reset - Start a PF or Core Reset sequence
5134 * @pf: board private structure
5135 * @reset_flags: which reset is requested
5137 * The essential difference in resets is that the PF Reset
5138 * doesn't clear the packet buffers, doesn't reset the PE
5139 * firmware, and doesn't bother the other PFs on the chip.
5141 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5145 WARN_ON(in_interrupt());
5147 if (i40e_check_asq_alive(&pf->hw))
5148 i40e_vc_notify_reset(pf);
5150 /* do the biggest reset indicated */
5151 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5153 /* Request a Global Reset
5155 * This will start the chip's countdown to the actual full
5156 * chip reset event, and a warning interrupt to be sent
5157 * to all PFs, including the requestor. Our handler
5158 * for the warning interrupt will deal with the shutdown
5159 * and recovery of the switch setup.
5161 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5162 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5163 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5164 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5166 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5168 /* Request a Core Reset
5170 * Same as Global Reset, except does *not* include the MAC/PHY
5172 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5173 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5174 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5175 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5176 i40e_flush(&pf->hw);
5178 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5180 /* Request a PF Reset
5182 * Resets only the PF-specific registers
5184 * This goes directly to the tear-down and rebuild of
5185 * the switch, since we need to do all the recovery as
5186 * for the Core Reset.
5188 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5189 i40e_handle_reset_warning(pf);
5191 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5194 /* Find the VSI(s) that requested a re-init */
5195 dev_info(&pf->pdev->dev,
5196 "VSI reinit requested\n");
5197 for (v = 0; v < pf->num_alloc_vsi; v++) {
5198 struct i40e_vsi *vsi = pf->vsi[v];
5200 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5201 i40e_vsi_reinit_locked(pf->vsi[v]);
5202 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5206 /* no further action needed, so return now */
5208 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5211 /* Find the VSI(s) that needs to be brought down */
5212 dev_info(&pf->pdev->dev, "VSI down requested\n");
5213 for (v = 0; v < pf->num_alloc_vsi; v++) {
5214 struct i40e_vsi *vsi = pf->vsi[v];
5216 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5217 set_bit(__I40E_DOWN, &vsi->state);
5219 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5223 /* no further action needed, so return now */
5226 dev_info(&pf->pdev->dev,
5227 "bad reset request 0x%08x\n", reset_flags);
5232 #ifdef CONFIG_I40E_DCB
5234 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5235 * @pf: board private structure
5236 * @old_cfg: current DCB config
5237 * @new_cfg: new DCB config
5239 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5240 struct i40e_dcbx_config *old_cfg,
5241 struct i40e_dcbx_config *new_cfg)
5243 bool need_reconfig = false;
5245 /* Check if ETS configuration has changed */
5246 if (memcmp(&new_cfg->etscfg,
5248 sizeof(new_cfg->etscfg))) {
5249 /* If Priority Table has changed reconfig is needed */
5250 if (memcmp(&new_cfg->etscfg.prioritytable,
5251 &old_cfg->etscfg.prioritytable,
5252 sizeof(new_cfg->etscfg.prioritytable))) {
5253 need_reconfig = true;
5254 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5257 if (memcmp(&new_cfg->etscfg.tcbwtable,
5258 &old_cfg->etscfg.tcbwtable,
5259 sizeof(new_cfg->etscfg.tcbwtable)))
5260 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5262 if (memcmp(&new_cfg->etscfg.tsatable,
5263 &old_cfg->etscfg.tsatable,
5264 sizeof(new_cfg->etscfg.tsatable)))
5265 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5268 /* Check if PFC configuration has changed */
5269 if (memcmp(&new_cfg->pfc,
5271 sizeof(new_cfg->pfc))) {
5272 need_reconfig = true;
5273 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5276 /* Check if APP Table has changed */
5277 if (memcmp(&new_cfg->app,
5279 sizeof(new_cfg->app))) {
5280 need_reconfig = true;
5281 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5284 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5286 return need_reconfig;
5290 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5291 * @pf: board private structure
5292 * @e: event info posted on ARQ
5294 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5295 struct i40e_arq_event_info *e)
5297 struct i40e_aqc_lldp_get_mib *mib =
5298 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5299 struct i40e_hw *hw = &pf->hw;
5300 struct i40e_dcbx_config tmp_dcbx_cfg;
5301 bool need_reconfig = false;
5305 /* Not DCB capable or capability disabled */
5306 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5309 /* Ignore if event is not for Nearest Bridge */
5310 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5311 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5312 dev_dbg(&pf->pdev->dev,
5313 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5314 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5317 /* Check MIB Type and return if event for Remote MIB update */
5318 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5319 dev_dbg(&pf->pdev->dev,
5320 "%s: LLDP event mib type %s\n", __func__,
5321 type ? "remote" : "local");
5322 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5323 /* Update the remote cached instance and return */
5324 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5325 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5326 &hw->remote_dcbx_config);
5330 /* Store the old configuration */
5331 tmp_dcbx_cfg = hw->local_dcbx_config;
5333 /* Reset the old DCBx configuration data */
5334 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5335 /* Get updated DCBX data from firmware */
5336 ret = i40e_get_dcb_config(&pf->hw);
5338 dev_info(&pf->pdev->dev,
5339 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5340 i40e_stat_str(&pf->hw, ret),
5341 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5345 /* No change detected in DCBX configs */
5346 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5347 sizeof(tmp_dcbx_cfg))) {
5348 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5352 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5353 &hw->local_dcbx_config);
5355 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5360 /* Enable DCB tagging only when more than one TC */
5361 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5362 pf->flags |= I40E_FLAG_DCB_ENABLED;
5364 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5366 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5367 /* Reconfiguration needed quiesce all VSIs */
5368 i40e_pf_quiesce_all_vsi(pf);
5370 /* Changes in configuration update VEB/VSI */
5371 i40e_dcb_reconfigure(pf);
5373 ret = i40e_resume_port_tx(pf);
5375 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5376 /* In case of error no point in resuming VSIs */
5380 /* Wait for the PF's Tx queues to be disabled */
5381 ret = i40e_pf_wait_txq_disabled(pf);
5383 /* Schedule PF reset to recover */
5384 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5385 i40e_service_event_schedule(pf);
5387 i40e_pf_unquiesce_all_vsi(pf);
5393 #endif /* CONFIG_I40E_DCB */
5396 * i40e_do_reset_safe - Protected reset path for userland calls.
5397 * @pf: board private structure
5398 * @reset_flags: which reset is requested
5401 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5404 i40e_do_reset(pf, reset_flags);
5409 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5410 * @pf: board private structure
5411 * @e: event info posted on ARQ
5413 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5416 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5417 struct i40e_arq_event_info *e)
5419 struct i40e_aqc_lan_overflow *data =
5420 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5421 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5422 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5423 struct i40e_hw *hw = &pf->hw;
5427 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5430 /* Queue belongs to VF, find the VF and issue VF reset */
5431 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5432 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5433 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5434 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5435 vf_id -= hw->func_caps.vf_base_id;
5436 vf = &pf->vf[vf_id];
5437 i40e_vc_notify_vf_reset(vf);
5438 /* Allow VF to process pending reset notification */
5440 i40e_reset_vf(vf, false);
5445 * i40e_service_event_complete - Finish up the service event
5446 * @pf: board private structure
5448 static void i40e_service_event_complete(struct i40e_pf *pf)
5450 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5452 /* flush memory to make sure state is correct before next watchog */
5453 smp_mb__before_atomic();
5454 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5458 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5459 * @pf: board private structure
5461 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5465 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5466 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5471 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5472 * @pf: board private structure
5474 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5478 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5479 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5480 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5481 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5486 * i40e_get_global_fd_count - Get total FD filters programmed on device
5487 * @pf: board private structure
5489 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5493 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5494 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5495 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5496 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5501 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5502 * @pf: board private structure
5504 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5506 u32 fcnt_prog, fcnt_avail;
5508 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5511 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5514 fcnt_prog = i40e_get_global_fd_count(pf);
5515 fcnt_avail = pf->fdir_pf_filter_count;
5516 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5517 (pf->fd_add_err == 0) ||
5518 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5519 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5520 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5521 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5522 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5523 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5526 /* Wait for some more space to be available to turn on ATR */
5527 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5528 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5529 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5530 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5531 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5532 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5537 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5538 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5540 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5541 * @pf: board private structure
5543 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5545 unsigned long min_flush_time;
5546 int flush_wait_retry = 50;
5547 bool disable_atr = false;
5551 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5554 if (time_after(jiffies, pf->fd_flush_timestamp +
5555 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5556 /* If the flush is happening too quick and we have mostly
5557 * SB rules we should not re-enable ATR for some time.
5559 min_flush_time = pf->fd_flush_timestamp
5560 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5561 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5563 if (!(time_after(jiffies, min_flush_time)) &&
5564 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5565 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5566 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5570 pf->fd_flush_timestamp = jiffies;
5571 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5572 /* flush all filters */
5573 wr32(&pf->hw, I40E_PFQF_CTL_1,
5574 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5575 i40e_flush(&pf->hw);
5579 /* Check FD flush status every 5-6msec */
5580 usleep_range(5000, 6000);
5581 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5582 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5584 } while (flush_wait_retry--);
5585 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5586 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5588 /* replay sideband filters */
5589 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5591 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5592 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5593 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5594 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5600 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5601 * @pf: board private structure
5603 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5605 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5608 /* We can see up to 256 filter programming desc in transit if the filters are
5609 * being applied really fast; before we see the first
5610 * filter miss error on Rx queue 0. Accumulating enough error messages before
5611 * reacting will make sure we don't cause flush too often.
5613 #define I40E_MAX_FD_PROGRAM_ERROR 256
5616 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5617 * @pf: board private structure
5619 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5622 /* if interface is down do nothing */
5623 if (test_bit(__I40E_DOWN, &pf->state))
5626 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5629 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5630 i40e_fdir_flush_and_replay(pf);
5632 i40e_fdir_check_and_reenable(pf);
5637 * i40e_vsi_link_event - notify VSI of a link event
5638 * @vsi: vsi to be notified
5639 * @link_up: link up or down
5641 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5643 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5646 switch (vsi->type) {
5651 if (!vsi->netdev || !vsi->netdev_registered)
5655 netif_carrier_on(vsi->netdev);
5656 netif_tx_wake_all_queues(vsi->netdev);
5658 netif_carrier_off(vsi->netdev);
5659 netif_tx_stop_all_queues(vsi->netdev);
5663 case I40E_VSI_SRIOV:
5664 case I40E_VSI_VMDQ2:
5666 case I40E_VSI_MIRROR:
5668 /* there is no notification for other VSIs */
5674 * i40e_veb_link_event - notify elements on the veb of a link event
5675 * @veb: veb to be notified
5676 * @link_up: link up or down
5678 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5683 if (!veb || !veb->pf)
5687 /* depth first... */
5688 for (i = 0; i < I40E_MAX_VEB; i++)
5689 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5690 i40e_veb_link_event(pf->veb[i], link_up);
5692 /* ... now the local VSIs */
5693 for (i = 0; i < pf->num_alloc_vsi; i++)
5694 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5695 i40e_vsi_link_event(pf->vsi[i], link_up);
5699 * i40e_link_event - Update netif_carrier status
5700 * @pf: board private structure
5702 static void i40e_link_event(struct i40e_pf *pf)
5704 bool new_link, old_link;
5705 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5706 u8 new_link_speed, old_link_speed;
5708 /* set this to force the get_link_status call to refresh state */
5709 pf->hw.phy.get_link_info = true;
5711 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5712 new_link = i40e_get_link_status(&pf->hw);
5713 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5714 new_link_speed = pf->hw.phy.link_info.link_speed;
5716 if (new_link == old_link &&
5717 new_link_speed == old_link_speed &&
5718 (test_bit(__I40E_DOWN, &vsi->state) ||
5719 new_link == netif_carrier_ok(vsi->netdev)))
5722 if (!test_bit(__I40E_DOWN, &vsi->state))
5723 i40e_print_link_message(vsi, new_link);
5725 /* Notify the base of the switch tree connected to
5726 * the link. Floating VEBs are not notified.
5728 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5729 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5731 i40e_vsi_link_event(vsi, new_link);
5734 i40e_vc_notify_link_state(pf);
5736 if (pf->flags & I40E_FLAG_PTP)
5737 i40e_ptp_set_increment(pf);
5741 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5742 * @pf: board private structure
5744 * Set the per-queue flags to request a check for stuck queues in the irq
5745 * clean functions, then force interrupts to be sure the irq clean is called.
5747 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5751 /* If we're down or resetting, just bail */
5752 if (test_bit(__I40E_DOWN, &pf->state) ||
5753 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5756 /* for each VSI/netdev
5758 * set the check flag
5760 * force an interrupt
5762 for (v = 0; v < pf->num_alloc_vsi; v++) {
5763 struct i40e_vsi *vsi = pf->vsi[v];
5767 test_bit(__I40E_DOWN, &vsi->state) ||
5768 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5771 for (i = 0; i < vsi->num_queue_pairs; i++) {
5772 set_check_for_tx_hang(vsi->tx_rings[i]);
5773 if (test_bit(__I40E_HANG_CHECK_ARMED,
5774 &vsi->tx_rings[i]->state))
5779 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5780 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5781 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5782 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5783 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5784 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5785 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5787 u16 vec = vsi->base_vector - 1;
5788 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5789 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5790 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5791 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5792 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5793 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5794 wr32(&vsi->back->hw,
5795 I40E_PFINT_DYN_CTLN(vec), val);
5797 i40e_flush(&vsi->back->hw);
5803 * i40e_watchdog_subtask - periodic checks not using event driven response
5804 * @pf: board private structure
5806 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5810 /* if interface is down do nothing */
5811 if (test_bit(__I40E_DOWN, &pf->state) ||
5812 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5815 /* make sure we don't do these things too often */
5816 if (time_before(jiffies, (pf->service_timer_previous +
5817 pf->service_timer_period)))
5819 pf->service_timer_previous = jiffies;
5821 i40e_check_hang_subtask(pf);
5822 i40e_link_event(pf);
5824 /* Update the stats for active netdevs so the network stack
5825 * can look at updated numbers whenever it cares to
5827 for (i = 0; i < pf->num_alloc_vsi; i++)
5828 if (pf->vsi[i] && pf->vsi[i]->netdev)
5829 i40e_update_stats(pf->vsi[i]);
5831 /* Update the stats for the active switching components */
5832 for (i = 0; i < I40E_MAX_VEB; i++)
5834 i40e_update_veb_stats(pf->veb[i]);
5836 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5840 * i40e_reset_subtask - Set up for resetting the device and driver
5841 * @pf: board private structure
5843 static void i40e_reset_subtask(struct i40e_pf *pf)
5845 u32 reset_flags = 0;
5848 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5849 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5850 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5852 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5853 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5854 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5856 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5857 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5858 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5860 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5861 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5862 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5864 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5865 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5866 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5869 /* If there's a recovery already waiting, it takes
5870 * precedence before starting a new reset sequence.
5872 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5873 i40e_handle_reset_warning(pf);
5877 /* If we're already down or resetting, just bail */
5879 !test_bit(__I40E_DOWN, &pf->state) &&
5880 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5881 i40e_do_reset(pf, reset_flags);
5888 * i40e_handle_link_event - Handle link event
5889 * @pf: board private structure
5890 * @e: event info posted on ARQ
5892 static void i40e_handle_link_event(struct i40e_pf *pf,
5893 struct i40e_arq_event_info *e)
5895 struct i40e_hw *hw = &pf->hw;
5896 struct i40e_aqc_get_link_status *status =
5897 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5899 /* save off old link status information */
5900 hw->phy.link_info_old = hw->phy.link_info;
5902 /* Do a new status request to re-enable LSE reporting
5903 * and load new status information into the hw struct
5904 * This completely ignores any state information
5905 * in the ARQ event info, instead choosing to always
5906 * issue the AQ update link status command.
5908 i40e_link_event(pf);
5910 /* check for unqualified module, if link is down */
5911 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5912 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5913 (!(status->link_info & I40E_AQ_LINK_UP)))
5914 dev_err(&pf->pdev->dev,
5915 "The driver failed to link because an unqualified module was detected.\n");
5919 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5920 * @pf: board private structure
5922 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5924 struct i40e_arq_event_info event;
5925 struct i40e_hw *hw = &pf->hw;
5932 /* Do not run clean AQ when PF reset fails */
5933 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5936 /* check for error indications */
5937 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5939 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5940 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5941 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5943 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5944 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5945 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5947 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5948 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5949 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5952 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5954 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5956 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5957 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5958 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5960 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5961 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5962 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5964 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5965 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5966 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5969 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5971 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5972 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5977 ret = i40e_clean_arq_element(hw, &event, &pending);
5978 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5981 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5985 opcode = le16_to_cpu(event.desc.opcode);
5988 case i40e_aqc_opc_get_link_status:
5989 i40e_handle_link_event(pf, &event);
5991 case i40e_aqc_opc_send_msg_to_pf:
5992 ret = i40e_vc_process_vf_msg(pf,
5993 le16_to_cpu(event.desc.retval),
5994 le32_to_cpu(event.desc.cookie_high),
5995 le32_to_cpu(event.desc.cookie_low),
5999 case i40e_aqc_opc_lldp_update_mib:
6000 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6001 #ifdef CONFIG_I40E_DCB
6003 ret = i40e_handle_lldp_event(pf, &event);
6005 #endif /* CONFIG_I40E_DCB */
6007 case i40e_aqc_opc_event_lan_overflow:
6008 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6009 i40e_handle_lan_overflow_event(pf, &event);
6011 case i40e_aqc_opc_send_msg_to_peer:
6012 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6014 case i40e_aqc_opc_nvm_erase:
6015 case i40e_aqc_opc_nvm_update:
6016 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6019 dev_info(&pf->pdev->dev,
6020 "ARQ Error: Unknown event 0x%04x received\n",
6024 } while (pending && (i++ < pf->adminq_work_limit));
6026 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6027 /* re-enable Admin queue interrupt cause */
6028 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6029 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6030 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6033 kfree(event.msg_buf);
6037 * i40e_verify_eeprom - make sure eeprom is good to use
6038 * @pf: board private structure
6040 static void i40e_verify_eeprom(struct i40e_pf *pf)
6044 err = i40e_diag_eeprom_test(&pf->hw);
6046 /* retry in case of garbage read */
6047 err = i40e_diag_eeprom_test(&pf->hw);
6049 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6051 set_bit(__I40E_BAD_EEPROM, &pf->state);
6055 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6056 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6057 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6062 * i40e_enable_pf_switch_lb
6063 * @pf: pointer to the PF structure
6065 * enable switch loop back or die - no point in a return value
6067 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6069 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6070 struct i40e_vsi_context ctxt;
6073 ctxt.seid = pf->main_vsi_seid;
6074 ctxt.pf_num = pf->hw.pf_id;
6076 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6078 dev_info(&pf->pdev->dev,
6079 "couldn't get PF vsi config, err %s aq_err %s\n",
6080 i40e_stat_str(&pf->hw, ret),
6081 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6084 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6085 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6086 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6088 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6090 dev_info(&pf->pdev->dev,
6091 "update vsi switch failed, err %s aq_err %s\n",
6092 i40e_stat_str(&pf->hw, ret),
6093 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6098 * i40e_disable_pf_switch_lb
6099 * @pf: pointer to the PF structure
6101 * disable switch loop back or die - no point in a return value
6103 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6105 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6106 struct i40e_vsi_context ctxt;
6109 ctxt.seid = pf->main_vsi_seid;
6110 ctxt.pf_num = pf->hw.pf_id;
6112 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6114 dev_info(&pf->pdev->dev,
6115 "couldn't get PF vsi config, err %s aq_err %s\n",
6116 i40e_stat_str(&pf->hw, ret),
6117 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6120 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6121 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6122 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6124 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6126 dev_info(&pf->pdev->dev,
6127 "update vsi switch failed, err %s aq_err %s\n",
6128 i40e_stat_str(&pf->hw, ret),
6129 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6134 * i40e_config_bridge_mode - Configure the HW bridge mode
6135 * @veb: pointer to the bridge instance
6137 * Configure the loop back mode for the LAN VSI that is downlink to the
6138 * specified HW bridge instance. It is expected this function is called
6139 * when a new HW bridge is instantiated.
6141 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6143 struct i40e_pf *pf = veb->pf;
6145 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6146 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6147 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6148 i40e_disable_pf_switch_lb(pf);
6150 i40e_enable_pf_switch_lb(pf);
6154 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6155 * @veb: pointer to the VEB instance
6157 * This is a recursive function that first builds the attached VSIs then
6158 * recurses in to build the next layer of VEB. We track the connections
6159 * through our own index numbers because the seid's from the HW could
6160 * change across the reset.
6162 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6164 struct i40e_vsi *ctl_vsi = NULL;
6165 struct i40e_pf *pf = veb->pf;
6169 /* build VSI that owns this VEB, temporarily attached to base VEB */
6170 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6172 pf->vsi[v]->veb_idx == veb->idx &&
6173 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6174 ctl_vsi = pf->vsi[v];
6179 dev_info(&pf->pdev->dev,
6180 "missing owner VSI for veb_idx %d\n", veb->idx);
6182 goto end_reconstitute;
6184 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6185 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6186 ret = i40e_add_vsi(ctl_vsi);
6188 dev_info(&pf->pdev->dev,
6189 "rebuild of veb_idx %d owner VSI failed: %d\n",
6191 goto end_reconstitute;
6193 i40e_vsi_reset_stats(ctl_vsi);
6195 /* create the VEB in the switch and move the VSI onto the VEB */
6196 ret = i40e_add_veb(veb, ctl_vsi);
6198 goto end_reconstitute;
6200 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6201 veb->bridge_mode = BRIDGE_MODE_VEB;
6203 veb->bridge_mode = BRIDGE_MODE_VEPA;
6204 i40e_config_bridge_mode(veb);
6206 /* create the remaining VSIs attached to this VEB */
6207 for (v = 0; v < pf->num_alloc_vsi; v++) {
6208 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6211 if (pf->vsi[v]->veb_idx == veb->idx) {
6212 struct i40e_vsi *vsi = pf->vsi[v];
6213 vsi->uplink_seid = veb->seid;
6214 ret = i40e_add_vsi(vsi);
6216 dev_info(&pf->pdev->dev,
6217 "rebuild of vsi_idx %d failed: %d\n",
6219 goto end_reconstitute;
6221 i40e_vsi_reset_stats(vsi);
6225 /* create any VEBs attached to this VEB - RECURSION */
6226 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6227 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6228 pf->veb[veb_idx]->uplink_seid = veb->seid;
6229 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6240 * i40e_get_capabilities - get info about the HW
6241 * @pf: the PF struct
6243 static int i40e_get_capabilities(struct i40e_pf *pf)
6245 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6250 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6252 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6256 /* this loads the data into the hw struct for us */
6257 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6259 i40e_aqc_opc_list_func_capabilities,
6261 /* data loaded, buffer no longer needed */
6264 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6265 /* retry with a larger buffer */
6266 buf_len = data_size;
6267 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6268 dev_info(&pf->pdev->dev,
6269 "capability discovery failed, err %s aq_err %s\n",
6270 i40e_stat_str(&pf->hw, err),
6271 i40e_aq_str(&pf->hw,
6272 pf->hw.aq.asq_last_status));
6277 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6278 (pf->hw.aq.fw_maj_ver < 2)) {
6279 pf->hw.func_caps.num_msix_vectors++;
6280 pf->hw.func_caps.num_msix_vectors_vf++;
6283 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6284 dev_info(&pf->pdev->dev,
6285 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6286 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6287 pf->hw.func_caps.num_msix_vectors,
6288 pf->hw.func_caps.num_msix_vectors_vf,
6289 pf->hw.func_caps.fd_filters_guaranteed,
6290 pf->hw.func_caps.fd_filters_best_effort,
6291 pf->hw.func_caps.num_tx_qp,
6292 pf->hw.func_caps.num_vsis);
6294 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6295 + pf->hw.func_caps.num_vfs)
6296 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6297 dev_info(&pf->pdev->dev,
6298 "got num_vsis %d, setting num_vsis to %d\n",
6299 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6300 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6306 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6309 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6310 * @pf: board private structure
6312 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6314 struct i40e_vsi *vsi;
6317 /* quick workaround for an NVM issue that leaves a critical register
6320 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6321 static const u32 hkey[] = {
6322 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6323 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6324 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6327 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6328 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6331 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6334 /* find existing VSI and see if it needs configuring */
6336 for (i = 0; i < pf->num_alloc_vsi; i++) {
6337 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6343 /* create a new VSI if none exists */
6345 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6346 pf->vsi[pf->lan_vsi]->seid, 0);
6348 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6349 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6354 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6358 * i40e_fdir_teardown - release the Flow Director resources
6359 * @pf: board private structure
6361 static void i40e_fdir_teardown(struct i40e_pf *pf)
6365 i40e_fdir_filter_exit(pf);
6366 for (i = 0; i < pf->num_alloc_vsi; i++) {
6367 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6368 i40e_vsi_release(pf->vsi[i]);
6375 * i40e_prep_for_reset - prep for the core to reset
6376 * @pf: board private structure
6378 * Close up the VFs and other things in prep for PF Reset.
6380 static void i40e_prep_for_reset(struct i40e_pf *pf)
6382 struct i40e_hw *hw = &pf->hw;
6383 i40e_status ret = 0;
6386 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6387 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6390 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6392 /* quiesce the VSIs and their queues that are not already DOWN */
6393 i40e_pf_quiesce_all_vsi(pf);
6395 for (v = 0; v < pf->num_alloc_vsi; v++) {
6397 pf->vsi[v]->seid = 0;
6400 i40e_shutdown_adminq(&pf->hw);
6402 /* call shutdown HMC */
6403 if (hw->hmc.hmc_obj) {
6404 ret = i40e_shutdown_lan_hmc(hw);
6406 dev_warn(&pf->pdev->dev,
6407 "shutdown_lan_hmc failed: %d\n", ret);
6412 * i40e_send_version - update firmware with driver version
6415 static void i40e_send_version(struct i40e_pf *pf)
6417 struct i40e_driver_version dv;
6419 dv.major_version = DRV_VERSION_MAJOR;
6420 dv.minor_version = DRV_VERSION_MINOR;
6421 dv.build_version = DRV_VERSION_BUILD;
6422 dv.subbuild_version = 0;
6423 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6424 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6428 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6429 * @pf: board private structure
6430 * @reinit: if the Main VSI needs to re-initialized.
6432 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6434 struct i40e_hw *hw = &pf->hw;
6435 u8 set_fc_aq_fail = 0;
6439 /* Now we wait for GRST to settle out.
6440 * We don't have to delete the VEBs or VSIs from the hw switch
6441 * because the reset will make them disappear.
6443 ret = i40e_pf_reset(hw);
6445 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6446 set_bit(__I40E_RESET_FAILED, &pf->state);
6447 goto clear_recovery;
6451 if (test_bit(__I40E_DOWN, &pf->state))
6452 goto clear_recovery;
6453 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6455 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6456 ret = i40e_init_adminq(&pf->hw);
6458 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6459 i40e_stat_str(&pf->hw, ret),
6460 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6461 goto clear_recovery;
6464 /* re-verify the eeprom if we just had an EMP reset */
6465 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6466 i40e_verify_eeprom(pf);
6468 i40e_clear_pxe_mode(hw);
6469 ret = i40e_get_capabilities(pf);
6471 goto end_core_reset;
6473 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6474 hw->func_caps.num_rx_qp,
6475 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6477 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6478 goto end_core_reset;
6480 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6482 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6483 goto end_core_reset;
6486 #ifdef CONFIG_I40E_DCB
6487 ret = i40e_init_pf_dcb(pf);
6489 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6490 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6491 /* Continue without DCB enabled */
6493 #endif /* CONFIG_I40E_DCB */
6495 ret = i40e_init_pf_fcoe(pf);
6497 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6500 /* do basic switch setup */
6501 ret = i40e_setup_pf_switch(pf, reinit);
6503 goto end_core_reset;
6505 /* driver is only interested in link up/down and module qualification
6506 * reports from firmware
6508 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6509 I40E_AQ_EVENT_LINK_UPDOWN |
6510 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6512 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6513 i40e_stat_str(&pf->hw, ret),
6514 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6516 /* make sure our flow control settings are restored */
6517 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6519 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6520 i40e_stat_str(&pf->hw, ret),
6521 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6523 /* Rebuild the VSIs and VEBs that existed before reset.
6524 * They are still in our local switch element arrays, so only
6525 * need to rebuild the switch model in the HW.
6527 * If there were VEBs but the reconstitution failed, we'll try
6528 * try to recover minimal use by getting the basic PF VSI working.
6530 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6531 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6532 /* find the one VEB connected to the MAC, and find orphans */
6533 for (v = 0; v < I40E_MAX_VEB; v++) {
6537 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6538 pf->veb[v]->uplink_seid == 0) {
6539 ret = i40e_reconstitute_veb(pf->veb[v]);
6544 /* If Main VEB failed, we're in deep doodoo,
6545 * so give up rebuilding the switch and set up
6546 * for minimal rebuild of PF VSI.
6547 * If orphan failed, we'll report the error
6548 * but try to keep going.
6550 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6551 dev_info(&pf->pdev->dev,
6552 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6554 pf->vsi[pf->lan_vsi]->uplink_seid
6557 } else if (pf->veb[v]->uplink_seid == 0) {
6558 dev_info(&pf->pdev->dev,
6559 "rebuild of orphan VEB failed: %d\n",
6566 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6567 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6568 /* no VEB, so rebuild only the Main VSI */
6569 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6571 dev_info(&pf->pdev->dev,
6572 "rebuild of Main VSI failed: %d\n", ret);
6573 goto end_core_reset;
6577 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6578 (pf->hw.aq.fw_maj_ver < 4)) {
6580 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6582 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6583 i40e_stat_str(&pf->hw, ret),
6584 i40e_aq_str(&pf->hw,
6585 pf->hw.aq.asq_last_status));
6587 /* reinit the misc interrupt */
6588 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6589 ret = i40e_setup_misc_vector(pf);
6591 /* restart the VSIs that were rebuilt and running before the reset */
6592 i40e_pf_unquiesce_all_vsi(pf);
6594 if (pf->num_alloc_vfs) {
6595 for (v = 0; v < pf->num_alloc_vfs; v++)
6596 i40e_reset_vf(&pf->vf[v], true);
6599 /* tell the firmware that we're starting */
6600 i40e_send_version(pf);
6603 clear_bit(__I40E_RESET_FAILED, &pf->state);
6605 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6609 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6610 * @pf: board private structure
6612 * Close up the VFs and other things in prep for a Core Reset,
6613 * then get ready to rebuild the world.
6615 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6617 i40e_prep_for_reset(pf);
6618 i40e_reset_and_rebuild(pf, false);
6622 * i40e_handle_mdd_event
6623 * @pf: pointer to the PF structure
6625 * Called from the MDD irq handler to identify possibly malicious vfs
6627 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6629 struct i40e_hw *hw = &pf->hw;
6630 bool mdd_detected = false;
6631 bool pf_mdd_detected = false;
6636 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6639 /* find what triggered the MDD event */
6640 reg = rd32(hw, I40E_GL_MDET_TX);
6641 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6642 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6643 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6644 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6645 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6646 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6647 I40E_GL_MDET_TX_EVENT_SHIFT;
6648 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6649 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6650 pf->hw.func_caps.base_queue;
6651 if (netif_msg_tx_err(pf))
6652 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6653 event, queue, pf_num, vf_num);
6654 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6655 mdd_detected = true;
6657 reg = rd32(hw, I40E_GL_MDET_RX);
6658 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6659 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6660 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6661 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6662 I40E_GL_MDET_RX_EVENT_SHIFT;
6663 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6664 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6665 pf->hw.func_caps.base_queue;
6666 if (netif_msg_rx_err(pf))
6667 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6668 event, queue, func);
6669 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6670 mdd_detected = true;
6674 reg = rd32(hw, I40E_PF_MDET_TX);
6675 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6676 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6677 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6678 pf_mdd_detected = true;
6680 reg = rd32(hw, I40E_PF_MDET_RX);
6681 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6682 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6683 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6684 pf_mdd_detected = true;
6686 /* Queue belongs to the PF, initiate a reset */
6687 if (pf_mdd_detected) {
6688 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6689 i40e_service_event_schedule(pf);
6693 /* see if one of the VFs needs its hand slapped */
6694 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6696 reg = rd32(hw, I40E_VP_MDET_TX(i));
6697 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6698 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6699 vf->num_mdd_events++;
6700 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6704 reg = rd32(hw, I40E_VP_MDET_RX(i));
6705 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6706 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6707 vf->num_mdd_events++;
6708 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6712 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6713 dev_info(&pf->pdev->dev,
6714 "Too many MDD events on VF %d, disabled\n", i);
6715 dev_info(&pf->pdev->dev,
6716 "Use PF Control I/F to re-enable the VF\n");
6717 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6721 /* re-enable mdd interrupt cause */
6722 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6723 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6724 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6725 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6729 #ifdef CONFIG_I40E_VXLAN
6731 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6732 * @pf: board private structure
6734 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6736 struct i40e_hw *hw = &pf->hw;
6741 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6744 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6746 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6747 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6748 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6749 port = pf->vxlan_ports[i];
6751 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6752 I40E_AQC_TUNNEL_TYPE_VXLAN,
6755 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6758 dev_info(&pf->pdev->dev,
6759 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6760 port ? "add" : "delete",
6762 i40e_stat_str(&pf->hw, ret),
6763 i40e_aq_str(&pf->hw,
6764 pf->hw.aq.asq_last_status));
6765 pf->vxlan_ports[i] = 0;
6773 * i40e_service_task - Run the driver's async subtasks
6774 * @work: pointer to work_struct containing our data
6776 static void i40e_service_task(struct work_struct *work)
6778 struct i40e_pf *pf = container_of(work,
6781 unsigned long start_time = jiffies;
6783 /* don't bother with service tasks if a reset is in progress */
6784 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6785 i40e_service_event_complete(pf);
6789 i40e_reset_subtask(pf);
6790 i40e_handle_mdd_event(pf);
6791 i40e_vc_process_vflr_event(pf);
6792 i40e_watchdog_subtask(pf);
6793 i40e_fdir_reinit_subtask(pf);
6794 i40e_sync_filters_subtask(pf);
6795 #ifdef CONFIG_I40E_VXLAN
6796 i40e_sync_vxlan_filters_subtask(pf);
6798 i40e_clean_adminq_subtask(pf);
6800 i40e_service_event_complete(pf);
6802 /* If the tasks have taken longer than one timer cycle or there
6803 * is more work to be done, reschedule the service task now
6804 * rather than wait for the timer to tick again.
6806 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6807 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6808 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6809 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6810 i40e_service_event_schedule(pf);
6814 * i40e_service_timer - timer callback
6815 * @data: pointer to PF struct
6817 static void i40e_service_timer(unsigned long data)
6819 struct i40e_pf *pf = (struct i40e_pf *)data;
6821 mod_timer(&pf->service_timer,
6822 round_jiffies(jiffies + pf->service_timer_period));
6823 i40e_service_event_schedule(pf);
6827 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6828 * @vsi: the VSI being configured
6830 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6832 struct i40e_pf *pf = vsi->back;
6834 switch (vsi->type) {
6836 vsi->alloc_queue_pairs = pf->num_lan_qps;
6837 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6838 I40E_REQ_DESCRIPTOR_MULTIPLE);
6839 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6840 vsi->num_q_vectors = pf->num_lan_msix;
6842 vsi->num_q_vectors = 1;
6847 vsi->alloc_queue_pairs = 1;
6848 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6849 I40E_REQ_DESCRIPTOR_MULTIPLE);
6850 vsi->num_q_vectors = 1;
6853 case I40E_VSI_VMDQ2:
6854 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6855 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6856 I40E_REQ_DESCRIPTOR_MULTIPLE);
6857 vsi->num_q_vectors = pf->num_vmdq_msix;
6860 case I40E_VSI_SRIOV:
6861 vsi->alloc_queue_pairs = pf->num_vf_qps;
6862 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6863 I40E_REQ_DESCRIPTOR_MULTIPLE);
6868 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6869 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6870 I40E_REQ_DESCRIPTOR_MULTIPLE);
6871 vsi->num_q_vectors = pf->num_fcoe_msix;
6874 #endif /* I40E_FCOE */
6884 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6885 * @type: VSI pointer
6886 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6888 * On error: returns error code (negative)
6889 * On success: returns 0
6891 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6896 /* allocate memory for both Tx and Rx ring pointers */
6897 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6898 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6901 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6903 if (alloc_qvectors) {
6904 /* allocate memory for q_vector pointers */
6905 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6906 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6907 if (!vsi->q_vectors) {
6915 kfree(vsi->tx_rings);
6920 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6921 * @pf: board private structure
6922 * @type: type of VSI
6924 * On error: returns error code (negative)
6925 * On success: returns vsi index in PF (positive)
6927 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6930 struct i40e_vsi *vsi;
6934 /* Need to protect the allocation of the VSIs at the PF level */
6935 mutex_lock(&pf->switch_mutex);
6937 /* VSI list may be fragmented if VSI creation/destruction has
6938 * been happening. We can afford to do a quick scan to look
6939 * for any free VSIs in the list.
6941 * find next empty vsi slot, looping back around if necessary
6944 while (i < pf->num_alloc_vsi && pf->vsi[i])
6946 if (i >= pf->num_alloc_vsi) {
6948 while (i < pf->next_vsi && pf->vsi[i])
6952 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6953 vsi_idx = i; /* Found one! */
6956 goto unlock_pf; /* out of VSI slots! */
6960 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6967 set_bit(__I40E_DOWN, &vsi->state);
6970 vsi->rx_itr_setting = pf->rx_itr_default;
6971 vsi->tx_itr_setting = pf->tx_itr_default;
6972 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6973 pf->rss_table_size : 64;
6974 vsi->netdev_registered = false;
6975 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6976 INIT_LIST_HEAD(&vsi->mac_filter_list);
6977 vsi->irqs_ready = false;
6979 ret = i40e_set_num_rings_in_vsi(vsi);
6983 ret = i40e_vsi_alloc_arrays(vsi, true);
6987 /* Setup default MSIX irq handler for VSI */
6988 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6990 pf->vsi[vsi_idx] = vsi;
6995 pf->next_vsi = i - 1;
6998 mutex_unlock(&pf->switch_mutex);
7003 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7004 * @type: VSI pointer
7005 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7007 * On error: returns error code (negative)
7008 * On success: returns 0
7010 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7012 /* free the ring and vector containers */
7013 if (free_qvectors) {
7014 kfree(vsi->q_vectors);
7015 vsi->q_vectors = NULL;
7017 kfree(vsi->tx_rings);
7018 vsi->tx_rings = NULL;
7019 vsi->rx_rings = NULL;
7023 * i40e_vsi_clear - Deallocate the VSI provided
7024 * @vsi: the VSI being un-configured
7026 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7037 mutex_lock(&pf->switch_mutex);
7038 if (!pf->vsi[vsi->idx]) {
7039 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7040 vsi->idx, vsi->idx, vsi, vsi->type);
7044 if (pf->vsi[vsi->idx] != vsi) {
7045 dev_err(&pf->pdev->dev,
7046 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7047 pf->vsi[vsi->idx]->idx,
7049 pf->vsi[vsi->idx]->type,
7050 vsi->idx, vsi, vsi->type);
7054 /* updates the PF for this cleared vsi */
7055 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7056 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7058 i40e_vsi_free_arrays(vsi, true);
7060 pf->vsi[vsi->idx] = NULL;
7061 if (vsi->idx < pf->next_vsi)
7062 pf->next_vsi = vsi->idx;
7065 mutex_unlock(&pf->switch_mutex);
7073 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7074 * @vsi: the VSI being cleaned
7076 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7080 if (vsi->tx_rings && vsi->tx_rings[0]) {
7081 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7082 kfree_rcu(vsi->tx_rings[i], rcu);
7083 vsi->tx_rings[i] = NULL;
7084 vsi->rx_rings[i] = NULL;
7090 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7091 * @vsi: the VSI being configured
7093 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7095 struct i40e_ring *tx_ring, *rx_ring;
7096 struct i40e_pf *pf = vsi->back;
7099 /* Set basic values in the rings to be used later during open() */
7100 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7101 /* allocate space for both Tx and Rx in one shot */
7102 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7106 tx_ring->queue_index = i;
7107 tx_ring->reg_idx = vsi->base_queue + i;
7108 tx_ring->ring_active = false;
7110 tx_ring->netdev = vsi->netdev;
7111 tx_ring->dev = &pf->pdev->dev;
7112 tx_ring->count = vsi->num_desc;
7114 tx_ring->dcb_tc = 0;
7115 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7116 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7117 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7118 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7119 vsi->tx_rings[i] = tx_ring;
7121 rx_ring = &tx_ring[1];
7122 rx_ring->queue_index = i;
7123 rx_ring->reg_idx = vsi->base_queue + i;
7124 rx_ring->ring_active = false;
7126 rx_ring->netdev = vsi->netdev;
7127 rx_ring->dev = &pf->pdev->dev;
7128 rx_ring->count = vsi->num_desc;
7130 rx_ring->dcb_tc = 0;
7131 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7132 set_ring_16byte_desc_enabled(rx_ring);
7134 clear_ring_16byte_desc_enabled(rx_ring);
7135 vsi->rx_rings[i] = rx_ring;
7141 i40e_vsi_clear_rings(vsi);
7146 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7147 * @pf: board private structure
7148 * @vectors: the number of MSI-X vectors to request
7150 * Returns the number of vectors reserved, or error
7152 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7154 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7155 I40E_MIN_MSIX, vectors);
7157 dev_info(&pf->pdev->dev,
7158 "MSI-X vector reservation failed: %d\n", vectors);
7166 * i40e_init_msix - Setup the MSIX capability
7167 * @pf: board private structure
7169 * Work with the OS to set up the MSIX vectors needed.
7171 * Returns the number of vectors reserved or negative on failure
7173 static int i40e_init_msix(struct i40e_pf *pf)
7175 struct i40e_hw *hw = &pf->hw;
7180 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7183 /* The number of vectors we'll request will be comprised of:
7184 * - Add 1 for "other" cause for Admin Queue events, etc.
7185 * - The number of LAN queue pairs
7186 * - Queues being used for RSS.
7187 * We don't need as many as max_rss_size vectors.
7188 * use rss_size instead in the calculation since that
7189 * is governed by number of cpus in the system.
7190 * - assumes symmetric Tx/Rx pairing
7191 * - The number of VMDq pairs
7193 * - The number of FCOE qps.
7195 * Once we count this up, try the request.
7197 * If we can't get what we want, we'll simplify to nearly nothing
7198 * and try again. If that still fails, we punt.
7200 vectors_left = hw->func_caps.num_msix_vectors;
7203 /* reserve one vector for miscellaneous handler */
7209 /* reserve vectors for the main PF traffic queues */
7210 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7211 vectors_left -= pf->num_lan_msix;
7212 v_budget += pf->num_lan_msix;
7214 /* reserve one vector for sideband flow director */
7215 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7220 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7225 /* can we reserve enough for FCoE? */
7226 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7228 pf->num_fcoe_msix = 0;
7229 else if (vectors_left >= pf->num_fcoe_qps)
7230 pf->num_fcoe_msix = pf->num_fcoe_qps;
7232 pf->num_fcoe_msix = 1;
7233 v_budget += pf->num_fcoe_msix;
7234 vectors_left -= pf->num_fcoe_msix;
7238 /* any vectors left over go for VMDq support */
7239 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7240 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7241 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7243 /* if we're short on vectors for what's desired, we limit
7244 * the queues per vmdq. If this is still more than are
7245 * available, the user will need to change the number of
7246 * queues/vectors used by the PF later with the ethtool
7249 if (vmdq_vecs < vmdq_vecs_wanted)
7250 pf->num_vmdq_qps = 1;
7251 pf->num_vmdq_msix = pf->num_vmdq_qps;
7253 v_budget += vmdq_vecs;
7254 vectors_left -= vmdq_vecs;
7257 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7259 if (!pf->msix_entries)
7262 for (i = 0; i < v_budget; i++)
7263 pf->msix_entries[i].entry = i;
7264 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7266 if (v_actual != v_budget) {
7267 /* If we have limited resources, we will start with no vectors
7268 * for the special features and then allocate vectors to some
7269 * of these features based on the policy and at the end disable
7270 * the features that did not get any vectors.
7273 pf->num_fcoe_qps = 0;
7274 pf->num_fcoe_msix = 0;
7276 pf->num_vmdq_msix = 0;
7279 if (v_actual < I40E_MIN_MSIX) {
7280 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7281 kfree(pf->msix_entries);
7282 pf->msix_entries = NULL;
7285 } else if (v_actual == I40E_MIN_MSIX) {
7286 /* Adjust for minimal MSIX use */
7287 pf->num_vmdq_vsis = 0;
7288 pf->num_vmdq_qps = 0;
7289 pf->num_lan_qps = 1;
7290 pf->num_lan_msix = 1;
7292 } else if (v_actual != v_budget) {
7295 /* reserve the misc vector */
7298 /* Scale vector usage down */
7299 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7300 pf->num_vmdq_vsis = 1;
7301 pf->num_vmdq_qps = 1;
7302 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7304 /* partition out the remaining vectors */
7307 pf->num_lan_msix = 1;
7311 /* give one vector to FCoE */
7312 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7313 pf->num_lan_msix = 1;
7314 pf->num_fcoe_msix = 1;
7317 pf->num_lan_msix = 2;
7322 /* give one vector to FCoE */
7323 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7324 pf->num_fcoe_msix = 1;
7328 /* give the rest to the PF */
7329 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7334 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7335 (pf->num_vmdq_msix == 0)) {
7336 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7337 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7341 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7342 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7343 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7350 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7351 * @vsi: the VSI being configured
7352 * @v_idx: index of the vector in the vsi struct
7354 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7356 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7358 struct i40e_q_vector *q_vector;
7360 /* allocate q_vector */
7361 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7365 q_vector->vsi = vsi;
7366 q_vector->v_idx = v_idx;
7367 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7369 netif_napi_add(vsi->netdev, &q_vector->napi,
7370 i40e_napi_poll, NAPI_POLL_WEIGHT);
7372 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7373 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7375 /* tie q_vector and vsi together */
7376 vsi->q_vectors[v_idx] = q_vector;
7382 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7383 * @vsi: the VSI being configured
7385 * We allocate one q_vector per queue interrupt. If allocation fails we
7388 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7390 struct i40e_pf *pf = vsi->back;
7391 int v_idx, num_q_vectors;
7394 /* if not MSIX, give the one vector only to the LAN VSI */
7395 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7396 num_q_vectors = vsi->num_q_vectors;
7397 else if (vsi == pf->vsi[pf->lan_vsi])
7402 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7403 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7412 i40e_free_q_vector(vsi, v_idx);
7418 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7419 * @pf: board private structure to initialize
7421 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7426 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7427 vectors = i40e_init_msix(pf);
7429 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7431 I40E_FLAG_FCOE_ENABLED |
7433 I40E_FLAG_RSS_ENABLED |
7434 I40E_FLAG_DCB_CAPABLE |
7435 I40E_FLAG_SRIOV_ENABLED |
7436 I40E_FLAG_FD_SB_ENABLED |
7437 I40E_FLAG_FD_ATR_ENABLED |
7438 I40E_FLAG_VMDQ_ENABLED);
7440 /* rework the queue expectations without MSIX */
7441 i40e_determine_queue_usage(pf);
7445 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7446 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7447 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7448 vectors = pci_enable_msi(pf->pdev);
7450 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7452 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7454 vectors = 1; /* one MSI or Legacy vector */
7457 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7458 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7460 /* set up vector assignment tracking */
7461 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7462 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7463 if (!pf->irq_pile) {
7464 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7467 pf->irq_pile->num_entries = vectors;
7468 pf->irq_pile->search_hint = 0;
7470 /* track first vector for misc interrupts, ignore return */
7471 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7477 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7478 * @pf: board private structure
7480 * This sets up the handler for MSIX 0, which is used to manage the
7481 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7482 * when in MSI or Legacy interrupt mode.
7484 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7486 struct i40e_hw *hw = &pf->hw;
7489 /* Only request the irq if this is the first time through, and
7490 * not when we're rebuilding after a Reset
7492 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7493 err = request_irq(pf->msix_entries[0].vector,
7494 i40e_intr, 0, pf->int_name, pf);
7496 dev_info(&pf->pdev->dev,
7497 "request_irq for %s failed: %d\n",
7503 i40e_enable_misc_int_causes(pf);
7505 /* associate no queues to the misc vector */
7506 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7507 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7511 i40e_irq_dynamic_enable_icr0(pf);
7517 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7518 * @vsi: vsi structure
7519 * @seed: RSS hash seed
7521 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7523 struct i40e_aqc_get_set_rss_key_data rss_key;
7524 struct i40e_pf *pf = vsi->back;
7525 struct i40e_hw *hw = &pf->hw;
7526 bool pf_lut = false;
7530 memset(&rss_key, 0, sizeof(rss_key));
7531 memcpy(&rss_key, seed, sizeof(rss_key));
7533 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7537 /* Populate the LUT with max no. of queues in round robin fashion */
7538 for (i = 0; i < vsi->rss_table_size; i++)
7539 rss_lut[i] = i % vsi->rss_size;
7541 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7543 dev_info(&pf->pdev->dev,
7544 "Cannot set RSS key, err %s aq_err %s\n",
7545 i40e_stat_str(&pf->hw, ret),
7546 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7550 if (vsi->type == I40E_VSI_MAIN)
7553 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7554 vsi->rss_table_size);
7556 dev_info(&pf->pdev->dev,
7557 "Cannot set RSS lut, err %s aq_err %s\n",
7558 i40e_stat_str(&pf->hw, ret),
7559 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7565 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7566 * @vsi: VSI structure
7568 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7570 u8 seed[I40E_HKEY_ARRAY_SIZE];
7571 struct i40e_pf *pf = vsi->back;
7573 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7574 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7576 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7577 return i40e_config_rss_aq(vsi, seed);
7583 * i40e_config_rss_reg - Prepare for RSS if used
7584 * @pf: board private structure
7585 * @seed: RSS hash seed
7587 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7589 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7590 struct i40e_hw *hw = &pf->hw;
7591 u32 *seed_dw = (u32 *)seed;
7592 u32 current_queue = 0;
7596 /* Fill out hash function seed */
7597 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7598 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7600 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7602 for (j = 0; j < 4; j++) {
7603 if (current_queue == vsi->rss_size)
7605 lut |= ((current_queue) << (8 * j));
7608 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7616 * i40e_config_rss - Prepare for RSS if used
7617 * @pf: board private structure
7619 static int i40e_config_rss(struct i40e_pf *pf)
7621 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7622 u8 seed[I40E_HKEY_ARRAY_SIZE];
7623 struct i40e_hw *hw = &pf->hw;
7627 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7629 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7630 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7631 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7632 hena |= i40e_pf_get_default_rss_hena(pf);
7634 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7635 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7637 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7639 /* Determine the RSS table size based on the hardware capabilities */
7640 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7641 reg_val = (pf->rss_table_size == 512) ?
7642 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7643 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7644 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7646 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7647 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7649 return i40e_config_rss_reg(pf, seed);
7653 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7654 * @pf: board private structure
7655 * @queue_count: the requested queue count for rss.
7657 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7658 * count which may be different from the requested queue count.
7660 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7662 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7665 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7668 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7670 if (queue_count != vsi->num_queue_pairs) {
7671 vsi->req_queue_pairs = queue_count;
7672 i40e_prep_for_reset(pf);
7674 pf->rss_size = new_rss_size;
7676 i40e_reset_and_rebuild(pf, true);
7677 i40e_config_rss(pf);
7679 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7680 return pf->rss_size;
7684 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7685 * @pf: board private structure
7687 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7690 bool min_valid, max_valid;
7693 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7694 &min_valid, &max_valid);
7698 pf->npar_min_bw = min_bw;
7700 pf->npar_max_bw = max_bw;
7707 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7708 * @pf: board private structure
7710 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7712 struct i40e_aqc_configure_partition_bw_data bw_data;
7715 /* Set the valid bit for this PF */
7716 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7717 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7718 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7720 /* Set the new bandwidths */
7721 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7727 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7728 * @pf: board private structure
7730 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7732 /* Commit temporary BW setting to permanent NVM image */
7733 enum i40e_admin_queue_err last_aq_status;
7737 if (pf->hw.partition_id != 1) {
7738 dev_info(&pf->pdev->dev,
7739 "Commit BW only works on partition 1! This is partition %d",
7740 pf->hw.partition_id);
7741 ret = I40E_NOT_SUPPORTED;
7745 /* Acquire NVM for read access */
7746 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7747 last_aq_status = pf->hw.aq.asq_last_status;
7749 dev_info(&pf->pdev->dev,
7750 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7751 i40e_stat_str(&pf->hw, ret),
7752 i40e_aq_str(&pf->hw, last_aq_status));
7756 /* Read word 0x10 of NVM - SW compatibility word 1 */
7757 ret = i40e_aq_read_nvm(&pf->hw,
7758 I40E_SR_NVM_CONTROL_WORD,
7759 0x10, sizeof(nvm_word), &nvm_word,
7761 /* Save off last admin queue command status before releasing
7764 last_aq_status = pf->hw.aq.asq_last_status;
7765 i40e_release_nvm(&pf->hw);
7767 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7768 i40e_stat_str(&pf->hw, ret),
7769 i40e_aq_str(&pf->hw, last_aq_status));
7773 /* Wait a bit for NVM release to complete */
7776 /* Acquire NVM for write access */
7777 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7778 last_aq_status = pf->hw.aq.asq_last_status;
7780 dev_info(&pf->pdev->dev,
7781 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7782 i40e_stat_str(&pf->hw, ret),
7783 i40e_aq_str(&pf->hw, last_aq_status));
7786 /* Write it back out unchanged to initiate update NVM,
7787 * which will force a write of the shadow (alt) RAM to
7788 * the NVM - thus storing the bandwidth values permanently.
7790 ret = i40e_aq_update_nvm(&pf->hw,
7791 I40E_SR_NVM_CONTROL_WORD,
7792 0x10, sizeof(nvm_word),
7793 &nvm_word, true, NULL);
7794 /* Save off last admin queue command status before releasing
7797 last_aq_status = pf->hw.aq.asq_last_status;
7798 i40e_release_nvm(&pf->hw);
7800 dev_info(&pf->pdev->dev,
7801 "BW settings NOT SAVED, err %s aq_err %s\n",
7802 i40e_stat_str(&pf->hw, ret),
7803 i40e_aq_str(&pf->hw, last_aq_status));
7810 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7811 * @pf: board private structure to initialize
7813 * i40e_sw_init initializes the Adapter private data structure.
7814 * Fields are initialized based on PCI device information and
7815 * OS network device settings (MTU size).
7817 static int i40e_sw_init(struct i40e_pf *pf)
7822 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7823 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7824 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7825 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7826 if (I40E_DEBUG_USER & debug)
7827 pf->hw.debug_mask = debug;
7828 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7829 I40E_DEFAULT_MSG_ENABLE);
7832 /* Set default capability flags */
7833 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7834 I40E_FLAG_MSI_ENABLED |
7835 I40E_FLAG_MSIX_ENABLED;
7837 if (iommu_present(&pci_bus_type))
7838 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7840 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7842 /* Set default ITR */
7843 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7844 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7846 /* Depending on PF configurations, it is possible that the RSS
7847 * maximum might end up larger than the available queues
7849 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7851 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7852 pf->rss_size_max = min_t(int, pf->rss_size_max,
7853 pf->hw.func_caps.num_tx_qp);
7854 if (pf->hw.func_caps.rss) {
7855 pf->flags |= I40E_FLAG_RSS_ENABLED;
7856 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7859 /* MFP mode enabled */
7860 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7861 pf->flags |= I40E_FLAG_MFP_ENABLED;
7862 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7863 if (i40e_get_npar_bw_setting(pf))
7864 dev_warn(&pf->pdev->dev,
7865 "Could not get NPAR bw settings\n");
7867 dev_info(&pf->pdev->dev,
7868 "Min BW = %8.8x, Max BW = %8.8x\n",
7869 pf->npar_min_bw, pf->npar_max_bw);
7872 /* FW/NVM is not yet fixed in this regard */
7873 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7874 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7875 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7876 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7877 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7878 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7880 dev_info(&pf->pdev->dev,
7881 "Flow Director Sideband mode Disabled in MFP mode\n");
7883 pf->fdir_pf_filter_count =
7884 pf->hw.func_caps.fd_filters_guaranteed;
7885 pf->hw.fdir_shared_filter_count =
7886 pf->hw.func_caps.fd_filters_best_effort;
7889 if (pf->hw.func_caps.vmdq) {
7890 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7891 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7895 err = i40e_init_pf_fcoe(pf);
7897 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7899 #endif /* I40E_FCOE */
7900 #ifdef CONFIG_PCI_IOV
7901 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7902 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7903 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7904 pf->num_req_vfs = min_t(int,
7905 pf->hw.func_caps.num_vfs,
7908 #endif /* CONFIG_PCI_IOV */
7909 if (pf->hw.mac.type == I40E_MAC_X722) {
7910 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7911 I40E_FLAG_128_QP_RSS_CAPABLE |
7912 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7913 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7914 I40E_FLAG_WB_ON_ITR_CAPABLE |
7915 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7917 pf->eeprom_version = 0xDEAD;
7918 pf->lan_veb = I40E_NO_VEB;
7919 pf->lan_vsi = I40E_NO_VSI;
7921 /* set up queue assignment tracking */
7922 size = sizeof(struct i40e_lump_tracking)
7923 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7924 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7929 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7930 pf->qp_pile->search_hint = 0;
7932 pf->tx_timeout_recovery_level = 1;
7934 mutex_init(&pf->switch_mutex);
7936 /* If NPAR is enabled nudge the Tx scheduler */
7937 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
7938 i40e_set_npar_bw_setting(pf);
7945 * i40e_set_ntuple - set the ntuple feature flag and take action
7946 * @pf: board private structure to initialize
7947 * @features: the feature set that the stack is suggesting
7949 * returns a bool to indicate if reset needs to happen
7951 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7953 bool need_reset = false;
7955 /* Check if Flow Director n-tuple support was enabled or disabled. If
7956 * the state changed, we need to reset.
7958 if (features & NETIF_F_NTUPLE) {
7959 /* Enable filters and mark for reset */
7960 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7962 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7964 /* turn off filters, mark for reset and clear SW filter list */
7965 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7967 i40e_fdir_filter_exit(pf);
7969 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7970 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7971 /* reset fd counters */
7972 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7973 pf->fdir_pf_active_filters = 0;
7974 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7975 if (I40E_DEBUG_FD & pf->hw.debug_mask)
7976 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7977 /* if ATR was auto disabled it can be re-enabled. */
7978 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7979 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7980 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7986 * i40e_set_features - set the netdev feature flags
7987 * @netdev: ptr to the netdev being adjusted
7988 * @features: the feature set that the stack is suggesting
7990 static int i40e_set_features(struct net_device *netdev,
7991 netdev_features_t features)
7993 struct i40e_netdev_priv *np = netdev_priv(netdev);
7994 struct i40e_vsi *vsi = np->vsi;
7995 struct i40e_pf *pf = vsi->back;
7998 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7999 i40e_vlan_stripping_enable(vsi);
8001 i40e_vlan_stripping_disable(vsi);
8003 need_reset = i40e_set_ntuple(pf, features);
8006 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8011 #ifdef CONFIG_I40E_VXLAN
8013 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8014 * @pf: board private structure
8015 * @port: The UDP port to look up
8017 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8019 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8023 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8024 if (pf->vxlan_ports[i] == port)
8032 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8033 * @netdev: This physical port's netdev
8034 * @sa_family: Socket Family that VXLAN is notifying us about
8035 * @port: New UDP port number that VXLAN started listening to
8037 static void i40e_add_vxlan_port(struct net_device *netdev,
8038 sa_family_t sa_family, __be16 port)
8040 struct i40e_netdev_priv *np = netdev_priv(netdev);
8041 struct i40e_vsi *vsi = np->vsi;
8042 struct i40e_pf *pf = vsi->back;
8046 if (sa_family == AF_INET6)
8049 idx = i40e_get_vxlan_port_idx(pf, port);
8051 /* Check if port already exists */
8052 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8053 netdev_info(netdev, "vxlan port %d already offloaded\n",
8058 /* Now check if there is space to add the new port */
8059 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8061 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8062 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8067 /* New port: add it and mark its index in the bitmap */
8068 pf->vxlan_ports[next_idx] = port;
8069 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8070 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8074 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8075 * @netdev: This physical port's netdev
8076 * @sa_family: Socket Family that VXLAN is notifying us about
8077 * @port: UDP port number that VXLAN stopped listening to
8079 static void i40e_del_vxlan_port(struct net_device *netdev,
8080 sa_family_t sa_family, __be16 port)
8082 struct i40e_netdev_priv *np = netdev_priv(netdev);
8083 struct i40e_vsi *vsi = np->vsi;
8084 struct i40e_pf *pf = vsi->back;
8087 if (sa_family == AF_INET6)
8090 idx = i40e_get_vxlan_port_idx(pf, port);
8092 /* Check if port already exists */
8093 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8094 /* if port exists, set it to 0 (mark for deletion)
8095 * and make it pending
8097 pf->vxlan_ports[idx] = 0;
8098 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8099 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8101 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n",
8104 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8110 static int i40e_get_phys_port_id(struct net_device *netdev,
8111 struct netdev_phys_item_id *ppid)
8113 struct i40e_netdev_priv *np = netdev_priv(netdev);
8114 struct i40e_pf *pf = np->vsi->back;
8115 struct i40e_hw *hw = &pf->hw;
8117 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8120 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8121 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8127 * i40e_ndo_fdb_add - add an entry to the hardware database
8128 * @ndm: the input from the stack
8129 * @tb: pointer to array of nladdr (unused)
8130 * @dev: the net device pointer
8131 * @addr: the MAC address entry being added
8132 * @flags: instructions from stack about fdb operation
8134 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8135 struct net_device *dev,
8136 const unsigned char *addr, u16 vid,
8139 struct i40e_netdev_priv *np = netdev_priv(dev);
8140 struct i40e_pf *pf = np->vsi->back;
8143 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8147 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8151 /* Hardware does not support aging addresses so if a
8152 * ndm_state is given only allow permanent addresses
8154 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8155 netdev_info(dev, "FDB only supports static addresses\n");
8159 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8160 err = dev_uc_add_excl(dev, addr);
8161 else if (is_multicast_ether_addr(addr))
8162 err = dev_mc_add_excl(dev, addr);
8166 /* Only return duplicate errors if NLM_F_EXCL is set */
8167 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8174 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8175 * @dev: the netdev being configured
8176 * @nlh: RTNL message
8178 * Inserts a new hardware bridge if not already created and
8179 * enables the bridging mode requested (VEB or VEPA). If the
8180 * hardware bridge has already been inserted and the request
8181 * is to change the mode then that requires a PF reset to
8182 * allow rebuild of the components with required hardware
8183 * bridge mode enabled.
8185 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8186 struct nlmsghdr *nlh,
8189 struct i40e_netdev_priv *np = netdev_priv(dev);
8190 struct i40e_vsi *vsi = np->vsi;
8191 struct i40e_pf *pf = vsi->back;
8192 struct i40e_veb *veb = NULL;
8193 struct nlattr *attr, *br_spec;
8196 /* Only for PF VSI for now */
8197 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8200 /* Find the HW bridge for PF VSI */
8201 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8202 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8206 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8208 nla_for_each_nested(attr, br_spec, rem) {
8211 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8214 mode = nla_get_u16(attr);
8215 if ((mode != BRIDGE_MODE_VEPA) &&
8216 (mode != BRIDGE_MODE_VEB))
8219 /* Insert a new HW bridge */
8221 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8222 vsi->tc_config.enabled_tc);
8224 veb->bridge_mode = mode;
8225 i40e_config_bridge_mode(veb);
8227 /* No Bridge HW offload available */
8231 } else if (mode != veb->bridge_mode) {
8232 /* Existing HW bridge but different mode needs reset */
8233 veb->bridge_mode = mode;
8234 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8235 if (mode == BRIDGE_MODE_VEB)
8236 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8238 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8239 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8248 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8251 * @seq: RTNL message seq #
8252 * @dev: the netdev being configured
8253 * @filter_mask: unused
8255 * Return the mode in which the hardware bridge is operating in
8258 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8259 struct net_device *dev,
8260 u32 filter_mask, int nlflags)
8262 struct i40e_netdev_priv *np = netdev_priv(dev);
8263 struct i40e_vsi *vsi = np->vsi;
8264 struct i40e_pf *pf = vsi->back;
8265 struct i40e_veb *veb = NULL;
8268 /* Only for PF VSI for now */
8269 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8272 /* Find the HW bridge for the PF VSI */
8273 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8274 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8281 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8282 nlflags, 0, 0, filter_mask, NULL);
8285 #define I40E_MAX_TUNNEL_HDR_LEN 80
8287 * i40e_features_check - Validate encapsulated packet conforms to limits
8289 * @netdev: This physical port's netdev
8290 * @features: Offload features that the stack believes apply
8292 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8293 struct net_device *dev,
8294 netdev_features_t features)
8296 if (skb->encapsulation &&
8297 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8298 I40E_MAX_TUNNEL_HDR_LEN))
8299 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8304 static const struct net_device_ops i40e_netdev_ops = {
8305 .ndo_open = i40e_open,
8306 .ndo_stop = i40e_close,
8307 .ndo_start_xmit = i40e_lan_xmit_frame,
8308 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8309 .ndo_set_rx_mode = i40e_set_rx_mode,
8310 .ndo_validate_addr = eth_validate_addr,
8311 .ndo_set_mac_address = i40e_set_mac,
8312 .ndo_change_mtu = i40e_change_mtu,
8313 .ndo_do_ioctl = i40e_ioctl,
8314 .ndo_tx_timeout = i40e_tx_timeout,
8315 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8316 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8317 #ifdef CONFIG_NET_POLL_CONTROLLER
8318 .ndo_poll_controller = i40e_netpoll,
8320 .ndo_setup_tc = i40e_setup_tc,
8322 .ndo_fcoe_enable = i40e_fcoe_enable,
8323 .ndo_fcoe_disable = i40e_fcoe_disable,
8325 .ndo_set_features = i40e_set_features,
8326 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8327 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8328 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8329 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8330 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8331 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8332 #ifdef CONFIG_I40E_VXLAN
8333 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8334 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8336 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8337 .ndo_fdb_add = i40e_ndo_fdb_add,
8338 .ndo_features_check = i40e_features_check,
8339 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8340 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8344 * i40e_config_netdev - Setup the netdev flags
8345 * @vsi: the VSI being configured
8347 * Returns 0 on success, negative value on failure
8349 static int i40e_config_netdev(struct i40e_vsi *vsi)
8351 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8352 struct i40e_pf *pf = vsi->back;
8353 struct i40e_hw *hw = &pf->hw;
8354 struct i40e_netdev_priv *np;
8355 struct net_device *netdev;
8356 u8 mac_addr[ETH_ALEN];
8359 etherdev_size = sizeof(struct i40e_netdev_priv);
8360 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8364 vsi->netdev = netdev;
8365 np = netdev_priv(netdev);
8368 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8369 NETIF_F_GSO_UDP_TUNNEL |
8372 netdev->features = NETIF_F_SG |
8376 NETIF_F_GSO_UDP_TUNNEL |
8377 NETIF_F_HW_VLAN_CTAG_TX |
8378 NETIF_F_HW_VLAN_CTAG_RX |
8379 NETIF_F_HW_VLAN_CTAG_FILTER |
8388 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8389 netdev->features |= NETIF_F_NTUPLE;
8391 /* copy netdev features into list of user selectable features */
8392 netdev->hw_features |= netdev->features;
8394 if (vsi->type == I40E_VSI_MAIN) {
8395 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8396 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8397 /* The following steps are necessary to prevent reception
8398 * of tagged packets - some older NVM configurations load a
8399 * default a MAC-VLAN filter that accepts any tagged packet
8400 * which must be replaced by a normal filter.
8402 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8403 i40e_add_filter(vsi, mac_addr,
8404 I40E_VLAN_ANY, false, true);
8406 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8407 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8408 pf->vsi[pf->lan_vsi]->netdev->name);
8409 random_ether_addr(mac_addr);
8410 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8412 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8414 ether_addr_copy(netdev->dev_addr, mac_addr);
8415 ether_addr_copy(netdev->perm_addr, mac_addr);
8416 /* vlan gets same features (except vlan offload)
8417 * after any tweaks for specific VSI types
8419 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8420 NETIF_F_HW_VLAN_CTAG_RX |
8421 NETIF_F_HW_VLAN_CTAG_FILTER);
8422 netdev->priv_flags |= IFF_UNICAST_FLT;
8423 netdev->priv_flags |= IFF_SUPP_NOFCS;
8424 /* Setup netdev TC information */
8425 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8427 netdev->netdev_ops = &i40e_netdev_ops;
8428 netdev->watchdog_timeo = 5 * HZ;
8429 i40e_set_ethtool_ops(netdev);
8431 i40e_fcoe_config_netdev(netdev, vsi);
8438 * i40e_vsi_delete - Delete a VSI from the switch
8439 * @vsi: the VSI being removed
8441 * Returns 0 on success, negative value on failure
8443 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8445 /* remove default VSI is not allowed */
8446 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8449 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8453 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8454 * @vsi: the VSI being queried
8456 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8458 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8460 struct i40e_veb *veb;
8461 struct i40e_pf *pf = vsi->back;
8463 /* Uplink is not a bridge so default to VEB */
8464 if (vsi->veb_idx == I40E_NO_VEB)
8467 veb = pf->veb[vsi->veb_idx];
8468 /* Uplink is a bridge in VEPA mode */
8469 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8472 /* Uplink is a bridge in VEB mode */
8477 * i40e_add_vsi - Add a VSI to the switch
8478 * @vsi: the VSI being configured
8480 * This initializes a VSI context depending on the VSI type to be added and
8481 * passes it down to the add_vsi aq command.
8483 static int i40e_add_vsi(struct i40e_vsi *vsi)
8486 struct i40e_mac_filter *f, *ftmp;
8487 struct i40e_pf *pf = vsi->back;
8488 struct i40e_hw *hw = &pf->hw;
8489 struct i40e_vsi_context ctxt;
8490 u8 enabled_tc = 0x1; /* TC0 enabled */
8493 memset(&ctxt, 0, sizeof(ctxt));
8494 switch (vsi->type) {
8496 /* The PF's main VSI is already setup as part of the
8497 * device initialization, so we'll not bother with
8498 * the add_vsi call, but we will retrieve the current
8501 ctxt.seid = pf->main_vsi_seid;
8502 ctxt.pf_num = pf->hw.pf_id;
8504 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8505 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8507 dev_info(&pf->pdev->dev,
8508 "couldn't get PF vsi config, err %s aq_err %s\n",
8509 i40e_stat_str(&pf->hw, ret),
8510 i40e_aq_str(&pf->hw,
8511 pf->hw.aq.asq_last_status));
8514 vsi->info = ctxt.info;
8515 vsi->info.valid_sections = 0;
8517 vsi->seid = ctxt.seid;
8518 vsi->id = ctxt.vsi_number;
8520 enabled_tc = i40e_pf_get_tc_map(pf);
8522 /* MFP mode setup queue map and update VSI */
8523 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8524 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8525 memset(&ctxt, 0, sizeof(ctxt));
8526 ctxt.seid = pf->main_vsi_seid;
8527 ctxt.pf_num = pf->hw.pf_id;
8529 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8530 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8532 dev_info(&pf->pdev->dev,
8533 "update vsi failed, err %s aq_err %s\n",
8534 i40e_stat_str(&pf->hw, ret),
8535 i40e_aq_str(&pf->hw,
8536 pf->hw.aq.asq_last_status));
8540 /* update the local VSI info queue map */
8541 i40e_vsi_update_queue_map(vsi, &ctxt);
8542 vsi->info.valid_sections = 0;
8544 /* Default/Main VSI is only enabled for TC0
8545 * reconfigure it to enable all TCs that are
8546 * available on the port in SFP mode.
8547 * For MFP case the iSCSI PF would use this
8548 * flow to enable LAN+iSCSI TC.
8550 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8552 dev_info(&pf->pdev->dev,
8553 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8555 i40e_stat_str(&pf->hw, ret),
8556 i40e_aq_str(&pf->hw,
8557 pf->hw.aq.asq_last_status));
8564 ctxt.pf_num = hw->pf_id;
8566 ctxt.uplink_seid = vsi->uplink_seid;
8567 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8568 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8569 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8570 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8571 ctxt.info.valid_sections |=
8572 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8573 ctxt.info.switch_id =
8574 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8576 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8579 case I40E_VSI_VMDQ2:
8580 ctxt.pf_num = hw->pf_id;
8582 ctxt.uplink_seid = vsi->uplink_seid;
8583 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8584 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8586 /* This VSI is connected to VEB so the switch_id
8587 * should be set to zero by default.
8589 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8590 ctxt.info.valid_sections |=
8591 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8592 ctxt.info.switch_id =
8593 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8596 /* Setup the VSI tx/rx queue map for TC0 only for now */
8597 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8600 case I40E_VSI_SRIOV:
8601 ctxt.pf_num = hw->pf_id;
8602 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8603 ctxt.uplink_seid = vsi->uplink_seid;
8604 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8605 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8607 /* This VSI is connected to VEB so the switch_id
8608 * should be set to zero by default.
8610 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8611 ctxt.info.valid_sections |=
8612 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8613 ctxt.info.switch_id =
8614 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8617 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8618 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8619 if (pf->vf[vsi->vf_id].spoofchk) {
8620 ctxt.info.valid_sections |=
8621 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8622 ctxt.info.sec_flags |=
8623 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8624 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8626 /* Setup the VSI tx/rx queue map for TC0 only for now */
8627 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8632 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8634 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8639 #endif /* I40E_FCOE */
8644 if (vsi->type != I40E_VSI_MAIN) {
8645 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8647 dev_info(&vsi->back->pdev->dev,
8648 "add vsi failed, err %s aq_err %s\n",
8649 i40e_stat_str(&pf->hw, ret),
8650 i40e_aq_str(&pf->hw,
8651 pf->hw.aq.asq_last_status));
8655 vsi->info = ctxt.info;
8656 vsi->info.valid_sections = 0;
8657 vsi->seid = ctxt.seid;
8658 vsi->id = ctxt.vsi_number;
8661 /* If macvlan filters already exist, force them to get loaded */
8662 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8666 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8667 struct i40e_aqc_remove_macvlan_element_data element;
8669 memset(&element, 0, sizeof(element));
8670 ether_addr_copy(element.mac_addr, f->macaddr);
8671 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8672 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8675 /* some older FW has a different default */
8677 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8678 i40e_aq_remove_macvlan(hw, vsi->seid,
8682 i40e_aq_mac_address_write(hw,
8683 I40E_AQC_WRITE_TYPE_LAA_WOL,
8688 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8689 pf->flags |= I40E_FLAG_FILTER_SYNC;
8692 /* Update VSI BW information */
8693 ret = i40e_vsi_get_bw_info(vsi);
8695 dev_info(&pf->pdev->dev,
8696 "couldn't get vsi bw info, err %s aq_err %s\n",
8697 i40e_stat_str(&pf->hw, ret),
8698 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8699 /* VSI is already added so not tearing that up */
8708 * i40e_vsi_release - Delete a VSI and free its resources
8709 * @vsi: the VSI being removed
8711 * Returns 0 on success or < 0 on error
8713 int i40e_vsi_release(struct i40e_vsi *vsi)
8715 struct i40e_mac_filter *f, *ftmp;
8716 struct i40e_veb *veb = NULL;
8723 /* release of a VEB-owner or last VSI is not allowed */
8724 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8725 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8726 vsi->seid, vsi->uplink_seid);
8729 if (vsi == pf->vsi[pf->lan_vsi] &&
8730 !test_bit(__I40E_DOWN, &pf->state)) {
8731 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8735 uplink_seid = vsi->uplink_seid;
8736 if (vsi->type != I40E_VSI_SRIOV) {
8737 if (vsi->netdev_registered) {
8738 vsi->netdev_registered = false;
8740 /* results in a call to i40e_close() */
8741 unregister_netdev(vsi->netdev);
8744 i40e_vsi_close(vsi);
8746 i40e_vsi_disable_irq(vsi);
8749 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8750 i40e_del_filter(vsi, f->macaddr, f->vlan,
8751 f->is_vf, f->is_netdev);
8752 i40e_sync_vsi_filters(vsi);
8754 i40e_vsi_delete(vsi);
8755 i40e_vsi_free_q_vectors(vsi);
8757 free_netdev(vsi->netdev);
8760 i40e_vsi_clear_rings(vsi);
8761 i40e_vsi_clear(vsi);
8763 /* If this was the last thing on the VEB, except for the
8764 * controlling VSI, remove the VEB, which puts the controlling
8765 * VSI onto the next level down in the switch.
8767 * Well, okay, there's one more exception here: don't remove
8768 * the orphan VEBs yet. We'll wait for an explicit remove request
8769 * from up the network stack.
8771 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8773 pf->vsi[i]->uplink_seid == uplink_seid &&
8774 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8775 n++; /* count the VSIs */
8778 for (i = 0; i < I40E_MAX_VEB; i++) {
8781 if (pf->veb[i]->uplink_seid == uplink_seid)
8782 n++; /* count the VEBs */
8783 if (pf->veb[i]->seid == uplink_seid)
8786 if (n == 0 && veb && veb->uplink_seid != 0)
8787 i40e_veb_release(veb);
8793 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8794 * @vsi: ptr to the VSI
8796 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8797 * corresponding SW VSI structure and initializes num_queue_pairs for the
8798 * newly allocated VSI.
8800 * Returns 0 on success or negative on failure
8802 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8805 struct i40e_pf *pf = vsi->back;
8807 if (vsi->q_vectors[0]) {
8808 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8813 if (vsi->base_vector) {
8814 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8815 vsi->seid, vsi->base_vector);
8819 ret = i40e_vsi_alloc_q_vectors(vsi);
8821 dev_info(&pf->pdev->dev,
8822 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8823 vsi->num_q_vectors, vsi->seid, ret);
8824 vsi->num_q_vectors = 0;
8825 goto vector_setup_out;
8828 /* In Legacy mode, we do not have to get any other vector since we
8829 * piggyback on the misc/ICR0 for queue interrupts.
8831 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8833 if (vsi->num_q_vectors)
8834 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8835 vsi->num_q_vectors, vsi->idx);
8836 if (vsi->base_vector < 0) {
8837 dev_info(&pf->pdev->dev,
8838 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8839 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8840 i40e_vsi_free_q_vectors(vsi);
8842 goto vector_setup_out;
8850 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8851 * @vsi: pointer to the vsi.
8853 * This re-allocates a vsi's queue resources.
8855 * Returns pointer to the successfully allocated and configured VSI sw struct
8856 * on success, otherwise returns NULL on failure.
8858 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8860 struct i40e_pf *pf = vsi->back;
8864 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8865 i40e_vsi_clear_rings(vsi);
8867 i40e_vsi_free_arrays(vsi, false);
8868 i40e_set_num_rings_in_vsi(vsi);
8869 ret = i40e_vsi_alloc_arrays(vsi, false);
8873 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8875 dev_info(&pf->pdev->dev,
8876 "failed to get tracking for %d queues for VSI %d err %d\n",
8877 vsi->alloc_queue_pairs, vsi->seid, ret);
8880 vsi->base_queue = ret;
8882 /* Update the FW view of the VSI. Force a reset of TC and queue
8883 * layout configurations.
8885 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8886 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8887 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8888 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8890 /* assign it some queues */
8891 ret = i40e_alloc_rings(vsi);
8895 /* map all of the rings to the q_vectors */
8896 i40e_vsi_map_rings_to_vectors(vsi);
8900 i40e_vsi_free_q_vectors(vsi);
8901 if (vsi->netdev_registered) {
8902 vsi->netdev_registered = false;
8903 unregister_netdev(vsi->netdev);
8904 free_netdev(vsi->netdev);
8907 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8909 i40e_vsi_clear(vsi);
8914 * i40e_vsi_setup - Set up a VSI by a given type
8915 * @pf: board private structure
8917 * @uplink_seid: the switch element to link to
8918 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8920 * This allocates the sw VSI structure and its queue resources, then add a VSI
8921 * to the identified VEB.
8923 * Returns pointer to the successfully allocated and configure VSI sw struct on
8924 * success, otherwise returns NULL on failure.
8926 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8927 u16 uplink_seid, u32 param1)
8929 struct i40e_vsi *vsi = NULL;
8930 struct i40e_veb *veb = NULL;
8934 /* The requested uplink_seid must be either
8935 * - the PF's port seid
8936 * no VEB is needed because this is the PF
8937 * or this is a Flow Director special case VSI
8938 * - seid of an existing VEB
8939 * - seid of a VSI that owns an existing VEB
8940 * - seid of a VSI that doesn't own a VEB
8941 * a new VEB is created and the VSI becomes the owner
8942 * - seid of the PF VSI, which is what creates the first VEB
8943 * this is a special case of the previous
8945 * Find which uplink_seid we were given and create a new VEB if needed
8947 for (i = 0; i < I40E_MAX_VEB; i++) {
8948 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8954 if (!veb && uplink_seid != pf->mac_seid) {
8956 for (i = 0; i < pf->num_alloc_vsi; i++) {
8957 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8963 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8968 if (vsi->uplink_seid == pf->mac_seid)
8969 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8970 vsi->tc_config.enabled_tc);
8971 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8972 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8973 vsi->tc_config.enabled_tc);
8975 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8976 dev_info(&vsi->back->pdev->dev,
8977 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8981 /* We come up by default in VEPA mode if SRIOV is not
8982 * already enabled, in which case we can't force VEPA
8985 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
8986 veb->bridge_mode = BRIDGE_MODE_VEPA;
8987 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8989 i40e_config_bridge_mode(veb);
8991 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8992 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8996 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9000 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9001 uplink_seid = veb->seid;
9004 /* get vsi sw struct */
9005 v_idx = i40e_vsi_mem_alloc(pf, type);
9008 vsi = pf->vsi[v_idx];
9012 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9014 if (type == I40E_VSI_MAIN)
9015 pf->lan_vsi = v_idx;
9016 else if (type == I40E_VSI_SRIOV)
9017 vsi->vf_id = param1;
9018 /* assign it some queues */
9019 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9022 dev_info(&pf->pdev->dev,
9023 "failed to get tracking for %d queues for VSI %d err=%d\n",
9024 vsi->alloc_queue_pairs, vsi->seid, ret);
9027 vsi->base_queue = ret;
9029 /* get a VSI from the hardware */
9030 vsi->uplink_seid = uplink_seid;
9031 ret = i40e_add_vsi(vsi);
9035 switch (vsi->type) {
9036 /* setup the netdev if needed */
9038 case I40E_VSI_VMDQ2:
9040 ret = i40e_config_netdev(vsi);
9043 ret = register_netdev(vsi->netdev);
9046 vsi->netdev_registered = true;
9047 netif_carrier_off(vsi->netdev);
9048 #ifdef CONFIG_I40E_DCB
9049 /* Setup DCB netlink interface */
9050 i40e_dcbnl_setup(vsi);
9051 #endif /* CONFIG_I40E_DCB */
9055 /* set up vectors and rings if needed */
9056 ret = i40e_vsi_setup_vectors(vsi);
9060 ret = i40e_alloc_rings(vsi);
9064 /* map all of the rings to the q_vectors */
9065 i40e_vsi_map_rings_to_vectors(vsi);
9067 i40e_vsi_reset_stats(vsi);
9071 /* no netdev or rings for the other VSI types */
9075 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9076 (vsi->type == I40E_VSI_VMDQ2)) {
9077 ret = i40e_vsi_config_rss(vsi);
9082 i40e_vsi_free_q_vectors(vsi);
9084 if (vsi->netdev_registered) {
9085 vsi->netdev_registered = false;
9086 unregister_netdev(vsi->netdev);
9087 free_netdev(vsi->netdev);
9091 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9093 i40e_vsi_clear(vsi);
9099 * i40e_veb_get_bw_info - Query VEB BW information
9100 * @veb: the veb to query
9102 * Query the Tx scheduler BW configuration data for given VEB
9104 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9106 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9107 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9108 struct i40e_pf *pf = veb->pf;
9109 struct i40e_hw *hw = &pf->hw;
9114 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9117 dev_info(&pf->pdev->dev,
9118 "query veb bw config failed, err %s aq_err %s\n",
9119 i40e_stat_str(&pf->hw, ret),
9120 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9124 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9127 dev_info(&pf->pdev->dev,
9128 "query veb bw ets config failed, err %s aq_err %s\n",
9129 i40e_stat_str(&pf->hw, ret),
9130 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9134 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9135 veb->bw_max_quanta = ets_data.tc_bw_max;
9136 veb->is_abs_credits = bw_data.absolute_credits_enable;
9137 veb->enabled_tc = ets_data.tc_valid_bits;
9138 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9139 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9140 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9141 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9142 veb->bw_tc_limit_credits[i] =
9143 le16_to_cpu(bw_data.tc_bw_limits[i]);
9144 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9152 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9153 * @pf: board private structure
9155 * On error: returns error code (negative)
9156 * On success: returns vsi index in PF (positive)
9158 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9161 struct i40e_veb *veb;
9164 /* Need to protect the allocation of switch elements at the PF level */
9165 mutex_lock(&pf->switch_mutex);
9167 /* VEB list may be fragmented if VEB creation/destruction has
9168 * been happening. We can afford to do a quick scan to look
9169 * for any free slots in the list.
9171 * find next empty veb slot, looping back around if necessary
9174 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9176 if (i >= I40E_MAX_VEB) {
9178 goto err_alloc_veb; /* out of VEB slots! */
9181 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9188 veb->enabled_tc = 1;
9193 mutex_unlock(&pf->switch_mutex);
9198 * i40e_switch_branch_release - Delete a branch of the switch tree
9199 * @branch: where to start deleting
9201 * This uses recursion to find the tips of the branch to be
9202 * removed, deleting until we get back to and can delete this VEB.
9204 static void i40e_switch_branch_release(struct i40e_veb *branch)
9206 struct i40e_pf *pf = branch->pf;
9207 u16 branch_seid = branch->seid;
9208 u16 veb_idx = branch->idx;
9211 /* release any VEBs on this VEB - RECURSION */
9212 for (i = 0; i < I40E_MAX_VEB; i++) {
9215 if (pf->veb[i]->uplink_seid == branch->seid)
9216 i40e_switch_branch_release(pf->veb[i]);
9219 /* Release the VSIs on this VEB, but not the owner VSI.
9221 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9222 * the VEB itself, so don't use (*branch) after this loop.
9224 for (i = 0; i < pf->num_alloc_vsi; i++) {
9227 if (pf->vsi[i]->uplink_seid == branch_seid &&
9228 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9229 i40e_vsi_release(pf->vsi[i]);
9233 /* There's one corner case where the VEB might not have been
9234 * removed, so double check it here and remove it if needed.
9235 * This case happens if the veb was created from the debugfs
9236 * commands and no VSIs were added to it.
9238 if (pf->veb[veb_idx])
9239 i40e_veb_release(pf->veb[veb_idx]);
9243 * i40e_veb_clear - remove veb struct
9244 * @veb: the veb to remove
9246 static void i40e_veb_clear(struct i40e_veb *veb)
9252 struct i40e_pf *pf = veb->pf;
9254 mutex_lock(&pf->switch_mutex);
9255 if (pf->veb[veb->idx] == veb)
9256 pf->veb[veb->idx] = NULL;
9257 mutex_unlock(&pf->switch_mutex);
9264 * i40e_veb_release - Delete a VEB and free its resources
9265 * @veb: the VEB being removed
9267 void i40e_veb_release(struct i40e_veb *veb)
9269 struct i40e_vsi *vsi = NULL;
9275 /* find the remaining VSI and check for extras */
9276 for (i = 0; i < pf->num_alloc_vsi; i++) {
9277 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9283 dev_info(&pf->pdev->dev,
9284 "can't remove VEB %d with %d VSIs left\n",
9289 /* move the remaining VSI to uplink veb */
9290 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9291 if (veb->uplink_seid) {
9292 vsi->uplink_seid = veb->uplink_seid;
9293 if (veb->uplink_seid == pf->mac_seid)
9294 vsi->veb_idx = I40E_NO_VEB;
9296 vsi->veb_idx = veb->veb_idx;
9299 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9300 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9303 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9304 i40e_veb_clear(veb);
9308 * i40e_add_veb - create the VEB in the switch
9309 * @veb: the VEB to be instantiated
9310 * @vsi: the controlling VSI
9312 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9314 struct i40e_pf *pf = veb->pf;
9315 bool is_default = false;
9316 bool is_cloud = false;
9319 /* get a VEB from the hardware */
9320 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9321 veb->enabled_tc, is_default,
9322 is_cloud, &veb->seid, NULL);
9324 dev_info(&pf->pdev->dev,
9325 "couldn't add VEB, err %s aq_err %s\n",
9326 i40e_stat_str(&pf->hw, ret),
9327 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9331 /* get statistics counter */
9332 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9333 &veb->stats_idx, NULL, NULL, NULL);
9335 dev_info(&pf->pdev->dev,
9336 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9337 i40e_stat_str(&pf->hw, ret),
9338 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9341 ret = i40e_veb_get_bw_info(veb);
9343 dev_info(&pf->pdev->dev,
9344 "couldn't get VEB bw info, err %s aq_err %s\n",
9345 i40e_stat_str(&pf->hw, ret),
9346 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9347 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9351 vsi->uplink_seid = veb->seid;
9352 vsi->veb_idx = veb->idx;
9353 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9359 * i40e_veb_setup - Set up a VEB
9360 * @pf: board private structure
9361 * @flags: VEB setup flags
9362 * @uplink_seid: the switch element to link to
9363 * @vsi_seid: the initial VSI seid
9364 * @enabled_tc: Enabled TC bit-map
9366 * This allocates the sw VEB structure and links it into the switch
9367 * It is possible and legal for this to be a duplicate of an already
9368 * existing VEB. It is also possible for both uplink and vsi seids
9369 * to be zero, in order to create a floating VEB.
9371 * Returns pointer to the successfully allocated VEB sw struct on
9372 * success, otherwise returns NULL on failure.
9374 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9375 u16 uplink_seid, u16 vsi_seid,
9378 struct i40e_veb *veb, *uplink_veb = NULL;
9379 int vsi_idx, veb_idx;
9382 /* if one seid is 0, the other must be 0 to create a floating relay */
9383 if ((uplink_seid == 0 || vsi_seid == 0) &&
9384 (uplink_seid + vsi_seid != 0)) {
9385 dev_info(&pf->pdev->dev,
9386 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9387 uplink_seid, vsi_seid);
9391 /* make sure there is such a vsi and uplink */
9392 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9393 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9395 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9396 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9401 if (uplink_seid && uplink_seid != pf->mac_seid) {
9402 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9403 if (pf->veb[veb_idx] &&
9404 pf->veb[veb_idx]->seid == uplink_seid) {
9405 uplink_veb = pf->veb[veb_idx];
9410 dev_info(&pf->pdev->dev,
9411 "uplink seid %d not found\n", uplink_seid);
9416 /* get veb sw struct */
9417 veb_idx = i40e_veb_mem_alloc(pf);
9420 veb = pf->veb[veb_idx];
9422 veb->uplink_seid = uplink_seid;
9423 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9424 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9426 /* create the VEB in the switch */
9427 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9430 if (vsi_idx == pf->lan_vsi)
9431 pf->lan_veb = veb->idx;
9436 i40e_veb_clear(veb);
9442 * i40e_setup_pf_switch_element - set PF vars based on switch type
9443 * @pf: board private structure
9444 * @ele: element we are building info from
9445 * @num_reported: total number of elements
9446 * @printconfig: should we print the contents
9448 * helper function to assist in extracting a few useful SEID values.
9450 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9451 struct i40e_aqc_switch_config_element_resp *ele,
9452 u16 num_reported, bool printconfig)
9454 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9455 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9456 u8 element_type = ele->element_type;
9457 u16 seid = le16_to_cpu(ele->seid);
9460 dev_info(&pf->pdev->dev,
9461 "type=%d seid=%d uplink=%d downlink=%d\n",
9462 element_type, seid, uplink_seid, downlink_seid);
9464 switch (element_type) {
9465 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9466 pf->mac_seid = seid;
9468 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9470 if (uplink_seid != pf->mac_seid)
9472 if (pf->lan_veb == I40E_NO_VEB) {
9475 /* find existing or else empty VEB */
9476 for (v = 0; v < I40E_MAX_VEB; v++) {
9477 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9482 if (pf->lan_veb == I40E_NO_VEB) {
9483 v = i40e_veb_mem_alloc(pf);
9490 pf->veb[pf->lan_veb]->seid = seid;
9491 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9492 pf->veb[pf->lan_veb]->pf = pf;
9493 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9495 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9496 if (num_reported != 1)
9498 /* This is immediately after a reset so we can assume this is
9501 pf->mac_seid = uplink_seid;
9502 pf->pf_seid = downlink_seid;
9503 pf->main_vsi_seid = seid;
9505 dev_info(&pf->pdev->dev,
9506 "pf_seid=%d main_vsi_seid=%d\n",
9507 pf->pf_seid, pf->main_vsi_seid);
9509 case I40E_SWITCH_ELEMENT_TYPE_PF:
9510 case I40E_SWITCH_ELEMENT_TYPE_VF:
9511 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9512 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9513 case I40E_SWITCH_ELEMENT_TYPE_PE:
9514 case I40E_SWITCH_ELEMENT_TYPE_PA:
9515 /* ignore these for now */
9518 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9519 element_type, seid);
9525 * i40e_fetch_switch_configuration - Get switch config from firmware
9526 * @pf: board private structure
9527 * @printconfig: should we print the contents
9529 * Get the current switch configuration from the device and
9530 * extract a few useful SEID values.
9532 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9534 struct i40e_aqc_get_switch_config_resp *sw_config;
9540 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9544 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9546 u16 num_reported, num_total;
9548 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9552 dev_info(&pf->pdev->dev,
9553 "get switch config failed err %s aq_err %s\n",
9554 i40e_stat_str(&pf->hw, ret),
9555 i40e_aq_str(&pf->hw,
9556 pf->hw.aq.asq_last_status));
9561 num_reported = le16_to_cpu(sw_config->header.num_reported);
9562 num_total = le16_to_cpu(sw_config->header.num_total);
9565 dev_info(&pf->pdev->dev,
9566 "header: %d reported %d total\n",
9567 num_reported, num_total);
9569 for (i = 0; i < num_reported; i++) {
9570 struct i40e_aqc_switch_config_element_resp *ele =
9571 &sw_config->element[i];
9573 i40e_setup_pf_switch_element(pf, ele, num_reported,
9576 } while (next_seid != 0);
9583 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9584 * @pf: board private structure
9585 * @reinit: if the Main VSI needs to re-initialized.
9587 * Returns 0 on success, negative value on failure
9589 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9593 /* find out what's out there already */
9594 ret = i40e_fetch_switch_configuration(pf, false);
9596 dev_info(&pf->pdev->dev,
9597 "couldn't fetch switch config, err %s aq_err %s\n",
9598 i40e_stat_str(&pf->hw, ret),
9599 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9602 i40e_pf_reset_stats(pf);
9604 /* first time setup */
9605 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9606 struct i40e_vsi *vsi = NULL;
9609 /* Set up the PF VSI associated with the PF's main VSI
9610 * that is already in the HW switch
9612 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9613 uplink_seid = pf->veb[pf->lan_veb]->seid;
9615 uplink_seid = pf->mac_seid;
9616 if (pf->lan_vsi == I40E_NO_VSI)
9617 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9619 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9621 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9622 i40e_fdir_teardown(pf);
9626 /* force a reset of TC and queue layout configurations */
9627 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9628 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9629 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9630 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9632 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9634 i40e_fdir_sb_setup(pf);
9636 /* Setup static PF queue filter control settings */
9637 ret = i40e_setup_pf_filter_control(pf);
9639 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9641 /* Failure here should not stop continuing other steps */
9644 /* enable RSS in the HW, even for only one queue, as the stack can use
9647 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9648 i40e_config_rss(pf);
9650 /* fill in link information and enable LSE reporting */
9651 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9652 i40e_link_event(pf);
9654 /* Initialize user-specific link properties */
9655 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9656 I40E_AQ_AN_COMPLETED) ? true : false);
9664 * i40e_determine_queue_usage - Work out queue distribution
9665 * @pf: board private structure
9667 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9671 pf->num_lan_qps = 0;
9673 pf->num_fcoe_qps = 0;
9676 /* Find the max queues to be put into basic use. We'll always be
9677 * using TC0, whether or not DCB is running, and TC0 will get the
9680 queues_left = pf->hw.func_caps.num_tx_qp;
9682 if ((queues_left == 1) ||
9683 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9684 /* one qp for PF, no queues for anything else */
9686 pf->rss_size = pf->num_lan_qps = 1;
9688 /* make sure all the fancies are disabled */
9689 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9691 I40E_FLAG_FCOE_ENABLED |
9693 I40E_FLAG_FD_SB_ENABLED |
9694 I40E_FLAG_FD_ATR_ENABLED |
9695 I40E_FLAG_DCB_CAPABLE |
9696 I40E_FLAG_SRIOV_ENABLED |
9697 I40E_FLAG_VMDQ_ENABLED);
9698 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9699 I40E_FLAG_FD_SB_ENABLED |
9700 I40E_FLAG_FD_ATR_ENABLED |
9701 I40E_FLAG_DCB_CAPABLE))) {
9703 pf->rss_size = pf->num_lan_qps = 1;
9704 queues_left -= pf->num_lan_qps;
9706 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9708 I40E_FLAG_FCOE_ENABLED |
9710 I40E_FLAG_FD_SB_ENABLED |
9711 I40E_FLAG_FD_ATR_ENABLED |
9712 I40E_FLAG_DCB_ENABLED |
9713 I40E_FLAG_VMDQ_ENABLED);
9715 /* Not enough queues for all TCs */
9716 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9717 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9718 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9719 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9721 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9723 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9724 pf->hw.func_caps.num_tx_qp);
9726 queues_left -= pf->num_lan_qps;
9730 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9731 if (I40E_DEFAULT_FCOE <= queues_left) {
9732 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9733 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9734 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9736 pf->num_fcoe_qps = 0;
9737 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9738 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9741 queues_left -= pf->num_fcoe_qps;
9745 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9746 if (queues_left > 1) {
9747 queues_left -= 1; /* save 1 queue for FD */
9749 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9750 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9754 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9755 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9756 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9757 (queues_left / pf->num_vf_qps));
9758 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9761 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9762 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9763 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9764 (queues_left / pf->num_vmdq_qps));
9765 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9768 pf->queues_left = queues_left;
9770 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9775 * i40e_setup_pf_filter_control - Setup PF static filter control
9776 * @pf: PF to be setup
9778 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9779 * settings. If PE/FCoE are enabled then it will also set the per PF
9780 * based filter sizes required for them. It also enables Flow director,
9781 * ethertype and macvlan type filter settings for the pf.
9783 * Returns 0 on success, negative on failure
9785 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9787 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9789 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9791 /* Flow Director is enabled */
9792 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9793 settings->enable_fdir = true;
9795 /* Ethtype and MACVLAN filters enabled for PF */
9796 settings->enable_ethtype = true;
9797 settings->enable_macvlan = true;
9799 if (i40e_set_filter_control(&pf->hw, settings))
9805 #define INFO_STRING_LEN 255
9806 static void i40e_print_features(struct i40e_pf *pf)
9808 struct i40e_hw *hw = &pf->hw;
9811 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9813 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9819 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9820 #ifdef CONFIG_PCI_IOV
9821 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9823 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9824 pf->hw.func_caps.num_vsis,
9825 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9826 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9828 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9829 buf += sprintf(buf, "RSS ");
9830 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9831 buf += sprintf(buf, "FD_ATR ");
9832 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9833 buf += sprintf(buf, "FD_SB ");
9834 buf += sprintf(buf, "NTUPLE ");
9836 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9837 buf += sprintf(buf, "DCB ");
9838 if (pf->flags & I40E_FLAG_PTP)
9839 buf += sprintf(buf, "PTP ");
9841 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9842 buf += sprintf(buf, "FCOE ");
9845 BUG_ON(buf > (string + INFO_STRING_LEN));
9846 dev_info(&pf->pdev->dev, "%s\n", string);
9851 * i40e_probe - Device initialization routine
9852 * @pdev: PCI device information struct
9853 * @ent: entry in i40e_pci_tbl
9855 * i40e_probe initializes a PF identified by a pci_dev structure.
9856 * The OS initialization, configuring of the PF private structure,
9857 * and a hardware reset occur.
9859 * Returns 0 on success, negative on failure
9861 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9863 struct i40e_aq_get_phy_abilities_resp abilities;
9864 unsigned long ioremap_len;
9867 static u16 pfs_found;
9873 err = pci_enable_device_mem(pdev);
9877 /* set up for high or low dma */
9878 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9880 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9883 "DMA configuration failed: 0x%x\n", err);
9888 /* set up pci connections */
9889 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9890 IORESOURCE_MEM), i40e_driver_name);
9892 dev_info(&pdev->dev,
9893 "pci_request_selected_regions failed %d\n", err);
9897 pci_enable_pcie_error_reporting(pdev);
9898 pci_set_master(pdev);
9900 /* Now that we have a PCI connection, we need to do the
9901 * low level device setup. This is primarily setting up
9902 * the Admin Queue structures and then querying for the
9903 * device's current profile information.
9905 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9912 set_bit(__I40E_DOWN, &pf->state);
9917 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9918 I40E_MAX_CSR_SPACE);
9920 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
9923 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9924 (unsigned int)pci_resource_start(pdev, 0),
9925 (unsigned int)pci_resource_len(pdev, 0), err);
9928 hw->vendor_id = pdev->vendor;
9929 hw->device_id = pdev->device;
9930 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9931 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9932 hw->subsystem_device_id = pdev->subsystem_device;
9933 hw->bus.device = PCI_SLOT(pdev->devfn);
9934 hw->bus.func = PCI_FUNC(pdev->devfn);
9935 pf->instance = pfs_found;
9938 pf->msg_enable = pf->hw.debug_mask;
9939 pf->msg_enable = debug;
9942 /* do a special CORER for clearing PXE mode once at init */
9943 if (hw->revision_id == 0 &&
9944 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9945 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9950 i40e_clear_pxe_mode(hw);
9953 /* Reset here to make sure all is clean and to define PF 'n' */
9955 err = i40e_pf_reset(hw);
9957 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9962 hw->aq.num_arq_entries = I40E_AQ_LEN;
9963 hw->aq.num_asq_entries = I40E_AQ_LEN;
9964 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9965 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9966 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9968 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9970 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9972 err = i40e_init_shared_code(hw);
9974 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
9979 /* set up a default setting for link flow control */
9980 pf->hw.fc.requested_mode = I40E_FC_NONE;
9982 err = i40e_init_adminq(hw);
9983 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9985 dev_info(&pdev->dev,
9986 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9990 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9991 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9992 dev_info(&pdev->dev,
9993 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9994 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9995 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9996 dev_info(&pdev->dev,
9997 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9999 i40e_verify_eeprom(pf);
10001 /* Rev 0 hardware was never productized */
10002 if (hw->revision_id < 1)
10003 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10005 i40e_clear_pxe_mode(hw);
10006 err = i40e_get_capabilities(pf);
10008 goto err_adminq_setup;
10010 err = i40e_sw_init(pf);
10012 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10016 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10017 hw->func_caps.num_rx_qp,
10018 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10020 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10021 goto err_init_lan_hmc;
10024 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10026 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10028 goto err_configure_lan_hmc;
10031 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10032 * Ignore error return codes because if it was already disabled via
10033 * hardware settings this will fail
10035 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10036 (pf->hw.aq.fw_maj_ver < 4)) {
10037 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10038 i40e_aq_stop_lldp(hw, true, NULL);
10041 i40e_get_mac_addr(hw, hw->mac.addr);
10042 if (!is_valid_ether_addr(hw->mac.addr)) {
10043 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10047 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10048 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10049 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10050 if (is_valid_ether_addr(hw->mac.port_addr))
10051 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10053 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10055 dev_info(&pdev->dev,
10056 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10057 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10058 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10060 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10062 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10063 #endif /* I40E_FCOE */
10065 pci_set_drvdata(pdev, pf);
10066 pci_save_state(pdev);
10067 #ifdef CONFIG_I40E_DCB
10068 err = i40e_init_pf_dcb(pf);
10070 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10071 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10072 /* Continue without DCB enabled */
10074 #endif /* CONFIG_I40E_DCB */
10076 /* set up periodic task facility */
10077 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10078 pf->service_timer_period = HZ;
10080 INIT_WORK(&pf->service_task, i40e_service_task);
10081 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10082 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10083 pf->link_check_timeout = jiffies;
10085 /* WoL defaults to disabled */
10086 pf->wol_en = false;
10087 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10089 /* set up the main switch operations */
10090 i40e_determine_queue_usage(pf);
10091 err = i40e_init_interrupt_scheme(pf);
10093 goto err_switch_setup;
10095 /* The number of VSIs reported by the FW is the minimum guaranteed
10096 * to us; HW supports far more and we share the remaining pool with
10097 * the other PFs. We allocate space for more than the guarantee with
10098 * the understanding that we might not get them all later.
10100 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10101 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10103 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10105 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10106 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10107 pf->vsi = kzalloc(len, GFP_KERNEL);
10110 goto err_switch_setup;
10113 #ifdef CONFIG_PCI_IOV
10114 /* prep for VF support */
10115 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10116 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10117 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10118 if (pci_num_vf(pdev))
10119 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10122 err = i40e_setup_pf_switch(pf, false);
10124 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10127 /* if FDIR VSI was set up, start it now */
10128 for (i = 0; i < pf->num_alloc_vsi; i++) {
10129 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10130 i40e_vsi_open(pf->vsi[i]);
10135 /* driver is only interested in link up/down and module qualification
10136 * reports from firmware
10138 err = i40e_aq_set_phy_int_mask(&pf->hw,
10139 I40E_AQ_EVENT_LINK_UPDOWN |
10140 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10142 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10143 i40e_stat_str(&pf->hw, err),
10144 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10146 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10147 (pf->hw.aq.fw_maj_ver < 4)) {
10149 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10151 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10152 i40e_stat_str(&pf->hw, err),
10153 i40e_aq_str(&pf->hw,
10154 pf->hw.aq.asq_last_status));
10156 /* The main driver is (mostly) up and happy. We need to set this state
10157 * before setting up the misc vector or we get a race and the vector
10158 * ends up disabled forever.
10160 clear_bit(__I40E_DOWN, &pf->state);
10162 /* In case of MSIX we are going to setup the misc vector right here
10163 * to handle admin queue events etc. In case of legacy and MSI
10164 * the misc functionality and queue processing is combined in
10165 * the same vector and that gets setup at open.
10167 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10168 err = i40e_setup_misc_vector(pf);
10170 dev_info(&pdev->dev,
10171 "setup of misc vector failed: %d\n", err);
10176 #ifdef CONFIG_PCI_IOV
10177 /* prep for VF support */
10178 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10179 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10180 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10183 /* disable link interrupts for VFs */
10184 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10185 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10186 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10189 if (pci_num_vf(pdev)) {
10190 dev_info(&pdev->dev,
10191 "Active VFs found, allocating resources.\n");
10192 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10194 dev_info(&pdev->dev,
10195 "Error %d allocating resources for existing VFs\n",
10199 #endif /* CONFIG_PCI_IOV */
10203 i40e_dbg_pf_init(pf);
10205 /* tell the firmware that we're starting */
10206 i40e_send_version(pf);
10208 /* since everything's happy, start the service_task timer */
10209 mod_timer(&pf->service_timer,
10210 round_jiffies(jiffies + pf->service_timer_period));
10213 /* create FCoE interface */
10214 i40e_fcoe_vsi_setup(pf);
10217 /* Get the negotiated link width and speed from PCI config space */
10218 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10220 i40e_set_pci_config_data(hw, link_status);
10222 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10223 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10224 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10225 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10227 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10228 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10229 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10230 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10233 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10234 hw->bus.speed < i40e_bus_speed_8000) {
10235 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10236 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10239 /* get the requested speeds from the fw */
10240 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10242 dev_info(&pf->pdev->dev,
10243 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10244 i40e_stat_str(&pf->hw, err),
10245 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10246 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10248 /* print a string summarizing features */
10249 i40e_print_features(pf);
10253 /* Unwind what we've done if something failed in the setup */
10255 set_bit(__I40E_DOWN, &pf->state);
10256 i40e_clear_interrupt_scheme(pf);
10259 i40e_reset_interrupt_capability(pf);
10260 del_timer_sync(&pf->service_timer);
10262 err_configure_lan_hmc:
10263 (void)i40e_shutdown_lan_hmc(hw);
10265 kfree(pf->qp_pile);
10268 (void)i40e_shutdown_adminq(hw);
10270 iounmap(hw->hw_addr);
10274 pci_disable_pcie_error_reporting(pdev);
10275 pci_release_selected_regions(pdev,
10276 pci_select_bars(pdev, IORESOURCE_MEM));
10279 pci_disable_device(pdev);
10284 * i40e_remove - Device removal routine
10285 * @pdev: PCI device information struct
10287 * i40e_remove is called by the PCI subsystem to alert the driver
10288 * that is should release a PCI device. This could be caused by a
10289 * Hot-Plug event, or because the driver is going to be removed from
10292 static void i40e_remove(struct pci_dev *pdev)
10294 struct i40e_pf *pf = pci_get_drvdata(pdev);
10295 i40e_status ret_code;
10298 i40e_dbg_pf_exit(pf);
10302 /* no more scheduling of any task */
10303 set_bit(__I40E_DOWN, &pf->state);
10304 del_timer_sync(&pf->service_timer);
10305 cancel_work_sync(&pf->service_task);
10306 i40e_fdir_teardown(pf);
10308 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10310 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10313 i40e_fdir_teardown(pf);
10315 /* If there is a switch structure or any orphans, remove them.
10316 * This will leave only the PF's VSI remaining.
10318 for (i = 0; i < I40E_MAX_VEB; i++) {
10322 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10323 pf->veb[i]->uplink_seid == 0)
10324 i40e_switch_branch_release(pf->veb[i]);
10327 /* Now we can shutdown the PF's VSI, just before we kill
10330 if (pf->vsi[pf->lan_vsi])
10331 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10333 /* shutdown and destroy the HMC */
10334 if (pf->hw.hmc.hmc_obj) {
10335 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10337 dev_warn(&pdev->dev,
10338 "Failed to destroy the HMC resources: %d\n",
10342 /* shutdown the adminq */
10343 ret_code = i40e_shutdown_adminq(&pf->hw);
10345 dev_warn(&pdev->dev,
10346 "Failed to destroy the Admin Queue resources: %d\n",
10349 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10350 i40e_clear_interrupt_scheme(pf);
10351 for (i = 0; i < pf->num_alloc_vsi; i++) {
10353 i40e_vsi_clear_rings(pf->vsi[i]);
10354 i40e_vsi_clear(pf->vsi[i]);
10359 for (i = 0; i < I40E_MAX_VEB; i++) {
10364 kfree(pf->qp_pile);
10367 iounmap(pf->hw.hw_addr);
10369 pci_release_selected_regions(pdev,
10370 pci_select_bars(pdev, IORESOURCE_MEM));
10372 pci_disable_pcie_error_reporting(pdev);
10373 pci_disable_device(pdev);
10377 * i40e_pci_error_detected - warning that something funky happened in PCI land
10378 * @pdev: PCI device information struct
10380 * Called to warn that something happened and the error handling steps
10381 * are in progress. Allows the driver to quiesce things, be ready for
10384 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10385 enum pci_channel_state error)
10387 struct i40e_pf *pf = pci_get_drvdata(pdev);
10389 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10391 /* shutdown all operations */
10392 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10394 i40e_prep_for_reset(pf);
10398 /* Request a slot reset */
10399 return PCI_ERS_RESULT_NEED_RESET;
10403 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10404 * @pdev: PCI device information struct
10406 * Called to find if the driver can work with the device now that
10407 * the pci slot has been reset. If a basic connection seems good
10408 * (registers are readable and have sane content) then return a
10409 * happy little PCI_ERS_RESULT_xxx.
10411 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10413 struct i40e_pf *pf = pci_get_drvdata(pdev);
10414 pci_ers_result_t result;
10418 dev_info(&pdev->dev, "%s\n", __func__);
10419 if (pci_enable_device_mem(pdev)) {
10420 dev_info(&pdev->dev,
10421 "Cannot re-enable PCI device after reset.\n");
10422 result = PCI_ERS_RESULT_DISCONNECT;
10424 pci_set_master(pdev);
10425 pci_restore_state(pdev);
10426 pci_save_state(pdev);
10427 pci_wake_from_d3(pdev, false);
10429 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10431 result = PCI_ERS_RESULT_RECOVERED;
10433 result = PCI_ERS_RESULT_DISCONNECT;
10436 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10438 dev_info(&pdev->dev,
10439 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10441 /* non-fatal, continue */
10448 * i40e_pci_error_resume - restart operations after PCI error recovery
10449 * @pdev: PCI device information struct
10451 * Called to allow the driver to bring things back up after PCI error
10452 * and/or reset recovery has finished.
10454 static void i40e_pci_error_resume(struct pci_dev *pdev)
10456 struct i40e_pf *pf = pci_get_drvdata(pdev);
10458 dev_info(&pdev->dev, "%s\n", __func__);
10459 if (test_bit(__I40E_SUSPENDED, &pf->state))
10463 i40e_handle_reset_warning(pf);
10468 * i40e_shutdown - PCI callback for shutting down
10469 * @pdev: PCI device information struct
10471 static void i40e_shutdown(struct pci_dev *pdev)
10473 struct i40e_pf *pf = pci_get_drvdata(pdev);
10474 struct i40e_hw *hw = &pf->hw;
10476 set_bit(__I40E_SUSPENDED, &pf->state);
10477 set_bit(__I40E_DOWN, &pf->state);
10479 i40e_prep_for_reset(pf);
10482 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10483 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10485 del_timer_sync(&pf->service_timer);
10486 cancel_work_sync(&pf->service_task);
10487 i40e_fdir_teardown(pf);
10490 i40e_prep_for_reset(pf);
10493 wr32(hw, I40E_PFPM_APM,
10494 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10495 wr32(hw, I40E_PFPM_WUFC,
10496 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10498 i40e_clear_interrupt_scheme(pf);
10500 if (system_state == SYSTEM_POWER_OFF) {
10501 pci_wake_from_d3(pdev, pf->wol_en);
10502 pci_set_power_state(pdev, PCI_D3hot);
10508 * i40e_suspend - PCI callback for moving to D3
10509 * @pdev: PCI device information struct
10511 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10513 struct i40e_pf *pf = pci_get_drvdata(pdev);
10514 struct i40e_hw *hw = &pf->hw;
10516 set_bit(__I40E_SUSPENDED, &pf->state);
10517 set_bit(__I40E_DOWN, &pf->state);
10520 i40e_prep_for_reset(pf);
10523 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10524 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10526 pci_wake_from_d3(pdev, pf->wol_en);
10527 pci_set_power_state(pdev, PCI_D3hot);
10533 * i40e_resume - PCI callback for waking up from D3
10534 * @pdev: PCI device information struct
10536 static int i40e_resume(struct pci_dev *pdev)
10538 struct i40e_pf *pf = pci_get_drvdata(pdev);
10541 pci_set_power_state(pdev, PCI_D0);
10542 pci_restore_state(pdev);
10543 /* pci_restore_state() clears dev->state_saves, so
10544 * call pci_save_state() again to restore it.
10546 pci_save_state(pdev);
10548 err = pci_enable_device_mem(pdev);
10550 dev_err(&pdev->dev,
10551 "%s: Cannot enable PCI device from suspend\n",
10555 pci_set_master(pdev);
10557 /* no wakeup events while running */
10558 pci_wake_from_d3(pdev, false);
10560 /* handling the reset will rebuild the device state */
10561 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10562 clear_bit(__I40E_DOWN, &pf->state);
10564 i40e_reset_and_rebuild(pf, false);
10572 static const struct pci_error_handlers i40e_err_handler = {
10573 .error_detected = i40e_pci_error_detected,
10574 .slot_reset = i40e_pci_error_slot_reset,
10575 .resume = i40e_pci_error_resume,
10578 static struct pci_driver i40e_driver = {
10579 .name = i40e_driver_name,
10580 .id_table = i40e_pci_tbl,
10581 .probe = i40e_probe,
10582 .remove = i40e_remove,
10584 .suspend = i40e_suspend,
10585 .resume = i40e_resume,
10587 .shutdown = i40e_shutdown,
10588 .err_handler = &i40e_err_handler,
10589 .sriov_configure = i40e_pci_sriov_configure,
10593 * i40e_init_module - Driver registration routine
10595 * i40e_init_module is the first routine called when the driver is
10596 * loaded. All it does is register with the PCI subsystem.
10598 static int __init i40e_init_module(void)
10600 pr_info("%s: %s - version %s\n", i40e_driver_name,
10601 i40e_driver_string, i40e_driver_version_str);
10602 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10605 return pci_register_driver(&i40e_driver);
10607 module_init(i40e_init_module);
10610 * i40e_exit_module - Driver exit cleanup routine
10612 * i40e_exit_module is called just before the driver is removed
10615 static void __exit i40e_exit_module(void)
10617 pci_unregister_driver(&i40e_driver);
10620 module_exit(i40e_exit_module);