1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 28
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
221 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
847 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
848 pf->stat_offsets_loaded,
849 &osd->priority_xoff_rx[i],
850 &nsd->priority_xoff_rx[i]);
852 /* No new PFC xoff rx */
853 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
855 /* Get the TC for given priority */
856 tc = dcb_cfg->etscfg.prioritytable[i];
862 * i40e_update_vsi_stats - Update the vsi statistics counters.
863 * @vsi: the VSI to be updated
865 * There are a few instances where we store the same stat in a
866 * couple of different structs. This is partly because we have
867 * the netdev stats that need to be filled out, which is slightly
868 * different from the "eth_stats" defined by the chip and used in
869 * VF communications. We sort it out here.
871 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
873 struct i40e_pf *pf = vsi->back;
874 struct rtnl_link_stats64 *ons;
875 struct rtnl_link_stats64 *ns; /* netdev stats */
876 struct i40e_eth_stats *oes;
877 struct i40e_eth_stats *es; /* device's eth stats */
878 u32 tx_restart, tx_busy;
888 if (test_bit(__I40E_DOWN, &vsi->state) ||
889 test_bit(__I40E_CONFIG_BUSY, &pf->state))
892 ns = i40e_get_vsi_stats_struct(vsi);
893 ons = &vsi->net_stats_offsets;
894 es = &vsi->eth_stats;
895 oes = &vsi->eth_stats_offsets;
897 /* Gather up the netdev and vsi stats that the driver collects
898 * on the fly during packet processing
902 tx_restart = tx_busy = tx_linearize = 0;
906 for (q = 0; q < vsi->num_queue_pairs; q++) {
908 p = ACCESS_ONCE(vsi->tx_rings[q]);
911 start = u64_stats_fetch_begin_irq(&p->syncp);
912 packets = p->stats.packets;
913 bytes = p->stats.bytes;
914 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
917 tx_restart += p->tx_stats.restart_queue;
918 tx_busy += p->tx_stats.tx_busy;
919 tx_linearize += p->tx_stats.tx_linearize;
921 /* Rx queue is part of the same block as Tx queue */
924 start = u64_stats_fetch_begin_irq(&p->syncp);
925 packets = p->stats.packets;
926 bytes = p->stats.bytes;
927 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
930 rx_buf += p->rx_stats.alloc_buff_failed;
931 rx_page += p->rx_stats.alloc_page_failed;
934 vsi->tx_restart = tx_restart;
935 vsi->tx_busy = tx_busy;
936 vsi->tx_linearize = tx_linearize;
937 vsi->rx_page_failed = rx_page;
938 vsi->rx_buf_failed = rx_buf;
940 ns->rx_packets = rx_p;
942 ns->tx_packets = tx_p;
945 /* update netdev stats from eth stats */
946 i40e_update_eth_stats(vsi);
947 ons->tx_errors = oes->tx_errors;
948 ns->tx_errors = es->tx_errors;
949 ons->multicast = oes->rx_multicast;
950 ns->multicast = es->rx_multicast;
951 ons->rx_dropped = oes->rx_discards;
952 ns->rx_dropped = es->rx_discards;
953 ons->tx_dropped = oes->tx_discards;
954 ns->tx_dropped = es->tx_discards;
956 /* pull in a couple PF stats if this is the main vsi */
957 if (vsi == pf->vsi[pf->lan_vsi]) {
958 ns->rx_crc_errors = pf->stats.crc_errors;
959 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
960 ns->rx_length_errors = pf->stats.rx_length_errors;
965 * i40e_update_pf_stats - Update the PF statistics counters.
966 * @pf: the PF to be updated
968 static void i40e_update_pf_stats(struct i40e_pf *pf)
970 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
971 struct i40e_hw_port_stats *nsd = &pf->stats;
972 struct i40e_hw *hw = &pf->hw;
976 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
977 I40E_GLPRT_GORCL(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
980 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
981 I40E_GLPRT_GOTCL(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
984 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->eth.rx_discards,
987 &nsd->eth.rx_discards);
988 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
989 I40E_GLPRT_UPRCL(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_unicast,
992 &nsd->eth.rx_unicast);
993 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
994 I40E_GLPRT_MPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_multicast,
997 &nsd->eth.rx_multicast);
998 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
999 I40E_GLPRT_BPRCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.rx_broadcast,
1002 &nsd->eth.rx_broadcast);
1003 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1004 I40E_GLPRT_UPTCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.tx_unicast,
1007 &nsd->eth.tx_unicast);
1008 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1009 I40E_GLPRT_MPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_multicast,
1012 &nsd->eth.tx_multicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1014 I40E_GLPRT_BPTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_broadcast,
1017 &nsd->eth.tx_broadcast);
1019 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->tx_dropped_link_down,
1022 &nsd->tx_dropped_link_down);
1024 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->crc_errors, &nsd->crc_errors);
1028 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->illegal_bytes, &nsd->illegal_bytes);
1032 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->mac_local_faults,
1035 &nsd->mac_local_faults);
1036 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->mac_remote_faults,
1039 &nsd->mac_remote_faults);
1041 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_length_errors,
1044 &nsd->rx_length_errors);
1046 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->link_xon_rx, &nsd->link_xon_rx);
1049 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xon_tx, &nsd->link_xon_tx);
1052 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1053 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1057 for (i = 0; i < 8; i++) {
1058 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xon_rx[i],
1061 &nsd->priority_xon_rx[i]);
1062 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1063 pf->stat_offsets_loaded,
1064 &osd->priority_xon_tx[i],
1065 &nsd->priority_xon_tx[i]);
1066 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1067 pf->stat_offsets_loaded,
1068 &osd->priority_xoff_tx[i],
1069 &nsd->priority_xoff_tx[i]);
1070 i40e_stat_update32(hw,
1071 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1072 pf->stat_offsets_loaded,
1073 &osd->priority_xon_2_xoff[i],
1074 &nsd->priority_xon_2_xoff[i]);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1078 I40E_GLPRT_PRC64L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_64, &nsd->rx_size_64);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1082 I40E_GLPRT_PRC127L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_127, &nsd->rx_size_127);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1086 I40E_GLPRT_PRC255L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_255, &nsd->rx_size_255);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1090 I40E_GLPRT_PRC511L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_511, &nsd->rx_size_511);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1094 I40E_GLPRT_PRC1023L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_1023, &nsd->rx_size_1023);
1097 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1098 I40E_GLPRT_PRC1522L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_size_1522, &nsd->rx_size_1522);
1101 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1102 I40E_GLPRT_PRC9522L(hw->port),
1103 pf->stat_offsets_loaded,
1104 &osd->rx_size_big, &nsd->rx_size_big);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1107 I40E_GLPRT_PTC64L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_64, &nsd->tx_size_64);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1111 I40E_GLPRT_PTC127L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_127, &nsd->tx_size_127);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1115 I40E_GLPRT_PTC255L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_255, &nsd->tx_size_255);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1119 I40E_GLPRT_PTC511L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_511, &nsd->tx_size_511);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1123 I40E_GLPRT_PTC1023L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_1023, &nsd->tx_size_1023);
1126 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1127 I40E_GLPRT_PTC1522L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->tx_size_1522, &nsd->tx_size_1522);
1130 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1131 I40E_GLPRT_PTC9522L(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->tx_size_big, &nsd->tx_size_big);
1135 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1136 pf->stat_offsets_loaded,
1137 &osd->rx_undersize, &nsd->rx_undersize);
1138 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1139 pf->stat_offsets_loaded,
1140 &osd->rx_fragments, &nsd->rx_fragments);
1141 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->rx_oversize, &nsd->rx_oversize);
1144 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1145 pf->stat_offsets_loaded,
1146 &osd->rx_jabber, &nsd->rx_jabber);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_atr_match, &nsd->fd_atr_match);
1153 i40e_stat_update32(hw,
1154 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1155 pf->stat_offsets_loaded,
1156 &osd->fd_sb_match, &nsd->fd_sb_match);
1157 i40e_stat_update32(hw,
1158 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1159 pf->stat_offsets_loaded,
1160 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1162 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1163 nsd->tx_lpi_status =
1164 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1165 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1166 nsd->rx_lpi_status =
1167 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1168 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1169 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1170 pf->stat_offsets_loaded,
1171 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1172 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1173 pf->stat_offsets_loaded,
1174 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1176 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1177 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1178 nsd->fd_sb_status = true;
1180 nsd->fd_sb_status = false;
1182 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1183 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1184 nsd->fd_atr_status = true;
1186 nsd->fd_atr_status = false;
1188 pf->stat_offsets_loaded = true;
1192 * i40e_update_stats - Update the various statistics counters.
1193 * @vsi: the VSI to be updated
1195 * Update the various stats for this VSI and its related entities.
1197 void i40e_update_stats(struct i40e_vsi *vsi)
1199 struct i40e_pf *pf = vsi->back;
1201 if (vsi == pf->vsi[pf->lan_vsi])
1202 i40e_update_pf_stats(pf);
1204 i40e_update_vsi_stats(vsi);
1206 i40e_update_fcoe_stats(vsi);
1211 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1212 * @vsi: the VSI to be searched
1213 * @macaddr: the MAC address
1215 * @is_vf: make sure its a VF filter, else doesn't matter
1216 * @is_netdev: make sure its a netdev filter, else doesn't matter
1218 * Returns ptr to the filter object or NULL
1220 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1221 u8 *macaddr, s16 vlan,
1222 bool is_vf, bool is_netdev)
1224 struct i40e_mac_filter *f;
1226 if (!vsi || !macaddr)
1229 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1230 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1231 (vlan == f->vlan) &&
1232 (!is_vf || f->is_vf) &&
1233 (!is_netdev || f->is_netdev))
1240 * i40e_find_mac - Find a mac addr in the macvlan filters list
1241 * @vsi: the VSI to be searched
1242 * @macaddr: the MAC address we are searching for
1243 * @is_vf: make sure its a VF filter, else doesn't matter
1244 * @is_netdev: make sure its a netdev filter, else doesn't matter
1246 * Returns the first filter with the provided MAC address or NULL if
1247 * MAC address was not found
1249 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1250 bool is_vf, bool is_netdev)
1252 struct i40e_mac_filter *f;
1254 if (!vsi || !macaddr)
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1258 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1259 (!is_vf || f->is_vf) &&
1260 (!is_netdev || f->is_netdev))
1267 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1268 * @vsi: the VSI to be searched
1270 * Returns true if VSI is in vlan mode or false otherwise
1272 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1274 struct i40e_mac_filter *f;
1276 /* Only -1 for all the filters denotes not in vlan mode
1277 * so we have to go through all the list in order to make sure
1279 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1280 if (f->vlan >= 0 || vsi->info.pvid)
1288 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1289 * @vsi: the VSI to be searched
1290 * @macaddr: the mac address to be filtered
1291 * @is_vf: true if it is a VF
1292 * @is_netdev: true if it is a netdev
1294 * Goes through all the macvlan filters and adds a
1295 * macvlan filter for each unique vlan that already exists
1297 * Returns first filter found on success, else NULL
1299 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1300 bool is_vf, bool is_netdev)
1302 struct i40e_mac_filter *f;
1304 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1306 f->vlan = le16_to_cpu(vsi->info.pvid);
1307 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1308 is_vf, is_netdev)) {
1309 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1315 return list_first_entry_or_null(&vsi->mac_filter_list,
1316 struct i40e_mac_filter, list);
1320 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1321 * @vsi: the PF Main VSI - inappropriate for any other VSI
1322 * @macaddr: the MAC address
1324 * Some older firmware configurations set up a default promiscuous VLAN
1325 * filter that needs to be removed.
1327 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1329 struct i40e_aqc_remove_macvlan_element_data element;
1330 struct i40e_pf *pf = vsi->back;
1333 /* Only appropriate for the PF main VSI */
1334 if (vsi->type != I40E_VSI_MAIN)
1337 memset(&element, 0, sizeof(element));
1338 ether_addr_copy(element.mac_addr, macaddr);
1339 element.vlan_tag = 0;
1340 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1341 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1342 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1350 * i40e_add_filter - Add a mac/vlan filter to the VSI
1351 * @vsi: the VSI to be searched
1352 * @macaddr: the MAC address
1354 * @is_vf: make sure its a VF filter, else doesn't matter
1355 * @is_netdev: make sure its a netdev filter, else doesn't matter
1357 * Returns ptr to the filter object or NULL when no memory available.
1359 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1360 u8 *macaddr, s16 vlan,
1361 bool is_vf, bool is_netdev)
1363 struct i40e_mac_filter *f;
1365 if (!vsi || !macaddr)
1368 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1370 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1372 goto add_filter_out;
1374 ether_addr_copy(f->macaddr, macaddr);
1378 INIT_LIST_HEAD(&f->list);
1379 list_add(&f->list, &vsi->mac_filter_list);
1382 /* increment counter and add a new flag if needed */
1388 } else if (is_netdev) {
1389 if (!f->is_netdev) {
1390 f->is_netdev = true;
1397 /* changed tells sync_filters_subtask to
1398 * push the filter down to the firmware
1401 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1402 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1410 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1411 * @vsi: the VSI to be searched
1412 * @macaddr: the MAC address
1414 * @is_vf: make sure it's a VF filter, else doesn't matter
1415 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1417 void i40e_del_filter(struct i40e_vsi *vsi,
1418 u8 *macaddr, s16 vlan,
1419 bool is_vf, bool is_netdev)
1421 struct i40e_mac_filter *f;
1423 if (!vsi || !macaddr)
1426 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1427 if (!f || f->counter == 0)
1435 } else if (is_netdev) {
1437 f->is_netdev = false;
1441 /* make sure we don't remove a filter in use by VF or netdev */
1444 min_f += (f->is_vf ? 1 : 0);
1445 min_f += (f->is_netdev ? 1 : 0);
1447 if (f->counter > min_f)
1451 /* counter == 0 tells sync_filters_subtask to
1452 * remove the filter from the firmware's list
1454 if (f->counter == 0) {
1456 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1457 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1462 * i40e_set_mac - NDO callback to set mac address
1463 * @netdev: network interface device structure
1464 * @p: pointer to an address structure
1466 * Returns 0 on success, negative on failure
1469 int i40e_set_mac(struct net_device *netdev, void *p)
1471 static int i40e_set_mac(struct net_device *netdev, void *p)
1474 struct i40e_netdev_priv *np = netdev_priv(netdev);
1475 struct i40e_vsi *vsi = np->vsi;
1476 struct i40e_pf *pf = vsi->back;
1477 struct i40e_hw *hw = &pf->hw;
1478 struct sockaddr *addr = p;
1479 struct i40e_mac_filter *f;
1481 if (!is_valid_ether_addr(addr->sa_data))
1482 return -EADDRNOTAVAIL;
1484 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1485 netdev_info(netdev, "already using mac address %pM\n",
1490 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1491 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1492 return -EADDRNOTAVAIL;
1494 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1495 netdev_info(netdev, "returning to hw mac address %pM\n",
1498 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1500 if (vsi->type == I40E_VSI_MAIN) {
1503 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1504 I40E_AQC_WRITE_TYPE_LAA_WOL,
1505 addr->sa_data, NULL);
1508 "Addr change for Main VSI failed: %d\n",
1510 return -EADDRNOTAVAIL;
1514 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1515 struct i40e_aqc_remove_macvlan_element_data element;
1517 memset(&element, 0, sizeof(element));
1518 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1519 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1520 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1522 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1526 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1527 struct i40e_aqc_add_macvlan_element_data element;
1529 memset(&element, 0, sizeof(element));
1530 ether_addr_copy(element.mac_addr, hw->mac.addr);
1531 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1532 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1534 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1540 i40e_sync_vsi_filters(vsi, false);
1541 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1547 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1548 * @vsi: the VSI being setup
1549 * @ctxt: VSI context structure
1550 * @enabled_tc: Enabled TCs bitmap
1551 * @is_add: True if called before Add VSI
1553 * Setup VSI queue mapping for enabled traffic classes.
1556 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1557 struct i40e_vsi_context *ctxt,
1561 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1562 struct i40e_vsi_context *ctxt,
1567 struct i40e_pf *pf = vsi->back;
1577 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1580 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1581 /* Find numtc from enabled TC bitmap */
1582 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1583 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1587 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1591 /* At least TC0 is enabled in case of non-DCB case */
1595 vsi->tc_config.numtc = numtc;
1596 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1597 /* Number of queues per enabled TC */
1598 /* In MFP case we can have a much lower count of MSIx
1599 * vectors available and so we need to lower the used
1602 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1603 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1605 qcount = vsi->alloc_queue_pairs;
1606 num_tc_qps = qcount / numtc;
1607 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1609 /* Setup queue offset/count for all TCs for given VSI */
1610 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1611 /* See if the given TC is enabled for the given VSI */
1612 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1616 switch (vsi->type) {
1618 qcount = min_t(int, pf->rss_size, num_tc_qps);
1622 qcount = num_tc_qps;
1626 case I40E_VSI_SRIOV:
1627 case I40E_VSI_VMDQ2:
1629 qcount = num_tc_qps;
1633 vsi->tc_config.tc_info[i].qoffset = offset;
1634 vsi->tc_config.tc_info[i].qcount = qcount;
1636 /* find the next higher power-of-2 of num queue pairs */
1639 while (num_qps && (BIT_ULL(pow) < qcount)) {
1644 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1646 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1647 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1651 /* TC is not enabled so set the offset to
1652 * default queue and allocate one queue
1655 vsi->tc_config.tc_info[i].qoffset = 0;
1656 vsi->tc_config.tc_info[i].qcount = 1;
1657 vsi->tc_config.tc_info[i].netdev_tc = 0;
1661 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1664 /* Set actual Tx/Rx queue pairs */
1665 vsi->num_queue_pairs = offset;
1666 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1667 if (vsi->req_queue_pairs > 0)
1668 vsi->num_queue_pairs = vsi->req_queue_pairs;
1669 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1670 vsi->num_queue_pairs = pf->num_lan_msix;
1673 /* Scheduler section valid can only be set for ADD VSI */
1675 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1677 ctxt->info.up_enable_bits = enabled_tc;
1679 if (vsi->type == I40E_VSI_SRIOV) {
1680 ctxt->info.mapping_flags |=
1681 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1682 for (i = 0; i < vsi->num_queue_pairs; i++)
1683 ctxt->info.queue_mapping[i] =
1684 cpu_to_le16(vsi->base_queue + i);
1686 ctxt->info.mapping_flags |=
1687 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1688 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1690 ctxt->info.valid_sections |= cpu_to_le16(sections);
1694 * i40e_set_rx_mode - NDO callback to set the netdev filters
1695 * @netdev: network interface device structure
1698 void i40e_set_rx_mode(struct net_device *netdev)
1700 static void i40e_set_rx_mode(struct net_device *netdev)
1703 struct i40e_netdev_priv *np = netdev_priv(netdev);
1704 struct i40e_mac_filter *f, *ftmp;
1705 struct i40e_vsi *vsi = np->vsi;
1706 struct netdev_hw_addr *uca;
1707 struct netdev_hw_addr *mca;
1708 struct netdev_hw_addr *ha;
1710 /* add addr if not already in the filter list */
1711 netdev_for_each_uc_addr(uca, netdev) {
1712 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1713 if (i40e_is_vsi_in_vlan(vsi))
1714 i40e_put_mac_in_vlan(vsi, uca->addr,
1717 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1722 netdev_for_each_mc_addr(mca, netdev) {
1723 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1724 if (i40e_is_vsi_in_vlan(vsi))
1725 i40e_put_mac_in_vlan(vsi, mca->addr,
1728 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1733 /* remove filter if not in netdev list */
1734 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1739 netdev_for_each_mc_addr(mca, netdev)
1740 if (ether_addr_equal(mca->addr, f->macaddr))
1741 goto bottom_of_search_loop;
1743 netdev_for_each_uc_addr(uca, netdev)
1744 if (ether_addr_equal(uca->addr, f->macaddr))
1745 goto bottom_of_search_loop;
1747 for_each_dev_addr(netdev, ha)
1748 if (ether_addr_equal(ha->addr, f->macaddr))
1749 goto bottom_of_search_loop;
1751 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1752 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1754 bottom_of_search_loop:
1758 /* check for other flag changes */
1759 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1760 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1761 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1766 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1767 * @vsi: ptr to the VSI
1768 * @grab_rtnl: whether RTNL needs to be grabbed
1770 * Push any outstanding VSI filter changes through the AdminQ.
1772 * Returns 0 or error value
1774 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1776 struct i40e_mac_filter *f, *ftmp;
1777 bool promisc_forced_on = false;
1778 bool add_happened = false;
1779 int filter_list_len = 0;
1780 u32 changed_flags = 0;
1781 i40e_status ret = 0;
1788 /* empty array typed pointers, kcalloc later */
1789 struct i40e_aqc_add_macvlan_element_data *add_list;
1790 struct i40e_aqc_remove_macvlan_element_data *del_list;
1792 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1793 usleep_range(1000, 2000);
1797 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1798 vsi->current_netdev_flags = vsi->netdev->flags;
1801 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1802 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1804 filter_list_len = pf->hw.aq.asq_buf_size /
1805 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1806 del_list = kcalloc(filter_list_len,
1807 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1812 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1816 if (f->counter != 0)
1821 /* add to delete list */
1822 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1823 del_list[num_del].vlan_tag =
1824 cpu_to_le16((u16)(f->vlan ==
1825 I40E_VLAN_ANY ? 0 : f->vlan));
1827 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1828 del_list[num_del].flags = cmd_flags;
1831 /* unlink from filter list */
1835 /* flush a full buffer */
1836 if (num_del == filter_list_len) {
1837 ret = i40e_aq_remove_macvlan(&pf->hw,
1838 vsi->seid, del_list, num_del,
1840 aq_err = pf->hw.aq.asq_last_status;
1842 memset(del_list, 0, sizeof(*del_list));
1844 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1845 dev_info(&pf->pdev->dev,
1846 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1847 i40e_stat_str(&pf->hw, ret),
1848 i40e_aq_str(&pf->hw, aq_err));
1852 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1853 del_list, num_del, NULL);
1854 aq_err = pf->hw.aq.asq_last_status;
1857 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1858 dev_info(&pf->pdev->dev,
1859 "ignoring delete macvlan error, err %s aq_err %s\n",
1860 i40e_stat_str(&pf->hw, ret),
1861 i40e_aq_str(&pf->hw, aq_err));
1867 /* do all the adds now */
1868 filter_list_len = pf->hw.aq.asq_buf_size /
1869 sizeof(struct i40e_aqc_add_macvlan_element_data),
1870 add_list = kcalloc(filter_list_len,
1871 sizeof(struct i40e_aqc_add_macvlan_element_data),
1876 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1880 if (f->counter == 0)
1883 add_happened = true;
1886 /* add to add array */
1887 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1888 add_list[num_add].vlan_tag =
1890 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1891 add_list[num_add].queue_number = 0;
1893 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1894 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1897 /* flush a full buffer */
1898 if (num_add == filter_list_len) {
1899 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1902 aq_err = pf->hw.aq.asq_last_status;
1907 memset(add_list, 0, sizeof(*add_list));
1911 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1912 add_list, num_add, NULL);
1913 aq_err = pf->hw.aq.asq_last_status;
1919 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1920 dev_info(&pf->pdev->dev,
1921 "add filter failed, err %s aq_err %s\n",
1922 i40e_stat_str(&pf->hw, ret),
1923 i40e_aq_str(&pf->hw, aq_err));
1924 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1925 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1927 promisc_forced_on = true;
1928 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1930 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1935 /* check for changes in promiscuous modes */
1936 if (changed_flags & IFF_ALLMULTI) {
1937 bool cur_multipromisc;
1939 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1940 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1945 dev_info(&pf->pdev->dev,
1946 "set multi promisc failed, err %s aq_err %s\n",
1947 i40e_stat_str(&pf->hw, ret),
1948 i40e_aq_str(&pf->hw,
1949 pf->hw.aq.asq_last_status));
1951 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1954 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1955 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1957 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1958 /* set defport ON for Main VSI instead of true promisc
1959 * this way we will get all unicast/multicast and VLAN
1960 * promisc behavior but will not get VF or VMDq traffic
1961 * replicated on the Main VSI.
1963 if (pf->cur_promisc != cur_promisc) {
1964 pf->cur_promisc = cur_promisc;
1966 i40e_do_reset_safe(pf,
1967 BIT(__I40E_PF_RESET_REQUESTED));
1970 BIT(__I40E_PF_RESET_REQUESTED));
1973 ret = i40e_aq_set_vsi_unicast_promiscuous(
1978 dev_info(&pf->pdev->dev,
1979 "set unicast promisc failed, err %d, aq_err %d\n",
1980 ret, pf->hw.aq.asq_last_status);
1981 ret = i40e_aq_set_vsi_multicast_promiscuous(
1986 dev_info(&pf->pdev->dev,
1987 "set multicast promisc failed, err %d, aq_err %d\n",
1988 ret, pf->hw.aq.asq_last_status);
1990 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1994 dev_info(&pf->pdev->dev,
1995 "set brdcast promisc failed, err %s, aq_err %s\n",
1996 i40e_stat_str(&pf->hw, ret),
1997 i40e_aq_str(&pf->hw,
1998 pf->hw.aq.asq_last_status));
2001 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2006 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2007 * @pf: board private structure
2009 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2013 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2015 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2017 for (v = 0; v < pf->num_alloc_vsi; v++) {
2019 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2020 i40e_sync_vsi_filters(pf->vsi[v], true);
2025 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2026 * @netdev: network interface device structure
2027 * @new_mtu: new value for maximum frame size
2029 * Returns 0 on success, negative on failure
2031 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2033 struct i40e_netdev_priv *np = netdev_priv(netdev);
2034 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2035 struct i40e_vsi *vsi = np->vsi;
2037 /* MTU < 68 is an error and causes problems on some kernels */
2038 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2041 netdev_info(netdev, "changing MTU from %d to %d\n",
2042 netdev->mtu, new_mtu);
2043 netdev->mtu = new_mtu;
2044 if (netif_running(netdev))
2045 i40e_vsi_reinit_locked(vsi);
2051 * i40e_ioctl - Access the hwtstamp interface
2052 * @netdev: network interface device structure
2053 * @ifr: interface request data
2054 * @cmd: ioctl command
2056 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2058 struct i40e_netdev_priv *np = netdev_priv(netdev);
2059 struct i40e_pf *pf = np->vsi->back;
2063 return i40e_ptp_get_ts_config(pf, ifr);
2065 return i40e_ptp_set_ts_config(pf, ifr);
2072 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2073 * @vsi: the vsi being adjusted
2075 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2077 struct i40e_vsi_context ctxt;
2080 if ((vsi->info.valid_sections &
2081 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2082 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2083 return; /* already enabled */
2085 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2086 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2087 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2089 ctxt.seid = vsi->seid;
2090 ctxt.info = vsi->info;
2091 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2093 dev_info(&vsi->back->pdev->dev,
2094 "update vlan stripping failed, err %s aq_err %s\n",
2095 i40e_stat_str(&vsi->back->hw, ret),
2096 i40e_aq_str(&vsi->back->hw,
2097 vsi->back->hw.aq.asq_last_status));
2102 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2103 * @vsi: the vsi being adjusted
2105 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2107 struct i40e_vsi_context ctxt;
2110 if ((vsi->info.valid_sections &
2111 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2112 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2113 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2114 return; /* already disabled */
2116 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2117 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2118 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2120 ctxt.seid = vsi->seid;
2121 ctxt.info = vsi->info;
2122 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2124 dev_info(&vsi->back->pdev->dev,
2125 "update vlan stripping failed, err %s aq_err %s\n",
2126 i40e_stat_str(&vsi->back->hw, ret),
2127 i40e_aq_str(&vsi->back->hw,
2128 vsi->back->hw.aq.asq_last_status));
2133 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2134 * @netdev: network interface to be adjusted
2135 * @features: netdev features to test if VLAN offload is enabled or not
2137 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2139 struct i40e_netdev_priv *np = netdev_priv(netdev);
2140 struct i40e_vsi *vsi = np->vsi;
2142 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2143 i40e_vlan_stripping_enable(vsi);
2145 i40e_vlan_stripping_disable(vsi);
2149 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2150 * @vsi: the vsi being configured
2151 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2153 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2155 struct i40e_mac_filter *f, *add_f;
2156 bool is_netdev, is_vf;
2158 is_vf = (vsi->type == I40E_VSI_SRIOV);
2159 is_netdev = !!(vsi->netdev);
2162 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2165 dev_info(&vsi->back->pdev->dev,
2166 "Could not add vlan filter %d for %pM\n",
2167 vid, vsi->netdev->dev_addr);
2172 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2173 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2175 dev_info(&vsi->back->pdev->dev,
2176 "Could not add vlan filter %d for %pM\n",
2182 /* Now if we add a vlan tag, make sure to check if it is the first
2183 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2184 * with 0, so we now accept untagged and specified tagged traffic
2185 * (and not any taged and untagged)
2188 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2190 is_vf, is_netdev)) {
2191 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2192 I40E_VLAN_ANY, is_vf, is_netdev);
2193 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2196 dev_info(&vsi->back->pdev->dev,
2197 "Could not add filter 0 for %pM\n",
2198 vsi->netdev->dev_addr);
2204 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2205 if (vid > 0 && !vsi->info.pvid) {
2206 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2207 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2208 is_vf, is_netdev)) {
2209 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2211 add_f = i40e_add_filter(vsi, f->macaddr,
2212 0, is_vf, is_netdev);
2214 dev_info(&vsi->back->pdev->dev,
2215 "Could not add filter 0 for %pM\n",
2223 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2224 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2227 return i40e_sync_vsi_filters(vsi, false);
2231 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2232 * @vsi: the vsi being configured
2233 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2235 * Return: 0 on success or negative otherwise
2237 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2239 struct net_device *netdev = vsi->netdev;
2240 struct i40e_mac_filter *f, *add_f;
2241 bool is_vf, is_netdev;
2242 int filter_count = 0;
2244 is_vf = (vsi->type == I40E_VSI_SRIOV);
2245 is_netdev = !!(netdev);
2248 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2250 list_for_each_entry(f, &vsi->mac_filter_list, list)
2251 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2253 /* go through all the filters for this VSI and if there is only
2254 * vid == 0 it means there are no other filters, so vid 0 must
2255 * be replaced with -1. This signifies that we should from now
2256 * on accept any traffic (with any tag present, or untagged)
2258 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2261 ether_addr_equal(netdev->dev_addr, f->macaddr))
2269 if (!filter_count && is_netdev) {
2270 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2271 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2274 dev_info(&vsi->back->pdev->dev,
2275 "Could not add filter %d for %pM\n",
2276 I40E_VLAN_ANY, netdev->dev_addr);
2281 if (!filter_count) {
2282 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2283 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2284 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2287 dev_info(&vsi->back->pdev->dev,
2288 "Could not add filter %d for %pM\n",
2289 I40E_VLAN_ANY, f->macaddr);
2295 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2296 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2299 return i40e_sync_vsi_filters(vsi, false);
2303 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2304 * @netdev: network interface to be adjusted
2305 * @vid: vlan id to be added
2307 * net_device_ops implementation for adding vlan ids
2310 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2311 __always_unused __be16 proto, u16 vid)
2313 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2314 __always_unused __be16 proto, u16 vid)
2317 struct i40e_netdev_priv *np = netdev_priv(netdev);
2318 struct i40e_vsi *vsi = np->vsi;
2324 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2326 /* If the network stack called us with vid = 0 then
2327 * it is asking to receive priority tagged packets with
2328 * vlan id 0. Our HW receives them by default when configured
2329 * to receive untagged packets so there is no need to add an
2330 * extra filter for vlan 0 tagged packets.
2333 ret = i40e_vsi_add_vlan(vsi, vid);
2335 if (!ret && (vid < VLAN_N_VID))
2336 set_bit(vid, vsi->active_vlans);
2342 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2343 * @netdev: network interface to be adjusted
2344 * @vid: vlan id to be removed
2346 * net_device_ops implementation for removing vlan ids
2349 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2350 __always_unused __be16 proto, u16 vid)
2352 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2353 __always_unused __be16 proto, u16 vid)
2356 struct i40e_netdev_priv *np = netdev_priv(netdev);
2357 struct i40e_vsi *vsi = np->vsi;
2359 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2361 /* return code is ignored as there is nothing a user
2362 * can do about failure to remove and a log message was
2363 * already printed from the other function
2365 i40e_vsi_kill_vlan(vsi, vid);
2367 clear_bit(vid, vsi->active_vlans);
2373 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2374 * @vsi: the vsi being brought back up
2376 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2383 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2385 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2386 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2391 * i40e_vsi_add_pvid - Add pvid for the VSI
2392 * @vsi: the vsi being adjusted
2393 * @vid: the vlan id to set as a PVID
2395 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2397 struct i40e_vsi_context ctxt;
2400 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2401 vsi->info.pvid = cpu_to_le16(vid);
2402 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2403 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2404 I40E_AQ_VSI_PVLAN_EMOD_STR;
2406 ctxt.seid = vsi->seid;
2407 ctxt.info = vsi->info;
2408 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2410 dev_info(&vsi->back->pdev->dev,
2411 "add pvid failed, err %s aq_err %s\n",
2412 i40e_stat_str(&vsi->back->hw, ret),
2413 i40e_aq_str(&vsi->back->hw,
2414 vsi->back->hw.aq.asq_last_status));
2422 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2423 * @vsi: the vsi being adjusted
2425 * Just use the vlan_rx_register() service to put it back to normal
2427 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2429 i40e_vlan_stripping_disable(vsi);
2435 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2436 * @vsi: ptr to the VSI
2438 * If this function returns with an error, then it's possible one or
2439 * more of the rings is populated (while the rest are not). It is the
2440 * callers duty to clean those orphaned rings.
2442 * Return 0 on success, negative on failure
2444 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2448 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2449 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2455 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2456 * @vsi: ptr to the VSI
2458 * Free VSI's transmit software resources
2460 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2467 for (i = 0; i < vsi->num_queue_pairs; i++)
2468 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2469 i40e_free_tx_resources(vsi->tx_rings[i]);
2473 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2474 * @vsi: ptr to the VSI
2476 * If this function returns with an error, then it's possible one or
2477 * more of the rings is populated (while the rest are not). It is the
2478 * callers duty to clean those orphaned rings.
2480 * Return 0 on success, negative on failure
2482 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2486 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2487 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2489 i40e_fcoe_setup_ddp_resources(vsi);
2495 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2496 * @vsi: ptr to the VSI
2498 * Free all receive software resources
2500 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2507 for (i = 0; i < vsi->num_queue_pairs; i++)
2508 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2509 i40e_free_rx_resources(vsi->rx_rings[i]);
2511 i40e_fcoe_free_ddp_resources(vsi);
2516 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2517 * @ring: The Tx ring to configure
2519 * This enables/disables XPS for a given Tx descriptor ring
2520 * based on the TCs enabled for the VSI that ring belongs to.
2522 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2524 struct i40e_vsi *vsi = ring->vsi;
2527 if (!ring->q_vector || !ring->netdev)
2530 /* Single TC mode enable XPS */
2531 if (vsi->tc_config.numtc <= 1) {
2532 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2533 netif_set_xps_queue(ring->netdev,
2534 &ring->q_vector->affinity_mask,
2536 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2537 /* Disable XPS to allow selection based on TC */
2538 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2539 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2540 free_cpumask_var(mask);
2545 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2546 * @ring: The Tx ring to configure
2548 * Configure the Tx descriptor ring in the HMC context.
2550 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2552 struct i40e_vsi *vsi = ring->vsi;
2553 u16 pf_q = vsi->base_queue + ring->queue_index;
2554 struct i40e_hw *hw = &vsi->back->hw;
2555 struct i40e_hmc_obj_txq tx_ctx;
2556 i40e_status err = 0;
2559 /* some ATR related tx ring init */
2560 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2561 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2562 ring->atr_count = 0;
2564 ring->atr_sample_rate = 0;
2568 i40e_config_xps_tx_ring(ring);
2570 /* clear the context structure first */
2571 memset(&tx_ctx, 0, sizeof(tx_ctx));
2573 tx_ctx.new_context = 1;
2574 tx_ctx.base = (ring->dma / 128);
2575 tx_ctx.qlen = ring->count;
2576 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2577 I40E_FLAG_FD_ATR_ENABLED));
2579 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2581 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2582 /* FDIR VSI tx ring can still use RS bit and writebacks */
2583 if (vsi->type != I40E_VSI_FDIR)
2584 tx_ctx.head_wb_ena = 1;
2585 tx_ctx.head_wb_addr = ring->dma +
2586 (ring->count * sizeof(struct i40e_tx_desc));
2588 /* As part of VSI creation/update, FW allocates certain
2589 * Tx arbitration queue sets for each TC enabled for
2590 * the VSI. The FW returns the handles to these queue
2591 * sets as part of the response buffer to Add VSI,
2592 * Update VSI, etc. AQ commands. It is expected that
2593 * these queue set handles be associated with the Tx
2594 * queues by the driver as part of the TX queue context
2595 * initialization. This has to be done regardless of
2596 * DCB as by default everything is mapped to TC0.
2598 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2599 tx_ctx.rdylist_act = 0;
2601 /* clear the context in the HMC */
2602 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2604 dev_info(&vsi->back->pdev->dev,
2605 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2606 ring->queue_index, pf_q, err);
2610 /* set the context in the HMC */
2611 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2613 dev_info(&vsi->back->pdev->dev,
2614 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2615 ring->queue_index, pf_q, err);
2619 /* Now associate this queue with this PCI function */
2620 if (vsi->type == I40E_VSI_VMDQ2) {
2621 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2622 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2623 I40E_QTX_CTL_VFVM_INDX_MASK;
2625 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2628 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2629 I40E_QTX_CTL_PF_INDX_MASK);
2630 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2633 /* cache tail off for easier writes later */
2634 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2640 * i40e_configure_rx_ring - Configure a receive ring context
2641 * @ring: The Rx ring to configure
2643 * Configure the Rx descriptor ring in the HMC context.
2645 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2647 struct i40e_vsi *vsi = ring->vsi;
2648 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2649 u16 pf_q = vsi->base_queue + ring->queue_index;
2650 struct i40e_hw *hw = &vsi->back->hw;
2651 struct i40e_hmc_obj_rxq rx_ctx;
2652 i40e_status err = 0;
2656 /* clear the context structure first */
2657 memset(&rx_ctx, 0, sizeof(rx_ctx));
2659 ring->rx_buf_len = vsi->rx_buf_len;
2660 ring->rx_hdr_len = vsi->rx_hdr_len;
2662 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2663 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2665 rx_ctx.base = (ring->dma / 128);
2666 rx_ctx.qlen = ring->count;
2668 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2669 set_ring_16byte_desc_enabled(ring);
2675 rx_ctx.dtype = vsi->dtype;
2677 set_ring_ps_enabled(ring);
2678 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2680 I40E_RX_SPLIT_TCP_UDP |
2683 rx_ctx.hsplit_0 = 0;
2686 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2687 (chain_len * ring->rx_buf_len));
2688 if (hw->revision_id == 0)
2689 rx_ctx.lrxqthresh = 0;
2691 rx_ctx.lrxqthresh = 2;
2692 rx_ctx.crcstrip = 1;
2694 /* this controls whether VLAN is stripped from inner headers */
2697 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2699 /* set the prefena field to 1 because the manual says to */
2702 /* clear the context in the HMC */
2703 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2705 dev_info(&vsi->back->pdev->dev,
2706 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2707 ring->queue_index, pf_q, err);
2711 /* set the context in the HMC */
2712 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2714 dev_info(&vsi->back->pdev->dev,
2715 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2716 ring->queue_index, pf_q, err);
2720 /* cache tail for quicker writes, and clear the reg before use */
2721 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2722 writel(0, ring->tail);
2724 if (ring_is_ps_enabled(ring)) {
2725 i40e_alloc_rx_headers(ring);
2726 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2728 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2735 * i40e_vsi_configure_tx - Configure the VSI for Tx
2736 * @vsi: VSI structure describing this set of rings and resources
2738 * Configure the Tx VSI for operation.
2740 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2745 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2746 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2752 * i40e_vsi_configure_rx - Configure the VSI for Rx
2753 * @vsi: the VSI being configured
2755 * Configure the Rx VSI for operation.
2757 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2762 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2763 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2764 + ETH_FCS_LEN + VLAN_HLEN;
2766 vsi->max_frame = I40E_RXBUFFER_2048;
2768 /* figure out correct receive buffer length */
2769 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2770 I40E_FLAG_RX_PS_ENABLED)) {
2771 case I40E_FLAG_RX_1BUF_ENABLED:
2772 vsi->rx_hdr_len = 0;
2773 vsi->rx_buf_len = vsi->max_frame;
2774 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2776 case I40E_FLAG_RX_PS_ENABLED:
2777 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2778 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2779 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2782 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2783 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2784 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2789 /* setup rx buffer for FCoE */
2790 if ((vsi->type == I40E_VSI_FCOE) &&
2791 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2792 vsi->rx_hdr_len = 0;
2793 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2794 vsi->max_frame = I40E_RXBUFFER_3072;
2795 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2798 #endif /* I40E_FCOE */
2799 /* round up for the chip's needs */
2800 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2801 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2802 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2803 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2805 /* set up individual rings */
2806 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2807 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2813 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2814 * @vsi: ptr to the VSI
2816 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2818 struct i40e_ring *tx_ring, *rx_ring;
2819 u16 qoffset, qcount;
2822 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2823 /* Reset the TC information */
2824 for (i = 0; i < vsi->num_queue_pairs; i++) {
2825 rx_ring = vsi->rx_rings[i];
2826 tx_ring = vsi->tx_rings[i];
2827 rx_ring->dcb_tc = 0;
2828 tx_ring->dcb_tc = 0;
2832 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2833 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2836 qoffset = vsi->tc_config.tc_info[n].qoffset;
2837 qcount = vsi->tc_config.tc_info[n].qcount;
2838 for (i = qoffset; i < (qoffset + qcount); i++) {
2839 rx_ring = vsi->rx_rings[i];
2840 tx_ring = vsi->tx_rings[i];
2841 rx_ring->dcb_tc = n;
2842 tx_ring->dcb_tc = n;
2848 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2849 * @vsi: ptr to the VSI
2851 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2854 i40e_set_rx_mode(vsi->netdev);
2858 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2859 * @vsi: Pointer to the targeted VSI
2861 * This function replays the hlist on the hw where all the SB Flow Director
2862 * filters were saved.
2864 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2866 struct i40e_fdir_filter *filter;
2867 struct i40e_pf *pf = vsi->back;
2868 struct hlist_node *node;
2870 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2873 hlist_for_each_entry_safe(filter, node,
2874 &pf->fdir_filter_list, fdir_node) {
2875 i40e_add_del_fdir(vsi, filter, true);
2880 * i40e_vsi_configure - Set up the VSI for action
2881 * @vsi: the VSI being configured
2883 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2887 i40e_set_vsi_rx_mode(vsi);
2888 i40e_restore_vlan(vsi);
2889 i40e_vsi_config_dcb_rings(vsi);
2890 err = i40e_vsi_configure_tx(vsi);
2892 err = i40e_vsi_configure_rx(vsi);
2898 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2899 * @vsi: the VSI being configured
2901 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2903 struct i40e_pf *pf = vsi->back;
2904 struct i40e_q_vector *q_vector;
2905 struct i40e_hw *hw = &pf->hw;
2911 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2912 * and PFINT_LNKLSTn registers, e.g.:
2913 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2915 qp = vsi->base_queue;
2916 vector = vsi->base_vector;
2917 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2918 q_vector = vsi->q_vectors[i];
2919 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2920 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2921 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2923 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2924 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2925 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2928 /* Linked list for the queuepairs assigned to this vector */
2929 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2930 for (q = 0; q < q_vector->num_ringpairs; q++) {
2931 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2932 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2933 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2934 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2936 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2938 wr32(hw, I40E_QINT_RQCTL(qp), val);
2940 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2941 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2942 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2943 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2945 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2947 /* Terminate the linked list */
2948 if (q == (q_vector->num_ringpairs - 1))
2949 val |= (I40E_QUEUE_END_OF_LIST
2950 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2952 wr32(hw, I40E_QINT_TQCTL(qp), val);
2961 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2962 * @hw: ptr to the hardware info
2964 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2966 struct i40e_hw *hw = &pf->hw;
2969 /* clear things first */
2970 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2971 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2973 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2974 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2975 I40E_PFINT_ICR0_ENA_GRST_MASK |
2976 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2977 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2978 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2979 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2980 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2982 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2983 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2985 if (pf->flags & I40E_FLAG_PTP)
2986 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2988 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2990 /* SW_ITR_IDX = 0, but don't change INTENA */
2991 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2992 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2994 /* OTHER_ITR_IDX = 0 */
2995 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2999 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3000 * @vsi: the VSI being configured
3002 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3004 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3005 struct i40e_pf *pf = vsi->back;
3006 struct i40e_hw *hw = &pf->hw;
3009 /* set the ITR configuration */
3010 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3011 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3012 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3013 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3014 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3015 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3017 i40e_enable_misc_int_causes(pf);
3019 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3020 wr32(hw, I40E_PFINT_LNKLST0, 0);
3022 /* Associate the queue pair to the vector and enable the queue int */
3023 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3024 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3025 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3027 wr32(hw, I40E_QINT_RQCTL(0), val);
3029 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3030 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3031 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3033 wr32(hw, I40E_QINT_TQCTL(0), val);
3038 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3039 * @pf: board private structure
3041 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3043 struct i40e_hw *hw = &pf->hw;
3045 wr32(hw, I40E_PFINT_DYN_CTL0,
3046 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3051 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3052 * @pf: board private structure
3054 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3056 struct i40e_hw *hw = &pf->hw;
3059 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3060 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3061 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3063 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3068 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3069 * @vsi: pointer to a vsi
3070 * @vector: disable a particular Hw Interrupt vector
3072 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3074 struct i40e_pf *pf = vsi->back;
3075 struct i40e_hw *hw = &pf->hw;
3078 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3079 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3084 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3085 * @irq: interrupt number
3086 * @data: pointer to a q_vector
3088 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3090 struct i40e_q_vector *q_vector = data;
3092 if (!q_vector->tx.ring && !q_vector->rx.ring)
3095 napi_schedule(&q_vector->napi);
3101 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3102 * @vsi: the VSI being configured
3103 * @basename: name for the vector
3105 * Allocates MSI-X vectors and requests interrupts from the kernel.
3107 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3109 int q_vectors = vsi->num_q_vectors;
3110 struct i40e_pf *pf = vsi->back;
3111 int base = vsi->base_vector;
3116 for (vector = 0; vector < q_vectors; vector++) {
3117 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3119 if (q_vector->tx.ring && q_vector->rx.ring) {
3120 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3121 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3123 } else if (q_vector->rx.ring) {
3124 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3125 "%s-%s-%d", basename, "rx", rx_int_idx++);
3126 } else if (q_vector->tx.ring) {
3127 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3128 "%s-%s-%d", basename, "tx", tx_int_idx++);
3130 /* skip this unused q_vector */
3133 err = request_irq(pf->msix_entries[base + vector].vector,
3139 dev_info(&pf->pdev->dev,
3140 "MSIX request_irq failed, error: %d\n", err);
3141 goto free_queue_irqs;
3143 /* assign the mask for this irq */
3144 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3145 &q_vector->affinity_mask);
3148 vsi->irqs_ready = true;
3154 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3156 free_irq(pf->msix_entries[base + vector].vector,
3157 &(vsi->q_vectors[vector]));
3163 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3164 * @vsi: the VSI being un-configured
3166 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3168 struct i40e_pf *pf = vsi->back;
3169 struct i40e_hw *hw = &pf->hw;
3170 int base = vsi->base_vector;
3173 for (i = 0; i < vsi->num_queue_pairs; i++) {
3174 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3175 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3178 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3179 for (i = vsi->base_vector;
3180 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3181 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3184 for (i = 0; i < vsi->num_q_vectors; i++)
3185 synchronize_irq(pf->msix_entries[i + base].vector);
3187 /* Legacy and MSI mode - this stops all interrupt handling */
3188 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3189 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3191 synchronize_irq(pf->pdev->irq);
3196 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3197 * @vsi: the VSI being configured
3199 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3201 struct i40e_pf *pf = vsi->back;
3204 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3205 for (i = 0; i < vsi->num_q_vectors; i++)
3206 i40e_irq_dynamic_enable(vsi, i);
3208 i40e_irq_dynamic_enable_icr0(pf);
3211 i40e_flush(&pf->hw);
3216 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3217 * @pf: board private structure
3219 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3222 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3223 i40e_flush(&pf->hw);
3227 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3228 * @irq: interrupt number
3229 * @data: pointer to a q_vector
3231 * This is the handler used for all MSI/Legacy interrupts, and deals
3232 * with both queue and non-queue interrupts. This is also used in
3233 * MSIX mode to handle the non-queue interrupts.
3235 static irqreturn_t i40e_intr(int irq, void *data)
3237 struct i40e_pf *pf = (struct i40e_pf *)data;
3238 struct i40e_hw *hw = &pf->hw;
3239 irqreturn_t ret = IRQ_NONE;
3240 u32 icr0, icr0_remaining;
3243 icr0 = rd32(hw, I40E_PFINT_ICR0);
3244 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3246 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3247 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3250 /* if interrupt but no bits showing, must be SWINT */
3251 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3252 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3255 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3256 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3257 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3258 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3259 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3262 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3263 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3265 /* temporarily disable queue cause for NAPI processing */
3266 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3268 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3269 wr32(hw, I40E_QINT_RQCTL(0), qval);
3271 qval = rd32(hw, I40E_QINT_TQCTL(0));
3272 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3273 wr32(hw, I40E_QINT_TQCTL(0), qval);
3275 if (!test_bit(__I40E_DOWN, &pf->state))
3276 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3279 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3280 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3281 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3284 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3285 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3286 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3289 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3290 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3291 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3294 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3295 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3296 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3297 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3298 val = rd32(hw, I40E_GLGEN_RSTAT);
3299 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3300 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3301 if (val == I40E_RESET_CORER) {
3303 } else if (val == I40E_RESET_GLOBR) {
3305 } else if (val == I40E_RESET_EMPR) {
3307 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3311 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3312 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3313 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3314 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3315 rd32(hw, I40E_PFHMC_ERRORINFO),
3316 rd32(hw, I40E_PFHMC_ERRORDATA));
3319 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3320 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3322 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3323 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3324 i40e_ptp_tx_hwtstamp(pf);
3328 /* If a critical error is pending we have no choice but to reset the
3330 * Report and mask out any remaining unexpected interrupts.
3332 icr0_remaining = icr0 & ena_mask;
3333 if (icr0_remaining) {
3334 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3336 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3337 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3338 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3339 dev_info(&pf->pdev->dev, "device will be reset\n");
3340 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3341 i40e_service_event_schedule(pf);
3343 ena_mask &= ~icr0_remaining;
3348 /* re-enable interrupt causes */
3349 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3350 if (!test_bit(__I40E_DOWN, &pf->state)) {
3351 i40e_service_event_schedule(pf);
3352 i40e_irq_dynamic_enable_icr0(pf);
3359 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3360 * @tx_ring: tx ring to clean
3361 * @budget: how many cleans we're allowed
3363 * Returns true if there's any budget left (e.g. the clean is finished)
3365 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3367 struct i40e_vsi *vsi = tx_ring->vsi;
3368 u16 i = tx_ring->next_to_clean;
3369 struct i40e_tx_buffer *tx_buf;
3370 struct i40e_tx_desc *tx_desc;
3372 tx_buf = &tx_ring->tx_bi[i];
3373 tx_desc = I40E_TX_DESC(tx_ring, i);
3374 i -= tx_ring->count;
3377 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3379 /* if next_to_watch is not set then there is no work pending */
3383 /* prevent any other reads prior to eop_desc */
3384 read_barrier_depends();
3386 /* if the descriptor isn't done, no work yet to do */
3387 if (!(eop_desc->cmd_type_offset_bsz &
3388 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3391 /* clear next_to_watch to prevent false hangs */
3392 tx_buf->next_to_watch = NULL;
3394 tx_desc->buffer_addr = 0;
3395 tx_desc->cmd_type_offset_bsz = 0;
3396 /* move past filter desc */
3401 i -= tx_ring->count;
3402 tx_buf = tx_ring->tx_bi;
3403 tx_desc = I40E_TX_DESC(tx_ring, 0);
3405 /* unmap skb header data */
3406 dma_unmap_single(tx_ring->dev,
3407 dma_unmap_addr(tx_buf, dma),
3408 dma_unmap_len(tx_buf, len),
3410 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3411 kfree(tx_buf->raw_buf);
3413 tx_buf->raw_buf = NULL;
3414 tx_buf->tx_flags = 0;
3415 tx_buf->next_to_watch = NULL;
3416 dma_unmap_len_set(tx_buf, len, 0);
3417 tx_desc->buffer_addr = 0;
3418 tx_desc->cmd_type_offset_bsz = 0;
3420 /* move us past the eop_desc for start of next FD desc */
3425 i -= tx_ring->count;
3426 tx_buf = tx_ring->tx_bi;
3427 tx_desc = I40E_TX_DESC(tx_ring, 0);
3430 /* update budget accounting */
3432 } while (likely(budget));
3434 i += tx_ring->count;
3435 tx_ring->next_to_clean = i;
3437 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3438 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3444 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3445 * @irq: interrupt number
3446 * @data: pointer to a q_vector
3448 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3450 struct i40e_q_vector *q_vector = data;
3451 struct i40e_vsi *vsi;
3453 if (!q_vector->tx.ring)
3456 vsi = q_vector->tx.ring->vsi;
3457 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3463 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3464 * @vsi: the VSI being configured
3465 * @v_idx: vector index
3466 * @qp_idx: queue pair index
3468 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3470 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3471 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3472 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3474 tx_ring->q_vector = q_vector;
3475 tx_ring->next = q_vector->tx.ring;
3476 q_vector->tx.ring = tx_ring;
3477 q_vector->tx.count++;
3479 rx_ring->q_vector = q_vector;
3480 rx_ring->next = q_vector->rx.ring;
3481 q_vector->rx.ring = rx_ring;
3482 q_vector->rx.count++;
3486 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3487 * @vsi: the VSI being configured
3489 * This function maps descriptor rings to the queue-specific vectors
3490 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3491 * one vector per queue pair, but on a constrained vector budget, we
3492 * group the queue pairs as "efficiently" as possible.
3494 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3496 int qp_remaining = vsi->num_queue_pairs;
3497 int q_vectors = vsi->num_q_vectors;
3502 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3503 * group them so there are multiple queues per vector.
3504 * It is also important to go through all the vectors available to be
3505 * sure that if we don't use all the vectors, that the remaining vectors
3506 * are cleared. This is especially important when decreasing the
3507 * number of queues in use.
3509 for (; v_start < q_vectors; v_start++) {
3510 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3512 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3514 q_vector->num_ringpairs = num_ringpairs;
3516 q_vector->rx.count = 0;
3517 q_vector->tx.count = 0;
3518 q_vector->rx.ring = NULL;
3519 q_vector->tx.ring = NULL;
3521 while (num_ringpairs--) {
3522 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3530 * i40e_vsi_request_irq - Request IRQ from the OS
3531 * @vsi: the VSI being configured
3532 * @basename: name for the vector
3534 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3536 struct i40e_pf *pf = vsi->back;
3539 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3540 err = i40e_vsi_request_irq_msix(vsi, basename);
3541 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3542 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3545 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3549 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3554 #ifdef CONFIG_NET_POLL_CONTROLLER
3556 * i40e_netpoll - A Polling 'interrupt'handler
3557 * @netdev: network interface device structure
3559 * This is used by netconsole to send skbs without having to re-enable
3560 * interrupts. It's not called while the normal interrupt routine is executing.
3563 void i40e_netpoll(struct net_device *netdev)
3565 static void i40e_netpoll(struct net_device *netdev)
3568 struct i40e_netdev_priv *np = netdev_priv(netdev);
3569 struct i40e_vsi *vsi = np->vsi;
3570 struct i40e_pf *pf = vsi->back;
3573 /* if interface is down do nothing */
3574 if (test_bit(__I40E_DOWN, &vsi->state))
3577 pf->flags |= I40E_FLAG_IN_NETPOLL;
3578 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3579 for (i = 0; i < vsi->num_q_vectors; i++)
3580 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3582 i40e_intr(pf->pdev->irq, netdev);
3584 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3589 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3590 * @pf: the PF being configured
3591 * @pf_q: the PF queue
3592 * @enable: enable or disable state of the queue
3594 * This routine will wait for the given Tx queue of the PF to reach the
3595 * enabled or disabled state.
3596 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3597 * multiple retries; else will return 0 in case of success.
3599 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3604 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3605 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3606 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3609 usleep_range(10, 20);
3611 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3618 * i40e_vsi_control_tx - Start or stop a VSI's rings
3619 * @vsi: the VSI being configured
3620 * @enable: start or stop the rings
3622 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3624 struct i40e_pf *pf = vsi->back;
3625 struct i40e_hw *hw = &pf->hw;
3626 int i, j, pf_q, ret = 0;
3629 pf_q = vsi->base_queue;
3630 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3632 /* warn the TX unit of coming changes */
3633 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3635 usleep_range(10, 20);
3637 for (j = 0; j < 50; j++) {
3638 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3639 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3640 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3642 usleep_range(1000, 2000);
3644 /* Skip if the queue is already in the requested state */
3645 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3648 /* turn on/off the queue */
3650 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3651 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3653 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3656 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3657 /* No waiting for the Tx queue to disable */
3658 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3661 /* wait for the change to finish */
3662 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3664 dev_info(&pf->pdev->dev,
3665 "VSI seid %d Tx ring %d %sable timeout\n",
3666 vsi->seid, pf_q, (enable ? "en" : "dis"));
3671 if (hw->revision_id == 0)
3677 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3678 * @pf: the PF being configured
3679 * @pf_q: the PF queue
3680 * @enable: enable or disable state of the queue
3682 * This routine will wait for the given Rx queue of the PF to reach the
3683 * enabled or disabled state.
3684 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3685 * multiple retries; else will return 0 in case of success.
3687 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3692 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3693 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3694 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3697 usleep_range(10, 20);
3699 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3706 * i40e_vsi_control_rx - Start or stop a VSI's rings
3707 * @vsi: the VSI being configured
3708 * @enable: start or stop the rings
3710 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3712 struct i40e_pf *pf = vsi->back;
3713 struct i40e_hw *hw = &pf->hw;
3714 int i, j, pf_q, ret = 0;
3717 pf_q = vsi->base_queue;
3718 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3719 for (j = 0; j < 50; j++) {
3720 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3721 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3722 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3724 usleep_range(1000, 2000);
3727 /* Skip if the queue is already in the requested state */
3728 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3731 /* turn on/off the queue */
3733 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3735 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3736 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3738 /* wait for the change to finish */
3739 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3741 dev_info(&pf->pdev->dev,
3742 "VSI seid %d Rx ring %d %sable timeout\n",
3743 vsi->seid, pf_q, (enable ? "en" : "dis"));
3752 * i40e_vsi_control_rings - Start or stop a VSI's rings
3753 * @vsi: the VSI being configured
3754 * @enable: start or stop the rings
3756 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3760 /* do rx first for enable and last for disable */
3762 ret = i40e_vsi_control_rx(vsi, request);
3765 ret = i40e_vsi_control_tx(vsi, request);
3767 /* Ignore return value, we need to shutdown whatever we can */
3768 i40e_vsi_control_tx(vsi, request);
3769 i40e_vsi_control_rx(vsi, request);
3776 * i40e_vsi_free_irq - Free the irq association with the OS
3777 * @vsi: the VSI being configured
3779 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3781 struct i40e_pf *pf = vsi->back;
3782 struct i40e_hw *hw = &pf->hw;
3783 int base = vsi->base_vector;
3787 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3788 if (!vsi->q_vectors)
3791 if (!vsi->irqs_ready)
3794 vsi->irqs_ready = false;
3795 for (i = 0; i < vsi->num_q_vectors; i++) {
3796 u16 vector = i + base;
3798 /* free only the irqs that were actually requested */
3799 if (!vsi->q_vectors[i] ||
3800 !vsi->q_vectors[i]->num_ringpairs)
3803 /* clear the affinity_mask in the IRQ descriptor */
3804 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3806 free_irq(pf->msix_entries[vector].vector,
3809 /* Tear down the interrupt queue link list
3811 * We know that they come in pairs and always
3812 * the Rx first, then the Tx. To clear the
3813 * link list, stick the EOL value into the
3814 * next_q field of the registers.
3816 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3817 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3818 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3819 val |= I40E_QUEUE_END_OF_LIST
3820 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3821 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3823 while (qp != I40E_QUEUE_END_OF_LIST) {
3826 val = rd32(hw, I40E_QINT_RQCTL(qp));
3828 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3829 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3830 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3831 I40E_QINT_RQCTL_INTEVENT_MASK);
3833 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3834 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3836 wr32(hw, I40E_QINT_RQCTL(qp), val);
3838 val = rd32(hw, I40E_QINT_TQCTL(qp));
3840 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3841 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3843 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3844 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3845 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3846 I40E_QINT_TQCTL_INTEVENT_MASK);
3848 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3849 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3851 wr32(hw, I40E_QINT_TQCTL(qp), val);
3856 free_irq(pf->pdev->irq, pf);
3858 val = rd32(hw, I40E_PFINT_LNKLST0);
3859 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3860 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3861 val |= I40E_QUEUE_END_OF_LIST
3862 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3863 wr32(hw, I40E_PFINT_LNKLST0, val);
3865 val = rd32(hw, I40E_QINT_RQCTL(qp));
3866 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3867 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3868 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3869 I40E_QINT_RQCTL_INTEVENT_MASK);
3871 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3872 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3874 wr32(hw, I40E_QINT_RQCTL(qp), val);
3876 val = rd32(hw, I40E_QINT_TQCTL(qp));
3878 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3879 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3880 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3881 I40E_QINT_TQCTL_INTEVENT_MASK);
3883 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3884 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3886 wr32(hw, I40E_QINT_TQCTL(qp), val);
3891 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3892 * @vsi: the VSI being configured
3893 * @v_idx: Index of vector to be freed
3895 * This function frees the memory allocated to the q_vector. In addition if
3896 * NAPI is enabled it will delete any references to the NAPI struct prior
3897 * to freeing the q_vector.
3899 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3901 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3902 struct i40e_ring *ring;
3907 /* disassociate q_vector from rings */
3908 i40e_for_each_ring(ring, q_vector->tx)
3909 ring->q_vector = NULL;
3911 i40e_for_each_ring(ring, q_vector->rx)
3912 ring->q_vector = NULL;
3914 /* only VSI w/ an associated netdev is set up w/ NAPI */
3916 netif_napi_del(&q_vector->napi);
3918 vsi->q_vectors[v_idx] = NULL;
3920 kfree_rcu(q_vector, rcu);
3924 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3925 * @vsi: the VSI being un-configured
3927 * This frees the memory allocated to the q_vectors and
3928 * deletes references to the NAPI struct.
3930 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3934 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3935 i40e_free_q_vector(vsi, v_idx);
3939 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3940 * @pf: board private structure
3942 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3944 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3945 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3946 pci_disable_msix(pf->pdev);
3947 kfree(pf->msix_entries);
3948 pf->msix_entries = NULL;
3949 kfree(pf->irq_pile);
3950 pf->irq_pile = NULL;
3951 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3952 pci_disable_msi(pf->pdev);
3954 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3958 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3959 * @pf: board private structure
3961 * We go through and clear interrupt specific resources and reset the structure
3962 * to pre-load conditions
3964 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3968 i40e_stop_misc_vector(pf);
3969 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3970 synchronize_irq(pf->msix_entries[0].vector);
3971 free_irq(pf->msix_entries[0].vector, pf);
3974 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3975 for (i = 0; i < pf->num_alloc_vsi; i++)
3977 i40e_vsi_free_q_vectors(pf->vsi[i]);
3978 i40e_reset_interrupt_capability(pf);
3982 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3983 * @vsi: the VSI being configured
3985 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3992 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3993 napi_enable(&vsi->q_vectors[q_idx]->napi);
3997 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3998 * @vsi: the VSI being configured
4000 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4007 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4008 napi_disable(&vsi->q_vectors[q_idx]->napi);
4012 * i40e_vsi_close - Shut down a VSI
4013 * @vsi: the vsi to be quelled
4015 static void i40e_vsi_close(struct i40e_vsi *vsi)
4017 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4019 i40e_vsi_free_irq(vsi);
4020 i40e_vsi_free_tx_resources(vsi);
4021 i40e_vsi_free_rx_resources(vsi);
4022 vsi->current_netdev_flags = 0;
4026 * i40e_quiesce_vsi - Pause a given VSI
4027 * @vsi: the VSI being paused
4029 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4031 if (test_bit(__I40E_DOWN, &vsi->state))
4034 /* No need to disable FCoE VSI when Tx suspended */
4035 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4036 vsi->type == I40E_VSI_FCOE) {
4037 dev_dbg(&vsi->back->pdev->dev,
4038 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4042 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4043 if (vsi->netdev && netif_running(vsi->netdev))
4044 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4046 i40e_vsi_close(vsi);
4050 * i40e_unquiesce_vsi - Resume a given VSI
4051 * @vsi: the VSI being resumed
4053 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4055 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4058 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4059 if (vsi->netdev && netif_running(vsi->netdev))
4060 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4062 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4066 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4069 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4073 for (v = 0; v < pf->num_alloc_vsi; v++) {
4075 i40e_quiesce_vsi(pf->vsi[v]);
4080 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4083 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4087 for (v = 0; v < pf->num_alloc_vsi; v++) {
4089 i40e_unquiesce_vsi(pf->vsi[v]);
4093 #ifdef CONFIG_I40E_DCB
4095 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4096 * @vsi: the VSI being configured
4098 * This function waits for the given VSI's Tx queues to be disabled.
4100 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4102 struct i40e_pf *pf = vsi->back;
4105 pf_q = vsi->base_queue;
4106 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4107 /* Check and wait for the disable status of the queue */
4108 ret = i40e_pf_txq_wait(pf, pf_q, false);
4110 dev_info(&pf->pdev->dev,
4111 "VSI seid %d Tx ring %d disable timeout\n",
4121 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4124 * This function waits for the Tx queues to be in disabled state for all the
4125 * VSIs that are managed by this PF.
4127 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4131 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4132 /* No need to wait for FCoE VSI queues */
4133 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4134 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4146 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4147 * @q_idx: TX queue number
4148 * @vsi: Pointer to VSI struct
4150 * This function checks specified queue for given VSI. Detects hung condition.
4151 * Sets hung bit since it is two step process. Before next run of service task
4152 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4153 * hung condition remain unchanged and during subsequent run, this function
4154 * issues SW interrupt to recover from hung condition.
4156 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4158 struct i40e_ring *tx_ring = NULL;
4160 u32 head, val, tx_pending;
4165 /* now that we have an index, find the tx_ring struct */
4166 for (i = 0; i < vsi->num_queue_pairs; i++) {
4167 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4168 if (q_idx == vsi->tx_rings[i]->queue_index) {
4169 tx_ring = vsi->tx_rings[i];
4178 /* Read interrupt register */
4179 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4181 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4182 tx_ring->vsi->base_vector - 1));
4184 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4186 head = i40e_get_head(tx_ring);
4188 tx_pending = i40e_get_tx_pending(tx_ring);
4190 /* Interrupts are disabled and TX pending is non-zero,
4191 * trigger the SW interrupt (don't wait). Worst case
4192 * there will be one extra interrupt which may result
4193 * into not cleaning any queues because queues are cleaned.
4195 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4196 i40e_force_wb(vsi, tx_ring->q_vector);
4200 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4201 * @pf: pointer to PF struct
4203 * LAN VSI has netdev and netdev has TX queues. This function is to check
4204 * each of those TX queues if they are hung, trigger recovery by issuing
4207 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4209 struct net_device *netdev;
4210 struct i40e_vsi *vsi;
4213 /* Only for LAN VSI */
4214 vsi = pf->vsi[pf->lan_vsi];
4219 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4220 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4221 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4224 /* Make sure type is MAIN VSI */
4225 if (vsi->type != I40E_VSI_MAIN)
4228 netdev = vsi->netdev;
4232 /* Bail out if netif_carrier is not OK */
4233 if (!netif_carrier_ok(netdev))
4236 /* Go thru' TX queues for netdev */
4237 for (i = 0; i < netdev->num_tx_queues; i++) {
4238 struct netdev_queue *q;
4240 q = netdev_get_tx_queue(netdev, i);
4242 i40e_detect_recover_hung_queue(i, vsi);
4247 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4248 * @pf: pointer to PF
4250 * Get TC map for ISCSI PF type that will include iSCSI TC
4253 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4255 struct i40e_dcb_app_priority_table app;
4256 struct i40e_hw *hw = &pf->hw;
4257 u8 enabled_tc = 1; /* TC0 is always enabled */
4259 /* Get the iSCSI APP TLV */
4260 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4262 for (i = 0; i < dcbcfg->numapps; i++) {
4263 app = dcbcfg->app[i];
4264 if (app.selector == I40E_APP_SEL_TCPIP &&
4265 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4266 tc = dcbcfg->etscfg.prioritytable[app.priority];
4267 enabled_tc |= BIT_ULL(tc);
4276 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4277 * @dcbcfg: the corresponding DCBx configuration structure
4279 * Return the number of TCs from given DCBx configuration
4281 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4286 /* Scan the ETS Config Priority Table to find
4287 * traffic class enabled for a given priority
4288 * and use the traffic class index to get the
4289 * number of traffic classes enabled
4291 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4292 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4293 num_tc = dcbcfg->etscfg.prioritytable[i];
4296 /* Traffic class index starts from zero so
4297 * increment to return the actual count
4303 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4304 * @dcbcfg: the corresponding DCBx configuration structure
4306 * Query the current DCB configuration and return the number of
4307 * traffic classes enabled from the given DCBX config
4309 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4311 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4315 for (i = 0; i < num_tc; i++)
4316 enabled_tc |= BIT(i);
4322 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4323 * @pf: PF being queried
4325 * Return number of traffic classes enabled for the given PF
4327 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4329 struct i40e_hw *hw = &pf->hw;
4332 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4334 /* If DCB is not enabled then always in single TC */
4335 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4338 /* SFP mode will be enabled for all TCs on port */
4339 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4340 return i40e_dcb_get_num_tc(dcbcfg);
4342 /* MFP mode return count of enabled TCs for this PF */
4343 if (pf->hw.func_caps.iscsi)
4344 enabled_tc = i40e_get_iscsi_tc_map(pf);
4346 return 1; /* Only TC0 */
4348 /* At least have TC0 */
4349 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4350 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4351 if (enabled_tc & BIT_ULL(i))
4358 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4359 * @pf: PF being queried
4361 * Return a bitmap for first enabled traffic class for this PF.
4363 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4365 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4369 return 0x1; /* TC0 */
4371 /* Find the first enabled TC */
4372 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4373 if (enabled_tc & BIT_ULL(i))
4381 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4382 * @pf: PF being queried
4384 * Return a bitmap for enabled traffic classes for this PF.
4386 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4388 /* If DCB is not enabled for this PF then just return default TC */
4389 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4390 return i40e_pf_get_default_tc(pf);
4392 /* SFP mode we want PF to be enabled for all TCs */
4393 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4394 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4396 /* MFP enabled and iSCSI PF type */
4397 if (pf->hw.func_caps.iscsi)
4398 return i40e_get_iscsi_tc_map(pf);
4400 return i40e_pf_get_default_tc(pf);
4404 * i40e_vsi_get_bw_info - Query VSI BW Information
4405 * @vsi: the VSI being queried
4407 * Returns 0 on success, negative value on failure
4409 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4411 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4412 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4413 struct i40e_pf *pf = vsi->back;
4414 struct i40e_hw *hw = &pf->hw;
4419 /* Get the VSI level BW configuration */
4420 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4422 dev_info(&pf->pdev->dev,
4423 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4424 i40e_stat_str(&pf->hw, ret),
4425 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4429 /* Get the VSI level BW configuration per TC */
4430 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4433 dev_info(&pf->pdev->dev,
4434 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4435 i40e_stat_str(&pf->hw, ret),
4436 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4440 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4441 dev_info(&pf->pdev->dev,
4442 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4443 bw_config.tc_valid_bits,
4444 bw_ets_config.tc_valid_bits);
4445 /* Still continuing */
4448 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4449 vsi->bw_max_quanta = bw_config.max_bw;
4450 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4451 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4452 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4453 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4454 vsi->bw_ets_limit_credits[i] =
4455 le16_to_cpu(bw_ets_config.credits[i]);
4456 /* 3 bits out of 4 for each TC */
4457 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4464 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4465 * @vsi: the VSI being configured
4466 * @enabled_tc: TC bitmap
4467 * @bw_credits: BW shared credits per TC
4469 * Returns 0 on success, negative value on failure
4471 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4474 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4478 bw_data.tc_valid_bits = enabled_tc;
4479 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4480 bw_data.tc_bw_credits[i] = bw_share[i];
4482 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4485 dev_info(&vsi->back->pdev->dev,
4486 "AQ command Config VSI BW allocation per TC failed = %d\n",
4487 vsi->back->hw.aq.asq_last_status);
4491 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4492 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4498 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4499 * @vsi: the VSI being configured
4500 * @enabled_tc: TC map to be enabled
4503 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4505 struct net_device *netdev = vsi->netdev;
4506 struct i40e_pf *pf = vsi->back;
4507 struct i40e_hw *hw = &pf->hw;
4510 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4516 netdev_reset_tc(netdev);
4520 /* Set up actual enabled TCs on the VSI */
4521 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4524 /* set per TC queues for the VSI */
4525 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4526 /* Only set TC queues for enabled tcs
4528 * e.g. For a VSI that has TC0 and TC3 enabled the
4529 * enabled_tc bitmap would be 0x00001001; the driver
4530 * will set the numtc for netdev as 2 that will be
4531 * referenced by the netdev layer as TC 0 and 1.
4533 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4534 netdev_set_tc_queue(netdev,
4535 vsi->tc_config.tc_info[i].netdev_tc,
4536 vsi->tc_config.tc_info[i].qcount,
4537 vsi->tc_config.tc_info[i].qoffset);
4540 /* Assign UP2TC map for the VSI */
4541 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4542 /* Get the actual TC# for the UP */
4543 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4544 /* Get the mapped netdev TC# for the UP */
4545 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4546 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4551 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4552 * @vsi: the VSI being configured
4553 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4555 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4556 struct i40e_vsi_context *ctxt)
4558 /* copy just the sections touched not the entire info
4559 * since not all sections are valid as returned by
4562 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4563 memcpy(&vsi->info.queue_mapping,
4564 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4565 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4566 sizeof(vsi->info.tc_mapping));
4570 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4571 * @vsi: VSI to be configured
4572 * @enabled_tc: TC bitmap
4574 * This configures a particular VSI for TCs that are mapped to the
4575 * given TC bitmap. It uses default bandwidth share for TCs across
4576 * VSIs to configure TC for a particular VSI.
4579 * It is expected that the VSI queues have been quisced before calling
4582 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4584 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4585 struct i40e_vsi_context ctxt;
4589 /* Check if enabled_tc is same as existing or new TCs */
4590 if (vsi->tc_config.enabled_tc == enabled_tc)
4593 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4594 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4595 if (enabled_tc & BIT_ULL(i))
4599 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4601 dev_info(&vsi->back->pdev->dev,
4602 "Failed configuring TC map %d for VSI %d\n",
4603 enabled_tc, vsi->seid);
4607 /* Update Queue Pairs Mapping for currently enabled UPs */
4608 ctxt.seid = vsi->seid;
4609 ctxt.pf_num = vsi->back->hw.pf_id;
4611 ctxt.uplink_seid = vsi->uplink_seid;
4612 ctxt.info = vsi->info;
4613 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4615 /* Update the VSI after updating the VSI queue-mapping information */
4616 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4618 dev_info(&vsi->back->pdev->dev,
4619 "Update vsi tc config failed, err %s aq_err %s\n",
4620 i40e_stat_str(&vsi->back->hw, ret),
4621 i40e_aq_str(&vsi->back->hw,
4622 vsi->back->hw.aq.asq_last_status));
4625 /* update the local VSI info with updated queue map */
4626 i40e_vsi_update_queue_map(vsi, &ctxt);
4627 vsi->info.valid_sections = 0;
4629 /* Update current VSI BW information */
4630 ret = i40e_vsi_get_bw_info(vsi);
4632 dev_info(&vsi->back->pdev->dev,
4633 "Failed updating vsi bw info, err %s aq_err %s\n",
4634 i40e_stat_str(&vsi->back->hw, ret),
4635 i40e_aq_str(&vsi->back->hw,
4636 vsi->back->hw.aq.asq_last_status));
4640 /* Update the netdev TC setup */
4641 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4647 * i40e_veb_config_tc - Configure TCs for given VEB
4649 * @enabled_tc: TC bitmap
4651 * Configures given TC bitmap for VEB (switching) element
4653 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4655 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4656 struct i40e_pf *pf = veb->pf;
4660 /* No TCs or already enabled TCs just return */
4661 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4664 bw_data.tc_valid_bits = enabled_tc;
4665 /* bw_data.absolute_credits is not set (relative) */
4667 /* Enable ETS TCs with equal BW Share for now */
4668 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4669 if (enabled_tc & BIT_ULL(i))
4670 bw_data.tc_bw_share_credits[i] = 1;
4673 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4676 dev_info(&pf->pdev->dev,
4677 "VEB bw config failed, err %s aq_err %s\n",
4678 i40e_stat_str(&pf->hw, ret),
4679 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4683 /* Update the BW information */
4684 ret = i40e_veb_get_bw_info(veb);
4686 dev_info(&pf->pdev->dev,
4687 "Failed getting veb bw config, err %s aq_err %s\n",
4688 i40e_stat_str(&pf->hw, ret),
4689 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4696 #ifdef CONFIG_I40E_DCB
4698 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4701 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4702 * the caller would've quiesce all the VSIs before calling
4705 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4711 /* Enable the TCs available on PF to all VEBs */
4712 tc_map = i40e_pf_get_tc_map(pf);
4713 for (v = 0; v < I40E_MAX_VEB; v++) {
4716 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4718 dev_info(&pf->pdev->dev,
4719 "Failed configuring TC for VEB seid=%d\n",
4721 /* Will try to configure as many components */
4725 /* Update each VSI */
4726 for (v = 0; v < pf->num_alloc_vsi; v++) {
4730 /* - Enable all TCs for the LAN VSI
4732 * - For FCoE VSI only enable the TC configured
4733 * as per the APP TLV
4735 * - For all others keep them at TC0 for now
4737 if (v == pf->lan_vsi)
4738 tc_map = i40e_pf_get_tc_map(pf);
4740 tc_map = i40e_pf_get_default_tc(pf);
4742 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4743 tc_map = i40e_get_fcoe_tc_map(pf);
4744 #endif /* #ifdef I40E_FCOE */
4746 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4748 dev_info(&pf->pdev->dev,
4749 "Failed configuring TC for VSI seid=%d\n",
4751 /* Will try to configure as many components */
4753 /* Re-configure VSI vectors based on updated TC map */
4754 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4755 if (pf->vsi[v]->netdev)
4756 i40e_dcbnl_set_all(pf->vsi[v]);
4762 * i40e_resume_port_tx - Resume port Tx
4765 * Resume a port's Tx and issue a PF reset in case of failure to
4768 static int i40e_resume_port_tx(struct i40e_pf *pf)
4770 struct i40e_hw *hw = &pf->hw;
4773 ret = i40e_aq_resume_port_tx(hw, NULL);
4775 dev_info(&pf->pdev->dev,
4776 "Resume Port Tx failed, err %s aq_err %s\n",
4777 i40e_stat_str(&pf->hw, ret),
4778 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4779 /* Schedule PF reset to recover */
4780 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4781 i40e_service_event_schedule(pf);
4788 * i40e_init_pf_dcb - Initialize DCB configuration
4789 * @pf: PF being configured
4791 * Query the current DCB configuration and cache it
4792 * in the hardware structure
4794 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4796 struct i40e_hw *hw = &pf->hw;
4799 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4800 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4801 (pf->hw.aq.fw_maj_ver < 4))
4804 /* Get the initial DCB configuration */
4805 err = i40e_init_dcb(hw);
4807 /* Device/Function is not DCBX capable */
4808 if ((!hw->func_caps.dcb) ||
4809 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4810 dev_info(&pf->pdev->dev,
4811 "DCBX offload is not supported or is disabled for this PF.\n");
4813 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4817 /* When status is not DISABLED then DCBX in FW */
4818 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4819 DCB_CAP_DCBX_VER_IEEE;
4821 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4822 /* Enable DCB tagging only when more than one TC */
4823 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4824 pf->flags |= I40E_FLAG_DCB_ENABLED;
4825 dev_dbg(&pf->pdev->dev,
4826 "DCBX offload is supported for this PF.\n");
4829 dev_info(&pf->pdev->dev,
4830 "Query for DCB configuration failed, err %s aq_err %s\n",
4831 i40e_stat_str(&pf->hw, err),
4832 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4838 #endif /* CONFIG_I40E_DCB */
4839 #define SPEED_SIZE 14
4842 * i40e_print_link_message - print link up or down
4843 * @vsi: the VSI for which link needs a message
4845 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4847 char *speed = "Unknown";
4848 char *fc = "Unknown";
4850 if (vsi->current_isup == isup)
4852 vsi->current_isup = isup;
4854 netdev_info(vsi->netdev, "NIC Link is Down\n");
4858 /* Warn user if link speed on NPAR enabled partition is not at
4861 if (vsi->back->hw.func_caps.npar_enable &&
4862 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4863 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4864 netdev_warn(vsi->netdev,
4865 "The partition detected link speed that is less than 10Gbps\n");
4867 switch (vsi->back->hw.phy.link_info.link_speed) {
4868 case I40E_LINK_SPEED_40GB:
4871 case I40E_LINK_SPEED_20GB:
4874 case I40E_LINK_SPEED_10GB:
4877 case I40E_LINK_SPEED_1GB:
4880 case I40E_LINK_SPEED_100MB:
4887 switch (vsi->back->hw.fc.current_mode) {
4891 case I40E_FC_TX_PAUSE:
4894 case I40E_FC_RX_PAUSE:
4902 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
4907 * i40e_up_complete - Finish the last steps of bringing up a connection
4908 * @vsi: the VSI being configured
4910 static int i40e_up_complete(struct i40e_vsi *vsi)
4912 struct i40e_pf *pf = vsi->back;
4915 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4916 i40e_vsi_configure_msix(vsi);
4918 i40e_configure_msi_and_legacy(vsi);
4921 err = i40e_vsi_control_rings(vsi, true);
4925 clear_bit(__I40E_DOWN, &vsi->state);
4926 i40e_napi_enable_all(vsi);
4927 i40e_vsi_enable_irq(vsi);
4929 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4931 i40e_print_link_message(vsi, true);
4932 netif_tx_start_all_queues(vsi->netdev);
4933 netif_carrier_on(vsi->netdev);
4934 } else if (vsi->netdev) {
4935 i40e_print_link_message(vsi, false);
4936 /* need to check for qualified module here*/
4937 if ((pf->hw.phy.link_info.link_info &
4938 I40E_AQ_MEDIA_AVAILABLE) &&
4939 (!(pf->hw.phy.link_info.an_info &
4940 I40E_AQ_QUALIFIED_MODULE)))
4941 netdev_err(vsi->netdev,
4942 "the driver failed to link because an unqualified module was detected.");
4945 /* replay FDIR SB filters */
4946 if (vsi->type == I40E_VSI_FDIR) {
4947 /* reset fd counters */
4948 pf->fd_add_err = pf->fd_atr_cnt = 0;
4949 if (pf->fd_tcp_rule > 0) {
4950 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4951 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4952 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4953 pf->fd_tcp_rule = 0;
4955 i40e_fdir_filter_restore(vsi);
4957 i40e_service_event_schedule(pf);
4963 * i40e_vsi_reinit_locked - Reset the VSI
4964 * @vsi: the VSI being configured
4966 * Rebuild the ring structs after some configuration
4967 * has changed, e.g. MTU size.
4969 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4971 struct i40e_pf *pf = vsi->back;
4973 WARN_ON(in_interrupt());
4974 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4975 usleep_range(1000, 2000);
4978 /* Give a VF some time to respond to the reset. The
4979 * two second wait is based upon the watchdog cycle in
4982 if (vsi->type == I40E_VSI_SRIOV)
4985 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4989 * i40e_up - Bring the connection back up after being down
4990 * @vsi: the VSI being configured
4992 int i40e_up(struct i40e_vsi *vsi)
4996 err = i40e_vsi_configure(vsi);
4998 err = i40e_up_complete(vsi);
5004 * i40e_down - Shutdown the connection processing
5005 * @vsi: the VSI being stopped
5007 void i40e_down(struct i40e_vsi *vsi)
5011 /* It is assumed that the caller of this function
5012 * sets the vsi->state __I40E_DOWN bit.
5015 netif_carrier_off(vsi->netdev);
5016 netif_tx_disable(vsi->netdev);
5018 i40e_vsi_disable_irq(vsi);
5019 i40e_vsi_control_rings(vsi, false);
5020 i40e_napi_disable_all(vsi);
5022 for (i = 0; i < vsi->num_queue_pairs; i++) {
5023 i40e_clean_tx_ring(vsi->tx_rings[i]);
5024 i40e_clean_rx_ring(vsi->rx_rings[i]);
5029 * i40e_setup_tc - configure multiple traffic classes
5030 * @netdev: net device to configure
5031 * @tc: number of traffic classes to enable
5034 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5036 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5039 struct i40e_netdev_priv *np = netdev_priv(netdev);
5040 struct i40e_vsi *vsi = np->vsi;
5041 struct i40e_pf *pf = vsi->back;
5046 /* Check if DCB enabled to continue */
5047 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5048 netdev_info(netdev, "DCB is not enabled for adapter\n");
5052 /* Check if MFP enabled */
5053 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5054 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5058 /* Check whether tc count is within enabled limit */
5059 if (tc > i40e_pf_get_num_tc(pf)) {
5060 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5064 /* Generate TC map for number of tc requested */
5065 for (i = 0; i < tc; i++)
5066 enabled_tc |= BIT_ULL(i);
5068 /* Requesting same TC configuration as already enabled */
5069 if (enabled_tc == vsi->tc_config.enabled_tc)
5072 /* Quiesce VSI queues */
5073 i40e_quiesce_vsi(vsi);
5075 /* Configure VSI for enabled TCs */
5076 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5078 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5084 i40e_unquiesce_vsi(vsi);
5091 * i40e_open - Called when a network interface is made active
5092 * @netdev: network interface device structure
5094 * The open entry point is called when a network interface is made
5095 * active by the system (IFF_UP). At this point all resources needed
5096 * for transmit and receive operations are allocated, the interrupt
5097 * handler is registered with the OS, the netdev watchdog subtask is
5098 * enabled, and the stack is notified that the interface is ready.
5100 * Returns 0 on success, negative value on failure
5102 int i40e_open(struct net_device *netdev)
5104 struct i40e_netdev_priv *np = netdev_priv(netdev);
5105 struct i40e_vsi *vsi = np->vsi;
5106 struct i40e_pf *pf = vsi->back;
5109 /* disallow open during test or if eeprom is broken */
5110 if (test_bit(__I40E_TESTING, &pf->state) ||
5111 test_bit(__I40E_BAD_EEPROM, &pf->state))
5114 netif_carrier_off(netdev);
5116 err = i40e_vsi_open(vsi);
5120 /* configure global TSO hardware offload settings */
5121 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5122 TCP_FLAG_FIN) >> 16);
5123 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5125 TCP_FLAG_CWR) >> 16);
5126 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5128 #ifdef CONFIG_I40E_VXLAN
5129 vxlan_get_rx_port(netdev);
5137 * @vsi: the VSI to open
5139 * Finish initialization of the VSI.
5141 * Returns 0 on success, negative value on failure
5143 int i40e_vsi_open(struct i40e_vsi *vsi)
5145 struct i40e_pf *pf = vsi->back;
5146 char int_name[I40E_INT_NAME_STR_LEN];
5149 /* allocate descriptors */
5150 err = i40e_vsi_setup_tx_resources(vsi);
5153 err = i40e_vsi_setup_rx_resources(vsi);
5157 err = i40e_vsi_configure(vsi);
5162 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5163 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5164 err = i40e_vsi_request_irq(vsi, int_name);
5168 /* Notify the stack of the actual queue counts. */
5169 err = netif_set_real_num_tx_queues(vsi->netdev,
5170 vsi->num_queue_pairs);
5172 goto err_set_queues;
5174 err = netif_set_real_num_rx_queues(vsi->netdev,
5175 vsi->num_queue_pairs);
5177 goto err_set_queues;
5179 } else if (vsi->type == I40E_VSI_FDIR) {
5180 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5181 dev_driver_string(&pf->pdev->dev),
5182 dev_name(&pf->pdev->dev));
5183 err = i40e_vsi_request_irq(vsi, int_name);
5190 err = i40e_up_complete(vsi);
5192 goto err_up_complete;
5199 i40e_vsi_free_irq(vsi);
5201 i40e_vsi_free_rx_resources(vsi);
5203 i40e_vsi_free_tx_resources(vsi);
5204 if (vsi == pf->vsi[pf->lan_vsi])
5205 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5211 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5212 * @pf: Pointer to PF
5214 * This function destroys the hlist where all the Flow Director
5215 * filters were saved.
5217 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5219 struct i40e_fdir_filter *filter;
5220 struct hlist_node *node2;
5222 hlist_for_each_entry_safe(filter, node2,
5223 &pf->fdir_filter_list, fdir_node) {
5224 hlist_del(&filter->fdir_node);
5227 pf->fdir_pf_active_filters = 0;
5231 * i40e_close - Disables a network interface
5232 * @netdev: network interface device structure
5234 * The close entry point is called when an interface is de-activated
5235 * by the OS. The hardware is still under the driver's control, but
5236 * this netdev interface is disabled.
5238 * Returns 0, this is not allowed to fail
5241 int i40e_close(struct net_device *netdev)
5243 static int i40e_close(struct net_device *netdev)
5246 struct i40e_netdev_priv *np = netdev_priv(netdev);
5247 struct i40e_vsi *vsi = np->vsi;
5249 i40e_vsi_close(vsi);
5255 * i40e_do_reset - Start a PF or Core Reset sequence
5256 * @pf: board private structure
5257 * @reset_flags: which reset is requested
5259 * The essential difference in resets is that the PF Reset
5260 * doesn't clear the packet buffers, doesn't reset the PE
5261 * firmware, and doesn't bother the other PFs on the chip.
5263 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5267 WARN_ON(in_interrupt());
5269 if (i40e_check_asq_alive(&pf->hw))
5270 i40e_vc_notify_reset(pf);
5272 /* do the biggest reset indicated */
5273 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5275 /* Request a Global Reset
5277 * This will start the chip's countdown to the actual full
5278 * chip reset event, and a warning interrupt to be sent
5279 * to all PFs, including the requestor. Our handler
5280 * for the warning interrupt will deal with the shutdown
5281 * and recovery of the switch setup.
5283 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5284 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5285 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5286 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5288 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5290 /* Request a Core Reset
5292 * Same as Global Reset, except does *not* include the MAC/PHY
5294 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5295 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5296 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5297 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5298 i40e_flush(&pf->hw);
5300 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5302 /* Request a PF Reset
5304 * Resets only the PF-specific registers
5306 * This goes directly to the tear-down and rebuild of
5307 * the switch, since we need to do all the recovery as
5308 * for the Core Reset.
5310 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5311 i40e_handle_reset_warning(pf);
5313 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5316 /* Find the VSI(s) that requested a re-init */
5317 dev_info(&pf->pdev->dev,
5318 "VSI reinit requested\n");
5319 for (v = 0; v < pf->num_alloc_vsi; v++) {
5320 struct i40e_vsi *vsi = pf->vsi[v];
5323 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5324 i40e_vsi_reinit_locked(pf->vsi[v]);
5325 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5328 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5331 /* Find the VSI(s) that needs to be brought down */
5332 dev_info(&pf->pdev->dev, "VSI down requested\n");
5333 for (v = 0; v < pf->num_alloc_vsi; v++) {
5334 struct i40e_vsi *vsi = pf->vsi[v];
5337 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5338 set_bit(__I40E_DOWN, &vsi->state);
5340 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5344 dev_info(&pf->pdev->dev,
5345 "bad reset request 0x%08x\n", reset_flags);
5349 #ifdef CONFIG_I40E_DCB
5351 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5352 * @pf: board private structure
5353 * @old_cfg: current DCB config
5354 * @new_cfg: new DCB config
5356 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5357 struct i40e_dcbx_config *old_cfg,
5358 struct i40e_dcbx_config *new_cfg)
5360 bool need_reconfig = false;
5362 /* Check if ETS configuration has changed */
5363 if (memcmp(&new_cfg->etscfg,
5365 sizeof(new_cfg->etscfg))) {
5366 /* If Priority Table has changed reconfig is needed */
5367 if (memcmp(&new_cfg->etscfg.prioritytable,
5368 &old_cfg->etscfg.prioritytable,
5369 sizeof(new_cfg->etscfg.prioritytable))) {
5370 need_reconfig = true;
5371 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5374 if (memcmp(&new_cfg->etscfg.tcbwtable,
5375 &old_cfg->etscfg.tcbwtable,
5376 sizeof(new_cfg->etscfg.tcbwtable)))
5377 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5379 if (memcmp(&new_cfg->etscfg.tsatable,
5380 &old_cfg->etscfg.tsatable,
5381 sizeof(new_cfg->etscfg.tsatable)))
5382 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5385 /* Check if PFC configuration has changed */
5386 if (memcmp(&new_cfg->pfc,
5388 sizeof(new_cfg->pfc))) {
5389 need_reconfig = true;
5390 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5393 /* Check if APP Table has changed */
5394 if (memcmp(&new_cfg->app,
5396 sizeof(new_cfg->app))) {
5397 need_reconfig = true;
5398 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5401 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5402 return need_reconfig;
5406 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5407 * @pf: board private structure
5408 * @e: event info posted on ARQ
5410 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5411 struct i40e_arq_event_info *e)
5413 struct i40e_aqc_lldp_get_mib *mib =
5414 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5415 struct i40e_hw *hw = &pf->hw;
5416 struct i40e_dcbx_config tmp_dcbx_cfg;
5417 bool need_reconfig = false;
5421 /* Not DCB capable or capability disabled */
5422 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5425 /* Ignore if event is not for Nearest Bridge */
5426 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5427 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5428 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5429 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5432 /* Check MIB Type and return if event for Remote MIB update */
5433 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5434 dev_dbg(&pf->pdev->dev,
5435 "LLDP event mib type %s\n", type ? "remote" : "local");
5436 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5437 /* Update the remote cached instance and return */
5438 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5439 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5440 &hw->remote_dcbx_config);
5444 /* Store the old configuration */
5445 tmp_dcbx_cfg = hw->local_dcbx_config;
5447 /* Reset the old DCBx configuration data */
5448 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5449 /* Get updated DCBX data from firmware */
5450 ret = i40e_get_dcb_config(&pf->hw);
5452 dev_info(&pf->pdev->dev,
5453 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5454 i40e_stat_str(&pf->hw, ret),
5455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5459 /* No change detected in DCBX configs */
5460 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5461 sizeof(tmp_dcbx_cfg))) {
5462 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5466 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5467 &hw->local_dcbx_config);
5469 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5474 /* Enable DCB tagging only when more than one TC */
5475 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5476 pf->flags |= I40E_FLAG_DCB_ENABLED;
5478 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5480 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5481 /* Reconfiguration needed quiesce all VSIs */
5482 i40e_pf_quiesce_all_vsi(pf);
5484 /* Changes in configuration update VEB/VSI */
5485 i40e_dcb_reconfigure(pf);
5487 ret = i40e_resume_port_tx(pf);
5489 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5490 /* In case of error no point in resuming VSIs */
5494 /* Wait for the PF's Tx queues to be disabled */
5495 ret = i40e_pf_wait_txq_disabled(pf);
5497 /* Schedule PF reset to recover */
5498 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5499 i40e_service_event_schedule(pf);
5501 i40e_pf_unquiesce_all_vsi(pf);
5507 #endif /* CONFIG_I40E_DCB */
5510 * i40e_do_reset_safe - Protected reset path for userland calls.
5511 * @pf: board private structure
5512 * @reset_flags: which reset is requested
5515 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5518 i40e_do_reset(pf, reset_flags);
5523 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5524 * @pf: board private structure
5525 * @e: event info posted on ARQ
5527 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5530 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5531 struct i40e_arq_event_info *e)
5533 struct i40e_aqc_lan_overflow *data =
5534 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5535 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5536 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5537 struct i40e_hw *hw = &pf->hw;
5541 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5544 /* Queue belongs to VF, find the VF and issue VF reset */
5545 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5546 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5547 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5548 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5549 vf_id -= hw->func_caps.vf_base_id;
5550 vf = &pf->vf[vf_id];
5551 i40e_vc_notify_vf_reset(vf);
5552 /* Allow VF to process pending reset notification */
5554 i40e_reset_vf(vf, false);
5559 * i40e_service_event_complete - Finish up the service event
5560 * @pf: board private structure
5562 static void i40e_service_event_complete(struct i40e_pf *pf)
5564 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5566 /* flush memory to make sure state is correct before next watchog */
5567 smp_mb__before_atomic();
5568 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5572 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5573 * @pf: board private structure
5575 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5579 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5580 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5585 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5586 * @pf: board private structure
5588 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5592 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5593 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5594 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5595 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5600 * i40e_get_global_fd_count - Get total FD filters programmed on device
5601 * @pf: board private structure
5603 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5607 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5608 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5609 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5610 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5615 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5616 * @pf: board private structure
5618 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5620 struct i40e_fdir_filter *filter;
5621 u32 fcnt_prog, fcnt_avail;
5622 struct hlist_node *node;
5624 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5627 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5630 fcnt_prog = i40e_get_global_fd_count(pf);
5631 fcnt_avail = pf->fdir_pf_filter_count;
5632 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5633 (pf->fd_add_err == 0) ||
5634 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5635 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5636 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5637 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5638 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5639 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5642 /* Wait for some more space to be available to turn on ATR */
5643 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5644 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5645 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5646 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5647 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5648 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5652 /* if hw had a problem adding a filter, delete it */
5653 if (pf->fd_inv > 0) {
5654 hlist_for_each_entry_safe(filter, node,
5655 &pf->fdir_filter_list, fdir_node) {
5656 if (filter->fd_id == pf->fd_inv) {
5657 hlist_del(&filter->fdir_node);
5659 pf->fdir_pf_active_filters--;
5665 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5666 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5668 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5669 * @pf: board private structure
5671 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5673 unsigned long min_flush_time;
5674 int flush_wait_retry = 50;
5675 bool disable_atr = false;
5679 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5682 if (!time_after(jiffies, pf->fd_flush_timestamp +
5683 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5686 /* If the flush is happening too quick and we have mostly SB rules we
5687 * should not re-enable ATR for some time.
5689 min_flush_time = pf->fd_flush_timestamp +
5690 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5691 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5693 if (!(time_after(jiffies, min_flush_time)) &&
5694 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5695 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5696 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5700 pf->fd_flush_timestamp = jiffies;
5701 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5702 /* flush all filters */
5703 wr32(&pf->hw, I40E_PFQF_CTL_1,
5704 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5705 i40e_flush(&pf->hw);
5709 /* Check FD flush status every 5-6msec */
5710 usleep_range(5000, 6000);
5711 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5712 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5714 } while (flush_wait_retry--);
5715 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5716 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5718 /* replay sideband filters */
5719 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5721 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5722 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5723 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5724 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5730 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5731 * @pf: board private structure
5733 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5735 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5738 /* We can see up to 256 filter programming desc in transit if the filters are
5739 * being applied really fast; before we see the first
5740 * filter miss error on Rx queue 0. Accumulating enough error messages before
5741 * reacting will make sure we don't cause flush too often.
5743 #define I40E_MAX_FD_PROGRAM_ERROR 256
5746 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5747 * @pf: board private structure
5749 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5752 /* if interface is down do nothing */
5753 if (test_bit(__I40E_DOWN, &pf->state))
5756 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5759 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5760 i40e_fdir_flush_and_replay(pf);
5762 i40e_fdir_check_and_reenable(pf);
5767 * i40e_vsi_link_event - notify VSI of a link event
5768 * @vsi: vsi to be notified
5769 * @link_up: link up or down
5771 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5773 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5776 switch (vsi->type) {
5781 if (!vsi->netdev || !vsi->netdev_registered)
5785 netif_carrier_on(vsi->netdev);
5786 netif_tx_wake_all_queues(vsi->netdev);
5788 netif_carrier_off(vsi->netdev);
5789 netif_tx_stop_all_queues(vsi->netdev);
5793 case I40E_VSI_SRIOV:
5794 case I40E_VSI_VMDQ2:
5796 case I40E_VSI_MIRROR:
5798 /* there is no notification for other VSIs */
5804 * i40e_veb_link_event - notify elements on the veb of a link event
5805 * @veb: veb to be notified
5806 * @link_up: link up or down
5808 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5813 if (!veb || !veb->pf)
5817 /* depth first... */
5818 for (i = 0; i < I40E_MAX_VEB; i++)
5819 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5820 i40e_veb_link_event(pf->veb[i], link_up);
5822 /* ... now the local VSIs */
5823 for (i = 0; i < pf->num_alloc_vsi; i++)
5824 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5825 i40e_vsi_link_event(pf->vsi[i], link_up);
5829 * i40e_link_event - Update netif_carrier status
5830 * @pf: board private structure
5832 static void i40e_link_event(struct i40e_pf *pf)
5834 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5835 u8 new_link_speed, old_link_speed;
5837 bool new_link, old_link;
5839 /* set this to force the get_link_status call to refresh state */
5840 pf->hw.phy.get_link_info = true;
5842 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5844 status = i40e_get_link_status(&pf->hw, &new_link);
5846 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5851 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5852 new_link_speed = pf->hw.phy.link_info.link_speed;
5854 if (new_link == old_link &&
5855 new_link_speed == old_link_speed &&
5856 (test_bit(__I40E_DOWN, &vsi->state) ||
5857 new_link == netif_carrier_ok(vsi->netdev)))
5860 if (!test_bit(__I40E_DOWN, &vsi->state))
5861 i40e_print_link_message(vsi, new_link);
5863 /* Notify the base of the switch tree connected to
5864 * the link. Floating VEBs are not notified.
5866 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5867 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5869 i40e_vsi_link_event(vsi, new_link);
5872 i40e_vc_notify_link_state(pf);
5874 if (pf->flags & I40E_FLAG_PTP)
5875 i40e_ptp_set_increment(pf);
5879 * i40e_watchdog_subtask - periodic checks not using event driven response
5880 * @pf: board private structure
5882 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5886 /* if interface is down do nothing */
5887 if (test_bit(__I40E_DOWN, &pf->state) ||
5888 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5891 /* make sure we don't do these things too often */
5892 if (time_before(jiffies, (pf->service_timer_previous +
5893 pf->service_timer_period)))
5895 pf->service_timer_previous = jiffies;
5897 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
5898 i40e_link_event(pf);
5900 /* Update the stats for active netdevs so the network stack
5901 * can look at updated numbers whenever it cares to
5903 for (i = 0; i < pf->num_alloc_vsi; i++)
5904 if (pf->vsi[i] && pf->vsi[i]->netdev)
5905 i40e_update_stats(pf->vsi[i]);
5907 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5908 /* Update the stats for the active switching components */
5909 for (i = 0; i < I40E_MAX_VEB; i++)
5911 i40e_update_veb_stats(pf->veb[i]);
5914 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5918 * i40e_reset_subtask - Set up for resetting the device and driver
5919 * @pf: board private structure
5921 static void i40e_reset_subtask(struct i40e_pf *pf)
5923 u32 reset_flags = 0;
5926 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5927 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5928 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5930 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5931 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5932 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5934 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5935 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5936 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5938 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5939 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5940 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5942 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5943 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5944 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5947 /* If there's a recovery already waiting, it takes
5948 * precedence before starting a new reset sequence.
5950 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5951 i40e_handle_reset_warning(pf);
5955 /* If we're already down or resetting, just bail */
5957 !test_bit(__I40E_DOWN, &pf->state) &&
5958 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5959 i40e_do_reset(pf, reset_flags);
5966 * i40e_handle_link_event - Handle link event
5967 * @pf: board private structure
5968 * @e: event info posted on ARQ
5970 static void i40e_handle_link_event(struct i40e_pf *pf,
5971 struct i40e_arq_event_info *e)
5973 struct i40e_hw *hw = &pf->hw;
5974 struct i40e_aqc_get_link_status *status =
5975 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5977 /* save off old link status information */
5978 hw->phy.link_info_old = hw->phy.link_info;
5980 /* Do a new status request to re-enable LSE reporting
5981 * and load new status information into the hw struct
5982 * This completely ignores any state information
5983 * in the ARQ event info, instead choosing to always
5984 * issue the AQ update link status command.
5986 i40e_link_event(pf);
5988 /* check for unqualified module, if link is down */
5989 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5990 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5991 (!(status->link_info & I40E_AQ_LINK_UP)))
5992 dev_err(&pf->pdev->dev,
5993 "The driver failed to link because an unqualified module was detected.\n");
5997 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5998 * @pf: board private structure
6000 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6002 struct i40e_arq_event_info event;
6003 struct i40e_hw *hw = &pf->hw;
6010 /* Do not run clean AQ when PF reset fails */
6011 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6014 /* check for error indications */
6015 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6017 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6018 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6019 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6021 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6022 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6023 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6025 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6026 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6027 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6030 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6032 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6034 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6035 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6036 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6038 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6039 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6040 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6042 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6043 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6044 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6047 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6049 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6050 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6055 ret = i40e_clean_arq_element(hw, &event, &pending);
6056 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6059 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6063 opcode = le16_to_cpu(event.desc.opcode);
6066 case i40e_aqc_opc_get_link_status:
6067 i40e_handle_link_event(pf, &event);
6069 case i40e_aqc_opc_send_msg_to_pf:
6070 ret = i40e_vc_process_vf_msg(pf,
6071 le16_to_cpu(event.desc.retval),
6072 le32_to_cpu(event.desc.cookie_high),
6073 le32_to_cpu(event.desc.cookie_low),
6077 case i40e_aqc_opc_lldp_update_mib:
6078 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6079 #ifdef CONFIG_I40E_DCB
6081 ret = i40e_handle_lldp_event(pf, &event);
6083 #endif /* CONFIG_I40E_DCB */
6085 case i40e_aqc_opc_event_lan_overflow:
6086 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6087 i40e_handle_lan_overflow_event(pf, &event);
6089 case i40e_aqc_opc_send_msg_to_peer:
6090 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6092 case i40e_aqc_opc_nvm_erase:
6093 case i40e_aqc_opc_nvm_update:
6094 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6097 dev_info(&pf->pdev->dev,
6098 "ARQ Error: Unknown event 0x%04x received\n",
6102 } while (pending && (i++ < pf->adminq_work_limit));
6104 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6105 /* re-enable Admin queue interrupt cause */
6106 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6107 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6108 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6111 kfree(event.msg_buf);
6115 * i40e_verify_eeprom - make sure eeprom is good to use
6116 * @pf: board private structure
6118 static void i40e_verify_eeprom(struct i40e_pf *pf)
6122 err = i40e_diag_eeprom_test(&pf->hw);
6124 /* retry in case of garbage read */
6125 err = i40e_diag_eeprom_test(&pf->hw);
6127 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6129 set_bit(__I40E_BAD_EEPROM, &pf->state);
6133 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6134 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6135 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6140 * i40e_enable_pf_switch_lb
6141 * @pf: pointer to the PF structure
6143 * enable switch loop back or die - no point in a return value
6145 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6147 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6148 struct i40e_vsi_context ctxt;
6151 ctxt.seid = pf->main_vsi_seid;
6152 ctxt.pf_num = pf->hw.pf_id;
6154 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6156 dev_info(&pf->pdev->dev,
6157 "couldn't get PF vsi config, err %s aq_err %s\n",
6158 i40e_stat_str(&pf->hw, ret),
6159 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6162 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6163 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6164 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6166 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6168 dev_info(&pf->pdev->dev,
6169 "update vsi switch failed, err %s aq_err %s\n",
6170 i40e_stat_str(&pf->hw, ret),
6171 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6176 * i40e_disable_pf_switch_lb
6177 * @pf: pointer to the PF structure
6179 * disable switch loop back or die - no point in a return value
6181 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6183 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6184 struct i40e_vsi_context ctxt;
6187 ctxt.seid = pf->main_vsi_seid;
6188 ctxt.pf_num = pf->hw.pf_id;
6190 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6192 dev_info(&pf->pdev->dev,
6193 "couldn't get PF vsi config, err %s aq_err %s\n",
6194 i40e_stat_str(&pf->hw, ret),
6195 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6198 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6199 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6200 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6202 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6204 dev_info(&pf->pdev->dev,
6205 "update vsi switch failed, err %s aq_err %s\n",
6206 i40e_stat_str(&pf->hw, ret),
6207 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6212 * i40e_config_bridge_mode - Configure the HW bridge mode
6213 * @veb: pointer to the bridge instance
6215 * Configure the loop back mode for the LAN VSI that is downlink to the
6216 * specified HW bridge instance. It is expected this function is called
6217 * when a new HW bridge is instantiated.
6219 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6221 struct i40e_pf *pf = veb->pf;
6223 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6224 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6225 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6226 i40e_disable_pf_switch_lb(pf);
6228 i40e_enable_pf_switch_lb(pf);
6232 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6233 * @veb: pointer to the VEB instance
6235 * This is a recursive function that first builds the attached VSIs then
6236 * recurses in to build the next layer of VEB. We track the connections
6237 * through our own index numbers because the seid's from the HW could
6238 * change across the reset.
6240 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6242 struct i40e_vsi *ctl_vsi = NULL;
6243 struct i40e_pf *pf = veb->pf;
6247 /* build VSI that owns this VEB, temporarily attached to base VEB */
6248 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6250 pf->vsi[v]->veb_idx == veb->idx &&
6251 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6252 ctl_vsi = pf->vsi[v];
6257 dev_info(&pf->pdev->dev,
6258 "missing owner VSI for veb_idx %d\n", veb->idx);
6260 goto end_reconstitute;
6262 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6263 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6264 ret = i40e_add_vsi(ctl_vsi);
6266 dev_info(&pf->pdev->dev,
6267 "rebuild of veb_idx %d owner VSI failed: %d\n",
6269 goto end_reconstitute;
6271 i40e_vsi_reset_stats(ctl_vsi);
6273 /* create the VEB in the switch and move the VSI onto the VEB */
6274 ret = i40e_add_veb(veb, ctl_vsi);
6276 goto end_reconstitute;
6278 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6279 veb->bridge_mode = BRIDGE_MODE_VEB;
6281 veb->bridge_mode = BRIDGE_MODE_VEPA;
6282 i40e_config_bridge_mode(veb);
6284 /* create the remaining VSIs attached to this VEB */
6285 for (v = 0; v < pf->num_alloc_vsi; v++) {
6286 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6289 if (pf->vsi[v]->veb_idx == veb->idx) {
6290 struct i40e_vsi *vsi = pf->vsi[v];
6292 vsi->uplink_seid = veb->seid;
6293 ret = i40e_add_vsi(vsi);
6295 dev_info(&pf->pdev->dev,
6296 "rebuild of vsi_idx %d failed: %d\n",
6298 goto end_reconstitute;
6300 i40e_vsi_reset_stats(vsi);
6304 /* create any VEBs attached to this VEB - RECURSION */
6305 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6306 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6307 pf->veb[veb_idx]->uplink_seid = veb->seid;
6308 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6319 * i40e_get_capabilities - get info about the HW
6320 * @pf: the PF struct
6322 static int i40e_get_capabilities(struct i40e_pf *pf)
6324 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6329 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6331 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6335 /* this loads the data into the hw struct for us */
6336 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6338 i40e_aqc_opc_list_func_capabilities,
6340 /* data loaded, buffer no longer needed */
6343 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6344 /* retry with a larger buffer */
6345 buf_len = data_size;
6346 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6347 dev_info(&pf->pdev->dev,
6348 "capability discovery failed, err %s aq_err %s\n",
6349 i40e_stat_str(&pf->hw, err),
6350 i40e_aq_str(&pf->hw,
6351 pf->hw.aq.asq_last_status));
6356 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6357 dev_info(&pf->pdev->dev,
6358 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6359 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6360 pf->hw.func_caps.num_msix_vectors,
6361 pf->hw.func_caps.num_msix_vectors_vf,
6362 pf->hw.func_caps.fd_filters_guaranteed,
6363 pf->hw.func_caps.fd_filters_best_effort,
6364 pf->hw.func_caps.num_tx_qp,
6365 pf->hw.func_caps.num_vsis);
6367 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6368 + pf->hw.func_caps.num_vfs)
6369 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6370 dev_info(&pf->pdev->dev,
6371 "got num_vsis %d, setting num_vsis to %d\n",
6372 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6373 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6379 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6382 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6383 * @pf: board private structure
6385 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6387 struct i40e_vsi *vsi;
6390 /* quick workaround for an NVM issue that leaves a critical register
6393 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6394 static const u32 hkey[] = {
6395 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6396 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6397 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6400 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6401 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6404 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6407 /* find existing VSI and see if it needs configuring */
6409 for (i = 0; i < pf->num_alloc_vsi; i++) {
6410 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6416 /* create a new VSI if none exists */
6418 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6419 pf->vsi[pf->lan_vsi]->seid, 0);
6421 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6422 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6427 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6431 * i40e_fdir_teardown - release the Flow Director resources
6432 * @pf: board private structure
6434 static void i40e_fdir_teardown(struct i40e_pf *pf)
6438 i40e_fdir_filter_exit(pf);
6439 for (i = 0; i < pf->num_alloc_vsi; i++) {
6440 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6441 i40e_vsi_release(pf->vsi[i]);
6448 * i40e_prep_for_reset - prep for the core to reset
6449 * @pf: board private structure
6451 * Close up the VFs and other things in prep for PF Reset.
6453 static void i40e_prep_for_reset(struct i40e_pf *pf)
6455 struct i40e_hw *hw = &pf->hw;
6456 i40e_status ret = 0;
6459 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6460 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6463 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6465 /* quiesce the VSIs and their queues that are not already DOWN */
6466 i40e_pf_quiesce_all_vsi(pf);
6468 for (v = 0; v < pf->num_alloc_vsi; v++) {
6470 pf->vsi[v]->seid = 0;
6473 i40e_shutdown_adminq(&pf->hw);
6475 /* call shutdown HMC */
6476 if (hw->hmc.hmc_obj) {
6477 ret = i40e_shutdown_lan_hmc(hw);
6479 dev_warn(&pf->pdev->dev,
6480 "shutdown_lan_hmc failed: %d\n", ret);
6485 * i40e_send_version - update firmware with driver version
6488 static void i40e_send_version(struct i40e_pf *pf)
6490 struct i40e_driver_version dv;
6492 dv.major_version = DRV_VERSION_MAJOR;
6493 dv.minor_version = DRV_VERSION_MINOR;
6494 dv.build_version = DRV_VERSION_BUILD;
6495 dv.subbuild_version = 0;
6496 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6497 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6501 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6502 * @pf: board private structure
6503 * @reinit: if the Main VSI needs to re-initialized.
6505 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6507 struct i40e_hw *hw = &pf->hw;
6508 u8 set_fc_aq_fail = 0;
6512 /* Now we wait for GRST to settle out.
6513 * We don't have to delete the VEBs or VSIs from the hw switch
6514 * because the reset will make them disappear.
6516 ret = i40e_pf_reset(hw);
6518 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6519 set_bit(__I40E_RESET_FAILED, &pf->state);
6520 goto clear_recovery;
6524 if (test_bit(__I40E_DOWN, &pf->state))
6525 goto clear_recovery;
6526 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6528 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6529 ret = i40e_init_adminq(&pf->hw);
6531 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6532 i40e_stat_str(&pf->hw, ret),
6533 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6534 goto clear_recovery;
6537 /* re-verify the eeprom if we just had an EMP reset */
6538 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6539 i40e_verify_eeprom(pf);
6541 i40e_clear_pxe_mode(hw);
6542 ret = i40e_get_capabilities(pf);
6544 goto end_core_reset;
6546 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6547 hw->func_caps.num_rx_qp,
6548 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6550 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6551 goto end_core_reset;
6553 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6555 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6556 goto end_core_reset;
6559 #ifdef CONFIG_I40E_DCB
6560 ret = i40e_init_pf_dcb(pf);
6562 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6563 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6564 /* Continue without DCB enabled */
6566 #endif /* CONFIG_I40E_DCB */
6568 i40e_init_pf_fcoe(pf);
6571 /* do basic switch setup */
6572 ret = i40e_setup_pf_switch(pf, reinit);
6574 goto end_core_reset;
6576 /* driver is only interested in link up/down and module qualification
6577 * reports from firmware
6579 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6580 I40E_AQ_EVENT_LINK_UPDOWN |
6581 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6583 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6584 i40e_stat_str(&pf->hw, ret),
6585 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6587 /* make sure our flow control settings are restored */
6588 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6590 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6591 i40e_stat_str(&pf->hw, ret),
6592 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6594 /* Rebuild the VSIs and VEBs that existed before reset.
6595 * They are still in our local switch element arrays, so only
6596 * need to rebuild the switch model in the HW.
6598 * If there were VEBs but the reconstitution failed, we'll try
6599 * try to recover minimal use by getting the basic PF VSI working.
6601 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6602 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6603 /* find the one VEB connected to the MAC, and find orphans */
6604 for (v = 0; v < I40E_MAX_VEB; v++) {
6608 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6609 pf->veb[v]->uplink_seid == 0) {
6610 ret = i40e_reconstitute_veb(pf->veb[v]);
6615 /* If Main VEB failed, we're in deep doodoo,
6616 * so give up rebuilding the switch and set up
6617 * for minimal rebuild of PF VSI.
6618 * If orphan failed, we'll report the error
6619 * but try to keep going.
6621 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6622 dev_info(&pf->pdev->dev,
6623 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6625 pf->vsi[pf->lan_vsi]->uplink_seid
6628 } else if (pf->veb[v]->uplink_seid == 0) {
6629 dev_info(&pf->pdev->dev,
6630 "rebuild of orphan VEB failed: %d\n",
6637 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6638 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6639 /* no VEB, so rebuild only the Main VSI */
6640 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6642 dev_info(&pf->pdev->dev,
6643 "rebuild of Main VSI failed: %d\n", ret);
6644 goto end_core_reset;
6648 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6649 (pf->hw.aq.fw_maj_ver < 4)) {
6651 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6653 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6654 i40e_stat_str(&pf->hw, ret),
6655 i40e_aq_str(&pf->hw,
6656 pf->hw.aq.asq_last_status));
6658 /* reinit the misc interrupt */
6659 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6660 ret = i40e_setup_misc_vector(pf);
6662 /* restart the VSIs that were rebuilt and running before the reset */
6663 i40e_pf_unquiesce_all_vsi(pf);
6665 if (pf->num_alloc_vfs) {
6666 for (v = 0; v < pf->num_alloc_vfs; v++)
6667 i40e_reset_vf(&pf->vf[v], true);
6670 /* tell the firmware that we're starting */
6671 i40e_send_version(pf);
6674 clear_bit(__I40E_RESET_FAILED, &pf->state);
6676 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6680 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6681 * @pf: board private structure
6683 * Close up the VFs and other things in prep for a Core Reset,
6684 * then get ready to rebuild the world.
6686 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6688 i40e_prep_for_reset(pf);
6689 i40e_reset_and_rebuild(pf, false);
6693 * i40e_handle_mdd_event
6694 * @pf: pointer to the PF structure
6696 * Called from the MDD irq handler to identify possibly malicious vfs
6698 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6700 struct i40e_hw *hw = &pf->hw;
6701 bool mdd_detected = false;
6702 bool pf_mdd_detected = false;
6707 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6710 /* find what triggered the MDD event */
6711 reg = rd32(hw, I40E_GL_MDET_TX);
6712 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6713 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6714 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6715 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6716 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6717 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6718 I40E_GL_MDET_TX_EVENT_SHIFT;
6719 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6720 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6721 pf->hw.func_caps.base_queue;
6722 if (netif_msg_tx_err(pf))
6723 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6724 event, queue, pf_num, vf_num);
6725 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6726 mdd_detected = true;
6728 reg = rd32(hw, I40E_GL_MDET_RX);
6729 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6730 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6731 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6732 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6733 I40E_GL_MDET_RX_EVENT_SHIFT;
6734 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6735 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6736 pf->hw.func_caps.base_queue;
6737 if (netif_msg_rx_err(pf))
6738 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6739 event, queue, func);
6740 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6741 mdd_detected = true;
6745 reg = rd32(hw, I40E_PF_MDET_TX);
6746 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6747 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6748 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6749 pf_mdd_detected = true;
6751 reg = rd32(hw, I40E_PF_MDET_RX);
6752 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6753 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6754 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6755 pf_mdd_detected = true;
6757 /* Queue belongs to the PF, initiate a reset */
6758 if (pf_mdd_detected) {
6759 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6760 i40e_service_event_schedule(pf);
6764 /* see if one of the VFs needs its hand slapped */
6765 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6767 reg = rd32(hw, I40E_VP_MDET_TX(i));
6768 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6769 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6770 vf->num_mdd_events++;
6771 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6775 reg = rd32(hw, I40E_VP_MDET_RX(i));
6776 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6777 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6778 vf->num_mdd_events++;
6779 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6783 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6784 dev_info(&pf->pdev->dev,
6785 "Too many MDD events on VF %d, disabled\n", i);
6786 dev_info(&pf->pdev->dev,
6787 "Use PF Control I/F to re-enable the VF\n");
6788 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6792 /* re-enable mdd interrupt cause */
6793 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6794 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6795 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6796 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6800 #ifdef CONFIG_I40E_VXLAN
6802 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6803 * @pf: board private structure
6805 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6807 struct i40e_hw *hw = &pf->hw;
6812 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6815 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6817 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6818 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6819 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6820 port = pf->vxlan_ports[i];
6822 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6823 I40E_AQC_TUNNEL_TYPE_VXLAN,
6826 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6829 dev_info(&pf->pdev->dev,
6830 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6831 port ? "add" : "delete",
6833 i40e_stat_str(&pf->hw, ret),
6834 i40e_aq_str(&pf->hw,
6835 pf->hw.aq.asq_last_status));
6836 pf->vxlan_ports[i] = 0;
6844 * i40e_service_task - Run the driver's async subtasks
6845 * @work: pointer to work_struct containing our data
6847 static void i40e_service_task(struct work_struct *work)
6849 struct i40e_pf *pf = container_of(work,
6852 unsigned long start_time = jiffies;
6854 /* don't bother with service tasks if a reset is in progress */
6855 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6856 i40e_service_event_complete(pf);
6860 i40e_detect_recover_hung(pf);
6861 i40e_reset_subtask(pf);
6862 i40e_handle_mdd_event(pf);
6863 i40e_vc_process_vflr_event(pf);
6864 i40e_watchdog_subtask(pf);
6865 i40e_fdir_reinit_subtask(pf);
6866 i40e_sync_filters_subtask(pf);
6867 #ifdef CONFIG_I40E_VXLAN
6868 i40e_sync_vxlan_filters_subtask(pf);
6870 i40e_clean_adminq_subtask(pf);
6872 i40e_service_event_complete(pf);
6874 /* If the tasks have taken longer than one timer cycle or there
6875 * is more work to be done, reschedule the service task now
6876 * rather than wait for the timer to tick again.
6878 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6879 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6880 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6881 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6882 i40e_service_event_schedule(pf);
6886 * i40e_service_timer - timer callback
6887 * @data: pointer to PF struct
6889 static void i40e_service_timer(unsigned long data)
6891 struct i40e_pf *pf = (struct i40e_pf *)data;
6893 mod_timer(&pf->service_timer,
6894 round_jiffies(jiffies + pf->service_timer_period));
6895 i40e_service_event_schedule(pf);
6899 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6900 * @vsi: the VSI being configured
6902 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6904 struct i40e_pf *pf = vsi->back;
6906 switch (vsi->type) {
6908 vsi->alloc_queue_pairs = pf->num_lan_qps;
6909 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6910 I40E_REQ_DESCRIPTOR_MULTIPLE);
6911 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6912 vsi->num_q_vectors = pf->num_lan_msix;
6914 vsi->num_q_vectors = 1;
6919 vsi->alloc_queue_pairs = 1;
6920 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6921 I40E_REQ_DESCRIPTOR_MULTIPLE);
6922 vsi->num_q_vectors = 1;
6925 case I40E_VSI_VMDQ2:
6926 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6927 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6928 I40E_REQ_DESCRIPTOR_MULTIPLE);
6929 vsi->num_q_vectors = pf->num_vmdq_msix;
6932 case I40E_VSI_SRIOV:
6933 vsi->alloc_queue_pairs = pf->num_vf_qps;
6934 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6935 I40E_REQ_DESCRIPTOR_MULTIPLE);
6940 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6941 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6942 I40E_REQ_DESCRIPTOR_MULTIPLE);
6943 vsi->num_q_vectors = pf->num_fcoe_msix;
6946 #endif /* I40E_FCOE */
6956 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6957 * @type: VSI pointer
6958 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6960 * On error: returns error code (negative)
6961 * On success: returns 0
6963 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6968 /* allocate memory for both Tx and Rx ring pointers */
6969 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6970 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6973 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6975 if (alloc_qvectors) {
6976 /* allocate memory for q_vector pointers */
6977 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6978 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6979 if (!vsi->q_vectors) {
6987 kfree(vsi->tx_rings);
6992 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6993 * @pf: board private structure
6994 * @type: type of VSI
6996 * On error: returns error code (negative)
6997 * On success: returns vsi index in PF (positive)
6999 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7002 struct i40e_vsi *vsi;
7006 /* Need to protect the allocation of the VSIs at the PF level */
7007 mutex_lock(&pf->switch_mutex);
7009 /* VSI list may be fragmented if VSI creation/destruction has
7010 * been happening. We can afford to do a quick scan to look
7011 * for any free VSIs in the list.
7013 * find next empty vsi slot, looping back around if necessary
7016 while (i < pf->num_alloc_vsi && pf->vsi[i])
7018 if (i >= pf->num_alloc_vsi) {
7020 while (i < pf->next_vsi && pf->vsi[i])
7024 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7025 vsi_idx = i; /* Found one! */
7028 goto unlock_pf; /* out of VSI slots! */
7032 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7039 set_bit(__I40E_DOWN, &vsi->state);
7042 vsi->rx_itr_setting = pf->rx_itr_default;
7043 vsi->tx_itr_setting = pf->tx_itr_default;
7044 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7045 pf->rss_table_size : 64;
7046 vsi->netdev_registered = false;
7047 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7048 INIT_LIST_HEAD(&vsi->mac_filter_list);
7049 vsi->irqs_ready = false;
7051 ret = i40e_set_num_rings_in_vsi(vsi);
7055 ret = i40e_vsi_alloc_arrays(vsi, true);
7059 /* Setup default MSIX irq handler for VSI */
7060 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7062 pf->vsi[vsi_idx] = vsi;
7067 pf->next_vsi = i - 1;
7070 mutex_unlock(&pf->switch_mutex);
7075 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7076 * @type: VSI pointer
7077 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7079 * On error: returns error code (negative)
7080 * On success: returns 0
7082 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7084 /* free the ring and vector containers */
7085 if (free_qvectors) {
7086 kfree(vsi->q_vectors);
7087 vsi->q_vectors = NULL;
7089 kfree(vsi->tx_rings);
7090 vsi->tx_rings = NULL;
7091 vsi->rx_rings = NULL;
7095 * i40e_vsi_clear - Deallocate the VSI provided
7096 * @vsi: the VSI being un-configured
7098 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7109 mutex_lock(&pf->switch_mutex);
7110 if (!pf->vsi[vsi->idx]) {
7111 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7112 vsi->idx, vsi->idx, vsi, vsi->type);
7116 if (pf->vsi[vsi->idx] != vsi) {
7117 dev_err(&pf->pdev->dev,
7118 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7119 pf->vsi[vsi->idx]->idx,
7121 pf->vsi[vsi->idx]->type,
7122 vsi->idx, vsi, vsi->type);
7126 /* updates the PF for this cleared vsi */
7127 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7128 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7130 i40e_vsi_free_arrays(vsi, true);
7132 pf->vsi[vsi->idx] = NULL;
7133 if (vsi->idx < pf->next_vsi)
7134 pf->next_vsi = vsi->idx;
7137 mutex_unlock(&pf->switch_mutex);
7145 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7146 * @vsi: the VSI being cleaned
7148 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7152 if (vsi->tx_rings && vsi->tx_rings[0]) {
7153 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7154 kfree_rcu(vsi->tx_rings[i], rcu);
7155 vsi->tx_rings[i] = NULL;
7156 vsi->rx_rings[i] = NULL;
7162 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7163 * @vsi: the VSI being configured
7165 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7167 struct i40e_ring *tx_ring, *rx_ring;
7168 struct i40e_pf *pf = vsi->back;
7171 /* Set basic values in the rings to be used later during open() */
7172 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7173 /* allocate space for both Tx and Rx in one shot */
7174 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7178 tx_ring->queue_index = i;
7179 tx_ring->reg_idx = vsi->base_queue + i;
7180 tx_ring->ring_active = false;
7182 tx_ring->netdev = vsi->netdev;
7183 tx_ring->dev = &pf->pdev->dev;
7184 tx_ring->count = vsi->num_desc;
7186 tx_ring->dcb_tc = 0;
7187 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7188 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7189 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7190 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7191 vsi->tx_rings[i] = tx_ring;
7193 rx_ring = &tx_ring[1];
7194 rx_ring->queue_index = i;
7195 rx_ring->reg_idx = vsi->base_queue + i;
7196 rx_ring->ring_active = false;
7198 rx_ring->netdev = vsi->netdev;
7199 rx_ring->dev = &pf->pdev->dev;
7200 rx_ring->count = vsi->num_desc;
7202 rx_ring->dcb_tc = 0;
7203 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7204 set_ring_16byte_desc_enabled(rx_ring);
7206 clear_ring_16byte_desc_enabled(rx_ring);
7207 vsi->rx_rings[i] = rx_ring;
7213 i40e_vsi_clear_rings(vsi);
7218 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7219 * @pf: board private structure
7220 * @vectors: the number of MSI-X vectors to request
7222 * Returns the number of vectors reserved, or error
7224 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7226 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7227 I40E_MIN_MSIX, vectors);
7229 dev_info(&pf->pdev->dev,
7230 "MSI-X vector reservation failed: %d\n", vectors);
7238 * i40e_init_msix - Setup the MSIX capability
7239 * @pf: board private structure
7241 * Work with the OS to set up the MSIX vectors needed.
7243 * Returns the number of vectors reserved or negative on failure
7245 static int i40e_init_msix(struct i40e_pf *pf)
7247 struct i40e_hw *hw = &pf->hw;
7252 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7255 /* The number of vectors we'll request will be comprised of:
7256 * - Add 1 for "other" cause for Admin Queue events, etc.
7257 * - The number of LAN queue pairs
7258 * - Queues being used for RSS.
7259 * We don't need as many as max_rss_size vectors.
7260 * use rss_size instead in the calculation since that
7261 * is governed by number of cpus in the system.
7262 * - assumes symmetric Tx/Rx pairing
7263 * - The number of VMDq pairs
7265 * - The number of FCOE qps.
7267 * Once we count this up, try the request.
7269 * If we can't get what we want, we'll simplify to nearly nothing
7270 * and try again. If that still fails, we punt.
7272 vectors_left = hw->func_caps.num_msix_vectors;
7275 /* reserve one vector for miscellaneous handler */
7281 /* reserve vectors for the main PF traffic queues */
7282 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7283 vectors_left -= pf->num_lan_msix;
7284 v_budget += pf->num_lan_msix;
7286 /* reserve one vector for sideband flow director */
7287 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7292 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7297 /* can we reserve enough for FCoE? */
7298 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7300 pf->num_fcoe_msix = 0;
7301 else if (vectors_left >= pf->num_fcoe_qps)
7302 pf->num_fcoe_msix = pf->num_fcoe_qps;
7304 pf->num_fcoe_msix = 1;
7305 v_budget += pf->num_fcoe_msix;
7306 vectors_left -= pf->num_fcoe_msix;
7310 /* any vectors left over go for VMDq support */
7311 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7312 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7313 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7315 /* if we're short on vectors for what's desired, we limit
7316 * the queues per vmdq. If this is still more than are
7317 * available, the user will need to change the number of
7318 * queues/vectors used by the PF later with the ethtool
7321 if (vmdq_vecs < vmdq_vecs_wanted)
7322 pf->num_vmdq_qps = 1;
7323 pf->num_vmdq_msix = pf->num_vmdq_qps;
7325 v_budget += vmdq_vecs;
7326 vectors_left -= vmdq_vecs;
7329 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7331 if (!pf->msix_entries)
7334 for (i = 0; i < v_budget; i++)
7335 pf->msix_entries[i].entry = i;
7336 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7338 if (v_actual != v_budget) {
7339 /* If we have limited resources, we will start with no vectors
7340 * for the special features and then allocate vectors to some
7341 * of these features based on the policy and at the end disable
7342 * the features that did not get any vectors.
7345 pf->num_fcoe_qps = 0;
7346 pf->num_fcoe_msix = 0;
7348 pf->num_vmdq_msix = 0;
7351 if (v_actual < I40E_MIN_MSIX) {
7352 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7353 kfree(pf->msix_entries);
7354 pf->msix_entries = NULL;
7357 } else if (v_actual == I40E_MIN_MSIX) {
7358 /* Adjust for minimal MSIX use */
7359 pf->num_vmdq_vsis = 0;
7360 pf->num_vmdq_qps = 0;
7361 pf->num_lan_qps = 1;
7362 pf->num_lan_msix = 1;
7364 } else if (v_actual != v_budget) {
7367 /* reserve the misc vector */
7370 /* Scale vector usage down */
7371 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7372 pf->num_vmdq_vsis = 1;
7373 pf->num_vmdq_qps = 1;
7374 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7376 /* partition out the remaining vectors */
7379 pf->num_lan_msix = 1;
7383 /* give one vector to FCoE */
7384 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7385 pf->num_lan_msix = 1;
7386 pf->num_fcoe_msix = 1;
7389 pf->num_lan_msix = 2;
7394 /* give one vector to FCoE */
7395 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7396 pf->num_fcoe_msix = 1;
7400 /* give the rest to the PF */
7401 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7406 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7407 (pf->num_vmdq_msix == 0)) {
7408 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7409 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7413 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7414 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7415 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7422 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7423 * @vsi: the VSI being configured
7424 * @v_idx: index of the vector in the vsi struct
7426 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7428 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7430 struct i40e_q_vector *q_vector;
7432 /* allocate q_vector */
7433 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7437 q_vector->vsi = vsi;
7438 q_vector->v_idx = v_idx;
7439 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7441 netif_napi_add(vsi->netdev, &q_vector->napi,
7442 i40e_napi_poll, NAPI_POLL_WEIGHT);
7444 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7445 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7447 /* tie q_vector and vsi together */
7448 vsi->q_vectors[v_idx] = q_vector;
7454 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7455 * @vsi: the VSI being configured
7457 * We allocate one q_vector per queue interrupt. If allocation fails we
7460 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7462 struct i40e_pf *pf = vsi->back;
7463 int v_idx, num_q_vectors;
7466 /* if not MSIX, give the one vector only to the LAN VSI */
7467 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7468 num_q_vectors = vsi->num_q_vectors;
7469 else if (vsi == pf->vsi[pf->lan_vsi])
7474 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7475 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7484 i40e_free_q_vector(vsi, v_idx);
7490 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7491 * @pf: board private structure to initialize
7493 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7498 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7499 vectors = i40e_init_msix(pf);
7501 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7503 I40E_FLAG_FCOE_ENABLED |
7505 I40E_FLAG_RSS_ENABLED |
7506 I40E_FLAG_DCB_CAPABLE |
7507 I40E_FLAG_SRIOV_ENABLED |
7508 I40E_FLAG_FD_SB_ENABLED |
7509 I40E_FLAG_FD_ATR_ENABLED |
7510 I40E_FLAG_VMDQ_ENABLED);
7512 /* rework the queue expectations without MSIX */
7513 i40e_determine_queue_usage(pf);
7517 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7518 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7519 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7520 vectors = pci_enable_msi(pf->pdev);
7522 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7524 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7526 vectors = 1; /* one MSI or Legacy vector */
7529 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7530 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7532 /* set up vector assignment tracking */
7533 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7534 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7535 if (!pf->irq_pile) {
7536 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7539 pf->irq_pile->num_entries = vectors;
7540 pf->irq_pile->search_hint = 0;
7542 /* track first vector for misc interrupts, ignore return */
7543 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7549 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7550 * @pf: board private structure
7552 * This sets up the handler for MSIX 0, which is used to manage the
7553 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7554 * when in MSI or Legacy interrupt mode.
7556 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7558 struct i40e_hw *hw = &pf->hw;
7561 /* Only request the irq if this is the first time through, and
7562 * not when we're rebuilding after a Reset
7564 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7565 err = request_irq(pf->msix_entries[0].vector,
7566 i40e_intr, 0, pf->int_name, pf);
7568 dev_info(&pf->pdev->dev,
7569 "request_irq for %s failed: %d\n",
7575 i40e_enable_misc_int_causes(pf);
7577 /* associate no queues to the misc vector */
7578 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7579 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7583 i40e_irq_dynamic_enable_icr0(pf);
7589 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7590 * @vsi: vsi structure
7591 * @seed: RSS hash seed
7593 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7595 struct i40e_aqc_get_set_rss_key_data rss_key;
7596 struct i40e_pf *pf = vsi->back;
7597 struct i40e_hw *hw = &pf->hw;
7598 bool pf_lut = false;
7602 memset(&rss_key, 0, sizeof(rss_key));
7603 memcpy(&rss_key, seed, sizeof(rss_key));
7605 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7609 /* Populate the LUT with max no. of queues in round robin fashion */
7610 for (i = 0; i < vsi->rss_table_size; i++)
7611 rss_lut[i] = i % vsi->rss_size;
7613 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7615 dev_info(&pf->pdev->dev,
7616 "Cannot set RSS key, err %s aq_err %s\n",
7617 i40e_stat_str(&pf->hw, ret),
7618 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7619 goto config_rss_aq_out;
7622 if (vsi->type == I40E_VSI_MAIN)
7625 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7626 vsi->rss_table_size);
7628 dev_info(&pf->pdev->dev,
7629 "Cannot set RSS lut, err %s aq_err %s\n",
7630 i40e_stat_str(&pf->hw, ret),
7631 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7639 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7640 * @vsi: VSI structure
7642 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7644 u8 seed[I40E_HKEY_ARRAY_SIZE];
7645 struct i40e_pf *pf = vsi->back;
7647 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7648 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7650 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7651 return i40e_config_rss_aq(vsi, seed);
7657 * i40e_config_rss_reg - Prepare for RSS if used
7658 * @pf: board private structure
7659 * @seed: RSS hash seed
7661 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7663 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7664 struct i40e_hw *hw = &pf->hw;
7665 u32 *seed_dw = (u32 *)seed;
7666 u32 current_queue = 0;
7670 /* Fill out hash function seed */
7671 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7672 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7674 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7676 for (j = 0; j < 4; j++) {
7677 if (current_queue == vsi->rss_size)
7679 lut |= ((current_queue) << (8 * j));
7682 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7690 * i40e_config_rss - Prepare for RSS if used
7691 * @pf: board private structure
7693 static int i40e_config_rss(struct i40e_pf *pf)
7695 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7696 u8 seed[I40E_HKEY_ARRAY_SIZE];
7697 struct i40e_hw *hw = &pf->hw;
7701 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7703 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7704 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7705 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7706 hena |= i40e_pf_get_default_rss_hena(pf);
7708 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7709 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7711 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7713 /* Determine the RSS table size based on the hardware capabilities */
7714 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7715 reg_val = (pf->rss_table_size == 512) ?
7716 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7717 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7718 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7720 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7721 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7723 return i40e_config_rss_reg(pf, seed);
7727 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7728 * @pf: board private structure
7729 * @queue_count: the requested queue count for rss.
7731 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7732 * count which may be different from the requested queue count.
7734 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7736 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7739 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7742 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7744 if (queue_count != vsi->num_queue_pairs) {
7745 vsi->req_queue_pairs = queue_count;
7746 i40e_prep_for_reset(pf);
7748 pf->rss_size = new_rss_size;
7750 i40e_reset_and_rebuild(pf, true);
7751 i40e_config_rss(pf);
7753 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7754 return pf->rss_size;
7758 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7759 * @pf: board private structure
7761 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7764 bool min_valid, max_valid;
7767 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7768 &min_valid, &max_valid);
7772 pf->npar_min_bw = min_bw;
7774 pf->npar_max_bw = max_bw;
7781 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7782 * @pf: board private structure
7784 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7786 struct i40e_aqc_configure_partition_bw_data bw_data;
7789 /* Set the valid bit for this PF */
7790 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7791 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7792 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7794 /* Set the new bandwidths */
7795 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7801 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7802 * @pf: board private structure
7804 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7806 /* Commit temporary BW setting to permanent NVM image */
7807 enum i40e_admin_queue_err last_aq_status;
7811 if (pf->hw.partition_id != 1) {
7812 dev_info(&pf->pdev->dev,
7813 "Commit BW only works on partition 1! This is partition %d",
7814 pf->hw.partition_id);
7815 ret = I40E_NOT_SUPPORTED;
7819 /* Acquire NVM for read access */
7820 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7821 last_aq_status = pf->hw.aq.asq_last_status;
7823 dev_info(&pf->pdev->dev,
7824 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7825 i40e_stat_str(&pf->hw, ret),
7826 i40e_aq_str(&pf->hw, last_aq_status));
7830 /* Read word 0x10 of NVM - SW compatibility word 1 */
7831 ret = i40e_aq_read_nvm(&pf->hw,
7832 I40E_SR_NVM_CONTROL_WORD,
7833 0x10, sizeof(nvm_word), &nvm_word,
7835 /* Save off last admin queue command status before releasing
7838 last_aq_status = pf->hw.aq.asq_last_status;
7839 i40e_release_nvm(&pf->hw);
7841 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7842 i40e_stat_str(&pf->hw, ret),
7843 i40e_aq_str(&pf->hw, last_aq_status));
7847 /* Wait a bit for NVM release to complete */
7850 /* Acquire NVM for write access */
7851 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7852 last_aq_status = pf->hw.aq.asq_last_status;
7854 dev_info(&pf->pdev->dev,
7855 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7856 i40e_stat_str(&pf->hw, ret),
7857 i40e_aq_str(&pf->hw, last_aq_status));
7860 /* Write it back out unchanged to initiate update NVM,
7861 * which will force a write of the shadow (alt) RAM to
7862 * the NVM - thus storing the bandwidth values permanently.
7864 ret = i40e_aq_update_nvm(&pf->hw,
7865 I40E_SR_NVM_CONTROL_WORD,
7866 0x10, sizeof(nvm_word),
7867 &nvm_word, true, NULL);
7868 /* Save off last admin queue command status before releasing
7871 last_aq_status = pf->hw.aq.asq_last_status;
7872 i40e_release_nvm(&pf->hw);
7874 dev_info(&pf->pdev->dev,
7875 "BW settings NOT SAVED, err %s aq_err %s\n",
7876 i40e_stat_str(&pf->hw, ret),
7877 i40e_aq_str(&pf->hw, last_aq_status));
7884 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7885 * @pf: board private structure to initialize
7887 * i40e_sw_init initializes the Adapter private data structure.
7888 * Fields are initialized based on PCI device information and
7889 * OS network device settings (MTU size).
7891 static int i40e_sw_init(struct i40e_pf *pf)
7896 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7897 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7898 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7899 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7900 if (I40E_DEBUG_USER & debug)
7901 pf->hw.debug_mask = debug;
7902 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7903 I40E_DEFAULT_MSG_ENABLE);
7906 /* Set default capability flags */
7907 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7908 I40E_FLAG_MSI_ENABLED |
7909 I40E_FLAG_LINK_POLLING_ENABLED |
7910 I40E_FLAG_MSIX_ENABLED;
7912 if (iommu_present(&pci_bus_type))
7913 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7915 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7917 /* Set default ITR */
7918 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7919 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7921 /* Depending on PF configurations, it is possible that the RSS
7922 * maximum might end up larger than the available queues
7924 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7926 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7927 pf->rss_size_max = min_t(int, pf->rss_size_max,
7928 pf->hw.func_caps.num_tx_qp);
7929 if (pf->hw.func_caps.rss) {
7930 pf->flags |= I40E_FLAG_RSS_ENABLED;
7931 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7934 /* MFP mode enabled */
7935 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7936 pf->flags |= I40E_FLAG_MFP_ENABLED;
7937 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7938 if (i40e_get_npar_bw_setting(pf))
7939 dev_warn(&pf->pdev->dev,
7940 "Could not get NPAR bw settings\n");
7942 dev_info(&pf->pdev->dev,
7943 "Min BW = %8.8x, Max BW = %8.8x\n",
7944 pf->npar_min_bw, pf->npar_max_bw);
7947 /* FW/NVM is not yet fixed in this regard */
7948 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7949 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7950 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7951 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7952 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
7953 pf->hw.num_partitions > 1)
7954 dev_info(&pf->pdev->dev,
7955 "Flow Director Sideband mode Disabled in MFP mode\n");
7957 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7958 pf->fdir_pf_filter_count =
7959 pf->hw.func_caps.fd_filters_guaranteed;
7960 pf->hw.fdir_shared_filter_count =
7961 pf->hw.func_caps.fd_filters_best_effort;
7964 if (pf->hw.func_caps.vmdq) {
7965 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7966 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7970 i40e_init_pf_fcoe(pf);
7972 #endif /* I40E_FCOE */
7973 #ifdef CONFIG_PCI_IOV
7974 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7975 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7976 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7977 pf->num_req_vfs = min_t(int,
7978 pf->hw.func_caps.num_vfs,
7981 #endif /* CONFIG_PCI_IOV */
7982 if (pf->hw.mac.type == I40E_MAC_X722) {
7983 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7984 I40E_FLAG_128_QP_RSS_CAPABLE |
7985 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7986 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7987 I40E_FLAG_WB_ON_ITR_CAPABLE |
7988 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7990 pf->eeprom_version = 0xDEAD;
7991 pf->lan_veb = I40E_NO_VEB;
7992 pf->lan_vsi = I40E_NO_VSI;
7994 /* By default FW has this off for performance reasons */
7995 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
7997 /* set up queue assignment tracking */
7998 size = sizeof(struct i40e_lump_tracking)
7999 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8000 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8005 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8006 pf->qp_pile->search_hint = 0;
8008 pf->tx_timeout_recovery_level = 1;
8010 mutex_init(&pf->switch_mutex);
8012 /* If NPAR is enabled nudge the Tx scheduler */
8013 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8014 i40e_set_npar_bw_setting(pf);
8021 * i40e_set_ntuple - set the ntuple feature flag and take action
8022 * @pf: board private structure to initialize
8023 * @features: the feature set that the stack is suggesting
8025 * returns a bool to indicate if reset needs to happen
8027 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8029 bool need_reset = false;
8031 /* Check if Flow Director n-tuple support was enabled or disabled. If
8032 * the state changed, we need to reset.
8034 if (features & NETIF_F_NTUPLE) {
8035 /* Enable filters and mark for reset */
8036 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8038 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8040 /* turn off filters, mark for reset and clear SW filter list */
8041 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8043 i40e_fdir_filter_exit(pf);
8045 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8046 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8047 /* reset fd counters */
8048 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8049 pf->fdir_pf_active_filters = 0;
8050 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8051 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8052 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8053 /* if ATR was auto disabled it can be re-enabled. */
8054 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8055 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8056 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8062 * i40e_set_features - set the netdev feature flags
8063 * @netdev: ptr to the netdev being adjusted
8064 * @features: the feature set that the stack is suggesting
8066 static int i40e_set_features(struct net_device *netdev,
8067 netdev_features_t features)
8069 struct i40e_netdev_priv *np = netdev_priv(netdev);
8070 struct i40e_vsi *vsi = np->vsi;
8071 struct i40e_pf *pf = vsi->back;
8074 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8075 i40e_vlan_stripping_enable(vsi);
8077 i40e_vlan_stripping_disable(vsi);
8079 need_reset = i40e_set_ntuple(pf, features);
8082 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8087 #ifdef CONFIG_I40E_VXLAN
8089 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8090 * @pf: board private structure
8091 * @port: The UDP port to look up
8093 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8095 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8099 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8100 if (pf->vxlan_ports[i] == port)
8108 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8109 * @netdev: This physical port's netdev
8110 * @sa_family: Socket Family that VXLAN is notifying us about
8111 * @port: New UDP port number that VXLAN started listening to
8113 static void i40e_add_vxlan_port(struct net_device *netdev,
8114 sa_family_t sa_family, __be16 port)
8116 struct i40e_netdev_priv *np = netdev_priv(netdev);
8117 struct i40e_vsi *vsi = np->vsi;
8118 struct i40e_pf *pf = vsi->back;
8122 if (sa_family == AF_INET6)
8125 idx = i40e_get_vxlan_port_idx(pf, port);
8127 /* Check if port already exists */
8128 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8129 netdev_info(netdev, "vxlan port %d already offloaded\n",
8134 /* Now check if there is space to add the new port */
8135 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8137 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8138 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8143 /* New port: add it and mark its index in the bitmap */
8144 pf->vxlan_ports[next_idx] = port;
8145 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8146 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8150 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8151 * @netdev: This physical port's netdev
8152 * @sa_family: Socket Family that VXLAN is notifying us about
8153 * @port: UDP port number that VXLAN stopped listening to
8155 static void i40e_del_vxlan_port(struct net_device *netdev,
8156 sa_family_t sa_family, __be16 port)
8158 struct i40e_netdev_priv *np = netdev_priv(netdev);
8159 struct i40e_vsi *vsi = np->vsi;
8160 struct i40e_pf *pf = vsi->back;
8163 if (sa_family == AF_INET6)
8166 idx = i40e_get_vxlan_port_idx(pf, port);
8168 /* Check if port already exists */
8169 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8170 /* if port exists, set it to 0 (mark for deletion)
8171 * and make it pending
8173 pf->vxlan_ports[idx] = 0;
8174 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8175 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8177 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8183 static int i40e_get_phys_port_id(struct net_device *netdev,
8184 struct netdev_phys_item_id *ppid)
8186 struct i40e_netdev_priv *np = netdev_priv(netdev);
8187 struct i40e_pf *pf = np->vsi->back;
8188 struct i40e_hw *hw = &pf->hw;
8190 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8193 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8194 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8200 * i40e_ndo_fdb_add - add an entry to the hardware database
8201 * @ndm: the input from the stack
8202 * @tb: pointer to array of nladdr (unused)
8203 * @dev: the net device pointer
8204 * @addr: the MAC address entry being added
8205 * @flags: instructions from stack about fdb operation
8207 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8208 struct net_device *dev,
8209 const unsigned char *addr, u16 vid,
8212 struct i40e_netdev_priv *np = netdev_priv(dev);
8213 struct i40e_pf *pf = np->vsi->back;
8216 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8220 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8224 /* Hardware does not support aging addresses so if a
8225 * ndm_state is given only allow permanent addresses
8227 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8228 netdev_info(dev, "FDB only supports static addresses\n");
8232 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8233 err = dev_uc_add_excl(dev, addr);
8234 else if (is_multicast_ether_addr(addr))
8235 err = dev_mc_add_excl(dev, addr);
8239 /* Only return duplicate errors if NLM_F_EXCL is set */
8240 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8247 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8248 * @dev: the netdev being configured
8249 * @nlh: RTNL message
8251 * Inserts a new hardware bridge if not already created and
8252 * enables the bridging mode requested (VEB or VEPA). If the
8253 * hardware bridge has already been inserted and the request
8254 * is to change the mode then that requires a PF reset to
8255 * allow rebuild of the components with required hardware
8256 * bridge mode enabled.
8258 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8259 struct nlmsghdr *nlh,
8262 struct i40e_netdev_priv *np = netdev_priv(dev);
8263 struct i40e_vsi *vsi = np->vsi;
8264 struct i40e_pf *pf = vsi->back;
8265 struct i40e_veb *veb = NULL;
8266 struct nlattr *attr, *br_spec;
8269 /* Only for PF VSI for now */
8270 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8273 /* Find the HW bridge for PF VSI */
8274 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8275 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8279 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8281 nla_for_each_nested(attr, br_spec, rem) {
8284 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8287 mode = nla_get_u16(attr);
8288 if ((mode != BRIDGE_MODE_VEPA) &&
8289 (mode != BRIDGE_MODE_VEB))
8292 /* Insert a new HW bridge */
8294 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8295 vsi->tc_config.enabled_tc);
8297 veb->bridge_mode = mode;
8298 i40e_config_bridge_mode(veb);
8300 /* No Bridge HW offload available */
8304 } else if (mode != veb->bridge_mode) {
8305 /* Existing HW bridge but different mode needs reset */
8306 veb->bridge_mode = mode;
8307 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8308 if (mode == BRIDGE_MODE_VEB)
8309 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8311 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8312 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8321 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8324 * @seq: RTNL message seq #
8325 * @dev: the netdev being configured
8326 * @filter_mask: unused
8327 * @nlflags: netlink flags passed in
8329 * Return the mode in which the hardware bridge is operating in
8332 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8333 struct net_device *dev,
8334 u32 __always_unused filter_mask,
8337 struct i40e_netdev_priv *np = netdev_priv(dev);
8338 struct i40e_vsi *vsi = np->vsi;
8339 struct i40e_pf *pf = vsi->back;
8340 struct i40e_veb *veb = NULL;
8343 /* Only for PF VSI for now */
8344 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8347 /* Find the HW bridge for the PF VSI */
8348 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8349 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8356 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8357 nlflags, 0, 0, filter_mask, NULL);
8360 #define I40E_MAX_TUNNEL_HDR_LEN 80
8362 * i40e_features_check - Validate encapsulated packet conforms to limits
8364 * @netdev: This physical port's netdev
8365 * @features: Offload features that the stack believes apply
8367 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8368 struct net_device *dev,
8369 netdev_features_t features)
8371 if (skb->encapsulation &&
8372 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8373 I40E_MAX_TUNNEL_HDR_LEN))
8374 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8379 static const struct net_device_ops i40e_netdev_ops = {
8380 .ndo_open = i40e_open,
8381 .ndo_stop = i40e_close,
8382 .ndo_start_xmit = i40e_lan_xmit_frame,
8383 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8384 .ndo_set_rx_mode = i40e_set_rx_mode,
8385 .ndo_validate_addr = eth_validate_addr,
8386 .ndo_set_mac_address = i40e_set_mac,
8387 .ndo_change_mtu = i40e_change_mtu,
8388 .ndo_do_ioctl = i40e_ioctl,
8389 .ndo_tx_timeout = i40e_tx_timeout,
8390 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8391 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8392 #ifdef CONFIG_NET_POLL_CONTROLLER
8393 .ndo_poll_controller = i40e_netpoll,
8395 .ndo_setup_tc = i40e_setup_tc,
8397 .ndo_fcoe_enable = i40e_fcoe_enable,
8398 .ndo_fcoe_disable = i40e_fcoe_disable,
8400 .ndo_set_features = i40e_set_features,
8401 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8402 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8403 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8404 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8405 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8406 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8407 #ifdef CONFIG_I40E_VXLAN
8408 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8409 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8411 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8412 .ndo_fdb_add = i40e_ndo_fdb_add,
8413 .ndo_features_check = i40e_features_check,
8414 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8415 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8419 * i40e_config_netdev - Setup the netdev flags
8420 * @vsi: the VSI being configured
8422 * Returns 0 on success, negative value on failure
8424 static int i40e_config_netdev(struct i40e_vsi *vsi)
8426 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8427 struct i40e_pf *pf = vsi->back;
8428 struct i40e_hw *hw = &pf->hw;
8429 struct i40e_netdev_priv *np;
8430 struct net_device *netdev;
8431 u8 mac_addr[ETH_ALEN];
8434 etherdev_size = sizeof(struct i40e_netdev_priv);
8435 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8439 vsi->netdev = netdev;
8440 np = netdev_priv(netdev);
8443 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8444 NETIF_F_GSO_UDP_TUNNEL |
8447 netdev->features = NETIF_F_SG |
8451 NETIF_F_GSO_UDP_TUNNEL |
8452 NETIF_F_HW_VLAN_CTAG_TX |
8453 NETIF_F_HW_VLAN_CTAG_RX |
8454 NETIF_F_HW_VLAN_CTAG_FILTER |
8463 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8464 netdev->features |= NETIF_F_NTUPLE;
8466 /* copy netdev features into list of user selectable features */
8467 netdev->hw_features |= netdev->features;
8469 if (vsi->type == I40E_VSI_MAIN) {
8470 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8471 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8472 /* The following steps are necessary to prevent reception
8473 * of tagged packets - some older NVM configurations load a
8474 * default a MAC-VLAN filter that accepts any tagged packet
8475 * which must be replaced by a normal filter.
8477 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8478 i40e_add_filter(vsi, mac_addr,
8479 I40E_VLAN_ANY, false, true);
8481 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8482 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8483 pf->vsi[pf->lan_vsi]->netdev->name);
8484 random_ether_addr(mac_addr);
8485 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8487 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8489 ether_addr_copy(netdev->dev_addr, mac_addr);
8490 ether_addr_copy(netdev->perm_addr, mac_addr);
8491 /* vlan gets same features (except vlan offload)
8492 * after any tweaks for specific VSI types
8494 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8495 NETIF_F_HW_VLAN_CTAG_RX |
8496 NETIF_F_HW_VLAN_CTAG_FILTER);
8497 netdev->priv_flags |= IFF_UNICAST_FLT;
8498 netdev->priv_flags |= IFF_SUPP_NOFCS;
8499 /* Setup netdev TC information */
8500 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8502 netdev->netdev_ops = &i40e_netdev_ops;
8503 netdev->watchdog_timeo = 5 * HZ;
8504 i40e_set_ethtool_ops(netdev);
8506 i40e_fcoe_config_netdev(netdev, vsi);
8513 * i40e_vsi_delete - Delete a VSI from the switch
8514 * @vsi: the VSI being removed
8516 * Returns 0 on success, negative value on failure
8518 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8520 /* remove default VSI is not allowed */
8521 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8524 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8528 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8529 * @vsi: the VSI being queried
8531 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8533 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8535 struct i40e_veb *veb;
8536 struct i40e_pf *pf = vsi->back;
8538 /* Uplink is not a bridge so default to VEB */
8539 if (vsi->veb_idx == I40E_NO_VEB)
8542 veb = pf->veb[vsi->veb_idx];
8543 /* Uplink is a bridge in VEPA mode */
8544 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8547 /* Uplink is a bridge in VEB mode */
8552 * i40e_add_vsi - Add a VSI to the switch
8553 * @vsi: the VSI being configured
8555 * This initializes a VSI context depending on the VSI type to be added and
8556 * passes it down to the add_vsi aq command.
8558 static int i40e_add_vsi(struct i40e_vsi *vsi)
8561 struct i40e_mac_filter *f, *ftmp;
8562 struct i40e_pf *pf = vsi->back;
8563 struct i40e_hw *hw = &pf->hw;
8564 struct i40e_vsi_context ctxt;
8565 u8 enabled_tc = 0x1; /* TC0 enabled */
8568 memset(&ctxt, 0, sizeof(ctxt));
8569 switch (vsi->type) {
8571 /* The PF's main VSI is already setup as part of the
8572 * device initialization, so we'll not bother with
8573 * the add_vsi call, but we will retrieve the current
8576 ctxt.seid = pf->main_vsi_seid;
8577 ctxt.pf_num = pf->hw.pf_id;
8579 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8580 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8582 dev_info(&pf->pdev->dev,
8583 "couldn't get PF vsi config, err %s aq_err %s\n",
8584 i40e_stat_str(&pf->hw, ret),
8585 i40e_aq_str(&pf->hw,
8586 pf->hw.aq.asq_last_status));
8589 vsi->info = ctxt.info;
8590 vsi->info.valid_sections = 0;
8592 vsi->seid = ctxt.seid;
8593 vsi->id = ctxt.vsi_number;
8595 enabled_tc = i40e_pf_get_tc_map(pf);
8597 /* MFP mode setup queue map and update VSI */
8598 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8599 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8600 memset(&ctxt, 0, sizeof(ctxt));
8601 ctxt.seid = pf->main_vsi_seid;
8602 ctxt.pf_num = pf->hw.pf_id;
8604 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8605 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8607 dev_info(&pf->pdev->dev,
8608 "update vsi failed, err %s aq_err %s\n",
8609 i40e_stat_str(&pf->hw, ret),
8610 i40e_aq_str(&pf->hw,
8611 pf->hw.aq.asq_last_status));
8615 /* update the local VSI info queue map */
8616 i40e_vsi_update_queue_map(vsi, &ctxt);
8617 vsi->info.valid_sections = 0;
8619 /* Default/Main VSI is only enabled for TC0
8620 * reconfigure it to enable all TCs that are
8621 * available on the port in SFP mode.
8622 * For MFP case the iSCSI PF would use this
8623 * flow to enable LAN+iSCSI TC.
8625 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8627 dev_info(&pf->pdev->dev,
8628 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8630 i40e_stat_str(&pf->hw, ret),
8631 i40e_aq_str(&pf->hw,
8632 pf->hw.aq.asq_last_status));
8639 ctxt.pf_num = hw->pf_id;
8641 ctxt.uplink_seid = vsi->uplink_seid;
8642 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8643 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8644 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8645 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8646 ctxt.info.valid_sections |=
8647 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8648 ctxt.info.switch_id =
8649 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8651 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8654 case I40E_VSI_VMDQ2:
8655 ctxt.pf_num = hw->pf_id;
8657 ctxt.uplink_seid = vsi->uplink_seid;
8658 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8659 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8661 /* This VSI is connected to VEB so the switch_id
8662 * should be set to zero by default.
8664 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8665 ctxt.info.valid_sections |=
8666 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8667 ctxt.info.switch_id =
8668 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8671 /* Setup the VSI tx/rx queue map for TC0 only for now */
8672 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8675 case I40E_VSI_SRIOV:
8676 ctxt.pf_num = hw->pf_id;
8677 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8678 ctxt.uplink_seid = vsi->uplink_seid;
8679 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8680 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8682 /* This VSI is connected to VEB so the switch_id
8683 * should be set to zero by default.
8685 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8686 ctxt.info.valid_sections |=
8687 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8688 ctxt.info.switch_id =
8689 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8692 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8693 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8694 if (pf->vf[vsi->vf_id].spoofchk) {
8695 ctxt.info.valid_sections |=
8696 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8697 ctxt.info.sec_flags |=
8698 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8699 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8701 /* Setup the VSI tx/rx queue map for TC0 only for now */
8702 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8707 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8709 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8714 #endif /* I40E_FCOE */
8719 if (vsi->type != I40E_VSI_MAIN) {
8720 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8722 dev_info(&vsi->back->pdev->dev,
8723 "add vsi failed, err %s aq_err %s\n",
8724 i40e_stat_str(&pf->hw, ret),
8725 i40e_aq_str(&pf->hw,
8726 pf->hw.aq.asq_last_status));
8730 vsi->info = ctxt.info;
8731 vsi->info.valid_sections = 0;
8732 vsi->seid = ctxt.seid;
8733 vsi->id = ctxt.vsi_number;
8736 /* If macvlan filters already exist, force them to get loaded */
8737 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8741 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8742 struct i40e_aqc_remove_macvlan_element_data element;
8744 memset(&element, 0, sizeof(element));
8745 ether_addr_copy(element.mac_addr, f->macaddr);
8746 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8747 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8750 /* some older FW has a different default */
8752 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8753 i40e_aq_remove_macvlan(hw, vsi->seid,
8757 i40e_aq_mac_address_write(hw,
8758 I40E_AQC_WRITE_TYPE_LAA_WOL,
8763 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8764 pf->flags |= I40E_FLAG_FILTER_SYNC;
8767 /* Update VSI BW information */
8768 ret = i40e_vsi_get_bw_info(vsi);
8770 dev_info(&pf->pdev->dev,
8771 "couldn't get vsi bw info, err %s aq_err %s\n",
8772 i40e_stat_str(&pf->hw, ret),
8773 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8774 /* VSI is already added so not tearing that up */
8783 * i40e_vsi_release - Delete a VSI and free its resources
8784 * @vsi: the VSI being removed
8786 * Returns 0 on success or < 0 on error
8788 int i40e_vsi_release(struct i40e_vsi *vsi)
8790 struct i40e_mac_filter *f, *ftmp;
8791 struct i40e_veb *veb = NULL;
8798 /* release of a VEB-owner or last VSI is not allowed */
8799 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8800 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8801 vsi->seid, vsi->uplink_seid);
8804 if (vsi == pf->vsi[pf->lan_vsi] &&
8805 !test_bit(__I40E_DOWN, &pf->state)) {
8806 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8810 uplink_seid = vsi->uplink_seid;
8811 if (vsi->type != I40E_VSI_SRIOV) {
8812 if (vsi->netdev_registered) {
8813 vsi->netdev_registered = false;
8815 /* results in a call to i40e_close() */
8816 unregister_netdev(vsi->netdev);
8819 i40e_vsi_close(vsi);
8821 i40e_vsi_disable_irq(vsi);
8824 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8825 i40e_del_filter(vsi, f->macaddr, f->vlan,
8826 f->is_vf, f->is_netdev);
8827 i40e_sync_vsi_filters(vsi, false);
8829 i40e_vsi_delete(vsi);
8830 i40e_vsi_free_q_vectors(vsi);
8832 free_netdev(vsi->netdev);
8835 i40e_vsi_clear_rings(vsi);
8836 i40e_vsi_clear(vsi);
8838 /* If this was the last thing on the VEB, except for the
8839 * controlling VSI, remove the VEB, which puts the controlling
8840 * VSI onto the next level down in the switch.
8842 * Well, okay, there's one more exception here: don't remove
8843 * the orphan VEBs yet. We'll wait for an explicit remove request
8844 * from up the network stack.
8846 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8848 pf->vsi[i]->uplink_seid == uplink_seid &&
8849 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8850 n++; /* count the VSIs */
8853 for (i = 0; i < I40E_MAX_VEB; i++) {
8856 if (pf->veb[i]->uplink_seid == uplink_seid)
8857 n++; /* count the VEBs */
8858 if (pf->veb[i]->seid == uplink_seid)
8861 if (n == 0 && veb && veb->uplink_seid != 0)
8862 i40e_veb_release(veb);
8868 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8869 * @vsi: ptr to the VSI
8871 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8872 * corresponding SW VSI structure and initializes num_queue_pairs for the
8873 * newly allocated VSI.
8875 * Returns 0 on success or negative on failure
8877 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8880 struct i40e_pf *pf = vsi->back;
8882 if (vsi->q_vectors[0]) {
8883 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8888 if (vsi->base_vector) {
8889 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8890 vsi->seid, vsi->base_vector);
8894 ret = i40e_vsi_alloc_q_vectors(vsi);
8896 dev_info(&pf->pdev->dev,
8897 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8898 vsi->num_q_vectors, vsi->seid, ret);
8899 vsi->num_q_vectors = 0;
8900 goto vector_setup_out;
8903 /* In Legacy mode, we do not have to get any other vector since we
8904 * piggyback on the misc/ICR0 for queue interrupts.
8906 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8908 if (vsi->num_q_vectors)
8909 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8910 vsi->num_q_vectors, vsi->idx);
8911 if (vsi->base_vector < 0) {
8912 dev_info(&pf->pdev->dev,
8913 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8914 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8915 i40e_vsi_free_q_vectors(vsi);
8917 goto vector_setup_out;
8925 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8926 * @vsi: pointer to the vsi.
8928 * This re-allocates a vsi's queue resources.
8930 * Returns pointer to the successfully allocated and configured VSI sw struct
8931 * on success, otherwise returns NULL on failure.
8933 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8935 struct i40e_pf *pf = vsi->back;
8939 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8940 i40e_vsi_clear_rings(vsi);
8942 i40e_vsi_free_arrays(vsi, false);
8943 i40e_set_num_rings_in_vsi(vsi);
8944 ret = i40e_vsi_alloc_arrays(vsi, false);
8948 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8950 dev_info(&pf->pdev->dev,
8951 "failed to get tracking for %d queues for VSI %d err %d\n",
8952 vsi->alloc_queue_pairs, vsi->seid, ret);
8955 vsi->base_queue = ret;
8957 /* Update the FW view of the VSI. Force a reset of TC and queue
8958 * layout configurations.
8960 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8961 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8962 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8963 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8965 /* assign it some queues */
8966 ret = i40e_alloc_rings(vsi);
8970 /* map all of the rings to the q_vectors */
8971 i40e_vsi_map_rings_to_vectors(vsi);
8975 i40e_vsi_free_q_vectors(vsi);
8976 if (vsi->netdev_registered) {
8977 vsi->netdev_registered = false;
8978 unregister_netdev(vsi->netdev);
8979 free_netdev(vsi->netdev);
8982 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8984 i40e_vsi_clear(vsi);
8989 * i40e_vsi_setup - Set up a VSI by a given type
8990 * @pf: board private structure
8992 * @uplink_seid: the switch element to link to
8993 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8995 * This allocates the sw VSI structure and its queue resources, then add a VSI
8996 * to the identified VEB.
8998 * Returns pointer to the successfully allocated and configure VSI sw struct on
8999 * success, otherwise returns NULL on failure.
9001 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9002 u16 uplink_seid, u32 param1)
9004 struct i40e_vsi *vsi = NULL;
9005 struct i40e_veb *veb = NULL;
9009 /* The requested uplink_seid must be either
9010 * - the PF's port seid
9011 * no VEB is needed because this is the PF
9012 * or this is a Flow Director special case VSI
9013 * - seid of an existing VEB
9014 * - seid of a VSI that owns an existing VEB
9015 * - seid of a VSI that doesn't own a VEB
9016 * a new VEB is created and the VSI becomes the owner
9017 * - seid of the PF VSI, which is what creates the first VEB
9018 * this is a special case of the previous
9020 * Find which uplink_seid we were given and create a new VEB if needed
9022 for (i = 0; i < I40E_MAX_VEB; i++) {
9023 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9029 if (!veb && uplink_seid != pf->mac_seid) {
9031 for (i = 0; i < pf->num_alloc_vsi; i++) {
9032 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9038 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9043 if (vsi->uplink_seid == pf->mac_seid)
9044 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9045 vsi->tc_config.enabled_tc);
9046 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9047 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9048 vsi->tc_config.enabled_tc);
9050 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9051 dev_info(&vsi->back->pdev->dev,
9052 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9055 /* We come up by default in VEPA mode if SRIOV is not
9056 * already enabled, in which case we can't force VEPA
9059 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9060 veb->bridge_mode = BRIDGE_MODE_VEPA;
9061 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9063 i40e_config_bridge_mode(veb);
9065 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9066 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9070 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9074 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9075 uplink_seid = veb->seid;
9078 /* get vsi sw struct */
9079 v_idx = i40e_vsi_mem_alloc(pf, type);
9082 vsi = pf->vsi[v_idx];
9086 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9088 if (type == I40E_VSI_MAIN)
9089 pf->lan_vsi = v_idx;
9090 else if (type == I40E_VSI_SRIOV)
9091 vsi->vf_id = param1;
9092 /* assign it some queues */
9093 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9096 dev_info(&pf->pdev->dev,
9097 "failed to get tracking for %d queues for VSI %d err=%d\n",
9098 vsi->alloc_queue_pairs, vsi->seid, ret);
9101 vsi->base_queue = ret;
9103 /* get a VSI from the hardware */
9104 vsi->uplink_seid = uplink_seid;
9105 ret = i40e_add_vsi(vsi);
9109 switch (vsi->type) {
9110 /* setup the netdev if needed */
9112 case I40E_VSI_VMDQ2:
9114 ret = i40e_config_netdev(vsi);
9117 ret = register_netdev(vsi->netdev);
9120 vsi->netdev_registered = true;
9121 netif_carrier_off(vsi->netdev);
9122 #ifdef CONFIG_I40E_DCB
9123 /* Setup DCB netlink interface */
9124 i40e_dcbnl_setup(vsi);
9125 #endif /* CONFIG_I40E_DCB */
9129 /* set up vectors and rings if needed */
9130 ret = i40e_vsi_setup_vectors(vsi);
9134 ret = i40e_alloc_rings(vsi);
9138 /* map all of the rings to the q_vectors */
9139 i40e_vsi_map_rings_to_vectors(vsi);
9141 i40e_vsi_reset_stats(vsi);
9145 /* no netdev or rings for the other VSI types */
9149 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9150 (vsi->type == I40E_VSI_VMDQ2)) {
9151 ret = i40e_vsi_config_rss(vsi);
9156 i40e_vsi_free_q_vectors(vsi);
9158 if (vsi->netdev_registered) {
9159 vsi->netdev_registered = false;
9160 unregister_netdev(vsi->netdev);
9161 free_netdev(vsi->netdev);
9165 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9167 i40e_vsi_clear(vsi);
9173 * i40e_veb_get_bw_info - Query VEB BW information
9174 * @veb: the veb to query
9176 * Query the Tx scheduler BW configuration data for given VEB
9178 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9180 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9181 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9182 struct i40e_pf *pf = veb->pf;
9183 struct i40e_hw *hw = &pf->hw;
9188 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9191 dev_info(&pf->pdev->dev,
9192 "query veb bw config failed, err %s aq_err %s\n",
9193 i40e_stat_str(&pf->hw, ret),
9194 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9198 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9201 dev_info(&pf->pdev->dev,
9202 "query veb bw ets config failed, err %s aq_err %s\n",
9203 i40e_stat_str(&pf->hw, ret),
9204 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9208 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9209 veb->bw_max_quanta = ets_data.tc_bw_max;
9210 veb->is_abs_credits = bw_data.absolute_credits_enable;
9211 veb->enabled_tc = ets_data.tc_valid_bits;
9212 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9213 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9214 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9215 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9216 veb->bw_tc_limit_credits[i] =
9217 le16_to_cpu(bw_data.tc_bw_limits[i]);
9218 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9226 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9227 * @pf: board private structure
9229 * On error: returns error code (negative)
9230 * On success: returns vsi index in PF (positive)
9232 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9235 struct i40e_veb *veb;
9238 /* Need to protect the allocation of switch elements at the PF level */
9239 mutex_lock(&pf->switch_mutex);
9241 /* VEB list may be fragmented if VEB creation/destruction has
9242 * been happening. We can afford to do a quick scan to look
9243 * for any free slots in the list.
9245 * find next empty veb slot, looping back around if necessary
9248 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9250 if (i >= I40E_MAX_VEB) {
9252 goto err_alloc_veb; /* out of VEB slots! */
9255 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9262 veb->enabled_tc = 1;
9267 mutex_unlock(&pf->switch_mutex);
9272 * i40e_switch_branch_release - Delete a branch of the switch tree
9273 * @branch: where to start deleting
9275 * This uses recursion to find the tips of the branch to be
9276 * removed, deleting until we get back to and can delete this VEB.
9278 static void i40e_switch_branch_release(struct i40e_veb *branch)
9280 struct i40e_pf *pf = branch->pf;
9281 u16 branch_seid = branch->seid;
9282 u16 veb_idx = branch->idx;
9285 /* release any VEBs on this VEB - RECURSION */
9286 for (i = 0; i < I40E_MAX_VEB; i++) {
9289 if (pf->veb[i]->uplink_seid == branch->seid)
9290 i40e_switch_branch_release(pf->veb[i]);
9293 /* Release the VSIs on this VEB, but not the owner VSI.
9295 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9296 * the VEB itself, so don't use (*branch) after this loop.
9298 for (i = 0; i < pf->num_alloc_vsi; i++) {
9301 if (pf->vsi[i]->uplink_seid == branch_seid &&
9302 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9303 i40e_vsi_release(pf->vsi[i]);
9307 /* There's one corner case where the VEB might not have been
9308 * removed, so double check it here and remove it if needed.
9309 * This case happens if the veb was created from the debugfs
9310 * commands and no VSIs were added to it.
9312 if (pf->veb[veb_idx])
9313 i40e_veb_release(pf->veb[veb_idx]);
9317 * i40e_veb_clear - remove veb struct
9318 * @veb: the veb to remove
9320 static void i40e_veb_clear(struct i40e_veb *veb)
9326 struct i40e_pf *pf = veb->pf;
9328 mutex_lock(&pf->switch_mutex);
9329 if (pf->veb[veb->idx] == veb)
9330 pf->veb[veb->idx] = NULL;
9331 mutex_unlock(&pf->switch_mutex);
9338 * i40e_veb_release - Delete a VEB and free its resources
9339 * @veb: the VEB being removed
9341 void i40e_veb_release(struct i40e_veb *veb)
9343 struct i40e_vsi *vsi = NULL;
9349 /* find the remaining VSI and check for extras */
9350 for (i = 0; i < pf->num_alloc_vsi; i++) {
9351 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9357 dev_info(&pf->pdev->dev,
9358 "can't remove VEB %d with %d VSIs left\n",
9363 /* move the remaining VSI to uplink veb */
9364 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9365 if (veb->uplink_seid) {
9366 vsi->uplink_seid = veb->uplink_seid;
9367 if (veb->uplink_seid == pf->mac_seid)
9368 vsi->veb_idx = I40E_NO_VEB;
9370 vsi->veb_idx = veb->veb_idx;
9373 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9374 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9377 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9378 i40e_veb_clear(veb);
9382 * i40e_add_veb - create the VEB in the switch
9383 * @veb: the VEB to be instantiated
9384 * @vsi: the controlling VSI
9386 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9388 struct i40e_pf *pf = veb->pf;
9389 bool is_default = veb->pf->cur_promisc;
9390 bool is_cloud = false;
9393 /* get a VEB from the hardware */
9394 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9395 veb->enabled_tc, is_default,
9396 is_cloud, &veb->seid, NULL);
9398 dev_info(&pf->pdev->dev,
9399 "couldn't add VEB, err %s aq_err %s\n",
9400 i40e_stat_str(&pf->hw, ret),
9401 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9405 /* get statistics counter */
9406 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9407 &veb->stats_idx, NULL, NULL, NULL);
9409 dev_info(&pf->pdev->dev,
9410 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9411 i40e_stat_str(&pf->hw, ret),
9412 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9415 ret = i40e_veb_get_bw_info(veb);
9417 dev_info(&pf->pdev->dev,
9418 "couldn't get VEB bw info, err %s aq_err %s\n",
9419 i40e_stat_str(&pf->hw, ret),
9420 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9421 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9425 vsi->uplink_seid = veb->seid;
9426 vsi->veb_idx = veb->idx;
9427 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9433 * i40e_veb_setup - Set up a VEB
9434 * @pf: board private structure
9435 * @flags: VEB setup flags
9436 * @uplink_seid: the switch element to link to
9437 * @vsi_seid: the initial VSI seid
9438 * @enabled_tc: Enabled TC bit-map
9440 * This allocates the sw VEB structure and links it into the switch
9441 * It is possible and legal for this to be a duplicate of an already
9442 * existing VEB. It is also possible for both uplink and vsi seids
9443 * to be zero, in order to create a floating VEB.
9445 * Returns pointer to the successfully allocated VEB sw struct on
9446 * success, otherwise returns NULL on failure.
9448 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9449 u16 uplink_seid, u16 vsi_seid,
9452 struct i40e_veb *veb, *uplink_veb = NULL;
9453 int vsi_idx, veb_idx;
9456 /* if one seid is 0, the other must be 0 to create a floating relay */
9457 if ((uplink_seid == 0 || vsi_seid == 0) &&
9458 (uplink_seid + vsi_seid != 0)) {
9459 dev_info(&pf->pdev->dev,
9460 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9461 uplink_seid, vsi_seid);
9465 /* make sure there is such a vsi and uplink */
9466 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9467 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9469 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9470 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9475 if (uplink_seid && uplink_seid != pf->mac_seid) {
9476 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9477 if (pf->veb[veb_idx] &&
9478 pf->veb[veb_idx]->seid == uplink_seid) {
9479 uplink_veb = pf->veb[veb_idx];
9484 dev_info(&pf->pdev->dev,
9485 "uplink seid %d not found\n", uplink_seid);
9490 /* get veb sw struct */
9491 veb_idx = i40e_veb_mem_alloc(pf);
9494 veb = pf->veb[veb_idx];
9496 veb->uplink_seid = uplink_seid;
9497 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9498 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9500 /* create the VEB in the switch */
9501 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9504 if (vsi_idx == pf->lan_vsi)
9505 pf->lan_veb = veb->idx;
9510 i40e_veb_clear(veb);
9516 * i40e_setup_pf_switch_element - set PF vars based on switch type
9517 * @pf: board private structure
9518 * @ele: element we are building info from
9519 * @num_reported: total number of elements
9520 * @printconfig: should we print the contents
9522 * helper function to assist in extracting a few useful SEID values.
9524 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9525 struct i40e_aqc_switch_config_element_resp *ele,
9526 u16 num_reported, bool printconfig)
9528 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9529 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9530 u8 element_type = ele->element_type;
9531 u16 seid = le16_to_cpu(ele->seid);
9534 dev_info(&pf->pdev->dev,
9535 "type=%d seid=%d uplink=%d downlink=%d\n",
9536 element_type, seid, uplink_seid, downlink_seid);
9538 switch (element_type) {
9539 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9540 pf->mac_seid = seid;
9542 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9544 if (uplink_seid != pf->mac_seid)
9546 if (pf->lan_veb == I40E_NO_VEB) {
9549 /* find existing or else empty VEB */
9550 for (v = 0; v < I40E_MAX_VEB; v++) {
9551 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9556 if (pf->lan_veb == I40E_NO_VEB) {
9557 v = i40e_veb_mem_alloc(pf);
9564 pf->veb[pf->lan_veb]->seid = seid;
9565 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9566 pf->veb[pf->lan_veb]->pf = pf;
9567 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9569 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9570 if (num_reported != 1)
9572 /* This is immediately after a reset so we can assume this is
9575 pf->mac_seid = uplink_seid;
9576 pf->pf_seid = downlink_seid;
9577 pf->main_vsi_seid = seid;
9579 dev_info(&pf->pdev->dev,
9580 "pf_seid=%d main_vsi_seid=%d\n",
9581 pf->pf_seid, pf->main_vsi_seid);
9583 case I40E_SWITCH_ELEMENT_TYPE_PF:
9584 case I40E_SWITCH_ELEMENT_TYPE_VF:
9585 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9586 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9587 case I40E_SWITCH_ELEMENT_TYPE_PE:
9588 case I40E_SWITCH_ELEMENT_TYPE_PA:
9589 /* ignore these for now */
9592 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9593 element_type, seid);
9599 * i40e_fetch_switch_configuration - Get switch config from firmware
9600 * @pf: board private structure
9601 * @printconfig: should we print the contents
9603 * Get the current switch configuration from the device and
9604 * extract a few useful SEID values.
9606 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9608 struct i40e_aqc_get_switch_config_resp *sw_config;
9614 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9618 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9620 u16 num_reported, num_total;
9622 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9626 dev_info(&pf->pdev->dev,
9627 "get switch config failed err %s aq_err %s\n",
9628 i40e_stat_str(&pf->hw, ret),
9629 i40e_aq_str(&pf->hw,
9630 pf->hw.aq.asq_last_status));
9635 num_reported = le16_to_cpu(sw_config->header.num_reported);
9636 num_total = le16_to_cpu(sw_config->header.num_total);
9639 dev_info(&pf->pdev->dev,
9640 "header: %d reported %d total\n",
9641 num_reported, num_total);
9643 for (i = 0; i < num_reported; i++) {
9644 struct i40e_aqc_switch_config_element_resp *ele =
9645 &sw_config->element[i];
9647 i40e_setup_pf_switch_element(pf, ele, num_reported,
9650 } while (next_seid != 0);
9657 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9658 * @pf: board private structure
9659 * @reinit: if the Main VSI needs to re-initialized.
9661 * Returns 0 on success, negative value on failure
9663 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9667 /* find out what's out there already */
9668 ret = i40e_fetch_switch_configuration(pf, false);
9670 dev_info(&pf->pdev->dev,
9671 "couldn't fetch switch config, err %s aq_err %s\n",
9672 i40e_stat_str(&pf->hw, ret),
9673 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9676 i40e_pf_reset_stats(pf);
9678 /* first time setup */
9679 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9680 struct i40e_vsi *vsi = NULL;
9683 /* Set up the PF VSI associated with the PF's main VSI
9684 * that is already in the HW switch
9686 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9687 uplink_seid = pf->veb[pf->lan_veb]->seid;
9689 uplink_seid = pf->mac_seid;
9690 if (pf->lan_vsi == I40E_NO_VSI)
9691 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9693 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9695 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9696 i40e_fdir_teardown(pf);
9700 /* force a reset of TC and queue layout configurations */
9701 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9703 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9704 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9705 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9707 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9709 i40e_fdir_sb_setup(pf);
9711 /* Setup static PF queue filter control settings */
9712 ret = i40e_setup_pf_filter_control(pf);
9714 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9716 /* Failure here should not stop continuing other steps */
9719 /* enable RSS in the HW, even for only one queue, as the stack can use
9722 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9723 i40e_config_rss(pf);
9725 /* fill in link information and enable LSE reporting */
9726 i40e_update_link_info(&pf->hw);
9727 i40e_link_event(pf);
9729 /* Initialize user-specific link properties */
9730 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9731 I40E_AQ_AN_COMPLETED) ? true : false);
9739 * i40e_determine_queue_usage - Work out queue distribution
9740 * @pf: board private structure
9742 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9746 pf->num_lan_qps = 0;
9748 pf->num_fcoe_qps = 0;
9751 /* Find the max queues to be put into basic use. We'll always be
9752 * using TC0, whether or not DCB is running, and TC0 will get the
9755 queues_left = pf->hw.func_caps.num_tx_qp;
9757 if ((queues_left == 1) ||
9758 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9759 /* one qp for PF, no queues for anything else */
9761 pf->rss_size = pf->num_lan_qps = 1;
9763 /* make sure all the fancies are disabled */
9764 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9766 I40E_FLAG_FCOE_ENABLED |
9768 I40E_FLAG_FD_SB_ENABLED |
9769 I40E_FLAG_FD_ATR_ENABLED |
9770 I40E_FLAG_DCB_CAPABLE |
9771 I40E_FLAG_SRIOV_ENABLED |
9772 I40E_FLAG_VMDQ_ENABLED);
9773 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9774 I40E_FLAG_FD_SB_ENABLED |
9775 I40E_FLAG_FD_ATR_ENABLED |
9776 I40E_FLAG_DCB_CAPABLE))) {
9778 pf->rss_size = pf->num_lan_qps = 1;
9779 queues_left -= pf->num_lan_qps;
9781 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9783 I40E_FLAG_FCOE_ENABLED |
9785 I40E_FLAG_FD_SB_ENABLED |
9786 I40E_FLAG_FD_ATR_ENABLED |
9787 I40E_FLAG_DCB_ENABLED |
9788 I40E_FLAG_VMDQ_ENABLED);
9790 /* Not enough queues for all TCs */
9791 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9792 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9793 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9794 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9796 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9798 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9799 pf->hw.func_caps.num_tx_qp);
9801 queues_left -= pf->num_lan_qps;
9805 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9806 if (I40E_DEFAULT_FCOE <= queues_left) {
9807 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9808 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9809 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9811 pf->num_fcoe_qps = 0;
9812 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9813 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9816 queues_left -= pf->num_fcoe_qps;
9820 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9821 if (queues_left > 1) {
9822 queues_left -= 1; /* save 1 queue for FD */
9824 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9825 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9829 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9830 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9831 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9832 (queues_left / pf->num_vf_qps));
9833 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9836 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9837 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9838 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9839 (queues_left / pf->num_vmdq_qps));
9840 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9843 pf->queues_left = queues_left;
9844 dev_dbg(&pf->pdev->dev,
9845 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
9846 pf->hw.func_caps.num_tx_qp,
9847 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
9848 pf->num_lan_qps, pf->rss_size, pf->num_req_vfs, pf->num_vf_qps,
9849 pf->num_vmdq_vsis, pf->num_vmdq_qps, queues_left);
9851 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9856 * i40e_setup_pf_filter_control - Setup PF static filter control
9857 * @pf: PF to be setup
9859 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9860 * settings. If PE/FCoE are enabled then it will also set the per PF
9861 * based filter sizes required for them. It also enables Flow director,
9862 * ethertype and macvlan type filter settings for the pf.
9864 * Returns 0 on success, negative on failure
9866 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9868 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9870 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9872 /* Flow Director is enabled */
9873 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9874 settings->enable_fdir = true;
9876 /* Ethtype and MACVLAN filters enabled for PF */
9877 settings->enable_ethtype = true;
9878 settings->enable_macvlan = true;
9880 if (i40e_set_filter_control(&pf->hw, settings))
9886 #define INFO_STRING_LEN 255
9887 static void i40e_print_features(struct i40e_pf *pf)
9889 struct i40e_hw *hw = &pf->hw;
9892 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9894 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9900 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9901 #ifdef CONFIG_PCI_IOV
9902 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9904 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9905 pf->hw.func_caps.num_vsis,
9906 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9907 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9909 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9910 buf += sprintf(buf, "RSS ");
9911 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9912 buf += sprintf(buf, "FD_ATR ");
9913 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9914 buf += sprintf(buf, "FD_SB ");
9915 buf += sprintf(buf, "NTUPLE ");
9917 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9918 buf += sprintf(buf, "DCB ");
9919 #if IS_ENABLED(CONFIG_VXLAN)
9920 buf += sprintf(buf, "VxLAN ");
9922 if (pf->flags & I40E_FLAG_PTP)
9923 buf += sprintf(buf, "PTP ");
9925 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9926 buf += sprintf(buf, "FCOE ");
9929 BUG_ON(buf > (string + INFO_STRING_LEN));
9930 dev_info(&pf->pdev->dev, "%s\n", string);
9935 * i40e_probe - Device initialization routine
9936 * @pdev: PCI device information struct
9937 * @ent: entry in i40e_pci_tbl
9939 * i40e_probe initializes a PF identified by a pci_dev structure.
9940 * The OS initialization, configuring of the PF private structure,
9941 * and a hardware reset occur.
9943 * Returns 0 on success, negative on failure
9945 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9947 struct i40e_aq_get_phy_abilities_resp abilities;
9950 static u16 pfs_found;
9957 err = pci_enable_device_mem(pdev);
9961 /* set up for high or low dma */
9962 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9964 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9967 "DMA configuration failed: 0x%x\n", err);
9972 /* set up pci connections */
9973 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9974 IORESOURCE_MEM), i40e_driver_name);
9976 dev_info(&pdev->dev,
9977 "pci_request_selected_regions failed %d\n", err);
9981 pci_enable_pcie_error_reporting(pdev);
9982 pci_set_master(pdev);
9984 /* Now that we have a PCI connection, we need to do the
9985 * low level device setup. This is primarily setting up
9986 * the Admin Queue structures and then querying for the
9987 * device's current profile information.
9989 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9996 set_bit(__I40E_DOWN, &pf->state);
10001 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10002 I40E_MAX_CSR_SPACE);
10004 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10005 if (!hw->hw_addr) {
10007 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10008 (unsigned int)pci_resource_start(pdev, 0),
10009 pf->ioremap_len, err);
10012 hw->vendor_id = pdev->vendor;
10013 hw->device_id = pdev->device;
10014 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10015 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10016 hw->subsystem_device_id = pdev->subsystem_device;
10017 hw->bus.device = PCI_SLOT(pdev->devfn);
10018 hw->bus.func = PCI_FUNC(pdev->devfn);
10019 pf->instance = pfs_found;
10022 pf->msg_enable = pf->hw.debug_mask;
10023 pf->msg_enable = debug;
10026 /* do a special CORER for clearing PXE mode once at init */
10027 if (hw->revision_id == 0 &&
10028 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10029 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10034 i40e_clear_pxe_mode(hw);
10037 /* Reset here to make sure all is clean and to define PF 'n' */
10039 err = i40e_pf_reset(hw);
10041 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10046 hw->aq.num_arq_entries = I40E_AQ_LEN;
10047 hw->aq.num_asq_entries = I40E_AQ_LEN;
10048 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10049 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10050 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10052 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10054 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10056 err = i40e_init_shared_code(hw);
10058 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10063 /* set up a default setting for link flow control */
10064 pf->hw.fc.requested_mode = I40E_FC_NONE;
10066 err = i40e_init_adminq(hw);
10067 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10069 /* provide additional fw info, like api and ver */
10070 dev_info(&pdev->dev, "fw_version:%d.%d.%05d\n",
10071 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build);
10072 dev_info(&pdev->dev, "fw api version:%d.%d\n",
10073 hw->aq.api_maj_ver, hw->aq.api_min_ver);
10076 dev_info(&pdev->dev,
10077 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10081 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10082 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10083 dev_info(&pdev->dev,
10084 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10085 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10086 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10087 dev_info(&pdev->dev,
10088 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10090 i40e_verify_eeprom(pf);
10092 /* Rev 0 hardware was never productized */
10093 if (hw->revision_id < 1)
10094 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10096 i40e_clear_pxe_mode(hw);
10097 err = i40e_get_capabilities(pf);
10099 goto err_adminq_setup;
10101 err = i40e_sw_init(pf);
10103 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10107 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10108 hw->func_caps.num_rx_qp,
10109 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10111 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10112 goto err_init_lan_hmc;
10115 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10117 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10119 goto err_configure_lan_hmc;
10122 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10123 * Ignore error return codes because if it was already disabled via
10124 * hardware settings this will fail
10126 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10127 (pf->hw.aq.fw_maj_ver < 4)) {
10128 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10129 i40e_aq_stop_lldp(hw, true, NULL);
10132 i40e_get_mac_addr(hw, hw->mac.addr);
10133 if (!is_valid_ether_addr(hw->mac.addr)) {
10134 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10138 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10139 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10140 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10141 if (is_valid_ether_addr(hw->mac.port_addr))
10142 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10144 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10146 dev_info(&pdev->dev,
10147 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10148 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10149 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10151 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10153 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10154 #endif /* I40E_FCOE */
10156 pci_set_drvdata(pdev, pf);
10157 pci_save_state(pdev);
10158 #ifdef CONFIG_I40E_DCB
10159 err = i40e_init_pf_dcb(pf);
10161 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10162 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10163 /* Continue without DCB enabled */
10165 #endif /* CONFIG_I40E_DCB */
10167 /* set up periodic task facility */
10168 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10169 pf->service_timer_period = HZ;
10171 INIT_WORK(&pf->service_task, i40e_service_task);
10172 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10173 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10175 /* NVM bit on means WoL disabled for the port */
10176 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10177 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10178 pf->wol_en = false;
10181 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10183 /* set up the main switch operations */
10184 i40e_determine_queue_usage(pf);
10185 err = i40e_init_interrupt_scheme(pf);
10187 goto err_switch_setup;
10189 /* The number of VSIs reported by the FW is the minimum guaranteed
10190 * to us; HW supports far more and we share the remaining pool with
10191 * the other PFs. We allocate space for more than the guarantee with
10192 * the understanding that we might not get them all later.
10194 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10195 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10197 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10199 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10200 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10201 pf->vsi = kzalloc(len, GFP_KERNEL);
10204 goto err_switch_setup;
10207 #ifdef CONFIG_PCI_IOV
10208 /* prep for VF support */
10209 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10210 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10211 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10212 if (pci_num_vf(pdev))
10213 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10216 err = i40e_setup_pf_switch(pf, false);
10218 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10221 /* if FDIR VSI was set up, start it now */
10222 for (i = 0; i < pf->num_alloc_vsi; i++) {
10223 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10224 i40e_vsi_open(pf->vsi[i]);
10229 /* driver is only interested in link up/down and module qualification
10230 * reports from firmware
10232 err = i40e_aq_set_phy_int_mask(&pf->hw,
10233 I40E_AQ_EVENT_LINK_UPDOWN |
10234 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10236 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10237 i40e_stat_str(&pf->hw, err),
10238 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10240 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10241 (pf->hw.aq.fw_maj_ver < 4)) {
10243 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10245 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10246 i40e_stat_str(&pf->hw, err),
10247 i40e_aq_str(&pf->hw,
10248 pf->hw.aq.asq_last_status));
10250 /* The main driver is (mostly) up and happy. We need to set this state
10251 * before setting up the misc vector or we get a race and the vector
10252 * ends up disabled forever.
10254 clear_bit(__I40E_DOWN, &pf->state);
10256 /* In case of MSIX we are going to setup the misc vector right here
10257 * to handle admin queue events etc. In case of legacy and MSI
10258 * the misc functionality and queue processing is combined in
10259 * the same vector and that gets setup at open.
10261 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10262 err = i40e_setup_misc_vector(pf);
10264 dev_info(&pdev->dev,
10265 "setup of misc vector failed: %d\n", err);
10270 #ifdef CONFIG_PCI_IOV
10271 /* prep for VF support */
10272 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10273 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10274 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10277 /* disable link interrupts for VFs */
10278 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10279 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10280 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10283 if (pci_num_vf(pdev)) {
10284 dev_info(&pdev->dev,
10285 "Active VFs found, allocating resources.\n");
10286 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10288 dev_info(&pdev->dev,
10289 "Error %d allocating resources for existing VFs\n",
10293 #endif /* CONFIG_PCI_IOV */
10297 i40e_dbg_pf_init(pf);
10299 /* tell the firmware that we're starting */
10300 i40e_send_version(pf);
10302 /* since everything's happy, start the service_task timer */
10303 mod_timer(&pf->service_timer,
10304 round_jiffies(jiffies + pf->service_timer_period));
10307 /* create FCoE interface */
10308 i40e_fcoe_vsi_setup(pf);
10311 #define PCI_SPEED_SIZE 8
10312 #define PCI_WIDTH_SIZE 8
10313 /* Devices on the IOSF bus do not have this information
10314 * and will report PCI Gen 1 x 1 by default so don't bother
10317 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10318 char speed[PCI_SPEED_SIZE] = "Unknown";
10319 char width[PCI_WIDTH_SIZE] = "Unknown";
10321 /* Get the negotiated link width and speed from PCI config
10324 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10327 i40e_set_pci_config_data(hw, link_status);
10329 switch (hw->bus.speed) {
10330 case i40e_bus_speed_8000:
10331 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10332 case i40e_bus_speed_5000:
10333 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10334 case i40e_bus_speed_2500:
10335 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10339 switch (hw->bus.width) {
10340 case i40e_bus_width_pcie_x8:
10341 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10342 case i40e_bus_width_pcie_x4:
10343 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10344 case i40e_bus_width_pcie_x2:
10345 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10346 case i40e_bus_width_pcie_x1:
10347 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10352 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10355 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10356 hw->bus.speed < i40e_bus_speed_8000) {
10357 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10358 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10362 /* get the requested speeds from the fw */
10363 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10365 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10366 i40e_stat_str(&pf->hw, err),
10367 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10368 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10370 /* get the supported phy types from the fw */
10371 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10373 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10374 i40e_stat_str(&pf->hw, err),
10375 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10376 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10378 /* print a string summarizing features */
10379 i40e_print_features(pf);
10383 /* Unwind what we've done if something failed in the setup */
10385 set_bit(__I40E_DOWN, &pf->state);
10386 i40e_clear_interrupt_scheme(pf);
10389 i40e_reset_interrupt_capability(pf);
10390 del_timer_sync(&pf->service_timer);
10392 err_configure_lan_hmc:
10393 (void)i40e_shutdown_lan_hmc(hw);
10395 kfree(pf->qp_pile);
10398 (void)i40e_shutdown_adminq(hw);
10400 iounmap(hw->hw_addr);
10404 pci_disable_pcie_error_reporting(pdev);
10405 pci_release_selected_regions(pdev,
10406 pci_select_bars(pdev, IORESOURCE_MEM));
10409 pci_disable_device(pdev);
10414 * i40e_remove - Device removal routine
10415 * @pdev: PCI device information struct
10417 * i40e_remove is called by the PCI subsystem to alert the driver
10418 * that is should release a PCI device. This could be caused by a
10419 * Hot-Plug event, or because the driver is going to be removed from
10422 static void i40e_remove(struct pci_dev *pdev)
10424 struct i40e_pf *pf = pci_get_drvdata(pdev);
10425 i40e_status ret_code;
10428 i40e_dbg_pf_exit(pf);
10432 /* no more scheduling of any task */
10433 set_bit(__I40E_DOWN, &pf->state);
10434 del_timer_sync(&pf->service_timer);
10435 cancel_work_sync(&pf->service_task);
10436 i40e_fdir_teardown(pf);
10438 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10440 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10443 i40e_fdir_teardown(pf);
10445 /* If there is a switch structure or any orphans, remove them.
10446 * This will leave only the PF's VSI remaining.
10448 for (i = 0; i < I40E_MAX_VEB; i++) {
10452 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10453 pf->veb[i]->uplink_seid == 0)
10454 i40e_switch_branch_release(pf->veb[i]);
10457 /* Now we can shutdown the PF's VSI, just before we kill
10460 if (pf->vsi[pf->lan_vsi])
10461 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10463 /* shutdown and destroy the HMC */
10464 if (pf->hw.hmc.hmc_obj) {
10465 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10467 dev_warn(&pdev->dev,
10468 "Failed to destroy the HMC resources: %d\n",
10472 /* shutdown the adminq */
10473 ret_code = i40e_shutdown_adminq(&pf->hw);
10475 dev_warn(&pdev->dev,
10476 "Failed to destroy the Admin Queue resources: %d\n",
10479 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10480 i40e_clear_interrupt_scheme(pf);
10481 for (i = 0; i < pf->num_alloc_vsi; i++) {
10483 i40e_vsi_clear_rings(pf->vsi[i]);
10484 i40e_vsi_clear(pf->vsi[i]);
10489 for (i = 0; i < I40E_MAX_VEB; i++) {
10494 kfree(pf->qp_pile);
10497 iounmap(pf->hw.hw_addr);
10499 pci_release_selected_regions(pdev,
10500 pci_select_bars(pdev, IORESOURCE_MEM));
10502 pci_disable_pcie_error_reporting(pdev);
10503 pci_disable_device(pdev);
10507 * i40e_pci_error_detected - warning that something funky happened in PCI land
10508 * @pdev: PCI device information struct
10510 * Called to warn that something happened and the error handling steps
10511 * are in progress. Allows the driver to quiesce things, be ready for
10514 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10515 enum pci_channel_state error)
10517 struct i40e_pf *pf = pci_get_drvdata(pdev);
10519 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10521 /* shutdown all operations */
10522 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10524 i40e_prep_for_reset(pf);
10528 /* Request a slot reset */
10529 return PCI_ERS_RESULT_NEED_RESET;
10533 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10534 * @pdev: PCI device information struct
10536 * Called to find if the driver can work with the device now that
10537 * the pci slot has been reset. If a basic connection seems good
10538 * (registers are readable and have sane content) then return a
10539 * happy little PCI_ERS_RESULT_xxx.
10541 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10543 struct i40e_pf *pf = pci_get_drvdata(pdev);
10544 pci_ers_result_t result;
10548 dev_dbg(&pdev->dev, "%s\n", __func__);
10549 if (pci_enable_device_mem(pdev)) {
10550 dev_info(&pdev->dev,
10551 "Cannot re-enable PCI device after reset.\n");
10552 result = PCI_ERS_RESULT_DISCONNECT;
10554 pci_set_master(pdev);
10555 pci_restore_state(pdev);
10556 pci_save_state(pdev);
10557 pci_wake_from_d3(pdev, false);
10559 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10561 result = PCI_ERS_RESULT_RECOVERED;
10563 result = PCI_ERS_RESULT_DISCONNECT;
10566 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10568 dev_info(&pdev->dev,
10569 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10571 /* non-fatal, continue */
10578 * i40e_pci_error_resume - restart operations after PCI error recovery
10579 * @pdev: PCI device information struct
10581 * Called to allow the driver to bring things back up after PCI error
10582 * and/or reset recovery has finished.
10584 static void i40e_pci_error_resume(struct pci_dev *pdev)
10586 struct i40e_pf *pf = pci_get_drvdata(pdev);
10588 dev_dbg(&pdev->dev, "%s\n", __func__);
10589 if (test_bit(__I40E_SUSPENDED, &pf->state))
10593 i40e_handle_reset_warning(pf);
10598 * i40e_shutdown - PCI callback for shutting down
10599 * @pdev: PCI device information struct
10601 static void i40e_shutdown(struct pci_dev *pdev)
10603 struct i40e_pf *pf = pci_get_drvdata(pdev);
10604 struct i40e_hw *hw = &pf->hw;
10606 set_bit(__I40E_SUSPENDED, &pf->state);
10607 set_bit(__I40E_DOWN, &pf->state);
10609 i40e_prep_for_reset(pf);
10612 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10613 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10615 del_timer_sync(&pf->service_timer);
10616 cancel_work_sync(&pf->service_task);
10617 i40e_fdir_teardown(pf);
10620 i40e_prep_for_reset(pf);
10623 wr32(hw, I40E_PFPM_APM,
10624 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10625 wr32(hw, I40E_PFPM_WUFC,
10626 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10628 i40e_clear_interrupt_scheme(pf);
10630 if (system_state == SYSTEM_POWER_OFF) {
10631 pci_wake_from_d3(pdev, pf->wol_en);
10632 pci_set_power_state(pdev, PCI_D3hot);
10638 * i40e_suspend - PCI callback for moving to D3
10639 * @pdev: PCI device information struct
10641 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10643 struct i40e_pf *pf = pci_get_drvdata(pdev);
10644 struct i40e_hw *hw = &pf->hw;
10646 set_bit(__I40E_SUSPENDED, &pf->state);
10647 set_bit(__I40E_DOWN, &pf->state);
10650 i40e_prep_for_reset(pf);
10653 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10654 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10656 pci_wake_from_d3(pdev, pf->wol_en);
10657 pci_set_power_state(pdev, PCI_D3hot);
10663 * i40e_resume - PCI callback for waking up from D3
10664 * @pdev: PCI device information struct
10666 static int i40e_resume(struct pci_dev *pdev)
10668 struct i40e_pf *pf = pci_get_drvdata(pdev);
10671 pci_set_power_state(pdev, PCI_D0);
10672 pci_restore_state(pdev);
10673 /* pci_restore_state() clears dev->state_saves, so
10674 * call pci_save_state() again to restore it.
10676 pci_save_state(pdev);
10678 err = pci_enable_device_mem(pdev);
10680 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10683 pci_set_master(pdev);
10685 /* no wakeup events while running */
10686 pci_wake_from_d3(pdev, false);
10688 /* handling the reset will rebuild the device state */
10689 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10690 clear_bit(__I40E_DOWN, &pf->state);
10692 i40e_reset_and_rebuild(pf, false);
10700 static const struct pci_error_handlers i40e_err_handler = {
10701 .error_detected = i40e_pci_error_detected,
10702 .slot_reset = i40e_pci_error_slot_reset,
10703 .resume = i40e_pci_error_resume,
10706 static struct pci_driver i40e_driver = {
10707 .name = i40e_driver_name,
10708 .id_table = i40e_pci_tbl,
10709 .probe = i40e_probe,
10710 .remove = i40e_remove,
10712 .suspend = i40e_suspend,
10713 .resume = i40e_resume,
10715 .shutdown = i40e_shutdown,
10716 .err_handler = &i40e_err_handler,
10717 .sriov_configure = i40e_pci_sriov_configure,
10721 * i40e_init_module - Driver registration routine
10723 * i40e_init_module is the first routine called when the driver is
10724 * loaded. All it does is register with the PCI subsystem.
10726 static int __init i40e_init_module(void)
10728 pr_info("%s: %s - version %s\n", i40e_driver_name,
10729 i40e_driver_string, i40e_driver_version_str);
10730 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10733 return pci_register_driver(&i40e_driver);
10735 module_init(i40e_init_module);
10738 * i40e_exit_module - Driver exit cleanup routine
10740 * i40e_exit_module is called just before the driver is removed
10743 static void __exit i40e_exit_module(void)
10745 pci_unregister_driver(&i40e_driver);
10748 module_exit(i40e_exit_module);