drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/sched.h>
  38 #include <linux/slab.h>
  39 #include <linux/pm_runtime.h>
  40 #include <linux/highmem.h>
  41 #include <linux/mdio.h>
  42
  43 #include "igb.h"
  44
  45 struct igb_stats {
  46         char stat_string[ETH_GSTRING_LEN];
  47         int sizeof_stat;
  48         int stat_offset;
  49 };
  50
  51 #define IGB_STAT(_name, _stat) { \
  52         .stat_string = _name, \
  53         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  54         .stat_offset = offsetof(struct igb_adapter, _stat) \
  55 }
  56 static const struct igb_stats igb_gstrings_stats[] = {
  57         IGB_STAT("rx_packets", stats.gprc),
  58         IGB_STAT("tx_packets", stats.gptc),
  59         IGB_STAT("rx_bytes", stats.gorc),
  60         IGB_STAT("tx_bytes", stats.gotc),
  61         IGB_STAT("rx_broadcast", stats.bprc),
  62         IGB_STAT("tx_broadcast", stats.bptc),
  63         IGB_STAT("rx_multicast", stats.mprc),
  64         IGB_STAT("tx_multicast", stats.mptc),
  65         IGB_STAT("multicast", stats.mprc),
  66         IGB_STAT("collisions", stats.colc),
  67         IGB_STAT("rx_crc_errors", stats.crcerrs),
  68         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  69         IGB_STAT("rx_missed_errors", stats.mpc),
  70         IGB_STAT("tx_aborted_errors", stats.ecol),
  71         IGB_STAT("tx_carrier_errors", stats.tncrs),
  72         IGB_STAT("tx_window_errors", stats.latecol),
  73         IGB_STAT("tx_abort_late_coll", stats.latecol),
  74         IGB_STAT("tx_deferred_ok", stats.dc),
  75         IGB_STAT("tx_single_coll_ok", stats.scc),
  76         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  77         IGB_STAT("tx_timeout_count", tx_timeout_count),
  78         IGB_STAT("rx_long_length_errors", stats.roc),
  79         IGB_STAT("rx_short_length_errors", stats.ruc),
  80         IGB_STAT("rx_align_errors", stats.algnerrc),
  81         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  82         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  83         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  84         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  85         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  86         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  87         IGB_STAT("rx_long_byte_count", stats.gorc),
  88         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  89         IGB_STAT("tx_smbus", stats.mgptc),
  90         IGB_STAT("rx_smbus", stats.mgprc),
  91         IGB_STAT("dropped_smbus", stats.mgpdc),
  92         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  93         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  94         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  95         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  96         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  97         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  98 };
  99
 100 #define IGB_NETDEV_STAT(_net_stat) { \
 101         .stat_string = __stringify(_net_stat), \
 102         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
 103         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
 104 }
 105 static const struct igb_stats igb_gstrings_net_stats[] = {
 106         IGB_NETDEV_STAT(rx_errors),
 107         IGB_NETDEV_STAT(tx_errors),
 108         IGB_NETDEV_STAT(tx_dropped),
 109         IGB_NETDEV_STAT(rx_length_errors),
 110         IGB_NETDEV_STAT(rx_over_errors),
 111         IGB_NETDEV_STAT(rx_frame_errors),
 112         IGB_NETDEV_STAT(rx_fifo_errors),
 113         IGB_NETDEV_STAT(tx_fifo_errors),
 114         IGB_NETDEV_STAT(tx_heartbeat_errors)
 115 };
 116
 117 #define IGB_GLOBAL_STATS_LEN    \
 118         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 119 #define IGB_NETDEV_STATS_LEN    \
 120         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 121 #define IGB_RX_QUEUE_STATS_LEN \
 122         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 123
 124 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 125
 126 #define IGB_QUEUE_STATS_LEN \
 127         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 128           IGB_RX_QUEUE_STATS_LEN) + \
 129          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 130           IGB_TX_QUEUE_STATS_LEN))
 131 #define IGB_STATS_LEN \
 132         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 133
 134 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 135         "Register test  (offline)", "Eeprom test    (offline)",
 136         "Interrupt test (offline)", "Loopback test  (offline)",
 137         "Link test   (on/offline)"
 138 };
 139 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 140
 141 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 142 {
 143         struct igb_adapter *adapter = netdev_priv(netdev);
 144         struct e1000_hw *hw = &adapter->hw;
 145         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 146         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 147         u32 status;
 148
 149         if (hw->phy.media_type == e1000_media_type_copper) {
 150
 151                 ecmd->supported = (SUPPORTED_10baseT_Half |
 152                                    SUPPORTED_10baseT_Full |
 153                                    SUPPORTED_100baseT_Half |
 154                                    SUPPORTED_100baseT_Full |
 155                                    SUPPORTED_1000baseT_Full|
 156                                    SUPPORTED_Autoneg |
 157                                    SUPPORTED_TP |
 158                                    SUPPORTED_Pause);
 159                 ecmd->advertising = ADVERTISED_TP;
 160
 161                 if (hw->mac.autoneg == 1) {
 162                         ecmd->advertising |= ADVERTISED_Autoneg;
 163                         /* the e1000 autoneg seems to match ethtool nicely */
 164                         ecmd->advertising |= hw->phy.autoneg_advertised;
 165                 }
 166
 167                 ecmd->port = PORT_TP;
 168                 ecmd->phy_address = hw->phy.addr;
 169                 ecmd->transceiver = XCVR_INTERNAL;
 170         } else {
 171                 ecmd->supported = (SUPPORTED_FIBRE |
 172                                    SUPPORTED_Autoneg |
 173                                    SUPPORTED_Pause);
 174                 ecmd->advertising = ADVERTISED_FIBRE;
 175                 if (hw->mac.type == e1000_i354) {
 176                         ecmd->supported |= SUPPORTED_2500baseX_Full;
 177                         ecmd->advertising |= ADVERTISED_2500baseX_Full;
 178                 }
 179                 if ((eth_flags->e1000_base_lx) || (eth_flags->e1000_base_sx)) {
 180                         ecmd->supported |= SUPPORTED_1000baseT_Full;
 181                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 182                 }
 183                 if (eth_flags->e100_base_fx) {
 184                         ecmd->supported |= SUPPORTED_100baseT_Full;
 185                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 186                 }
 187                 if (hw->mac.autoneg == 1)
 188                         ecmd->advertising |= ADVERTISED_Autoneg;
 189
 190                 ecmd->port = PORT_FIBRE;
 191                 ecmd->transceiver = XCVR_EXTERNAL;
 192         }
 193
 194         if (hw->mac.autoneg != 1)
 195                 ecmd->advertising &= ~(ADVERTISED_Pause |
 196                                        ADVERTISED_Asym_Pause);
 197
 198         if (hw->fc.requested_mode == e1000_fc_full)
 199                 ecmd->advertising |= ADVERTISED_Pause;
 200         else if (hw->fc.requested_mode == e1000_fc_rx_pause)
 201                 ecmd->advertising |= (ADVERTISED_Pause |
 202                                       ADVERTISED_Asym_Pause);
 203         else if (hw->fc.requested_mode == e1000_fc_tx_pause)
 204                 ecmd->advertising |=  ADVERTISED_Asym_Pause;
 205         else
 206                 ecmd->advertising &= ~(ADVERTISED_Pause |
 207                                        ADVERTISED_Asym_Pause);
 208
 209         status = rd32(E1000_STATUS);
 210
 211         if (status & E1000_STATUS_LU) {
 212                 if ((hw->mac.type == e1000_i354) &&
 213                     (status & E1000_STATUS_2P5_SKU) &&
 214                     !(status & E1000_STATUS_2P5_SKU_OVER))
 215                         ecmd->speed = SPEED_2500;
 216                 else if (status & E1000_STATUS_SPEED_1000)
 217                         ecmd->speed = SPEED_1000;
 218                 else if (status & E1000_STATUS_SPEED_100)
 219                         ecmd->speed = SPEED_100;
 220                 else
 221                         ecmd->speed = SPEED_10;
 222                 if ((status & E1000_STATUS_FD) ||
 223                     hw->phy.media_type != e1000_media_type_copper)
 224                         ecmd->duplex = DUPLEX_FULL;
 225                 else
 226                         ecmd->duplex = DUPLEX_HALF;
 227         } else {
 228                 ecmd->speed = -1;
 229                 ecmd->duplex = -1;
 230         }
 231
 232         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 233             hw->mac.autoneg)
 234                 ecmd->autoneg = AUTONEG_ENABLE;
 235         else
 236                 ecmd->autoneg = AUTONEG_DISABLE;
 237
 238         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 239         if (hw->phy.media_type == e1000_media_type_copper)
 240                 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 241                                                       ETH_TP_MDI;
 242         else
 243                 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
 244
 245         if (hw->phy.mdix == AUTO_ALL_MODES)
 246                 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 247         else
 248                 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
 249
 250         return 0;
 251 }
 252
 253 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 254 {
 255         struct igb_adapter *adapter = netdev_priv(netdev);
 256         struct e1000_hw *hw = &adapter->hw;
 257
 258         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 259          * cannot be changed
 260          */
 261         if (igb_check_reset_block(hw)) {
 262                 dev_err(&adapter->pdev->dev,
 263                         "Cannot change link characteristics when SoL/IDER is active.\n");
 264                 return -EINVAL;
 265         }
 266
 267         /* MDI setting is only allowed when autoneg enabled because
 268          * some hardware doesn't allow MDI setting when speed or
 269          * duplex is forced.
 270          */
 271         if (ecmd->eth_tp_mdix_ctrl) {
 272                 if (hw->phy.media_type != e1000_media_type_copper)
 273                         return -EOPNOTSUPP;
 274
 275                 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 276                     (ecmd->autoneg != AUTONEG_ENABLE)) {
 277                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 278                         return -EINVAL;
 279                 }
 280         }
 281
 282         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 283                 msleep(1);
 284
 285         if (ecmd->autoneg == AUTONEG_ENABLE) {
 286                 hw->mac.autoneg = 1;
 287                 if (hw->phy.media_type == e1000_media_type_fiber) {
 288                         hw->phy.autoneg_advertised = ecmd->advertising |
 289                                                      ADVERTISED_FIBRE |
 290                                                      ADVERTISED_Autoneg;
 291                         switch (adapter->link_speed) {
 292                         case SPEED_2500:
 293                                 hw->phy.autoneg_advertised =
 294                                         ADVERTISED_2500baseX_Full;
 295                                 break;
 296                         case SPEED_1000:
 297                                 hw->phy.autoneg_advertised =
 298                                         ADVERTISED_1000baseT_Full;
 299                                 break;
 300                         case SPEED_100:
 301                                 hw->phy.autoneg_advertised =
 302                                         ADVERTISED_100baseT_Full;
 303                                 break;
 304                         default:
 305                                 break;
 306                         }
 307                 } else {
 308                         hw->phy.autoneg_advertised = ecmd->advertising |
 309                                                      ADVERTISED_TP |
 310                                                      ADVERTISED_Autoneg;
 311                 }
 312                 ecmd->advertising = hw->phy.autoneg_advertised;
 313                 if (adapter->fc_autoneg)
 314                         hw->fc.requested_mode = e1000_fc_default;
 315         } else {
 316                 u32 speed = ethtool_cmd_speed(ecmd);
 317                 /* calling this overrides forced MDI setting */
 318                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
 319                         clear_bit(__IGB_RESETTING, &adapter->state);
 320                         return -EINVAL;
 321                 }
 322         }
 323
 324         /* MDI-X => 2; MDI => 1; Auto => 3 */
 325         if (ecmd->eth_tp_mdix_ctrl) {
 326                 /* fix up the value for auto (3 => 0) as zero is mapped
 327                  * internally to auto
 328                  */
 329                 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 330                         hw->phy.mdix = AUTO_ALL_MODES;
 331                 else
 332                         hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
 333         }
 334
 335         /* reset the link */
 336         if (netif_running(adapter->netdev)) {
 337                 igb_down(adapter);
 338                 igb_up(adapter);
 339         } else
 340                 igb_reset(adapter);
 341
 342         clear_bit(__IGB_RESETTING, &adapter->state);
 343         return 0;
 344 }
 345
 346 static u32 igb_get_link(struct net_device *netdev)
 347 {
 348         struct igb_adapter *adapter = netdev_priv(netdev);
 349         struct e1000_mac_info *mac = &adapter->hw.mac;
 350
 351         /* If the link is not reported up to netdev, interrupts are disabled,
 352          * and so the physical link state may have changed since we last
 353          * looked. Set get_link_status to make sure that the true link
 354          * state is interrogated, rather than pulling a cached and possibly
 355          * stale link state from the driver.
 356          */
 357         if (!netif_carrier_ok(netdev))
 358                 mac->get_link_status = 1;
 359
 360         return igb_has_link(adapter);
 361 }
 362
 363 static void igb_get_pauseparam(struct net_device *netdev,
 364                                struct ethtool_pauseparam *pause)
 365 {
 366         struct igb_adapter *adapter = netdev_priv(netdev);
 367         struct e1000_hw *hw = &adapter->hw;
 368
 369         pause->autoneg =
 370                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 371
 372         if (hw->fc.current_mode == e1000_fc_rx_pause)
 373                 pause->rx_pause = 1;
 374         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 375                 pause->tx_pause = 1;
 376         else if (hw->fc.current_mode == e1000_fc_full) {
 377                 pause->rx_pause = 1;
 378                 pause->tx_pause = 1;
 379         }
 380 }
 381
 382 static int igb_set_pauseparam(struct net_device *netdev,
 383                               struct ethtool_pauseparam *pause)
 384 {
 385         struct igb_adapter *adapter = netdev_priv(netdev);
 386         struct e1000_hw *hw = &adapter->hw;
 387         int retval = 0;
 388
 389         /* 100basefx does not support setting link flow control */
 390         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 391                 return -EINVAL;
 392
 393         adapter->fc_autoneg = pause->autoneg;
 394
 395         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 396                 msleep(1);
 397
 398         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 399                 hw->fc.requested_mode = e1000_fc_default;
 400                 if (netif_running(adapter->netdev)) {
 401                         igb_down(adapter);
 402                         igb_up(adapter);
 403                 } else {
 404                         igb_reset(adapter);
 405                 }
 406         } else {
 407                 if (pause->rx_pause && pause->tx_pause)
 408                         hw->fc.requested_mode = e1000_fc_full;
 409                 else if (pause->rx_pause && !pause->tx_pause)
 410                         hw->fc.requested_mode = e1000_fc_rx_pause;
 411                 else if (!pause->rx_pause && pause->tx_pause)
 412                         hw->fc.requested_mode = e1000_fc_tx_pause;
 413                 else if (!pause->rx_pause && !pause->tx_pause)
 414                         hw->fc.requested_mode = e1000_fc_none;
 415
 416                 hw->fc.current_mode = hw->fc.requested_mode;
 417
 418                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 419                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 420         }
 421
 422         clear_bit(__IGB_RESETTING, &adapter->state);
 423         return retval;
 424 }
 425
 426 static u32 igb_get_msglevel(struct net_device *netdev)
 427 {
 428         struct igb_adapter *adapter = netdev_priv(netdev);
 429         return adapter->msg_enable;
 430 }
 431
 432 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 433 {
 434         struct igb_adapter *adapter = netdev_priv(netdev);
 435         adapter->msg_enable = data;
 436 }
 437
 438 static int igb_get_regs_len(struct net_device *netdev)
 439 {
 440 #define IGB_REGS_LEN 739
 441         return IGB_REGS_LEN * sizeof(u32);
 442 }
 443
 444 static void igb_get_regs(struct net_device *netdev,
 445                          struct ethtool_regs *regs, void *p)
 446 {
 447         struct igb_adapter *adapter = netdev_priv(netdev);
 448         struct e1000_hw *hw = &adapter->hw;
 449         u32 *regs_buff = p;
 450         u8 i;
 451
 452         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 453
 454         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 455
 456         /* General Registers */
 457         regs_buff[0] = rd32(E1000_CTRL);
 458         regs_buff[1] = rd32(E1000_STATUS);
 459         regs_buff[2] = rd32(E1000_CTRL_EXT);
 460         regs_buff[3] = rd32(E1000_MDIC);
 461         regs_buff[4] = rd32(E1000_SCTL);
 462         regs_buff[5] = rd32(E1000_CONNSW);
 463         regs_buff[6] = rd32(E1000_VET);
 464         regs_buff[7] = rd32(E1000_LEDCTL);
 465         regs_buff[8] = rd32(E1000_PBA);
 466         regs_buff[9] = rd32(E1000_PBS);
 467         regs_buff[10] = rd32(E1000_FRTIMER);
 468         regs_buff[11] = rd32(E1000_TCPTIMER);
 469
 470         /* NVM Register */
 471         regs_buff[12] = rd32(E1000_EECD);
 472
 473         /* Interrupt */
 474         /* Reading EICS for EICR because they read the
 475          * same but EICS does not clear on read
 476          */
 477         regs_buff[13] = rd32(E1000_EICS);
 478         regs_buff[14] = rd32(E1000_EICS);
 479         regs_buff[15] = rd32(E1000_EIMS);
 480         regs_buff[16] = rd32(E1000_EIMC);
 481         regs_buff[17] = rd32(E1000_EIAC);
 482         regs_buff[18] = rd32(E1000_EIAM);
 483         /* Reading ICS for ICR because they read the
 484          * same but ICS does not clear on read
 485          */
 486         regs_buff[19] = rd32(E1000_ICS);
 487         regs_buff[20] = rd32(E1000_ICS);
 488         regs_buff[21] = rd32(E1000_IMS);
 489         regs_buff[22] = rd32(E1000_IMC);
 490         regs_buff[23] = rd32(E1000_IAC);
 491         regs_buff[24] = rd32(E1000_IAM);
 492         regs_buff[25] = rd32(E1000_IMIRVP);
 493
 494         /* Flow Control */
 495         regs_buff[26] = rd32(E1000_FCAL);
 496         regs_buff[27] = rd32(E1000_FCAH);
 497         regs_buff[28] = rd32(E1000_FCTTV);
 498         regs_buff[29] = rd32(E1000_FCRTL);
 499         regs_buff[30] = rd32(E1000_FCRTH);
 500         regs_buff[31] = rd32(E1000_FCRTV);
 501
 502         /* Receive */
 503         regs_buff[32] = rd32(E1000_RCTL);
 504         regs_buff[33] = rd32(E1000_RXCSUM);
 505         regs_buff[34] = rd32(E1000_RLPML);
 506         regs_buff[35] = rd32(E1000_RFCTL);
 507         regs_buff[36] = rd32(E1000_MRQC);
 508         regs_buff[37] = rd32(E1000_VT_CTL);
 509
 510         /* Transmit */
 511         regs_buff[38] = rd32(E1000_TCTL);
 512         regs_buff[39] = rd32(E1000_TCTL_EXT);
 513         regs_buff[40] = rd32(E1000_TIPG);
 514         regs_buff[41] = rd32(E1000_DTXCTL);
 515
 516         /* Wake Up */
 517         regs_buff[42] = rd32(E1000_WUC);
 518         regs_buff[43] = rd32(E1000_WUFC);
 519         regs_buff[44] = rd32(E1000_WUS);
 520         regs_buff[45] = rd32(E1000_IPAV);
 521         regs_buff[46] = rd32(E1000_WUPL);
 522
 523         /* MAC */
 524         regs_buff[47] = rd32(E1000_PCS_CFG0);
 525         regs_buff[48] = rd32(E1000_PCS_LCTL);
 526         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 527         regs_buff[50] = rd32(E1000_PCS_ANADV);
 528         regs_buff[51] = rd32(E1000_PCS_LPAB);
 529         regs_buff[52] = rd32(E1000_PCS_NPTX);
 530         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 531
 532         /* Statistics */
 533         regs_buff[54] = adapter->stats.crcerrs;
 534         regs_buff[55] = adapter->stats.algnerrc;
 535         regs_buff[56] = adapter->stats.symerrs;
 536         regs_buff[57] = adapter->stats.rxerrc;
 537         regs_buff[58] = adapter->stats.mpc;
 538         regs_buff[59] = adapter->stats.scc;
 539         regs_buff[60] = adapter->stats.ecol;
 540         regs_buff[61] = adapter->stats.mcc;
 541         regs_buff[62] = adapter->stats.latecol;
 542         regs_buff[63] = adapter->stats.colc;
 543         regs_buff[64] = adapter->stats.dc;
 544         regs_buff[65] = adapter->stats.tncrs;
 545         regs_buff[66] = adapter->stats.sec;
 546         regs_buff[67] = adapter->stats.htdpmc;
 547         regs_buff[68] = adapter->stats.rlec;
 548         regs_buff[69] = adapter->stats.xonrxc;
 549         regs_buff[70] = adapter->stats.xontxc;
 550         regs_buff[71] = adapter->stats.xoffrxc;
 551         regs_buff[72] = adapter->stats.xofftxc;
 552         regs_buff[73] = adapter->stats.fcruc;
 553         regs_buff[74] = adapter->stats.prc64;
 554         regs_buff[75] = adapter->stats.prc127;
 555         regs_buff[76] = adapter->stats.prc255;
 556         regs_buff[77] = adapter->stats.prc511;
 557         regs_buff[78] = adapter->stats.prc1023;
 558         regs_buff[79] = adapter->stats.prc1522;
 559         regs_buff[80] = adapter->stats.gprc;
 560         regs_buff[81] = adapter->stats.bprc;
 561         regs_buff[82] = adapter->stats.mprc;
 562         regs_buff[83] = adapter->stats.gptc;
 563         regs_buff[84] = adapter->stats.gorc;
 564         regs_buff[86] = adapter->stats.gotc;
 565         regs_buff[88] = adapter->stats.rnbc;
 566         regs_buff[89] = adapter->stats.ruc;
 567         regs_buff[90] = adapter->stats.rfc;
 568         regs_buff[91] = adapter->stats.roc;
 569         regs_buff[92] = adapter->stats.rjc;
 570         regs_buff[93] = adapter->stats.mgprc;
 571         regs_buff[94] = adapter->stats.mgpdc;
 572         regs_buff[95] = adapter->stats.mgptc;
 573         regs_buff[96] = adapter->stats.tor;
 574         regs_buff[98] = adapter->stats.tot;
 575         regs_buff[100] = adapter->stats.tpr;
 576         regs_buff[101] = adapter->stats.tpt;
 577         regs_buff[102] = adapter->stats.ptc64;
 578         regs_buff[103] = adapter->stats.ptc127;
 579         regs_buff[104] = adapter->stats.ptc255;
 580         regs_buff[105] = adapter->stats.ptc511;
 581         regs_buff[106] = adapter->stats.ptc1023;
 582         regs_buff[107] = adapter->stats.ptc1522;
 583         regs_buff[108] = adapter->stats.mptc;
 584         regs_buff[109] = adapter->stats.bptc;
 585         regs_buff[110] = adapter->stats.tsctc;
 586         regs_buff[111] = adapter->stats.iac;
 587         regs_buff[112] = adapter->stats.rpthc;
 588         regs_buff[113] = adapter->stats.hgptc;
 589         regs_buff[114] = adapter->stats.hgorc;
 590         regs_buff[116] = adapter->stats.hgotc;
 591         regs_buff[118] = adapter->stats.lenerrs;
 592         regs_buff[119] = adapter->stats.scvpc;
 593         regs_buff[120] = adapter->stats.hrmpc;
 594
 595         for (i = 0; i < 4; i++)
 596                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 597         for (i = 0; i < 4; i++)
 598                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 599         for (i = 0; i < 4; i++)
 600                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 601         for (i = 0; i < 4; i++)
 602                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 603         for (i = 0; i < 4; i++)
 604                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 605         for (i = 0; i < 4; i++)
 606                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 607         for (i = 0; i < 4; i++)
 608                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 609         for (i = 0; i < 4; i++)
 610                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 611
 612         for (i = 0; i < 10; i++)
 613                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 614         for (i = 0; i < 8; i++)
 615                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 616         for (i = 0; i < 8; i++)
 617                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 618         for (i = 0; i < 16; i++)
 619                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 620         for (i = 0; i < 16; i++)
 621                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 622
 623         for (i = 0; i < 4; i++)
 624                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 625         for (i = 0; i < 4; i++)
 626                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 627         for (i = 0; i < 4; i++)
 628                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 629         for (i = 0; i < 4; i++)
 630                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 631         for (i = 0; i < 4; i++)
 632                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 633         for (i = 0; i < 4; i++)
 634                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 635         for (i = 0; i < 4; i++)
 636                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 637         for (i = 0; i < 4; i++)
 638                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 639         for (i = 0; i < 4; i++)
 640                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 641
 642         for (i = 0; i < 4; i++)
 643                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 644         for (i = 0; i < 4; i++)
 645                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 646         for (i = 0; i < 32; i++)
 647                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 648         for (i = 0; i < 128; i++)
 649                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 650         for (i = 0; i < 128; i++)
 651                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 652         for (i = 0; i < 4; i++)
 653                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 654
 655         regs_buff[547] = rd32(E1000_TDFH);
 656         regs_buff[548] = rd32(E1000_TDFT);
 657         regs_buff[549] = rd32(E1000_TDFHS);
 658         regs_buff[550] = rd32(E1000_TDFPC);
 659
 660         if (hw->mac.type > e1000_82580) {
 661                 regs_buff[551] = adapter->stats.o2bgptc;
 662                 regs_buff[552] = adapter->stats.b2ospc;
 663                 regs_buff[553] = adapter->stats.o2bspc;
 664                 regs_buff[554] = adapter->stats.b2ogprc;
 665         }
 666
 667         if (hw->mac.type != e1000_82576)
 668                 return;
 669         for (i = 0; i < 12; i++)
 670                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 671         for (i = 0; i < 4; i++)
 672                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 673         for (i = 0; i < 12; i++)
 674                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 675         for (i = 0; i < 12; i++)
 676                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 677         for (i = 0; i < 12; i++)
 678                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 679         for (i = 0; i < 12; i++)
 680                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 681         for (i = 0; i < 12; i++)
 682                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 683         for (i = 0; i < 12; i++)
 684                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 685
 686         for (i = 0; i < 12; i++)
 687                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 688         for (i = 0; i < 12; i++)
 689                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 690         for (i = 0; i < 12; i++)
 691                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 692         for (i = 0; i < 12; i++)
 693                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 694         for (i = 0; i < 12; i++)
 695                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 696         for (i = 0; i < 12; i++)
 697                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 698         for (i = 0; i < 12; i++)
 699                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 700         for (i = 0; i < 12; i++)
 701                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 702 }
 703
 704 static int igb_get_eeprom_len(struct net_device *netdev)
 705 {
 706         struct igb_adapter *adapter = netdev_priv(netdev);
 707         return adapter->hw.nvm.word_size * 2;
 708 }
 709
 710 static int igb_get_eeprom(struct net_device *netdev,
 711                           struct ethtool_eeprom *eeprom, u8 *bytes)
 712 {
 713         struct igb_adapter *adapter = netdev_priv(netdev);
 714         struct e1000_hw *hw = &adapter->hw;
 715         u16 *eeprom_buff;
 716         int first_word, last_word;
 717         int ret_val = 0;
 718         u16 i;
 719
 720         if (eeprom->len == 0)
 721                 return -EINVAL;
 722
 723         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 724
 725         first_word = eeprom->offset >> 1;
 726         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 727
 728         eeprom_buff = kmalloc(sizeof(u16) *
 729                         (last_word - first_word + 1), GFP_KERNEL);
 730         if (!eeprom_buff)
 731                 return -ENOMEM;
 732
 733         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 734                 ret_val = hw->nvm.ops.read(hw, first_word,
 735                                            last_word - first_word + 1,
 736                                            eeprom_buff);
 737         else {
 738                 for (i = 0; i < last_word - first_word + 1; i++) {
 739                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 740                                                    &eeprom_buff[i]);
 741                         if (ret_val)
 742                                 break;
 743                 }
 744         }
 745
 746         /* Device's eeprom is always little-endian, word addressable */
 747         for (i = 0; i < last_word - first_word + 1; i++)
 748                 le16_to_cpus(&eeprom_buff[i]);
 749
 750         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 751                         eeprom->len);
 752         kfree(eeprom_buff);
 753
 754         return ret_val;
 755 }
 756
 757 static int igb_set_eeprom(struct net_device *netdev,
 758                           struct ethtool_eeprom *eeprom, u8 *bytes)
 759 {
 760         struct igb_adapter *adapter = netdev_priv(netdev);
 761         struct e1000_hw *hw = &adapter->hw;
 762         u16 *eeprom_buff;
 763         void *ptr;
 764         int max_len, first_word, last_word, ret_val = 0;
 765         u16 i;
 766
 767         if (eeprom->len == 0)
 768                 return -EOPNOTSUPP;
 769
 770         if (hw->mac.type == e1000_i211)
 771                 return -EOPNOTSUPP;
 772
 773         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 774                 return -EFAULT;
 775
 776         max_len = hw->nvm.word_size * 2;
 777
 778         first_word = eeprom->offset >> 1;
 779         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 780         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 781         if (!eeprom_buff)
 782                 return -ENOMEM;
 783
 784         ptr = (void *)eeprom_buff;
 785
 786         if (eeprom->offset & 1) {
 787                 /* need read/modify/write of first changed EEPROM word
 788                  * only the second byte of the word is being modified
 789                  */
 790                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 791                                             &eeprom_buff[0]);
 792                 ptr++;
 793         }
 794         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 795                 /* need read/modify/write of last changed EEPROM word
 796                  * only the first byte of the word is being modified
 797                  */
 798                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 799                                    &eeprom_buff[last_word - first_word]);
 800         }
 801
 802         /* Device's eeprom is always little-endian, word addressable */
 803         for (i = 0; i < last_word - first_word + 1; i++)
 804                 le16_to_cpus(&eeprom_buff[i]);
 805
 806         memcpy(ptr, bytes, eeprom->len);
 807
 808         for (i = 0; i < last_word - first_word + 1; i++)
 809                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 810
 811         ret_val = hw->nvm.ops.write(hw, first_word,
 812                                     last_word - first_word + 1, eeprom_buff);
 813
 814         /* Update the checksum if nvm write succeeded */
 815         if (ret_val == 0)
 816                 hw->nvm.ops.update(hw);
 817
 818         igb_set_fw_version(adapter);
 819         kfree(eeprom_buff);
 820         return ret_val;
 821 }
 822
 823 static void igb_get_drvinfo(struct net_device *netdev,
 824                             struct ethtool_drvinfo *drvinfo)
 825 {
 826         struct igb_adapter *adapter = netdev_priv(netdev);
 827
 828         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 829         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 830
 831         /* EEPROM image version # is reported as firmware version # for
 832          * 82575 controllers
 833          */
 834         strlcpy(drvinfo->fw_version, adapter->fw_version,
 835                 sizeof(drvinfo->fw_version));
 836         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 837                 sizeof(drvinfo->bus_info));
 838         drvinfo->n_stats = IGB_STATS_LEN;
 839         drvinfo->testinfo_len = IGB_TEST_LEN;
 840         drvinfo->regdump_len = igb_get_regs_len(netdev);
 841         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 842 }
 843
 844 static void igb_get_ringparam(struct net_device *netdev,
 845                               struct ethtool_ringparam *ring)
 846 {
 847         struct igb_adapter *adapter = netdev_priv(netdev);
 848
 849         ring->rx_max_pending = IGB_MAX_RXD;
 850         ring->tx_max_pending = IGB_MAX_TXD;
 851         ring->rx_pending = adapter->rx_ring_count;
 852         ring->tx_pending = adapter->tx_ring_count;
 853 }
 854
 855 static int igb_set_ringparam(struct net_device *netdev,
 856                              struct ethtool_ringparam *ring)
 857 {
 858         struct igb_adapter *adapter = netdev_priv(netdev);
 859         struct igb_ring *temp_ring;
 860         int i, err = 0;
 861         u16 new_rx_count, new_tx_count;
 862
 863         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 864                 return -EINVAL;
 865
 866         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 867         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 868         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 869
 870         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 871         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 872         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 873
 874         if ((new_tx_count == adapter->tx_ring_count) &&
 875             (new_rx_count == adapter->rx_ring_count)) {
 876                 /* nothing to do */
 877                 return 0;
 878         }
 879
 880         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 881                 msleep(1);
 882
 883         if (!netif_running(adapter->netdev)) {
 884                 for (i = 0; i < adapter->num_tx_queues; i++)
 885                         adapter->tx_ring[i]->count = new_tx_count;
 886                 for (i = 0; i < adapter->num_rx_queues; i++)
 887                         adapter->rx_ring[i]->count = new_rx_count;
 888                 adapter->tx_ring_count = new_tx_count;
 889                 adapter->rx_ring_count = new_rx_count;
 890                 goto clear_reset;
 891         }
 892
 893         if (adapter->num_tx_queues > adapter->num_rx_queues)
 894                 temp_ring = vmalloc(adapter->num_tx_queues *
 895                                     sizeof(struct igb_ring));
 896         else
 897                 temp_ring = vmalloc(adapter->num_rx_queues *
 898                                     sizeof(struct igb_ring));
 899
 900         if (!temp_ring) {
 901                 err = -ENOMEM;
 902                 goto clear_reset;
 903         }
 904
 905         igb_down(adapter);
 906
 907         /* We can't just free everything and then setup again,
 908          * because the ISRs in MSI-X mode get passed pointers
 909          * to the Tx and Rx ring structs.
 910          */
 911         if (new_tx_count != adapter->tx_ring_count) {
 912                 for (i = 0; i < adapter->num_tx_queues; i++) {
 913                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 914                                sizeof(struct igb_ring));
 915
 916                         temp_ring[i].count = new_tx_count;
 917                         err = igb_setup_tx_resources(&temp_ring[i]);
 918                         if (err) {
 919                                 while (i) {
 920                                         i--;
 921                                         igb_free_tx_resources(&temp_ring[i]);
 922                                 }
 923                                 goto err_setup;
 924                         }
 925                 }
 926
 927                 for (i = 0; i < adapter->num_tx_queues; i++) {
 928                         igb_free_tx_resources(adapter->tx_ring[i]);
 929
 930                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 931                                sizeof(struct igb_ring));
 932                 }
 933
 934                 adapter->tx_ring_count = new_tx_count;
 935         }
 936
 937         if (new_rx_count != adapter->rx_ring_count) {
 938                 for (i = 0; i < adapter->num_rx_queues; i++) {
 939                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 940                                sizeof(struct igb_ring));
 941
 942                         temp_ring[i].count = new_rx_count;
 943                         err = igb_setup_rx_resources(&temp_ring[i]);
 944                         if (err) {
 945                                 while (i) {
 946                                         i--;
 947                                         igb_free_rx_resources(&temp_ring[i]);
 948                                 }
 949                                 goto err_setup;
 950                         }
 951
 952                 }
 953
 954                 for (i = 0; i < adapter->num_rx_queues; i++) {
 955                         igb_free_rx_resources(adapter->rx_ring[i]);
 956
 957                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 958                                sizeof(struct igb_ring));
 959                 }
 960
 961                 adapter->rx_ring_count = new_rx_count;
 962         }
 963 err_setup:
 964         igb_up(adapter);
 965         vfree(temp_ring);
 966 clear_reset:
 967         clear_bit(__IGB_RESETTING, &adapter->state);
 968         return err;
 969 }
 970
 971 /* ethtool register test data */
 972 struct igb_reg_test {
 973         u16 reg;
 974         u16 reg_offset;
 975         u16 array_len;
 976         u16 test_type;
 977         u32 mask;
 978         u32 write;
 979 };
 980
 981 /* In the hardware, registers are laid out either singly, in arrays
 982  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 983  * most tests take place on arrays or single registers (handled
 984  * as a single-element array) and special-case the tables.
 985  * Table tests are always pattern tests.
 986  *
 987  * We also make provision for some required setup steps by specifying
 988  * registers to be written without any read-back testing.
 989  */
 990
 991 #define PATTERN_TEST    1
 992 #define SET_READ_TEST   2
 993 #define WRITE_NO_TEST   3
 994 #define TABLE32_TEST    4
 995 #define TABLE64_TEST_LO 5
 996 #define TABLE64_TEST_HI 6
 997
 998 /* i210 reg test */
 999 static struct igb_reg_test reg_test_i210[] = {
1000         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1001         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1002         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1003         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1004         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1005         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1006         /* RDH is read-only for i210, only test RDT. */
1007         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1008         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1009         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1010         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1011         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1012         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1013         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1014         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1015         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1016         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1017         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1018         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1019         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1020                                                 0xFFFFFFFF, 0xFFFFFFFF },
1021         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1022                                                 0x900FFFFF, 0xFFFFFFFF },
1023         { E1000_MTA,       0, 128, TABLE32_TEST,
1024                                                 0xFFFFFFFF, 0xFFFFFFFF },
1025         { 0, 0, 0, 0, 0 }
1026 };
1027
1028 /* i350 reg test */
1029 static struct igb_reg_test reg_test_i350[] = {
1030         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1031         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1032         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1033         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1034         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1035         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1036         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1037         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1038         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1039         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1040         /* RDH is read-only for i350, only test RDT. */
1041         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1042         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1043         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1044         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1045         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1046         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1047         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1048         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1049         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1050         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1051         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1052         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1053         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1054         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1055         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1056         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1057         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1058         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1059                                                 0xFFFFFFFF, 0xFFFFFFFF },
1060         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1061                                                 0xC3FFFFFF, 0xFFFFFFFF },
1062         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1063                                                 0xFFFFFFFF, 0xFFFFFFFF },
1064         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1065                                                 0xC3FFFFFF, 0xFFFFFFFF },
1066         { E1000_MTA,       0, 128, TABLE32_TEST,
1067                                                 0xFFFFFFFF, 0xFFFFFFFF },
1068         { 0, 0, 0, 0 }
1069 };
1070
1071 /* 82580 reg test */
1072 static struct igb_reg_test reg_test_82580[] = {
1073         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1074         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1075         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1076         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1077         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1078         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1079         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1080         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1081         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1082         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1083         /* RDH is read-only for 82580, only test RDT. */
1084         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1085         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1086         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1087         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1088         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1089         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1090         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1091         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1092         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1093         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1094         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1095         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1096         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1097         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1098         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1099         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1100         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1101         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1102                                                 0xFFFFFFFF, 0xFFFFFFFF },
1103         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1104                                                 0x83FFFFFF, 0xFFFFFFFF },
1105         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1106                                                 0xFFFFFFFF, 0xFFFFFFFF },
1107         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1108                                                 0x83FFFFFF, 0xFFFFFFFF },
1109         { E1000_MTA,       0, 128, TABLE32_TEST,
1110                                                 0xFFFFFFFF, 0xFFFFFFFF },
1111         { 0, 0, 0, 0 }
1112 };
1113
1114 /* 82576 reg test */
1115 static struct igb_reg_test reg_test_82576[] = {
1116         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1117         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1118         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1119         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1120         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1121         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1122         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1123         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1124         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1125         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1126         /* Enable all RX queues before testing. */
1127         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1128         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1129         /* RDH is read-only for 82576, only test RDT. */
1130         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1131         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1132         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1133         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1134         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1135         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1136         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1137         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1138         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1139         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1140         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1141         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1142         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1143         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1144         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1145         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1146         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1147         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1148         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1149         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1150         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1151         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1152         { 0, 0, 0, 0 }
1153 };
1154
1155 /* 82575 register test */
1156 static struct igb_reg_test reg_test_82575[] = {
1157         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1158         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1159         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1160         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1161         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1162         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1163         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1164         /* Enable all four RX queues before testing. */
1165         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1166         /* RDH is read-only for 82575, only test RDT. */
1167         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1168         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1169         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1170         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1171         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1172         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1173         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1174         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1175         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1176         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1177         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1178         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1179         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1180         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1181         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1182         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1183         { 0, 0, 0, 0 }
1184 };
1185
1186 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1187                              int reg, u32 mask, u32 write)
1188 {
1189         struct e1000_hw *hw = &adapter->hw;
1190         u32 pat, val;
1191         static const u32 _test[] =
1192                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1193         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1194                 wr32(reg, (_test[pat] & write));
1195                 val = rd32(reg) & mask;
1196                 if (val != (_test[pat] & write & mask)) {
1197                         dev_err(&adapter->pdev->dev,
1198                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1199                                 reg, val, (_test[pat] & write & mask));
1200                         *data = reg;
1201                         return 1;
1202                 }
1203         }
1204
1205         return 0;
1206 }
1207
1208 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1209                               int reg, u32 mask, u32 write)
1210 {
1211         struct e1000_hw *hw = &adapter->hw;
1212         u32 val;
1213         wr32(reg, write & mask);
1214         val = rd32(reg);
1215         if ((write & mask) != (val & mask)) {
1216                 dev_err(&adapter->pdev->dev,
1217                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", reg,
1218                         (val & mask), (write & mask));
1219                 *data = reg;
1220                 return 1;
1221         }
1222
1223         return 0;
1224 }
1225
1226 #define REG_PATTERN_TEST(reg, mask, write) \
1227         do { \
1228                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1229                         return 1; \
1230         } while (0)
1231
1232 #define REG_SET_AND_CHECK(reg, mask, write) \
1233         do { \
1234                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1235                         return 1; \
1236         } while (0)
1237
1238 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1239 {
1240         struct e1000_hw *hw = &adapter->hw;
1241         struct igb_reg_test *test;
1242         u32 value, before, after;
1243         u32 i, toggle;
1244
1245         switch (adapter->hw.mac.type) {
1246         case e1000_i350:
1247         case e1000_i354:
1248                 test = reg_test_i350;
1249                 toggle = 0x7FEFF3FF;
1250                 break;
1251         case e1000_i210:
1252         case e1000_i211:
1253                 test = reg_test_i210;
1254                 toggle = 0x7FEFF3FF;
1255                 break;
1256         case e1000_82580:
1257                 test = reg_test_82580;
1258                 toggle = 0x7FEFF3FF;
1259                 break;
1260         case e1000_82576:
1261                 test = reg_test_82576;
1262                 toggle = 0x7FFFF3FF;
1263                 break;
1264         default:
1265                 test = reg_test_82575;
1266                 toggle = 0x7FFFF3FF;
1267                 break;
1268         }
1269
1270         /* Because the status register is such a special case,
1271          * we handle it separately from the rest of the register
1272          * tests.  Some bits are read-only, some toggle, and some
1273          * are writable on newer MACs.
1274          */
1275         before = rd32(E1000_STATUS);
1276         value = (rd32(E1000_STATUS) & toggle);
1277         wr32(E1000_STATUS, toggle);
1278         after = rd32(E1000_STATUS) & toggle;
1279         if (value != after) {
1280                 dev_err(&adapter->pdev->dev,
1281                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1282                         after, value);
1283                 *data = 1;
1284                 return 1;
1285         }
1286         /* restore previous status */
1287         wr32(E1000_STATUS, before);
1288
1289         /* Perform the remainder of the register test, looping through
1290          * the test table until we either fail or reach the null entry.
1291          */
1292         while (test->reg) {
1293                 for (i = 0; i < test->array_len; i++) {
1294                         switch (test->test_type) {
1295                         case PATTERN_TEST:
1296                                 REG_PATTERN_TEST(test->reg +
1297                                                 (i * test->reg_offset),
1298                                                 test->mask,
1299                                                 test->write);
1300                                 break;
1301                         case SET_READ_TEST:
1302                                 REG_SET_AND_CHECK(test->reg +
1303                                                 (i * test->reg_offset),
1304                                                 test->mask,
1305                                                 test->write);
1306                                 break;
1307                         case WRITE_NO_TEST:
1308                                 writel(test->write,
1309                                     (adapter->hw.hw_addr + test->reg)
1310                                         + (i * test->reg_offset));
1311                                 break;
1312                         case TABLE32_TEST:
1313                                 REG_PATTERN_TEST(test->reg + (i * 4),
1314                                                 test->mask,
1315                                                 test->write);
1316                                 break;
1317                         case TABLE64_TEST_LO:
1318                                 REG_PATTERN_TEST(test->reg + (i * 8),
1319                                                 test->mask,
1320                                                 test->write);
1321                                 break;
1322                         case TABLE64_TEST_HI:
1323                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1324                                                 test->mask,
1325                                                 test->write);
1326                                 break;
1327                         }
1328                 }
1329                 test++;
1330         }
1331
1332         *data = 0;
1333         return 0;
1334 }
1335
1336 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1337 {
1338         *data = 0;
1339
1340         /* Validate eeprom on all parts but i211 */
1341         if (adapter->hw.mac.type != e1000_i211) {
1342                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1343                         *data = 2;
1344         }
1345
1346         return *data;
1347 }
1348
1349 static irqreturn_t igb_test_intr(int irq, void *data)
1350 {
1351         struct igb_adapter *adapter = (struct igb_adapter *) data;
1352         struct e1000_hw *hw = &adapter->hw;
1353
1354         adapter->test_icr |= rd32(E1000_ICR);
1355
1356         return IRQ_HANDLED;
1357 }
1358
1359 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1360 {
1361         struct e1000_hw *hw = &adapter->hw;
1362         struct net_device *netdev = adapter->netdev;
1363         u32 mask, ics_mask, i = 0, shared_int = true;
1364         u32 irq = adapter->pdev->irq;
1365
1366         *data = 0;
1367
1368         /* Hook up test interrupt handler just for this test */
1369         if (adapter->msix_entries) {
1370                 if (request_irq(adapter->msix_entries[0].vector,
1371                                 igb_test_intr, 0, netdev->name, adapter)) {
1372                         *data = 1;
1373                         return -1;
1374                 }
1375         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1376                 shared_int = false;
1377                 if (request_irq(irq,
1378                                 igb_test_intr, 0, netdev->name, adapter)) {
1379                         *data = 1;
1380                         return -1;
1381                 }
1382         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1383                                 netdev->name, adapter)) {
1384                 shared_int = false;
1385         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1386                  netdev->name, adapter)) {
1387                 *data = 1;
1388                 return -1;
1389         }
1390         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1391                 (shared_int ? "shared" : "unshared"));
1392
1393         /* Disable all the interrupts */
1394         wr32(E1000_IMC, ~0);
1395         wrfl();
1396         msleep(10);
1397
1398         /* Define all writable bits for ICS */
1399         switch (hw->mac.type) {
1400         case e1000_82575:
1401                 ics_mask = 0x37F47EDD;
1402                 break;
1403         case e1000_82576:
1404                 ics_mask = 0x77D4FBFD;
1405                 break;
1406         case e1000_82580:
1407                 ics_mask = 0x77DCFED5;
1408                 break;
1409         case e1000_i350:
1410         case e1000_i354:
1411         case e1000_i210:
1412         case e1000_i211:
1413                 ics_mask = 0x77DCFED5;
1414                 break;
1415         default:
1416                 ics_mask = 0x7FFFFFFF;
1417                 break;
1418         }
1419
1420         /* Test each interrupt */
1421         for (; i < 31; i++) {
1422                 /* Interrupt to test */
1423                 mask = 1 << i;
1424
1425                 if (!(mask & ics_mask))
1426                         continue;
1427
1428                 if (!shared_int) {
1429                         /* Disable the interrupt to be reported in
1430                          * the cause register and then force the same
1431                          * interrupt and see if one gets posted.  If
1432                          * an interrupt was posted to the bus, the
1433                          * test failed.
1434                          */
1435                         adapter->test_icr = 0;
1436
1437                         /* Flush any pending interrupts */
1438                         wr32(E1000_ICR, ~0);
1439
1440                         wr32(E1000_IMC, mask);
1441                         wr32(E1000_ICS, mask);
1442                         wrfl();
1443                         msleep(10);
1444
1445                         if (adapter->test_icr & mask) {
1446                                 *data = 3;
1447                                 break;
1448                         }
1449                 }
1450
1451                 /* Enable the interrupt to be reported in
1452                  * the cause register and then force the same
1453                  * interrupt and see if one gets posted.  If
1454                  * an interrupt was not posted to the bus, the
1455                  * test failed.
1456                  */
1457                 adapter->test_icr = 0;
1458
1459                 /* Flush any pending interrupts */
1460                 wr32(E1000_ICR, ~0);
1461
1462                 wr32(E1000_IMS, mask);
1463                 wr32(E1000_ICS, mask);
1464                 wrfl();
1465                 msleep(10);
1466
1467                 if (!(adapter->test_icr & mask)) {
1468                         *data = 4;
1469                         break;
1470                 }
1471
1472                 if (!shared_int) {
1473                         /* Disable the other interrupts to be reported in
1474                          * the cause register and then force the other
1475                          * interrupts and see if any get posted.  If
1476                          * an interrupt was posted to the bus, the
1477                          * test failed.
1478                          */
1479                         adapter->test_icr = 0;
1480
1481                         /* Flush any pending interrupts */
1482                         wr32(E1000_ICR, ~0);
1483
1484                         wr32(E1000_IMC, ~mask);
1485                         wr32(E1000_ICS, ~mask);
1486                         wrfl();
1487                         msleep(10);
1488
1489                         if (adapter->test_icr & mask) {
1490                                 *data = 5;
1491                                 break;
1492                         }
1493                 }
1494         }
1495
1496         /* Disable all the interrupts */
1497         wr32(E1000_IMC, ~0);
1498         wrfl();
1499         msleep(10);
1500
1501         /* Unhook test interrupt handler */
1502         if (adapter->msix_entries)
1503                 free_irq(adapter->msix_entries[0].vector, adapter);
1504         else
1505                 free_irq(irq, adapter);
1506
1507         return *data;
1508 }
1509
1510 static void igb_free_desc_rings(struct igb_adapter *adapter)
1511 {
1512         igb_free_tx_resources(&adapter->test_tx_ring);
1513         igb_free_rx_resources(&adapter->test_rx_ring);
1514 }
1515
1516 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1517 {
1518         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1519         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1520         struct e1000_hw *hw = &adapter->hw;
1521         int ret_val;
1522
1523         /* Setup Tx descriptor ring and Tx buffers */
1524         tx_ring->count = IGB_DEFAULT_TXD;
1525         tx_ring->dev = &adapter->pdev->dev;
1526         tx_ring->netdev = adapter->netdev;
1527         tx_ring->reg_idx = adapter->vfs_allocated_count;
1528
1529         if (igb_setup_tx_resources(tx_ring)) {
1530                 ret_val = 1;
1531                 goto err_nomem;
1532         }
1533
1534         igb_setup_tctl(adapter);
1535         igb_configure_tx_ring(adapter, tx_ring);
1536
1537         /* Setup Rx descriptor ring and Rx buffers */
1538         rx_ring->count = IGB_DEFAULT_RXD;
1539         rx_ring->dev = &adapter->pdev->dev;
1540         rx_ring->netdev = adapter->netdev;
1541         rx_ring->reg_idx = adapter->vfs_allocated_count;
1542
1543         if (igb_setup_rx_resources(rx_ring)) {
1544                 ret_val = 3;
1545                 goto err_nomem;
1546         }
1547
1548         /* set the default queue to queue 0 of PF */
1549         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1550
1551         /* enable receive ring */
1552         igb_setup_rctl(adapter);
1553         igb_configure_rx_ring(adapter, rx_ring);
1554
1555         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1556
1557         return 0;
1558
1559 err_nomem:
1560         igb_free_desc_rings(adapter);
1561         return ret_val;
1562 }
1563
1564 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1565 {
1566         struct e1000_hw *hw = &adapter->hw;
1567
1568         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1569         igb_write_phy_reg(hw, 29, 0x001F);
1570         igb_write_phy_reg(hw, 30, 0x8FFC);
1571         igb_write_phy_reg(hw, 29, 0x001A);
1572         igb_write_phy_reg(hw, 30, 0x8FF0);
1573 }
1574
1575 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1576 {
1577         struct e1000_hw *hw = &adapter->hw;
1578         u32 ctrl_reg = 0;
1579
1580         hw->mac.autoneg = false;
1581
1582         if (hw->phy.type == e1000_phy_m88) {
1583                 if (hw->phy.id != I210_I_PHY_ID) {
1584                         /* Auto-MDI/MDIX Off */
1585                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1586                         /* reset to update Auto-MDI/MDIX */
1587                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1588                         /* autoneg off */
1589                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1590                 } else {
1591                         /* force 1000, set loopback  */
1592                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1593                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1594                 }
1595         }
1596
1597         /* add small delay to avoid loopback test failure */
1598         msleep(50);
1599
1600         /* force 1000, set loopback */
1601         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1602
1603         /* Now set up the MAC to the same speed/duplex as the PHY. */
1604         ctrl_reg = rd32(E1000_CTRL);
1605         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1606         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1607                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1608                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1609                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1610                      E1000_CTRL_SLU);    /* Set link up enable bit */
1611
1612         if (hw->phy.type == e1000_phy_m88)
1613                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1614
1615         wr32(E1000_CTRL, ctrl_reg);
1616
1617         /* Disable the receiver on the PHY so when a cable is plugged in, the
1618          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1619          */
1620         if (hw->phy.type == e1000_phy_m88)
1621                 igb_phy_disable_receiver(adapter);
1622
1623         mdelay(500);
1624         return 0;
1625 }
1626
1627 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1628 {
1629         return igb_integrated_phy_loopback(adapter);
1630 }
1631
1632 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1633 {
1634         struct e1000_hw *hw = &adapter->hw;
1635         u32 reg;
1636
1637         reg = rd32(E1000_CTRL_EXT);
1638
1639         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1640         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1641                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1642                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1643                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1644                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1645
1646                         /* Enable DH89xxCC MPHY for near end loopback */
1647                         reg = rd32(E1000_MPHY_ADDR_CTL);
1648                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1649                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1650                         wr32(E1000_MPHY_ADDR_CTL, reg);
1651
1652                         reg = rd32(E1000_MPHY_DATA);
1653                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1654                         wr32(E1000_MPHY_DATA, reg);
1655                 }
1656
1657                 reg = rd32(E1000_RCTL);
1658                 reg |= E1000_RCTL_LBM_TCVR;
1659                 wr32(E1000_RCTL, reg);
1660
1661                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1662
1663                 reg = rd32(E1000_CTRL);
1664                 reg &= ~(E1000_CTRL_RFCE |
1665                          E1000_CTRL_TFCE |
1666                          E1000_CTRL_LRST);
1667                 reg |= E1000_CTRL_SLU |
1668                        E1000_CTRL_FD;
1669                 wr32(E1000_CTRL, reg);
1670
1671                 /* Unset switch control to serdes energy detect */
1672                 reg = rd32(E1000_CONNSW);
1673                 reg &= ~E1000_CONNSW_ENRGSRC;
1674                 wr32(E1000_CONNSW, reg);
1675
1676                 /* Unset sigdetect for SERDES loopback on
1677                  * 82580 and newer devices.
1678                  */
1679                 if (hw->mac.type >= e1000_82580) {
1680                         reg = rd32(E1000_PCS_CFG0);
1681                         reg |= E1000_PCS_CFG_IGN_SD;
1682                         wr32(E1000_PCS_CFG0, reg);
1683                 }
1684
1685                 /* Set PCS register for forced speed */
1686                 reg = rd32(E1000_PCS_LCTL);
1687                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1688                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1689                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1690                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1691                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1692                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1693                 wr32(E1000_PCS_LCTL, reg);
1694
1695                 return 0;
1696         }
1697
1698         return igb_set_phy_loopback(adapter);
1699 }
1700
1701 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1702 {
1703         struct e1000_hw *hw = &adapter->hw;
1704         u32 rctl;
1705         u16 phy_reg;
1706
1707         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1708         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1709         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1710         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1711                 u32 reg;
1712
1713                 /* Disable near end loopback on DH89xxCC */
1714                 reg = rd32(E1000_MPHY_ADDR_CTL);
1715                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1716                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1717                 wr32(E1000_MPHY_ADDR_CTL, reg);
1718
1719                 reg = rd32(E1000_MPHY_DATA);
1720                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1721                 wr32(E1000_MPHY_DATA, reg);
1722         }
1723
1724         rctl = rd32(E1000_RCTL);
1725         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1726         wr32(E1000_RCTL, rctl);
1727
1728         hw->mac.autoneg = true;
1729         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1730         if (phy_reg & MII_CR_LOOPBACK) {
1731                 phy_reg &= ~MII_CR_LOOPBACK;
1732                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1733                 igb_phy_sw_reset(hw);
1734         }
1735 }
1736
1737 static void igb_create_lbtest_frame(struct sk_buff *skb,
1738                                     unsigned int frame_size)
1739 {
1740         memset(skb->data, 0xFF, frame_size);
1741         frame_size /= 2;
1742         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1743         memset(&skb->data[frame_size + 10], 0xBE, 1);
1744         memset(&skb->data[frame_size + 12], 0xAF, 1);
1745 }
1746
1747 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1748                                   unsigned int frame_size)
1749 {
1750         unsigned char *data;
1751         bool match = true;
1752
1753         frame_size >>= 1;
1754
1755         data = kmap(rx_buffer->page);
1756
1757         if (data[3] != 0xFF ||
1758             data[frame_size + 10] != 0xBE ||
1759             data[frame_size + 12] != 0xAF)
1760                 match = false;
1761
1762         kunmap(rx_buffer->page);
1763
1764         return match;
1765 }
1766
1767 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1768                                 struct igb_ring *tx_ring,
1769                                 unsigned int size)
1770 {
1771         union e1000_adv_rx_desc *rx_desc;
1772         struct igb_rx_buffer *rx_buffer_info;
1773         struct igb_tx_buffer *tx_buffer_info;
1774         u16 rx_ntc, tx_ntc, count = 0;
1775
1776         /* initialize next to clean and descriptor values */
1777         rx_ntc = rx_ring->next_to_clean;
1778         tx_ntc = tx_ring->next_to_clean;
1779         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1780
1781         while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1782                 /* check Rx buffer */
1783                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1784
1785                 /* sync Rx buffer for CPU read */
1786                 dma_sync_single_for_cpu(rx_ring->dev,
1787                                         rx_buffer_info->dma,
1788                                         IGB_RX_BUFSZ,
1789                                         DMA_FROM_DEVICE);
1790
1791                 /* verify contents of skb */
1792                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1793                         count++;
1794
1795                 /* sync Rx buffer for device write */
1796                 dma_sync_single_for_device(rx_ring->dev,
1797                                            rx_buffer_info->dma,
1798                                            IGB_RX_BUFSZ,
1799                                            DMA_FROM_DEVICE);
1800
1801                 /* unmap buffer on Tx side */
1802                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1803                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1804
1805                 /* increment Rx/Tx next to clean counters */
1806                 rx_ntc++;
1807                 if (rx_ntc == rx_ring->count)
1808                         rx_ntc = 0;
1809                 tx_ntc++;
1810                 if (tx_ntc == tx_ring->count)
1811                         tx_ntc = 0;
1812
1813                 /* fetch next descriptor */
1814                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1815         }
1816
1817         netdev_tx_reset_queue(txring_txq(tx_ring));
1818
1819         /* re-map buffers to ring, store next to clean values */
1820         igb_alloc_rx_buffers(rx_ring, count);
1821         rx_ring->next_to_clean = rx_ntc;
1822         tx_ring->next_to_clean = tx_ntc;
1823
1824         return count;
1825 }
1826
1827 static int igb_run_loopback_test(struct igb_adapter *adapter)
1828 {
1829         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1830         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1831         u16 i, j, lc, good_cnt;
1832         int ret_val = 0;
1833         unsigned int size = IGB_RX_HDR_LEN;
1834         netdev_tx_t tx_ret_val;
1835         struct sk_buff *skb;
1836
1837         /* allocate test skb */
1838         skb = alloc_skb(size, GFP_KERNEL);
1839         if (!skb)
1840                 return 11;
1841
1842         /* place data into test skb */
1843         igb_create_lbtest_frame(skb, size);
1844         skb_put(skb, size);
1845
1846         /* Calculate the loop count based on the largest descriptor ring
1847          * The idea is to wrap the largest ring a number of times using 64
1848          * send/receive pairs during each loop
1849          */
1850
1851         if (rx_ring->count <= tx_ring->count)
1852                 lc = ((tx_ring->count / 64) * 2) + 1;
1853         else
1854                 lc = ((rx_ring->count / 64) * 2) + 1;
1855
1856         for (j = 0; j <= lc; j++) { /* loop count loop */
1857                 /* reset count of good packets */
1858                 good_cnt = 0;
1859
1860                 /* place 64 packets on the transmit queue*/
1861                 for (i = 0; i < 64; i++) {
1862                         skb_get(skb);
1863                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1864                         if (tx_ret_val == NETDEV_TX_OK)
1865                                 good_cnt++;
1866                 }
1867
1868                 if (good_cnt != 64) {
1869                         ret_val = 12;
1870                         break;
1871                 }
1872
1873                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1874                 msleep(200);
1875
1876                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1877                 if (good_cnt != 64) {
1878                         ret_val = 13;
1879                         break;
1880                 }
1881         } /* end loop count loop */
1882
1883         /* free the original skb */
1884         kfree_skb(skb);
1885
1886         return ret_val;
1887 }
1888
1889 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1890 {
1891         /* PHY loopback cannot be performed if SoL/IDER
1892          * sessions are active
1893          */
1894         if (igb_check_reset_block(&adapter->hw)) {
1895                 dev_err(&adapter->pdev->dev,
1896                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1897                 *data = 0;
1898                 goto out;
1899         }
1900
1901         if (adapter->hw.mac.type == e1000_i354) {
1902                 dev_info(&adapter->pdev->dev,
1903                         "Loopback test not supported on i354.\n");
1904                 *data = 0;
1905                 goto out;
1906         }
1907         *data = igb_setup_desc_rings(adapter);
1908         if (*data)
1909                 goto out;
1910         *data = igb_setup_loopback_test(adapter);
1911         if (*data)
1912                 goto err_loopback;
1913         *data = igb_run_loopback_test(adapter);
1914         igb_loopback_cleanup(adapter);
1915
1916 err_loopback:
1917         igb_free_desc_rings(adapter);
1918 out:
1919         return *data;
1920 }
1921
1922 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1923 {
1924         struct e1000_hw *hw = &adapter->hw;
1925         *data = 0;
1926         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1927                 int i = 0;
1928                 hw->mac.serdes_has_link = false;
1929
1930                 /* On some blade server designs, link establishment
1931                  * could take as long as 2-3 minutes
1932                  */
1933                 do {
1934                         hw->mac.ops.check_for_link(&adapter->hw);
1935                         if (hw->mac.serdes_has_link)
1936                                 return *data;
1937                         msleep(20);
1938                 } while (i++ < 3750);
1939
1940                 *data = 1;
1941         } else {
1942                 hw->mac.ops.check_for_link(&adapter->hw);
1943                 if (hw->mac.autoneg)
1944                         msleep(5000);
1945
1946                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1947                         *data = 1;
1948         }
1949         return *data;
1950 }
1951
1952 static void igb_diag_test(struct net_device *netdev,
1953                           struct ethtool_test *eth_test, u64 *data)
1954 {
1955         struct igb_adapter *adapter = netdev_priv(netdev);
1956         u16 autoneg_advertised;
1957         u8 forced_speed_duplex, autoneg;
1958         bool if_running = netif_running(netdev);
1959
1960         set_bit(__IGB_TESTING, &adapter->state);
1961         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1962                 /* Offline tests */
1963
1964                 /* save speed, duplex, autoneg settings */
1965                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1966                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1967                 autoneg = adapter->hw.mac.autoneg;
1968
1969                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1970
1971                 /* power up link for link test */
1972                 igb_power_up_link(adapter);
1973
1974                 /* Link test performed before hardware reset so autoneg doesn't
1975                  * interfere with test result
1976                  */
1977                 if (igb_link_test(adapter, &data[4]))
1978                         eth_test->flags |= ETH_TEST_FL_FAILED;
1979
1980                 if (if_running)
1981                         /* indicate we're in test mode */
1982                         dev_close(netdev);
1983                 else
1984                         igb_reset(adapter);
1985
1986                 if (igb_reg_test(adapter, &data[0]))
1987                         eth_test->flags |= ETH_TEST_FL_FAILED;
1988
1989                 igb_reset(adapter);
1990                 if (igb_eeprom_test(adapter, &data[1]))
1991                         eth_test->flags |= ETH_TEST_FL_FAILED;
1992
1993                 igb_reset(adapter);
1994                 if (igb_intr_test(adapter, &data[2]))
1995                         eth_test->flags |= ETH_TEST_FL_FAILED;
1996
1997                 igb_reset(adapter);
1998                 /* power up link for loopback test */
1999                 igb_power_up_link(adapter);
2000                 if (igb_loopback_test(adapter, &data[3]))
2001                         eth_test->flags |= ETH_TEST_FL_FAILED;
2002
2003                 /* restore speed, duplex, autoneg settings */
2004                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2005                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2006                 adapter->hw.mac.autoneg = autoneg;
2007
2008                 /* force this routine to wait until autoneg complete/timeout */
2009                 adapter->hw.phy.autoneg_wait_to_complete = true;
2010                 igb_reset(adapter);
2011                 adapter->hw.phy.autoneg_wait_to_complete = false;
2012
2013                 clear_bit(__IGB_TESTING, &adapter->state);
2014                 if (if_running)
2015                         dev_open(netdev);
2016         } else {
2017                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2018
2019                 /* PHY is powered down when interface is down */
2020                 if (if_running && igb_link_test(adapter, &data[4]))
2021                         eth_test->flags |= ETH_TEST_FL_FAILED;
2022                 else
2023                         data[4] = 0;
2024
2025                 /* Online tests aren't run; pass by default */
2026                 data[0] = 0;
2027                 data[1] = 0;
2028                 data[2] = 0;
2029                 data[3] = 0;
2030
2031                 clear_bit(__IGB_TESTING, &adapter->state);
2032         }
2033         msleep_interruptible(4 * 1000);
2034 }
2035
2036 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2037 {
2038         struct igb_adapter *adapter = netdev_priv(netdev);
2039
2040         wol->supported = WAKE_UCAST | WAKE_MCAST |
2041                          WAKE_BCAST | WAKE_MAGIC |
2042                          WAKE_PHY;
2043         wol->wolopts = 0;
2044
2045         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2046                 return;
2047
2048         /* apply any specific unsupported masks here */
2049         switch (adapter->hw.device_id) {
2050         default:
2051                 break;
2052         }
2053
2054         if (adapter->wol & E1000_WUFC_EX)
2055                 wol->wolopts |= WAKE_UCAST;
2056         if (adapter->wol & E1000_WUFC_MC)
2057                 wol->wolopts |= WAKE_MCAST;
2058         if (adapter->wol & E1000_WUFC_BC)
2059                 wol->wolopts |= WAKE_BCAST;
2060         if (adapter->wol & E1000_WUFC_MAG)
2061                 wol->wolopts |= WAKE_MAGIC;
2062         if (adapter->wol & E1000_WUFC_LNKC)
2063                 wol->wolopts |= WAKE_PHY;
2064 }
2065
2066 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2067 {
2068         struct igb_adapter *adapter = netdev_priv(netdev);
2069
2070         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2071                 return -EOPNOTSUPP;
2072
2073         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2074                 return wol->wolopts ? -EOPNOTSUPP : 0;
2075
2076         /* these settings will always override what we currently have */
2077         adapter->wol = 0;
2078
2079         if (wol->wolopts & WAKE_UCAST)
2080                 adapter->wol |= E1000_WUFC_EX;
2081         if (wol->wolopts & WAKE_MCAST)
2082                 adapter->wol |= E1000_WUFC_MC;
2083         if (wol->wolopts & WAKE_BCAST)
2084                 adapter->wol |= E1000_WUFC_BC;
2085         if (wol->wolopts & WAKE_MAGIC)
2086                 adapter->wol |= E1000_WUFC_MAG;
2087         if (wol->wolopts & WAKE_PHY)
2088                 adapter->wol |= E1000_WUFC_LNKC;
2089         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2090
2091         return 0;
2092 }
2093
2094 /* bit defines for adapter->led_status */
2095 #define IGB_LED_ON              0
2096
2097 static int igb_set_phys_id(struct net_device *netdev,
2098                            enum ethtool_phys_id_state state)
2099 {
2100         struct igb_adapter *adapter = netdev_priv(netdev);
2101         struct e1000_hw *hw = &adapter->hw;
2102
2103         switch (state) {
2104         case ETHTOOL_ID_ACTIVE:
2105                 igb_blink_led(hw);
2106                 return 2;
2107         case ETHTOOL_ID_ON:
2108                 igb_blink_led(hw);
2109                 break;
2110         case ETHTOOL_ID_OFF:
2111                 igb_led_off(hw);
2112                 break;
2113         case ETHTOOL_ID_INACTIVE:
2114                 igb_led_off(hw);
2115                 clear_bit(IGB_LED_ON, &adapter->led_status);
2116                 igb_cleanup_led(hw);
2117                 break;
2118         }
2119
2120         return 0;
2121 }
2122
2123 static int igb_set_coalesce(struct net_device *netdev,
2124                             struct ethtool_coalesce *ec)
2125 {
2126         struct igb_adapter *adapter = netdev_priv(netdev);
2127         int i;
2128
2129         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2130             ((ec->rx_coalesce_usecs > 3) &&
2131              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2132             (ec->rx_coalesce_usecs == 2))
2133                 return -EINVAL;
2134
2135         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2136             ((ec->tx_coalesce_usecs > 3) &&
2137              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2138             (ec->tx_coalesce_usecs == 2))
2139                 return -EINVAL;
2140
2141         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2142                 return -EINVAL;
2143
2144         /* If ITR is disabled, disable DMAC */
2145         if (ec->rx_coalesce_usecs == 0) {
2146                 if (adapter->flags & IGB_FLAG_DMAC)
2147                         adapter->flags &= ~IGB_FLAG_DMAC;
2148         }
2149
2150         /* convert to rate of irq's per second */
2151         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2152                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2153         else
2154                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2155
2156         /* convert to rate of irq's per second */
2157         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2158                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2159         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2160                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2161         else
2162                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2163
2164         for (i = 0; i < adapter->num_q_vectors; i++) {
2165                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2166                 q_vector->tx.work_limit = adapter->tx_work_limit;
2167                 if (q_vector->rx.ring)
2168                         q_vector->itr_val = adapter->rx_itr_setting;
2169                 else
2170                         q_vector->itr_val = adapter->tx_itr_setting;
2171                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2172                         q_vector->itr_val = IGB_START_ITR;
2173                 q_vector->set_itr = 1;
2174         }
2175
2176         return 0;
2177 }
2178
2179 static int igb_get_coalesce(struct net_device *netdev,
2180                             struct ethtool_coalesce *ec)
2181 {
2182         struct igb_adapter *adapter = netdev_priv(netdev);
2183
2184         if (adapter->rx_itr_setting <= 3)
2185                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2186         else
2187                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2188
2189         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2190                 if (adapter->tx_itr_setting <= 3)
2191                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2192                 else
2193                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2194         }
2195
2196         return 0;
2197 }
2198
2199 static int igb_nway_reset(struct net_device *netdev)
2200 {
2201         struct igb_adapter *adapter = netdev_priv(netdev);
2202         if (netif_running(netdev))
2203                 igb_reinit_locked(adapter);
2204         return 0;
2205 }
2206
2207 static int igb_get_sset_count(struct net_device *netdev, int sset)
2208 {
2209         switch (sset) {
2210         case ETH_SS_STATS:
2211                 return IGB_STATS_LEN;
2212         case ETH_SS_TEST:
2213                 return IGB_TEST_LEN;
2214         default:
2215                 return -ENOTSUPP;
2216         }
2217 }
2218
2219 static void igb_get_ethtool_stats(struct net_device *netdev,
2220                                   struct ethtool_stats *stats, u64 *data)
2221 {
2222         struct igb_adapter *adapter = netdev_priv(netdev);
2223         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2224         unsigned int start;
2225         struct igb_ring *ring;
2226         int i, j;
2227         char *p;
2228
2229         spin_lock(&adapter->stats64_lock);
2230         igb_update_stats(adapter, net_stats);
2231
2232         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2233                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2234                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2235                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2236         }
2237         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2238                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2239                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2240                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2241         }
2242         for (j = 0; j < adapter->num_tx_queues; j++) {
2243                 u64     restart2;
2244
2245                 ring = adapter->tx_ring[j];
2246                 do {
2247                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
2248                         data[i]   = ring->tx_stats.packets;
2249                         data[i+1] = ring->tx_stats.bytes;
2250                         data[i+2] = ring->tx_stats.restart_queue;
2251                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
2252                 do {
2253                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp2);
2254                         restart2  = ring->tx_stats.restart_queue2;
2255                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start));
2256                 data[i+2] += restart2;
2257
2258                 i += IGB_TX_QUEUE_STATS_LEN;
2259         }
2260         for (j = 0; j < adapter->num_rx_queues; j++) {
2261                 ring = adapter->rx_ring[j];
2262                 do {
2263                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
2264                         data[i]   = ring->rx_stats.packets;
2265                         data[i+1] = ring->rx_stats.bytes;
2266                         data[i+2] = ring->rx_stats.drops;
2267                         data[i+3] = ring->rx_stats.csum_err;
2268                         data[i+4] = ring->rx_stats.alloc_failed;
2269                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
2270                 i += IGB_RX_QUEUE_STATS_LEN;
2271         }
2272         spin_unlock(&adapter->stats64_lock);
2273 }
2274
2275 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2276 {
2277         struct igb_adapter *adapter = netdev_priv(netdev);
2278         u8 *p = data;
2279         int i;
2280
2281         switch (stringset) {
2282         case ETH_SS_TEST:
2283                 memcpy(data, *igb_gstrings_test,
2284                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2285                 break;
2286         case ETH_SS_STATS:
2287                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2288                         memcpy(p, igb_gstrings_stats[i].stat_string,
2289                                ETH_GSTRING_LEN);
2290                         p += ETH_GSTRING_LEN;
2291                 }
2292                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2293                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2294                                ETH_GSTRING_LEN);
2295                         p += ETH_GSTRING_LEN;
2296                 }
2297                 for (i = 0; i < adapter->num_tx_queues; i++) {
2298                         sprintf(p, "tx_queue_%u_packets", i);
2299                         p += ETH_GSTRING_LEN;
2300                         sprintf(p, "tx_queue_%u_bytes", i);
2301                         p += ETH_GSTRING_LEN;
2302                         sprintf(p, "tx_queue_%u_restart", i);
2303                         p += ETH_GSTRING_LEN;
2304                 }
2305                 for (i = 0; i < adapter->num_rx_queues; i++) {
2306                         sprintf(p, "rx_queue_%u_packets", i);
2307                         p += ETH_GSTRING_LEN;
2308                         sprintf(p, "rx_queue_%u_bytes", i);
2309                         p += ETH_GSTRING_LEN;
2310                         sprintf(p, "rx_queue_%u_drops", i);
2311                         p += ETH_GSTRING_LEN;
2312                         sprintf(p, "rx_queue_%u_csum_err", i);
2313                         p += ETH_GSTRING_LEN;
2314                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2315                         p += ETH_GSTRING_LEN;
2316                 }
2317                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2318                 break;
2319         }
2320 }
2321
2322 static int igb_get_ts_info(struct net_device *dev,
2323                            struct ethtool_ts_info *info)
2324 {
2325         struct igb_adapter *adapter = netdev_priv(dev);
2326
2327         switch (adapter->hw.mac.type) {
2328         case e1000_82575:
2329                 info->so_timestamping =
2330                         SOF_TIMESTAMPING_TX_SOFTWARE |
2331                         SOF_TIMESTAMPING_RX_SOFTWARE |
2332                         SOF_TIMESTAMPING_SOFTWARE;
2333                 return 0;
2334         case e1000_82576:
2335         case e1000_82580:
2336         case e1000_i350:
2337         case e1000_i354:
2338         case e1000_i210:
2339         case e1000_i211:
2340                 info->so_timestamping =
2341                         SOF_TIMESTAMPING_TX_SOFTWARE |
2342                         SOF_TIMESTAMPING_RX_SOFTWARE |
2343                         SOF_TIMESTAMPING_SOFTWARE |
2344                         SOF_TIMESTAMPING_TX_HARDWARE |
2345                         SOF_TIMESTAMPING_RX_HARDWARE |
2346                         SOF_TIMESTAMPING_RAW_HARDWARE;
2347
2348                 if (adapter->ptp_clock)
2349                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2350                 else
2351                         info->phc_index = -1;
2352
2353                 info->tx_types =
2354                         (1 << HWTSTAMP_TX_OFF) |
2355                         (1 << HWTSTAMP_TX_ON);
2356
2357                 info->rx_filters = 1 << HWTSTAMP_FILTER_NONE;
2358
2359                 /* 82576 does not support timestamping all packets. */
2360                 if (adapter->hw.mac.type >= e1000_82580)
2361                         info->rx_filters |= 1 << HWTSTAMP_FILTER_ALL;
2362                 else
2363                         info->rx_filters |=
2364                                 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2365                                 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2366                                 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2367                                 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2368                                 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2369                                 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2370                                 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2371
2372                 return 0;
2373         default:
2374                 return -EOPNOTSUPP;
2375         }
2376 }
2377
2378 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2379                                  struct ethtool_rxnfc *cmd)
2380 {
2381         cmd->data = 0;
2382
2383         /* Report default options for RSS on igb */
2384         switch (cmd->flow_type) {
2385         case TCP_V4_FLOW:
2386                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2387         case UDP_V4_FLOW:
2388                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2389                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2390         case SCTP_V4_FLOW:
2391         case AH_ESP_V4_FLOW:
2392         case AH_V4_FLOW:
2393         case ESP_V4_FLOW:
2394         case IPV4_FLOW:
2395                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2396                 break;
2397         case TCP_V6_FLOW:
2398                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2399         case UDP_V6_FLOW:
2400                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2401                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2402         case SCTP_V6_FLOW:
2403         case AH_ESP_V6_FLOW:
2404         case AH_V6_FLOW:
2405         case ESP_V6_FLOW:
2406         case IPV6_FLOW:
2407                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2408                 break;
2409         default:
2410                 return -EINVAL;
2411         }
2412
2413         return 0;
2414 }
2415
2416 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2417                          u32 *rule_locs)
2418 {
2419         struct igb_adapter *adapter = netdev_priv(dev);
2420         int ret = -EOPNOTSUPP;
2421
2422         switch (cmd->cmd) {
2423         case ETHTOOL_GRXRINGS:
2424                 cmd->data = adapter->num_rx_queues;
2425                 ret = 0;
2426                 break;
2427         case ETHTOOL_GRXFH:
2428                 ret = igb_get_rss_hash_opts(adapter, cmd);
2429                 break;
2430         default:
2431                 break;
2432         }
2433
2434         return ret;
2435 }
2436
2437 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2438                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2439 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2440                                 struct ethtool_rxnfc *nfc)
2441 {
2442         u32 flags = adapter->flags;
2443
2444         /* RSS does not support anything other than hashing
2445          * to queues on src and dst IPs and ports
2446          */
2447         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2448                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2449                 return -EINVAL;
2450
2451         switch (nfc->flow_type) {
2452         case TCP_V4_FLOW:
2453         case TCP_V6_FLOW:
2454                 if (!(nfc->data & RXH_IP_SRC) ||
2455                     !(nfc->data & RXH_IP_DST) ||
2456                     !(nfc->data & RXH_L4_B_0_1) ||
2457                     !(nfc->data & RXH_L4_B_2_3))
2458                         return -EINVAL;
2459                 break;
2460         case UDP_V4_FLOW:
2461                 if (!(nfc->data & RXH_IP_SRC) ||
2462                     !(nfc->data & RXH_IP_DST))
2463                         return -EINVAL;
2464                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2465                 case 0:
2466                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2467                         break;
2468                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2469                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2470                         break;
2471                 default:
2472                         return -EINVAL;
2473                 }
2474                 break;
2475         case UDP_V6_FLOW:
2476                 if (!(nfc->data & RXH_IP_SRC) ||
2477                     !(nfc->data & RXH_IP_DST))
2478                         return -EINVAL;
2479                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2480                 case 0:
2481                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2482                         break;
2483                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2484                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2485                         break;
2486                 default:
2487                         return -EINVAL;
2488                 }
2489                 break;
2490         case AH_ESP_V4_FLOW:
2491         case AH_V4_FLOW:
2492         case ESP_V4_FLOW:
2493         case SCTP_V4_FLOW:
2494         case AH_ESP_V6_FLOW:
2495         case AH_V6_FLOW:
2496         case ESP_V6_FLOW:
2497         case SCTP_V6_FLOW:
2498                 if (!(nfc->data & RXH_IP_SRC) ||
2499                     !(nfc->data & RXH_IP_DST) ||
2500                     (nfc->data & RXH_L4_B_0_1) ||
2501                     (nfc->data & RXH_L4_B_2_3))
2502                         return -EINVAL;
2503                 break;
2504         default:
2505                 return -EINVAL;
2506         }
2507
2508         /* if we changed something we need to update flags */
2509         if (flags != adapter->flags) {
2510                 struct e1000_hw *hw = &adapter->hw;
2511                 u32 mrqc = rd32(E1000_MRQC);
2512
2513                 if ((flags & UDP_RSS_FLAGS) &&
2514                     !(adapter->flags & UDP_RSS_FLAGS))
2515                         dev_err(&adapter->pdev->dev,
2516                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2517
2518                 adapter->flags = flags;
2519
2520                 /* Perform hash on these packet types */
2521                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2522                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2523                         E1000_MRQC_RSS_FIELD_IPV6 |
2524                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2525
2526                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2527                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2528
2529                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2530                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2531
2532                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2533                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2534
2535                 wr32(E1000_MRQC, mrqc);
2536         }
2537
2538         return 0;
2539 }
2540
2541 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2542 {
2543         struct igb_adapter *adapter = netdev_priv(dev);
2544         int ret = -EOPNOTSUPP;
2545
2546         switch (cmd->cmd) {
2547         case ETHTOOL_SRXFH:
2548                 ret = igb_set_rss_hash_opt(adapter, cmd);
2549                 break;
2550         default:
2551                 break;
2552         }
2553
2554         return ret;
2555 }
2556
2557 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2558 {
2559         struct igb_adapter *adapter = netdev_priv(netdev);
2560         struct e1000_hw *hw = &adapter->hw;
2561         u32 ipcnfg, eeer, ret_val;
2562         u16 phy_data;
2563
2564         if ((hw->mac.type < e1000_i350) ||
2565             (hw->phy.media_type != e1000_media_type_copper))
2566                 return -EOPNOTSUPP;
2567
2568         edata->supported = (SUPPORTED_1000baseT_Full |
2569                             SUPPORTED_100baseT_Full);
2570
2571         ipcnfg = rd32(E1000_IPCNFG);
2572         eeer = rd32(E1000_EEER);
2573
2574         /* EEE status on negotiated link */
2575         if (ipcnfg & E1000_IPCNFG_EEE_1G_AN)
2576                 edata->advertised = ADVERTISED_1000baseT_Full;
2577
2578         if (ipcnfg & E1000_IPCNFG_EEE_100M_AN)
2579                 edata->advertised |= ADVERTISED_100baseT_Full;
2580
2581         /* EEE Link Partner Advertised */
2582         switch (hw->mac.type) {
2583         case e1000_i350:
2584                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
2585                                            &phy_data);
2586                 if (ret_val)
2587                         return -ENODATA;
2588
2589                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2590
2591                 break;
2592         case e1000_i210:
2593         case e1000_i211:
2594                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
2595                                              E1000_EEE_LP_ADV_DEV_I210,
2596                                              &phy_data);
2597                 if (ret_val)
2598                         return -ENODATA;
2599
2600                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2601
2602                 break;
2603         default:
2604                 break;
2605         }
2606
2607         if (eeer & E1000_EEER_EEE_NEG)
2608                 edata->eee_active = true;
2609
2610         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
2611
2612         if (eeer & E1000_EEER_TX_LPI_EN)
2613                 edata->tx_lpi_enabled = true;
2614
2615         /* Report correct negotiated EEE status for devices that
2616          * wrongly report EEE at half-duplex
2617          */
2618         if (adapter->link_duplex == HALF_DUPLEX) {
2619                 edata->eee_enabled = false;
2620                 edata->eee_active = false;
2621                 edata->tx_lpi_enabled = false;
2622                 edata->advertised &= ~edata->advertised;
2623         }
2624
2625         return 0;
2626 }
2627
2628 static int igb_set_eee(struct net_device *netdev,
2629                        struct ethtool_eee *edata)
2630 {
2631         struct igb_adapter *adapter = netdev_priv(netdev);
2632         struct e1000_hw *hw = &adapter->hw;
2633         struct ethtool_eee eee_curr;
2634         s32 ret_val;
2635
2636         if ((hw->mac.type < e1000_i350) ||
2637             (hw->phy.media_type != e1000_media_type_copper))
2638                 return -EOPNOTSUPP;
2639
2640         ret_val = igb_get_eee(netdev, &eee_curr);
2641         if (ret_val)
2642                 return ret_val;
2643
2644         if (eee_curr.eee_enabled) {
2645                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2646                         dev_err(&adapter->pdev->dev,
2647                                 "Setting EEE tx-lpi is not supported\n");
2648                         return -EINVAL;
2649                 }
2650
2651                 /* Tx LPI timer is not implemented currently */
2652                 if (edata->tx_lpi_timer) {
2653                         dev_err(&adapter->pdev->dev,
2654                                 "Setting EEE Tx LPI timer is not supported\n");
2655                         return -EINVAL;
2656                 }
2657
2658                 if (eee_curr.advertised != edata->advertised) {
2659                         dev_err(&adapter->pdev->dev,
2660                                 "Setting EEE Advertisement is not supported\n");
2661                         return -EINVAL;
2662                 }
2663
2664         } else if (!edata->eee_enabled) {
2665                 dev_err(&adapter->pdev->dev,
2666                         "Setting EEE options are not supported with EEE disabled\n");
2667                         return -EINVAL;
2668                 }
2669
2670         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
2671                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
2672                 igb_set_eee_i350(hw);
2673
2674                 /* reset link */
2675                 if (!netif_running(netdev))
2676                         igb_reset(adapter);
2677         }
2678
2679         return 0;
2680 }
2681
2682 static int igb_get_module_info(struct net_device *netdev,
2683                                struct ethtool_modinfo *modinfo)
2684 {
2685         struct igb_adapter *adapter = netdev_priv(netdev);
2686         struct e1000_hw *hw = &adapter->hw;
2687         u32 status = E1000_SUCCESS;
2688         u16 sff8472_rev, addr_mode;
2689         bool page_swap = false;
2690
2691         if ((hw->phy.media_type == e1000_media_type_copper) ||
2692             (hw->phy.media_type == e1000_media_type_unknown))
2693                 return -EOPNOTSUPP;
2694
2695         /* Check whether we support SFF-8472 or not */
2696         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
2697         if (status != E1000_SUCCESS)
2698                 return -EIO;
2699
2700         /* addressing mode is not supported */
2701         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
2702         if (status != E1000_SUCCESS)
2703                 return -EIO;
2704
2705         /* addressing mode is not supported */
2706         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
2707                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
2708                 page_swap = true;
2709         }
2710
2711         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
2712                 /* We have an SFP, but it does not support SFF-8472 */
2713                 modinfo->type = ETH_MODULE_SFF_8079;
2714                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
2715         } else {
2716                 /* We have an SFP which supports a revision of SFF-8472 */
2717                 modinfo->type = ETH_MODULE_SFF_8472;
2718                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2719         }
2720
2721         return 0;
2722 }
2723
2724 static int igb_get_module_eeprom(struct net_device *netdev,
2725                                  struct ethtool_eeprom *ee, u8 *data)
2726 {
2727         struct igb_adapter *adapter = netdev_priv(netdev);
2728         struct e1000_hw *hw = &adapter->hw;
2729         u32 status = E1000_SUCCESS;
2730         u16 *dataword;
2731         u16 first_word, last_word;
2732         int i = 0;
2733
2734         if (ee->len == 0)
2735                 return -EINVAL;
2736
2737         first_word = ee->offset >> 1;
2738         last_word = (ee->offset + ee->len - 1) >> 1;
2739
2740         dataword = kmalloc(sizeof(u16) * (last_word - first_word + 1),
2741                            GFP_KERNEL);
2742         if (!dataword)
2743                 return -ENOMEM;
2744
2745         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
2746         for (i = 0; i < last_word - first_word + 1; i++) {
2747                 status = igb_read_phy_reg_i2c(hw, first_word + i, &dataword[i]);
2748                 if (status != E1000_SUCCESS)
2749                         /* Error occurred while reading module */
2750                         return -EIO;
2751
2752                 be16_to_cpus(&dataword[i]);
2753         }
2754
2755         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
2756         kfree(dataword);
2757
2758         return 0;
2759 }
2760
2761 static int igb_ethtool_begin(struct net_device *netdev)
2762 {
2763         struct igb_adapter *adapter = netdev_priv(netdev);
2764         pm_runtime_get_sync(&adapter->pdev->dev);
2765         return 0;
2766 }
2767
2768 static void igb_ethtool_complete(struct net_device *netdev)
2769 {
2770         struct igb_adapter *adapter = netdev_priv(netdev);
2771         pm_runtime_put(&adapter->pdev->dev);
2772 }
2773
2774 static const struct ethtool_ops igb_ethtool_ops = {
2775         .get_settings           = igb_get_settings,
2776         .set_settings           = igb_set_settings,
2777         .get_drvinfo            = igb_get_drvinfo,
2778         .get_regs_len           = igb_get_regs_len,
2779         .get_regs               = igb_get_regs,
2780         .get_wol                = igb_get_wol,
2781         .set_wol                = igb_set_wol,
2782         .get_msglevel           = igb_get_msglevel,
2783         .set_msglevel           = igb_set_msglevel,
2784         .nway_reset             = igb_nway_reset,
2785         .get_link               = igb_get_link,
2786         .get_eeprom_len         = igb_get_eeprom_len,
2787         .get_eeprom             = igb_get_eeprom,
2788         .set_eeprom             = igb_set_eeprom,
2789         .get_ringparam          = igb_get_ringparam,
2790         .set_ringparam          = igb_set_ringparam,
2791         .get_pauseparam         = igb_get_pauseparam,
2792         .set_pauseparam         = igb_set_pauseparam,
2793         .self_test              = igb_diag_test,
2794         .get_strings            = igb_get_strings,
2795         .set_phys_id            = igb_set_phys_id,
2796         .get_sset_count         = igb_get_sset_count,
2797         .get_ethtool_stats      = igb_get_ethtool_stats,
2798         .get_coalesce           = igb_get_coalesce,
2799         .set_coalesce           = igb_set_coalesce,
2800         .get_ts_info            = igb_get_ts_info,
2801         .get_rxnfc              = igb_get_rxnfc,
2802         .set_rxnfc              = igb_set_rxnfc,
2803         .get_eee                = igb_get_eee,
2804         .set_eee                = igb_set_eee,
2805         .get_module_info        = igb_get_module_info,
2806         .get_module_eeprom      = igb_get_module_eeprom,
2807         .begin                  = igb_ethtool_begin,
2808         .complete               = igb_ethtool_complete,
2809 };
2810
2811 void igb_set_ethtool_ops(struct net_device *netdev)
2812 {
2813         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2814 }