1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/ethtool.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_macvlan.h>
49 #include <linux/if_bridge.h>
50 #include <linux/prefetch.h>
51 #include <scsi/fc/fc_fcoe.h>
54 #include "ixgbe_common.h"
55 #include "ixgbe_dcb_82599.h"
56 #include "ixgbe_sriov.h"
58 char ixgbe_driver_name[] = "ixgbe";
59 static const char ixgbe_driver_string[] =
60 "Intel(R) 10 Gigabit PCI Express Network Driver";
62 char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
65 static char ixgbe_default_device_descr[] =
66 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION "3.19.1-k"
69 const char ixgbe_driver_version[] = DRV_VERSION;
70 static const char ixgbe_copyright[] =
71 "Copyright (c) 1999-2014 Intel Corporation.";
73 static const struct ixgbe_info *ixgbe_info_tbl[] = {
74 [board_82598] = &ixgbe_82598_info,
75 [board_82599] = &ixgbe_82599_info,
76 [board_X540] = &ixgbe_X540_info,
79 /* ixgbe_pci_tbl - PCI Device ID Table
81 * Wildcard entries (PCI_ANY_ID) should come last
82 * Last entry must be all 0s
84 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
85 * Class, Class Mask, private data (not used) }
87 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
126 static struct notifier_block dca_notifier = {
127 .notifier_call = ixgbe_notify_dca,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs;
135 module_param(max_vfs, uint, 0);
136 MODULE_PARM_DESC(max_vfs,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp;
141 module_param(allow_unsupported_sfp, uint, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug = -1;
147 module_param(debug, int, 0);
148 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION);
155 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
157 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
160 struct pci_dev *parent_dev;
161 struct pci_bus *parent_bus;
163 parent_bus = adapter->pdev->bus->parent;
167 parent_dev = parent_bus->self;
171 if (!pci_is_pcie(parent_dev))
174 pcie_capability_read_word(parent_dev, reg, value);
175 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
176 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
181 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
183 struct ixgbe_hw *hw = &adapter->hw;
187 hw->bus.type = ixgbe_bus_type_pci_express;
189 /* Get the negotiated link width and speed from PCI config space of the
190 * parent, as this device is behind a switch
192 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
194 /* assume caller will handle error case */
198 hw->bus.width = ixgbe_convert_bus_width(link_status);
199 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
205 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
206 * @hw: hw specific details
208 * This function is used by probe to determine whether a device's PCI-Express
209 * bandwidth details should be gathered from the parent bus instead of from the
210 * device. Used to ensure that various locations all have the correct device ID
213 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
215 switch (hw->device_id) {
216 case IXGBE_DEV_ID_82599_SFP_SF_QP:
217 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
224 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
228 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
229 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
230 struct pci_dev *pdev;
232 /* determine whether to use the the parent device
234 if (ixgbe_pcie_from_parent(&adapter->hw))
235 pdev = adapter->pdev->bus->parent->self;
237 pdev = adapter->pdev;
239 if (pcie_get_minimum_link(pdev, &speed, &width) ||
240 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
241 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
246 case PCIE_SPEED_2_5GT:
247 /* 8b/10b encoding reduces max throughput by 20% */
250 case PCIE_SPEED_5_0GT:
251 /* 8b/10b encoding reduces max throughput by 20% */
254 case PCIE_SPEED_8_0GT:
255 /* 128b/130b encoding reduces throughput by less than 2% */
259 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
263 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
265 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
266 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
267 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
268 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
271 (speed == PCIE_SPEED_2_5GT ? "20%" :
272 speed == PCIE_SPEED_5_0GT ? "20%" :
273 speed == PCIE_SPEED_8_0GT ? "<2%" :
276 if (max_gts < expected_gts) {
277 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
278 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
280 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
284 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
286 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
287 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
288 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
289 schedule_work(&adapter->service_task);
292 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
294 struct ixgbe_adapter *adapter = hw->back;
299 e_dev_err("Adapter removed\n");
300 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
301 ixgbe_service_event_schedule(adapter);
304 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
308 /* The following check not only optimizes a bit by not
309 * performing a read on the status register when the
310 * register just read was a status register read that
311 * returned IXGBE_FAILED_READ_REG. It also blocks any
312 * potential recursion.
314 if (reg == IXGBE_STATUS) {
315 ixgbe_remove_adapter(hw);
318 value = ixgbe_read_reg(hw, IXGBE_STATUS);
319 if (value == IXGBE_FAILED_READ_REG)
320 ixgbe_remove_adapter(hw);
324 * ixgbe_read_reg - Read from device register
325 * @hw: hw specific details
326 * @reg: offset of register to read
328 * Returns : value read or IXGBE_FAILED_READ_REG if removed
330 * This function is used to read device registers. It checks for device
331 * removal by confirming any read that returns all ones by checking the
332 * status register value for all ones. This function avoids reading from
333 * the hardware if a removal was previously detected in which case it
334 * returns IXGBE_FAILED_READ_REG (all ones).
336 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
338 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
341 if (ixgbe_removed(reg_addr))
342 return IXGBE_FAILED_READ_REG;
343 value = readl(reg_addr + reg);
344 if (unlikely(value == IXGBE_FAILED_READ_REG))
345 ixgbe_check_remove(hw, reg);
349 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
353 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
354 if (value == IXGBE_FAILED_READ_CFG_WORD) {
355 ixgbe_remove_adapter(hw);
361 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
363 struct ixgbe_adapter *adapter = hw->back;
366 if (ixgbe_removed(hw->hw_addr))
367 return IXGBE_FAILED_READ_CFG_WORD;
368 pci_read_config_word(adapter->pdev, reg, &value);
369 if (value == IXGBE_FAILED_READ_CFG_WORD &&
370 ixgbe_check_cfg_remove(hw, adapter->pdev))
371 return IXGBE_FAILED_READ_CFG_WORD;
375 #ifdef CONFIG_PCI_IOV
376 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
378 struct ixgbe_adapter *adapter = hw->back;
381 if (ixgbe_removed(hw->hw_addr))
382 return IXGBE_FAILED_READ_CFG_DWORD;
383 pci_read_config_dword(adapter->pdev, reg, &value);
384 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
385 ixgbe_check_cfg_remove(hw, adapter->pdev))
386 return IXGBE_FAILED_READ_CFG_DWORD;
389 #endif /* CONFIG_PCI_IOV */
391 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
393 struct ixgbe_adapter *adapter = hw->back;
395 if (ixgbe_removed(hw->hw_addr))
397 pci_write_config_word(adapter->pdev, reg, value);
400 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
402 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
404 /* flush memory to make sure state is correct before next watchdog */
405 smp_mb__before_atomic();
406 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
409 struct ixgbe_reg_info {
414 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
416 /* General Registers */
417 {IXGBE_CTRL, "CTRL"},
418 {IXGBE_STATUS, "STATUS"},
419 {IXGBE_CTRL_EXT, "CTRL_EXT"},
421 /* Interrupt Registers */
422 {IXGBE_EICR, "EICR"},
425 {IXGBE_SRRCTL(0), "SRRCTL"},
426 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
427 {IXGBE_RDLEN(0), "RDLEN"},
428 {IXGBE_RDH(0), "RDH"},
429 {IXGBE_RDT(0), "RDT"},
430 {IXGBE_RXDCTL(0), "RXDCTL"},
431 {IXGBE_RDBAL(0), "RDBAL"},
432 {IXGBE_RDBAH(0), "RDBAH"},
435 {IXGBE_TDBAL(0), "TDBAL"},
436 {IXGBE_TDBAH(0), "TDBAH"},
437 {IXGBE_TDLEN(0), "TDLEN"},
438 {IXGBE_TDH(0), "TDH"},
439 {IXGBE_TDT(0), "TDT"},
440 {IXGBE_TXDCTL(0), "TXDCTL"},
442 /* List Terminator */
448 * ixgbe_regdump - register printout routine
450 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
456 switch (reginfo->ofs) {
457 case IXGBE_SRRCTL(0):
458 for (i = 0; i < 64; i++)
459 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
461 case IXGBE_DCA_RXCTRL(0):
462 for (i = 0; i < 64; i++)
463 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
466 for (i = 0; i < 64; i++)
467 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
470 for (i = 0; i < 64; i++)
471 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
474 for (i = 0; i < 64; i++)
475 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
477 case IXGBE_RXDCTL(0):
478 for (i = 0; i < 64; i++)
479 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
482 for (i = 0; i < 64; i++)
483 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
486 for (i = 0; i < 64; i++)
487 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
490 for (i = 0; i < 64; i++)
491 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
494 for (i = 0; i < 64; i++)
495 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
498 for (i = 0; i < 64; i++)
499 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
502 for (i = 0; i < 64; i++)
503 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
506 for (i = 0; i < 64; i++)
507 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
509 case IXGBE_TXDCTL(0):
510 for (i = 0; i < 64; i++)
511 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
514 pr_info("%-15s %08x\n", reginfo->name,
515 IXGBE_READ_REG(hw, reginfo->ofs));
519 for (i = 0; i < 8; i++) {
520 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
521 pr_err("%-15s", rname);
522 for (j = 0; j < 8; j++)
523 pr_cont(" %08x", regs[i*8+j]);
530 * ixgbe_dump - Print registers, tx-rings and rx-rings
532 static void ixgbe_dump(struct ixgbe_adapter *adapter)
534 struct net_device *netdev = adapter->netdev;
535 struct ixgbe_hw *hw = &adapter->hw;
536 struct ixgbe_reg_info *reginfo;
538 struct ixgbe_ring *tx_ring;
539 struct ixgbe_tx_buffer *tx_buffer;
540 union ixgbe_adv_tx_desc *tx_desc;
541 struct my_u0 { u64 a; u64 b; } *u0;
542 struct ixgbe_ring *rx_ring;
543 union ixgbe_adv_rx_desc *rx_desc;
544 struct ixgbe_rx_buffer *rx_buffer_info;
548 if (!netif_msg_hw(adapter))
551 /* Print netdevice Info */
553 dev_info(&adapter->pdev->dev, "Net device Info\n");
554 pr_info("Device Name state "
555 "trans_start last_rx\n");
556 pr_info("%-15s %016lX %016lX %016lX\n",
563 /* Print Registers */
564 dev_info(&adapter->pdev->dev, "Register Dump\n");
565 pr_info(" Register Name Value\n");
566 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
567 reginfo->name; reginfo++) {
568 ixgbe_regdump(hw, reginfo);
571 /* Print TX Ring Summary */
572 if (!netdev || !netif_running(netdev))
575 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
576 pr_info(" %s %s %s %s\n",
577 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
578 "leng", "ntw", "timestamp");
579 for (n = 0; n < adapter->num_tx_queues; n++) {
580 tx_ring = adapter->tx_ring[n];
581 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
582 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
583 n, tx_ring->next_to_use, tx_ring->next_to_clean,
584 (u64)dma_unmap_addr(tx_buffer, dma),
585 dma_unmap_len(tx_buffer, len),
586 tx_buffer->next_to_watch,
587 (u64)tx_buffer->time_stamp);
591 if (!netif_msg_tx_done(adapter))
592 goto rx_ring_summary;
594 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
596 /* Transmit Descriptor Formats
598 * 82598 Advanced Transmit Descriptor
599 * +--------------------------------------------------------------+
600 * 0 | Buffer Address [63:0] |
601 * +--------------------------------------------------------------+
602 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
603 * +--------------------------------------------------------------+
604 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
606 * 82598 Advanced Transmit Descriptor (Write-Back Format)
607 * +--------------------------------------------------------------+
609 * +--------------------------------------------------------------+
610 * 8 | RSV | STA | NXTSEQ |
611 * +--------------------------------------------------------------+
614 * 82599+ Advanced Transmit Descriptor
615 * +--------------------------------------------------------------+
616 * 0 | Buffer Address [63:0] |
617 * +--------------------------------------------------------------+
618 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
619 * +--------------------------------------------------------------+
620 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
622 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
623 * +--------------------------------------------------------------+
625 * +--------------------------------------------------------------+
626 * 8 | RSV | STA | RSV |
627 * +--------------------------------------------------------------+
631 for (n = 0; n < adapter->num_tx_queues; n++) {
632 tx_ring = adapter->tx_ring[n];
633 pr_info("------------------------------------\n");
634 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
635 pr_info("------------------------------------\n");
636 pr_info("%s%s %s %s %s %s\n",
637 "T [desc] [address 63:0 ] ",
638 "[PlPOIdStDDt Ln] [bi->dma ] ",
639 "leng", "ntw", "timestamp", "bi->skb");
641 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
642 tx_desc = IXGBE_TX_DESC(tx_ring, i);
643 tx_buffer = &tx_ring->tx_buffer_info[i];
644 u0 = (struct my_u0 *)tx_desc;
645 if (dma_unmap_len(tx_buffer, len) > 0) {
646 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
650 (u64)dma_unmap_addr(tx_buffer, dma),
651 dma_unmap_len(tx_buffer, len),
652 tx_buffer->next_to_watch,
653 (u64)tx_buffer->time_stamp,
655 if (i == tx_ring->next_to_use &&
656 i == tx_ring->next_to_clean)
658 else if (i == tx_ring->next_to_use)
660 else if (i == tx_ring->next_to_clean)
665 if (netif_msg_pktdata(adapter) &&
667 print_hex_dump(KERN_INFO, "",
668 DUMP_PREFIX_ADDRESS, 16, 1,
669 tx_buffer->skb->data,
670 dma_unmap_len(tx_buffer, len),
676 /* Print RX Rings Summary */
678 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
679 pr_info("Queue [NTU] [NTC]\n");
680 for (n = 0; n < adapter->num_rx_queues; n++) {
681 rx_ring = adapter->rx_ring[n];
682 pr_info("%5d %5X %5X\n",
683 n, rx_ring->next_to_use, rx_ring->next_to_clean);
687 if (!netif_msg_rx_status(adapter))
690 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
692 /* Receive Descriptor Formats
694 * 82598 Advanced Receive Descriptor (Read) Format
696 * +-----------------------------------------------------+
697 * 0 | Packet Buffer Address [63:1] |A0/NSE|
698 * +----------------------------------------------+------+
699 * 8 | Header Buffer Address [63:1] | DD |
700 * +-----------------------------------------------------+
703 * 82598 Advanced Receive Descriptor (Write-Back) Format
705 * 63 48 47 32 31 30 21 20 16 15 4 3 0
706 * +------------------------------------------------------+
707 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
708 * | Packet | IP | | | | Type | Type |
709 * | Checksum | Ident | | | | | |
710 * +------------------------------------------------------+
711 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
712 * +------------------------------------------------------+
713 * 63 48 47 32 31 20 19 0
715 * 82599+ Advanced Receive Descriptor (Read) Format
717 * +-----------------------------------------------------+
718 * 0 | Packet Buffer Address [63:1] |A0/NSE|
719 * +----------------------------------------------+------+
720 * 8 | Header Buffer Address [63:1] | DD |
721 * +-----------------------------------------------------+
724 * 82599+ Advanced Receive Descriptor (Write-Back) Format
726 * 63 48 47 32 31 30 21 20 17 16 4 3 0
727 * +------------------------------------------------------+
728 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
729 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
730 * |/ Flow Dir Flt ID | | | | | |
731 * +------------------------------------------------------+
732 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
733 * +------------------------------------------------------+
734 * 63 48 47 32 31 20 19 0
737 for (n = 0; n < adapter->num_rx_queues; n++) {
738 rx_ring = adapter->rx_ring[n];
739 pr_info("------------------------------------\n");
740 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
741 pr_info("------------------------------------\n");
743 "R [desc] [ PktBuf A0] ",
744 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
745 "<-- Adv Rx Read format\n");
747 "RWB[desc] [PcsmIpSHl PtRs] ",
748 "[vl er S cks ln] ---------------- [bi->skb ] ",
749 "<-- Adv Rx Write-Back format\n");
751 for (i = 0; i < rx_ring->count; i++) {
752 rx_buffer_info = &rx_ring->rx_buffer_info[i];
753 rx_desc = IXGBE_RX_DESC(rx_ring, i);
754 u0 = (struct my_u0 *)rx_desc;
755 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
756 if (staterr & IXGBE_RXD_STAT_DD) {
757 /* Descriptor Done */
758 pr_info("RWB[0x%03X] %016llX "
759 "%016llX ---------------- %p", i,
762 rx_buffer_info->skb);
764 pr_info("R [0x%03X] %016llX "
765 "%016llX %016llX %p", i,
768 (u64)rx_buffer_info->dma,
769 rx_buffer_info->skb);
771 if (netif_msg_pktdata(adapter) &&
772 rx_buffer_info->dma) {
773 print_hex_dump(KERN_INFO, "",
774 DUMP_PREFIX_ADDRESS, 16, 1,
775 page_address(rx_buffer_info->page) +
776 rx_buffer_info->page_offset,
777 ixgbe_rx_bufsz(rx_ring), true);
781 if (i == rx_ring->next_to_use)
783 else if (i == rx_ring->next_to_clean)
795 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
799 /* Let firmware take over control of h/w */
800 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
801 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
802 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
805 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
809 /* Let firmware know the driver has taken over */
810 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
811 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
812 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
816 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
817 * @adapter: pointer to adapter struct
818 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
819 * @queue: queue to map the corresponding interrupt to
820 * @msix_vector: the vector to map to the corresponding queue
823 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
824 u8 queue, u8 msix_vector)
827 struct ixgbe_hw *hw = &adapter->hw;
828 switch (hw->mac.type) {
829 case ixgbe_mac_82598EB:
830 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
833 index = (((direction * 64) + queue) >> 2) & 0x1F;
834 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
835 ivar &= ~(0xFF << (8 * (queue & 0x3)));
836 ivar |= (msix_vector << (8 * (queue & 0x3)));
837 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
839 case ixgbe_mac_82599EB:
841 if (direction == -1) {
843 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
844 index = ((queue & 1) * 8);
845 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
846 ivar &= ~(0xFF << index);
847 ivar |= (msix_vector << index);
848 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
851 /* tx or rx causes */
852 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
853 index = ((16 * (queue & 1)) + (8 * direction));
854 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
855 ivar &= ~(0xFF << index);
856 ivar |= (msix_vector << index);
857 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
865 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
870 switch (adapter->hw.mac.type) {
871 case ixgbe_mac_82598EB:
872 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
873 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
875 case ixgbe_mac_82599EB:
877 mask = (qmask & 0xFFFFFFFF);
878 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
879 mask = (qmask >> 32);
880 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
887 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
888 struct ixgbe_tx_buffer *tx_buffer)
890 if (tx_buffer->skb) {
891 dev_kfree_skb_any(tx_buffer->skb);
892 if (dma_unmap_len(tx_buffer, len))
893 dma_unmap_single(ring->dev,
894 dma_unmap_addr(tx_buffer, dma),
895 dma_unmap_len(tx_buffer, len),
897 } else if (dma_unmap_len(tx_buffer, len)) {
898 dma_unmap_page(ring->dev,
899 dma_unmap_addr(tx_buffer, dma),
900 dma_unmap_len(tx_buffer, len),
903 tx_buffer->next_to_watch = NULL;
904 tx_buffer->skb = NULL;
905 dma_unmap_len_set(tx_buffer, len, 0);
906 /* tx_buffer must be completely set up in the transmit path */
909 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
911 struct ixgbe_hw *hw = &adapter->hw;
912 struct ixgbe_hw_stats *hwstats = &adapter->stats;
916 if ((hw->fc.current_mode != ixgbe_fc_full) &&
917 (hw->fc.current_mode != ixgbe_fc_rx_pause))
920 switch (hw->mac.type) {
921 case ixgbe_mac_82598EB:
922 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
925 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
927 hwstats->lxoffrxc += data;
929 /* refill credits (no tx hang) if we received xoff */
933 for (i = 0; i < adapter->num_tx_queues; i++)
934 clear_bit(__IXGBE_HANG_CHECK_ARMED,
935 &adapter->tx_ring[i]->state);
938 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
940 struct ixgbe_hw *hw = &adapter->hw;
941 struct ixgbe_hw_stats *hwstats = &adapter->stats;
945 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
947 if (adapter->ixgbe_ieee_pfc)
948 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
950 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
951 ixgbe_update_xoff_rx_lfc(adapter);
955 /* update stats for each tc, only valid with PFC enabled */
956 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
959 switch (hw->mac.type) {
960 case ixgbe_mac_82598EB:
961 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
964 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
966 hwstats->pxoffrxc[i] += pxoffrxc;
967 /* Get the TC for given UP */
968 tc = netdev_get_prio_tc_map(adapter->netdev, i);
969 xoff[tc] += pxoffrxc;
972 /* disarm tx queues that have received xoff frames */
973 for (i = 0; i < adapter->num_tx_queues; i++) {
974 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
976 tc = tx_ring->dcb_tc;
978 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
982 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
984 return ring->stats.packets;
987 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
989 struct ixgbe_adapter *adapter;
993 if (ring->l2_accel_priv)
994 adapter = ring->l2_accel_priv->real_adapter;
996 adapter = netdev_priv(ring->netdev);
999 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1000 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1003 return (head < tail) ?
1004 tail - head : (tail + ring->count - head);
1009 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1011 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1012 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1013 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1016 clear_check_for_tx_hang(tx_ring);
1019 * Check for a hung queue, but be thorough. This verifies
1020 * that a transmit has been completed since the previous
1021 * check AND there is at least one packet pending. The
1022 * ARMED bit is set to indicate a potential hang. The
1023 * bit is cleared if a pause frame is received to remove
1024 * false hang detection due to PFC or 802.3x frames. By
1025 * requiring this to fail twice we avoid races with
1026 * pfc clearing the ARMED bit and conditions where we
1027 * run the check_tx_hang logic with a transmit completion
1028 * pending but without time to complete it yet.
1030 if ((tx_done_old == tx_done) && tx_pending) {
1031 /* make sure it is true for two checks in a row */
1032 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1035 /* update completed stats and continue */
1036 tx_ring->tx_stats.tx_done_old = tx_done;
1037 /* reset the countdown */
1038 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1045 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1046 * @adapter: driver private struct
1048 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1051 /* Do the reset outside of interrupt context */
1052 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1053 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1054 e_warn(drv, "initiating reset due to tx timeout\n");
1055 ixgbe_service_event_schedule(adapter);
1060 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1061 * @q_vector: structure containing interrupt and ring information
1062 * @tx_ring: tx ring to clean
1064 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1065 struct ixgbe_ring *tx_ring)
1067 struct ixgbe_adapter *adapter = q_vector->adapter;
1068 struct ixgbe_tx_buffer *tx_buffer;
1069 union ixgbe_adv_tx_desc *tx_desc;
1070 unsigned int total_bytes = 0, total_packets = 0;
1071 unsigned int budget = q_vector->tx.work_limit;
1072 unsigned int i = tx_ring->next_to_clean;
1074 if (test_bit(__IXGBE_DOWN, &adapter->state))
1077 tx_buffer = &tx_ring->tx_buffer_info[i];
1078 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1079 i -= tx_ring->count;
1082 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1084 /* if next_to_watch is not set then there is no work pending */
1088 /* prevent any other reads prior to eop_desc */
1089 read_barrier_depends();
1091 /* if DD is not set pending work has not been completed */
1092 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1095 /* clear next_to_watch to prevent false hangs */
1096 tx_buffer->next_to_watch = NULL;
1098 /* update the statistics for this packet */
1099 total_bytes += tx_buffer->bytecount;
1100 total_packets += tx_buffer->gso_segs;
1103 dev_kfree_skb_any(tx_buffer->skb);
1105 /* unmap skb header data */
1106 dma_unmap_single(tx_ring->dev,
1107 dma_unmap_addr(tx_buffer, dma),
1108 dma_unmap_len(tx_buffer, len),
1111 /* clear tx_buffer data */
1112 tx_buffer->skb = NULL;
1113 dma_unmap_len_set(tx_buffer, len, 0);
1115 /* unmap remaining buffers */
1116 while (tx_desc != eop_desc) {
1121 i -= tx_ring->count;
1122 tx_buffer = tx_ring->tx_buffer_info;
1123 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1126 /* unmap any remaining paged data */
1127 if (dma_unmap_len(tx_buffer, len)) {
1128 dma_unmap_page(tx_ring->dev,
1129 dma_unmap_addr(tx_buffer, dma),
1130 dma_unmap_len(tx_buffer, len),
1132 dma_unmap_len_set(tx_buffer, len, 0);
1136 /* move us one more past the eop_desc for start of next pkt */
1141 i -= tx_ring->count;
1142 tx_buffer = tx_ring->tx_buffer_info;
1143 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1146 /* issue prefetch for next Tx descriptor */
1149 /* update budget accounting */
1151 } while (likely(budget));
1153 i += tx_ring->count;
1154 tx_ring->next_to_clean = i;
1155 u64_stats_update_begin(&tx_ring->syncp);
1156 tx_ring->stats.bytes += total_bytes;
1157 tx_ring->stats.packets += total_packets;
1158 u64_stats_update_end(&tx_ring->syncp);
1159 q_vector->tx.total_bytes += total_bytes;
1160 q_vector->tx.total_packets += total_packets;
1162 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1163 /* schedule immediate reset if we believe we hung */
1164 struct ixgbe_hw *hw = &adapter->hw;
1165 e_err(drv, "Detected Tx Unit Hang\n"
1167 " TDH, TDT <%x>, <%x>\n"
1168 " next_to_use <%x>\n"
1169 " next_to_clean <%x>\n"
1170 "tx_buffer_info[next_to_clean]\n"
1171 " time_stamp <%lx>\n"
1173 tx_ring->queue_index,
1174 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1175 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1176 tx_ring->next_to_use, i,
1177 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1179 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1182 "tx hang %d detected on queue %d, resetting adapter\n",
1183 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1185 /* schedule immediate reset if we believe we hung */
1186 ixgbe_tx_timeout_reset(adapter);
1188 /* the adapter is about to reset, no point in enabling stuff */
1192 netdev_tx_completed_queue(txring_txq(tx_ring),
1193 total_packets, total_bytes);
1195 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1196 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1197 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1198 /* Make sure that anybody stopping the queue after this
1199 * sees the new next_to_clean.
1202 if (__netif_subqueue_stopped(tx_ring->netdev,
1203 tx_ring->queue_index)
1204 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1205 netif_wake_subqueue(tx_ring->netdev,
1206 tx_ring->queue_index);
1207 ++tx_ring->tx_stats.restart_queue;
1214 #ifdef CONFIG_IXGBE_DCA
1215 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1216 struct ixgbe_ring *tx_ring,
1219 struct ixgbe_hw *hw = &adapter->hw;
1220 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1223 switch (hw->mac.type) {
1224 case ixgbe_mac_82598EB:
1225 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1227 case ixgbe_mac_82599EB:
1228 case ixgbe_mac_X540:
1229 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1230 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1233 /* for unknown hardware do not write register */
1238 * We can enable relaxed ordering for reads, but not writes when
1239 * DCA is enabled. This is due to a known issue in some chipsets
1240 * which will cause the DCA tag to be cleared.
1242 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1243 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1244 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1246 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1249 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1250 struct ixgbe_ring *rx_ring,
1253 struct ixgbe_hw *hw = &adapter->hw;
1254 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1255 u8 reg_idx = rx_ring->reg_idx;
1258 switch (hw->mac.type) {
1259 case ixgbe_mac_82599EB:
1260 case ixgbe_mac_X540:
1261 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1268 * We can enable relaxed ordering for reads, but not writes when
1269 * DCA is enabled. This is due to a known issue in some chipsets
1270 * which will cause the DCA tag to be cleared.
1272 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1273 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1275 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1278 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1280 struct ixgbe_adapter *adapter = q_vector->adapter;
1281 struct ixgbe_ring *ring;
1282 int cpu = get_cpu();
1284 if (q_vector->cpu == cpu)
1287 ixgbe_for_each_ring(ring, q_vector->tx)
1288 ixgbe_update_tx_dca(adapter, ring, cpu);
1290 ixgbe_for_each_ring(ring, q_vector->rx)
1291 ixgbe_update_rx_dca(adapter, ring, cpu);
1293 q_vector->cpu = cpu;
1298 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1302 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1305 /* always use CB2 mode, difference is masked in the CB driver */
1306 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1308 for (i = 0; i < adapter->num_q_vectors; i++) {
1309 adapter->q_vector[i]->cpu = -1;
1310 ixgbe_update_dca(adapter->q_vector[i]);
1314 static int __ixgbe_notify_dca(struct device *dev, void *data)
1316 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1317 unsigned long event = *(unsigned long *)data;
1319 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1323 case DCA_PROVIDER_ADD:
1324 /* if we're already enabled, don't do it again */
1325 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1327 if (dca_add_requester(dev) == 0) {
1328 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1329 ixgbe_setup_dca(adapter);
1332 /* Fall Through since DCA is disabled. */
1333 case DCA_PROVIDER_REMOVE:
1334 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1335 dca_remove_requester(dev);
1336 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1337 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1345 #endif /* CONFIG_IXGBE_DCA */
1346 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1347 union ixgbe_adv_rx_desc *rx_desc,
1348 struct sk_buff *skb)
1350 if (ring->netdev->features & NETIF_F_RXHASH)
1352 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1358 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1359 * @ring: structure containing ring specific data
1360 * @rx_desc: advanced rx descriptor
1362 * Returns : true if it is FCoE pkt
1364 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1365 union ixgbe_adv_rx_desc *rx_desc)
1367 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1369 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1370 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1371 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1372 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1375 #endif /* IXGBE_FCOE */
1377 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1378 * @ring: structure containing ring specific data
1379 * @rx_desc: current Rx descriptor being processed
1380 * @skb: skb currently being received and modified
1382 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1383 union ixgbe_adv_rx_desc *rx_desc,
1384 struct sk_buff *skb)
1386 skb_checksum_none_assert(skb);
1388 /* Rx csum disabled */
1389 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1392 /* if IP and error */
1393 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1394 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1395 ring->rx_stats.csum_err++;
1399 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1402 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1403 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1406 * 82599 errata, UDP frames with a 0 checksum can be marked as
1409 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1410 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1413 ring->rx_stats.csum_err++;
1417 /* It must be a TCP or UDP packet with a valid checksum */
1418 skb->ip_summed = CHECKSUM_UNNECESSARY;
1421 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1423 rx_ring->next_to_use = val;
1425 /* update next to alloc since we have filled the ring */
1426 rx_ring->next_to_alloc = val;
1428 * Force memory writes to complete before letting h/w
1429 * know there are new descriptors to fetch. (Only
1430 * applicable for weak-ordered memory model archs,
1434 ixgbe_write_tail(rx_ring, val);
1437 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1438 struct ixgbe_rx_buffer *bi)
1440 struct page *page = bi->page;
1441 dma_addr_t dma = bi->dma;
1443 /* since we are recycling buffers we should seldom need to alloc */
1447 /* alloc new page for storage */
1448 if (likely(!page)) {
1449 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1450 bi->skb, ixgbe_rx_pg_order(rx_ring));
1451 if (unlikely(!page)) {
1452 rx_ring->rx_stats.alloc_rx_page_failed++;
1458 /* map page for use */
1459 dma = dma_map_page(rx_ring->dev, page, 0,
1460 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1463 * if mapping failed free memory back to system since
1464 * there isn't much point in holding memory we can't use
1466 if (dma_mapping_error(rx_ring->dev, dma)) {
1467 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1470 rx_ring->rx_stats.alloc_rx_page_failed++;
1475 bi->page_offset = 0;
1481 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1482 * @rx_ring: ring to place buffers on
1483 * @cleaned_count: number of buffers to replace
1485 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1487 union ixgbe_adv_rx_desc *rx_desc;
1488 struct ixgbe_rx_buffer *bi;
1489 u16 i = rx_ring->next_to_use;
1495 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1496 bi = &rx_ring->rx_buffer_info[i];
1497 i -= rx_ring->count;
1500 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1504 * Refresh the desc even if buffer_addrs didn't change
1505 * because each write-back erases this info.
1507 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1513 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1514 bi = rx_ring->rx_buffer_info;
1515 i -= rx_ring->count;
1518 /* clear the hdr_addr for the next_to_use descriptor */
1519 rx_desc->read.hdr_addr = 0;
1522 } while (cleaned_count);
1524 i += rx_ring->count;
1526 if (rx_ring->next_to_use != i)
1527 ixgbe_release_rx_desc(rx_ring, i);
1531 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1532 * @data: pointer to the start of the headers
1533 * @max_len: total length of section to find headers in
1535 * This function is meant to determine the length of headers that will
1536 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1537 * motivation of doing this is to only perform one pull for IPv4 TCP
1538 * packets so that we can do basic things like calculating the gso_size
1539 * based on the average data per packet.
1541 static unsigned int ixgbe_get_headlen(unsigned char *data,
1542 unsigned int max_len)
1545 unsigned char *network;
1548 struct vlan_hdr *vlan;
1551 struct ipv6hdr *ipv6;
1554 u8 nexthdr = 0; /* default to not TCP */
1557 /* this should never happen, but better safe than sorry */
1558 if (max_len < ETH_HLEN)
1561 /* initialize network frame pointer */
1564 /* set first protocol and move network header forward */
1565 protocol = hdr.eth->h_proto;
1566 hdr.network += ETH_HLEN;
1568 /* handle any vlan tag if present */
1569 if (protocol == htons(ETH_P_8021Q)) {
1570 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1573 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1574 hdr.network += VLAN_HLEN;
1577 /* handle L3 protocols */
1578 if (protocol == htons(ETH_P_IP)) {
1579 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1582 /* access ihl as a u8 to avoid unaligned access on ia64 */
1583 hlen = (hdr.network[0] & 0x0F) << 2;
1585 /* verify hlen meets minimum size requirements */
1586 if (hlen < sizeof(struct iphdr))
1587 return hdr.network - data;
1589 /* record next protocol if header is present */
1590 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
1591 nexthdr = hdr.ipv4->protocol;
1592 } else if (protocol == htons(ETH_P_IPV6)) {
1593 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
1596 /* record next protocol */
1597 nexthdr = hdr.ipv6->nexthdr;
1598 hlen = sizeof(struct ipv6hdr);
1600 } else if (protocol == htons(ETH_P_FCOE)) {
1601 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1603 hlen = FCOE_HEADER_LEN;
1606 return hdr.network - data;
1609 /* relocate pointer to start of L4 header */
1610 hdr.network += hlen;
1612 /* finally sort out TCP/UDP */
1613 if (nexthdr == IPPROTO_TCP) {
1614 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1617 /* access doff as a u8 to avoid unaligned access on ia64 */
1618 hlen = (hdr.network[12] & 0xF0) >> 2;
1620 /* verify hlen meets minimum size requirements */
1621 if (hlen < sizeof(struct tcphdr))
1622 return hdr.network - data;
1624 hdr.network += hlen;
1625 } else if (nexthdr == IPPROTO_UDP) {
1626 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
1629 hdr.network += sizeof(struct udphdr);
1633 * If everything has gone correctly hdr.network should be the
1634 * data section of the packet and will be the end of the header.
1635 * If not then it probably represents the end of the last recognized
1638 if ((hdr.network - data) < max_len)
1639 return hdr.network - data;
1644 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1645 struct sk_buff *skb)
1647 u16 hdr_len = skb_headlen(skb);
1649 /* set gso_size to avoid messing up TCP MSS */
1650 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1651 IXGBE_CB(skb)->append_cnt);
1652 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1655 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1656 struct sk_buff *skb)
1658 /* if append_cnt is 0 then frame is not RSC */
1659 if (!IXGBE_CB(skb)->append_cnt)
1662 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1663 rx_ring->rx_stats.rsc_flush++;
1665 ixgbe_set_rsc_gso_size(rx_ring, skb);
1667 /* gso_size is computed using append_cnt so always clear it last */
1668 IXGBE_CB(skb)->append_cnt = 0;
1672 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1673 * @rx_ring: rx descriptor ring packet is being transacted on
1674 * @rx_desc: pointer to the EOP Rx descriptor
1675 * @skb: pointer to current skb being populated
1677 * This function checks the ring, descriptor, and packet information in
1678 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1679 * other fields within the skb.
1681 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1682 union ixgbe_adv_rx_desc *rx_desc,
1683 struct sk_buff *skb)
1685 struct net_device *dev = rx_ring->netdev;
1687 ixgbe_update_rsc_stats(rx_ring, skb);
1689 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1691 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1693 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1694 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1696 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1697 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1698 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1699 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1702 skb_record_rx_queue(skb, rx_ring->queue_index);
1704 skb->protocol = eth_type_trans(skb, dev);
1707 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1708 struct sk_buff *skb)
1710 struct ixgbe_adapter *adapter = q_vector->adapter;
1712 if (ixgbe_qv_busy_polling(q_vector))
1713 netif_receive_skb(skb);
1714 else if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1715 napi_gro_receive(&q_vector->napi, skb);
1721 * ixgbe_is_non_eop - process handling of non-EOP buffers
1722 * @rx_ring: Rx ring being processed
1723 * @rx_desc: Rx descriptor for current buffer
1724 * @skb: Current socket buffer containing buffer in progress
1726 * This function updates next to clean. If the buffer is an EOP buffer
1727 * this function exits returning false, otherwise it will place the
1728 * sk_buff in the next buffer to be chained and return true indicating
1729 * that this is in fact a non-EOP buffer.
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1732 union ixgbe_adv_rx_desc *rx_desc,
1733 struct sk_buff *skb)
1735 u32 ntc = rx_ring->next_to_clean + 1;
1737 /* fetch, update, and store next to clean */
1738 ntc = (ntc < rx_ring->count) ? ntc : 0;
1739 rx_ring->next_to_clean = ntc;
1741 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1743 /* update RSC append count if present */
1744 if (ring_is_rsc_enabled(rx_ring)) {
1745 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1746 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1748 if (unlikely(rsc_enabled)) {
1749 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1751 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1752 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1754 /* update ntc based on RSC value */
1755 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1756 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1757 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1761 /* if we are the last buffer then there is nothing else to do */
1762 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1765 /* place skb in next buffer to be received */
1766 rx_ring->rx_buffer_info[ntc].skb = skb;
1767 rx_ring->rx_stats.non_eop_descs++;
1773 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774 * @rx_ring: rx descriptor ring packet is being transacted on
1775 * @skb: pointer to current skb being adjusted
1777 * This function is an ixgbe specific version of __pskb_pull_tail. The
1778 * main difference between this version and the original function is that
1779 * this function can make several assumptions about the state of things
1780 * that allow for significant optimizations versus the standard function.
1781 * As a result we can do things like drop a frag and maintain an accurate
1782 * truesize for the skb.
1784 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1785 struct sk_buff *skb)
1787 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1789 unsigned int pull_len;
1792 * it is valid to use page_address instead of kmap since we are
1793 * working with pages allocated out of the lomem pool per
1794 * alloc_page(GFP_ATOMIC)
1796 va = skb_frag_address(frag);
1799 * we need the header to contain the greater of either ETH_HLEN or
1800 * 60 bytes if the skb->len is less than 60 for skb_pad.
1802 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1804 /* align pull length to size of long to optimize memcpy performance */
1805 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1807 /* update all of the pointers */
1808 skb_frag_size_sub(frag, pull_len);
1809 frag->page_offset += pull_len;
1810 skb->data_len -= pull_len;
1811 skb->tail += pull_len;
1815 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816 * @rx_ring: rx descriptor ring packet is being transacted on
1817 * @skb: pointer to current skb being updated
1819 * This function provides a basic DMA sync up for the first fragment of an
1820 * skb. The reason for doing this is that the first fragment cannot be
1821 * unmapped until we have reached the end of packet descriptor for a buffer
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1825 struct sk_buff *skb)
1827 /* if the page was released unmap it, else just sync our portion */
1828 if (unlikely(IXGBE_CB(skb)->page_released)) {
1829 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1830 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1831 IXGBE_CB(skb)->page_released = false;
1833 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1835 dma_sync_single_range_for_cpu(rx_ring->dev,
1838 ixgbe_rx_bufsz(rx_ring),
1841 IXGBE_CB(skb)->dma = 0;
1845 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1846 * @rx_ring: rx descriptor ring packet is being transacted on
1847 * @rx_desc: pointer to the EOP Rx descriptor
1848 * @skb: pointer to current skb being fixed
1850 * Check for corrupted packet headers caused by senders on the local L2
1851 * embedded NIC switch not setting up their Tx Descriptors right. These
1852 * should be very rare.
1854 * Also address the case where we are pulling data in on pages only
1855 * and as such no data is present in the skb header.
1857 * In addition if skb is not at least 60 bytes we need to pad it so that
1858 * it is large enough to qualify as a valid Ethernet frame.
1860 * Returns true if an error was encountered and skb was freed.
1862 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1863 union ixgbe_adv_rx_desc *rx_desc,
1864 struct sk_buff *skb)
1866 struct net_device *netdev = rx_ring->netdev;
1868 /* verify that the packet does not have any known errors */
1869 if (unlikely(ixgbe_test_staterr(rx_desc,
1870 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1871 !(netdev->features & NETIF_F_RXALL))) {
1872 dev_kfree_skb_any(skb);
1876 /* place header in linear portion of buffer */
1877 if (skb_is_nonlinear(skb))
1878 ixgbe_pull_tail(rx_ring, skb);
1881 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1882 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1886 /* if skb_pad returns an error the skb was freed */
1887 if (unlikely(skb->len < 60)) {
1888 int pad_len = 60 - skb->len;
1890 if (skb_pad(skb, pad_len))
1892 __skb_put(skb, pad_len);
1899 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1900 * @rx_ring: rx descriptor ring to store buffers on
1901 * @old_buff: donor buffer to have page reused
1903 * Synchronizes page for reuse by the adapter
1905 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1906 struct ixgbe_rx_buffer *old_buff)
1908 struct ixgbe_rx_buffer *new_buff;
1909 u16 nta = rx_ring->next_to_alloc;
1911 new_buff = &rx_ring->rx_buffer_info[nta];
1913 /* update, and store next to alloc */
1915 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1917 /* transfer page from old buffer to new buffer */
1918 new_buff->page = old_buff->page;
1919 new_buff->dma = old_buff->dma;
1920 new_buff->page_offset = old_buff->page_offset;
1922 /* sync the buffer for use by the device */
1923 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1924 new_buff->page_offset,
1925 ixgbe_rx_bufsz(rx_ring),
1930 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1931 * @rx_ring: rx descriptor ring to transact packets on
1932 * @rx_buffer: buffer containing page to add
1933 * @rx_desc: descriptor containing length of buffer written by hardware
1934 * @skb: sk_buff to place the data into
1936 * This function will add the data contained in rx_buffer->page to the skb.
1937 * This is done either through a direct copy if the data in the buffer is
1938 * less than the skb header size, otherwise it will just attach the page as
1939 * a frag to the skb.
1941 * The function will then update the page offset if necessary and return
1942 * true if the buffer can be reused by the adapter.
1944 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1945 struct ixgbe_rx_buffer *rx_buffer,
1946 union ixgbe_adv_rx_desc *rx_desc,
1947 struct sk_buff *skb)
1949 struct page *page = rx_buffer->page;
1950 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1951 #if (PAGE_SIZE < 8192)
1952 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1954 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1955 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1956 ixgbe_rx_bufsz(rx_ring);
1959 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1960 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1962 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1964 /* we can reuse buffer as-is, just make sure it is local */
1965 if (likely(page_to_nid(page) == numa_node_id()))
1968 /* this page cannot be reused so discard it */
1973 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1974 rx_buffer->page_offset, size, truesize);
1976 /* avoid re-using remote pages */
1977 if (unlikely(page_to_nid(page) != numa_node_id()))
1980 #if (PAGE_SIZE < 8192)
1981 /* if we are only owner of page we can reuse it */
1982 if (unlikely(page_count(page) != 1))
1985 /* flip page offset to other buffer */
1986 rx_buffer->page_offset ^= truesize;
1989 * since we are the only owner of the page and we need to
1990 * increment it, just set the value to 2 in order to avoid
1991 * an unecessary locked operation
1993 atomic_set(&page->_count, 2);
1995 /* move offset up to the next cache line */
1996 rx_buffer->page_offset += truesize;
1998 if (rx_buffer->page_offset > last_offset)
2001 /* bump ref count on page before it is given to the stack */
2008 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2009 union ixgbe_adv_rx_desc *rx_desc)
2011 struct ixgbe_rx_buffer *rx_buffer;
2012 struct sk_buff *skb;
2015 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2016 page = rx_buffer->page;
2019 skb = rx_buffer->skb;
2022 void *page_addr = page_address(page) +
2023 rx_buffer->page_offset;
2025 /* prefetch first cache line of first page */
2026 prefetch(page_addr);
2027 #if L1_CACHE_BYTES < 128
2028 prefetch(page_addr + L1_CACHE_BYTES);
2031 /* allocate a skb to store the frags */
2032 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
2034 if (unlikely(!skb)) {
2035 rx_ring->rx_stats.alloc_rx_buff_failed++;
2040 * we will be copying header into skb->data in
2041 * pskb_may_pull so it is in our interest to prefetch
2042 * it now to avoid a possible cache miss
2044 prefetchw(skb->data);
2047 * Delay unmapping of the first packet. It carries the
2048 * header information, HW may still access the header
2049 * after the writeback. Only unmap it when EOP is
2052 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2055 IXGBE_CB(skb)->dma = rx_buffer->dma;
2057 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2058 ixgbe_dma_sync_frag(rx_ring, skb);
2061 /* we are reusing so sync this buffer for CPU use */
2062 dma_sync_single_range_for_cpu(rx_ring->dev,
2064 rx_buffer->page_offset,
2065 ixgbe_rx_bufsz(rx_ring),
2069 /* pull page into skb */
2070 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2071 /* hand second half of page back to the ring */
2072 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2073 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2074 /* the page has been released from the ring */
2075 IXGBE_CB(skb)->page_released = true;
2077 /* we are not reusing the buffer so unmap it */
2078 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2079 ixgbe_rx_pg_size(rx_ring),
2083 /* clear contents of buffer_info */
2084 rx_buffer->skb = NULL;
2086 rx_buffer->page = NULL;
2092 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2093 * @q_vector: structure containing interrupt and ring information
2094 * @rx_ring: rx descriptor ring to transact packets on
2095 * @budget: Total limit on number of packets to process
2097 * This function provides a "bounce buffer" approach to Rx interrupt
2098 * processing. The advantage to this is that on systems that have
2099 * expensive overhead for IOMMU access this provides a means of avoiding
2100 * it by maintaining the mapping of the page to the syste.
2102 * Returns amount of work completed
2104 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2105 struct ixgbe_ring *rx_ring,
2108 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2110 struct ixgbe_adapter *adapter = q_vector->adapter;
2112 unsigned int mss = 0;
2113 #endif /* IXGBE_FCOE */
2114 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2116 while (likely(total_rx_packets < budget)) {
2117 union ixgbe_adv_rx_desc *rx_desc;
2118 struct sk_buff *skb;
2120 /* return some buffers to hardware, one at a time is too slow */
2121 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2122 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2126 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2128 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
2132 * This memory barrier is needed to keep us from reading
2133 * any other fields out of the rx_desc until we know the
2134 * RXD_STAT_DD bit is set
2138 /* retrieve a buffer from the ring */
2139 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2141 /* exit if we failed to retrieve a buffer */
2147 /* place incomplete frames back on ring for completion */
2148 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2151 /* verify the packet layout is correct */
2152 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2155 /* probably a little skewed due to removing CRC */
2156 total_rx_bytes += skb->len;
2158 /* populate checksum, timestamp, VLAN, and protocol */
2159 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2162 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2163 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2164 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2165 /* include DDPed FCoE data */
2166 if (ddp_bytes > 0) {
2168 mss = rx_ring->netdev->mtu -
2169 sizeof(struct fcoe_hdr) -
2170 sizeof(struct fc_frame_header) -
2171 sizeof(struct fcoe_crc_eof);
2175 total_rx_bytes += ddp_bytes;
2176 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2180 dev_kfree_skb_any(skb);
2185 #endif /* IXGBE_FCOE */
2186 skb_mark_napi_id(skb, &q_vector->napi);
2187 ixgbe_rx_skb(q_vector, skb);
2189 /* update budget accounting */
2193 u64_stats_update_begin(&rx_ring->syncp);
2194 rx_ring->stats.packets += total_rx_packets;
2195 rx_ring->stats.bytes += total_rx_bytes;
2196 u64_stats_update_end(&rx_ring->syncp);
2197 q_vector->rx.total_packets += total_rx_packets;
2198 q_vector->rx.total_bytes += total_rx_bytes;
2201 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2203 return total_rx_packets;
2206 #ifdef CONFIG_NET_RX_BUSY_POLL
2207 /* must be called with local_bh_disable()d */
2208 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2210 struct ixgbe_q_vector *q_vector =
2211 container_of(napi, struct ixgbe_q_vector, napi);
2212 struct ixgbe_adapter *adapter = q_vector->adapter;
2213 struct ixgbe_ring *ring;
2216 if (test_bit(__IXGBE_DOWN, &adapter->state))
2217 return LL_FLUSH_FAILED;
2219 if (!ixgbe_qv_lock_poll(q_vector))
2220 return LL_FLUSH_BUSY;
2222 ixgbe_for_each_ring(ring, q_vector->rx) {
2223 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2224 #ifdef BP_EXTENDED_STATS
2226 ring->stats.cleaned += found;
2228 ring->stats.misses++;
2234 ixgbe_qv_unlock_poll(q_vector);
2238 #endif /* CONFIG_NET_RX_BUSY_POLL */
2241 * ixgbe_configure_msix - Configure MSI-X hardware
2242 * @adapter: board private structure
2244 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2247 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2249 struct ixgbe_q_vector *q_vector;
2253 /* Populate MSIX to EITR Select */
2254 if (adapter->num_vfs > 32) {
2255 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2256 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2260 * Populate the IVAR table and set the ITR values to the
2261 * corresponding register.
2263 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2264 struct ixgbe_ring *ring;
2265 q_vector = adapter->q_vector[v_idx];
2267 ixgbe_for_each_ring(ring, q_vector->rx)
2268 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2270 ixgbe_for_each_ring(ring, q_vector->tx)
2271 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2273 ixgbe_write_eitr(q_vector);
2276 switch (adapter->hw.mac.type) {
2277 case ixgbe_mac_82598EB:
2278 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2281 case ixgbe_mac_82599EB:
2282 case ixgbe_mac_X540:
2283 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2288 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2290 /* set up to autoclear timer, and the vectors */
2291 mask = IXGBE_EIMS_ENABLE_MASK;
2292 mask &= ~(IXGBE_EIMS_OTHER |
2293 IXGBE_EIMS_MAILBOX |
2296 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2299 enum latency_range {
2303 latency_invalid = 255
2307 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2308 * @q_vector: structure containing interrupt and ring information
2309 * @ring_container: structure containing ring performance data
2311 * Stores a new ITR value based on packets and byte
2312 * counts during the last interrupt. The advantage of per interrupt
2313 * computation is faster updates and more accurate ITR for the current
2314 * traffic pattern. Constants in this function were computed
2315 * based on theoretical maximum wire speed and thresholds were set based
2316 * on testing data as well as attempting to minimize response time
2317 * while increasing bulk throughput.
2318 * this functionality is controlled by the InterruptThrottleRate module
2319 * parameter (see ixgbe_param.c)
2321 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2322 struct ixgbe_ring_container *ring_container)
2324 int bytes = ring_container->total_bytes;
2325 int packets = ring_container->total_packets;
2328 u8 itr_setting = ring_container->itr;
2333 /* simple throttlerate management
2334 * 0-10MB/s lowest (100000 ints/s)
2335 * 10-20MB/s low (20000 ints/s)
2336 * 20-1249MB/s bulk (8000 ints/s)
2338 /* what was last interrupt timeslice? */
2339 timepassed_us = q_vector->itr >> 2;
2340 if (timepassed_us == 0)
2343 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2345 switch (itr_setting) {
2346 case lowest_latency:
2347 if (bytes_perint > 10)
2348 itr_setting = low_latency;
2351 if (bytes_perint > 20)
2352 itr_setting = bulk_latency;
2353 else if (bytes_perint <= 10)
2354 itr_setting = lowest_latency;
2357 if (bytes_perint <= 20)
2358 itr_setting = low_latency;
2362 /* clear work counters since we have the values we need */
2363 ring_container->total_bytes = 0;
2364 ring_container->total_packets = 0;
2366 /* write updated itr to ring container */
2367 ring_container->itr = itr_setting;
2371 * ixgbe_write_eitr - write EITR register in hardware specific way
2372 * @q_vector: structure containing interrupt and ring information
2374 * This function is made to be called by ethtool and by the driver
2375 * when it needs to update EITR registers at runtime. Hardware
2376 * specific quirks/differences are taken care of here.
2378 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2380 struct ixgbe_adapter *adapter = q_vector->adapter;
2381 struct ixgbe_hw *hw = &adapter->hw;
2382 int v_idx = q_vector->v_idx;
2383 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2385 switch (adapter->hw.mac.type) {
2386 case ixgbe_mac_82598EB:
2387 /* must write high and low 16 bits to reset counter */
2388 itr_reg |= (itr_reg << 16);
2390 case ixgbe_mac_82599EB:
2391 case ixgbe_mac_X540:
2393 * set the WDIS bit to not clear the timer bits and cause an
2394 * immediate assertion of the interrupt
2396 itr_reg |= IXGBE_EITR_CNT_WDIS;
2401 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2404 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2406 u32 new_itr = q_vector->itr;
2409 ixgbe_update_itr(q_vector, &q_vector->tx);
2410 ixgbe_update_itr(q_vector, &q_vector->rx);
2412 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2414 switch (current_itr) {
2415 /* counts and packets in update_itr are dependent on these numbers */
2416 case lowest_latency:
2417 new_itr = IXGBE_100K_ITR;
2420 new_itr = IXGBE_20K_ITR;
2423 new_itr = IXGBE_8K_ITR;
2429 if (new_itr != q_vector->itr) {
2430 /* do an exponential smoothing */
2431 new_itr = (10 * new_itr * q_vector->itr) /
2432 ((9 * new_itr) + q_vector->itr);
2434 /* save the algorithm value here */
2435 q_vector->itr = new_itr;
2437 ixgbe_write_eitr(q_vector);
2442 * ixgbe_check_overtemp_subtask - check for over temperature
2443 * @adapter: pointer to adapter
2445 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2447 struct ixgbe_hw *hw = &adapter->hw;
2448 u32 eicr = adapter->interrupt_event;
2450 if (test_bit(__IXGBE_DOWN, &adapter->state))
2453 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2454 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2457 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2459 switch (hw->device_id) {
2460 case IXGBE_DEV_ID_82599_T3_LOM:
2462 * Since the warning interrupt is for both ports
2463 * we don't have to check if:
2464 * - This interrupt wasn't for our port.
2465 * - We may have missed the interrupt so always have to
2466 * check if we got a LSC
2468 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2469 !(eicr & IXGBE_EICR_LSC))
2472 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2474 bool link_up = false;
2476 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2482 /* Check if this is not due to overtemp */
2483 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2488 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2493 "Network adapter has been stopped because it has over heated. "
2494 "Restart the computer. If the problem persists, "
2495 "power off the system and replace the adapter\n");
2497 adapter->interrupt_event = 0;
2500 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2502 struct ixgbe_hw *hw = &adapter->hw;
2504 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2505 (eicr & IXGBE_EICR_GPI_SDP1)) {
2506 e_crit(probe, "Fan has stopped, replace the adapter\n");
2507 /* write to clear the interrupt */
2508 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2512 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2514 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2517 switch (adapter->hw.mac.type) {
2518 case ixgbe_mac_82599EB:
2520 * Need to check link state so complete overtemp check
2523 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2524 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2525 adapter->interrupt_event = eicr;
2526 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2527 ixgbe_service_event_schedule(adapter);
2531 case ixgbe_mac_X540:
2532 if (!(eicr & IXGBE_EICR_TS))
2540 "Network adapter has been stopped because it has over heated. "
2541 "Restart the computer. If the problem persists, "
2542 "power off the system and replace the adapter\n");
2545 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2547 struct ixgbe_hw *hw = &adapter->hw;
2549 if (eicr & IXGBE_EICR_GPI_SDP2) {
2550 /* Clear the interrupt */
2551 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2552 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2553 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2554 ixgbe_service_event_schedule(adapter);
2558 if (eicr & IXGBE_EICR_GPI_SDP1) {
2559 /* Clear the interrupt */
2560 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2561 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2562 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2563 ixgbe_service_event_schedule(adapter);
2568 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2570 struct ixgbe_hw *hw = &adapter->hw;
2573 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2574 adapter->link_check_timeout = jiffies;
2575 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2576 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2577 IXGBE_WRITE_FLUSH(hw);
2578 ixgbe_service_event_schedule(adapter);
2582 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2586 struct ixgbe_hw *hw = &adapter->hw;
2588 switch (hw->mac.type) {
2589 case ixgbe_mac_82598EB:
2590 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2591 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2593 case ixgbe_mac_82599EB:
2594 case ixgbe_mac_X540:
2595 mask = (qmask & 0xFFFFFFFF);
2597 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2598 mask = (qmask >> 32);
2600 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2605 /* skip the flush */
2608 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2612 struct ixgbe_hw *hw = &adapter->hw;
2614 switch (hw->mac.type) {
2615 case ixgbe_mac_82598EB:
2616 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2617 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2619 case ixgbe_mac_82599EB:
2620 case ixgbe_mac_X540:
2621 mask = (qmask & 0xFFFFFFFF);
2623 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2624 mask = (qmask >> 32);
2626 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2631 /* skip the flush */
2635 * ixgbe_irq_enable - Enable default interrupt generation settings
2636 * @adapter: board private structure
2638 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2641 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2643 /* don't reenable LSC while waiting for link */
2644 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2645 mask &= ~IXGBE_EIMS_LSC;
2647 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2648 switch (adapter->hw.mac.type) {
2649 case ixgbe_mac_82599EB:
2650 mask |= IXGBE_EIMS_GPI_SDP0;
2652 case ixgbe_mac_X540:
2653 mask |= IXGBE_EIMS_TS;
2658 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2659 mask |= IXGBE_EIMS_GPI_SDP1;
2660 switch (adapter->hw.mac.type) {
2661 case ixgbe_mac_82599EB:
2662 mask |= IXGBE_EIMS_GPI_SDP1;
2663 mask |= IXGBE_EIMS_GPI_SDP2;
2664 case ixgbe_mac_X540:
2665 mask |= IXGBE_EIMS_ECC;
2666 mask |= IXGBE_EIMS_MAILBOX;
2672 if (adapter->hw.mac.type == ixgbe_mac_X540)
2673 mask |= IXGBE_EIMS_TIMESYNC;
2675 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2676 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2677 mask |= IXGBE_EIMS_FLOW_DIR;
2679 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2681 ixgbe_irq_enable_queues(adapter, ~0);
2683 IXGBE_WRITE_FLUSH(&adapter->hw);
2686 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2688 struct ixgbe_adapter *adapter = data;
2689 struct ixgbe_hw *hw = &adapter->hw;
2693 * Workaround for Silicon errata. Use clear-by-write instead
2694 * of clear-by-read. Reading with EICS will return the
2695 * interrupt causes without clearing, which later be done
2696 * with the write to EICR.
2698 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2700 /* The lower 16bits of the EICR register are for the queue interrupts
2701 * which should be masked here in order to not accidently clear them if
2702 * the bits are high when ixgbe_msix_other is called. There is a race
2703 * condition otherwise which results in possible performance loss
2704 * especially if the ixgbe_msix_other interrupt is triggering
2705 * consistently (as it would when PPS is turned on for the X540 device)
2709 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2711 if (eicr & IXGBE_EICR_LSC)
2712 ixgbe_check_lsc(adapter);
2714 if (eicr & IXGBE_EICR_MAILBOX)
2715 ixgbe_msg_task(adapter);
2717 switch (hw->mac.type) {
2718 case ixgbe_mac_82599EB:
2719 case ixgbe_mac_X540:
2720 if (eicr & IXGBE_EICR_ECC) {
2721 e_info(link, "Received ECC Err, initiating reset\n");
2722 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2723 ixgbe_service_event_schedule(adapter);
2724 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2726 /* Handle Flow Director Full threshold interrupt */
2727 if (eicr & IXGBE_EICR_FLOW_DIR) {
2728 int reinit_count = 0;
2730 for (i = 0; i < adapter->num_tx_queues; i++) {
2731 struct ixgbe_ring *ring = adapter->tx_ring[i];
2732 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2737 /* no more flow director interrupts until after init */
2738 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2739 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2740 ixgbe_service_event_schedule(adapter);
2743 ixgbe_check_sfp_event(adapter, eicr);
2744 ixgbe_check_overtemp_event(adapter, eicr);
2750 ixgbe_check_fan_failure(adapter, eicr);
2752 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2753 ixgbe_ptp_check_pps_event(adapter, eicr);
2755 /* re-enable the original interrupt state, no lsc, no queues */
2756 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2757 ixgbe_irq_enable(adapter, false, false);
2762 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2764 struct ixgbe_q_vector *q_vector = data;
2766 /* EIAM disabled interrupts (on this vector) for us */
2768 if (q_vector->rx.ring || q_vector->tx.ring)
2769 napi_schedule(&q_vector->napi);
2775 * ixgbe_poll - NAPI Rx polling callback
2776 * @napi: structure for representing this polling device
2777 * @budget: how many packets driver is allowed to clean
2779 * This function is used for legacy and MSI, NAPI mode
2781 int ixgbe_poll(struct napi_struct *napi, int budget)
2783 struct ixgbe_q_vector *q_vector =
2784 container_of(napi, struct ixgbe_q_vector, napi);
2785 struct ixgbe_adapter *adapter = q_vector->adapter;
2786 struct ixgbe_ring *ring;
2787 int per_ring_budget;
2788 bool clean_complete = true;
2790 #ifdef CONFIG_IXGBE_DCA
2791 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2792 ixgbe_update_dca(q_vector);
2795 ixgbe_for_each_ring(ring, q_vector->tx)
2796 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2798 if (!ixgbe_qv_lock_napi(q_vector))
2801 /* attempt to distribute budget to each queue fairly, but don't allow
2802 * the budget to go below 1 because we'll exit polling */
2803 if (q_vector->rx.count > 1)
2804 per_ring_budget = max(budget/q_vector->rx.count, 1);
2806 per_ring_budget = budget;
2808 ixgbe_for_each_ring(ring, q_vector->rx)
2809 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2810 per_ring_budget) < per_ring_budget);
2812 ixgbe_qv_unlock_napi(q_vector);
2813 /* If all work not completed, return budget and keep polling */
2814 if (!clean_complete)
2817 /* all work done, exit the polling mode */
2818 napi_complete(napi);
2819 if (adapter->rx_itr_setting & 1)
2820 ixgbe_set_itr(q_vector);
2821 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2822 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2828 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2829 * @adapter: board private structure
2831 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2832 * interrupts from the kernel.
2834 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2836 struct net_device *netdev = adapter->netdev;
2840 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2841 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2842 struct msix_entry *entry = &adapter->msix_entries[vector];
2844 if (q_vector->tx.ring && q_vector->rx.ring) {
2845 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2846 "%s-%s-%d", netdev->name, "TxRx", ri++);
2848 } else if (q_vector->rx.ring) {
2849 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2850 "%s-%s-%d", netdev->name, "rx", ri++);
2851 } else if (q_vector->tx.ring) {
2852 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2853 "%s-%s-%d", netdev->name, "tx", ti++);
2855 /* skip this unused q_vector */
2858 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2859 q_vector->name, q_vector);
2861 e_err(probe, "request_irq failed for MSIX interrupt "
2862 "Error: %d\n", err);
2863 goto free_queue_irqs;
2865 /* If Flow Director is enabled, set interrupt affinity */
2866 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2867 /* assign the mask for this irq */
2868 irq_set_affinity_hint(entry->vector,
2869 &q_vector->affinity_mask);
2873 err = request_irq(adapter->msix_entries[vector].vector,
2874 ixgbe_msix_other, 0, netdev->name, adapter);
2876 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2877 goto free_queue_irqs;
2885 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2887 free_irq(adapter->msix_entries[vector].vector,
2888 adapter->q_vector[vector]);
2890 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2891 pci_disable_msix(adapter->pdev);
2892 kfree(adapter->msix_entries);
2893 adapter->msix_entries = NULL;
2898 * ixgbe_intr - legacy mode Interrupt Handler
2899 * @irq: interrupt number
2900 * @data: pointer to a network interface device structure
2902 static irqreturn_t ixgbe_intr(int irq, void *data)
2904 struct ixgbe_adapter *adapter = data;
2905 struct ixgbe_hw *hw = &adapter->hw;
2906 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2910 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2911 * before the read of EICR.
2913 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2915 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2916 * therefore no explicit interrupt disable is necessary */
2917 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2920 * shared interrupt alert!
2921 * make sure interrupts are enabled because the read will
2922 * have disabled interrupts due to EIAM
2923 * finish the workaround of silicon errata on 82598. Unmask
2924 * the interrupt that we masked before the EICR read.
2926 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2927 ixgbe_irq_enable(adapter, true, true);
2928 return IRQ_NONE; /* Not our interrupt */
2931 if (eicr & IXGBE_EICR_LSC)
2932 ixgbe_check_lsc(adapter);
2934 switch (hw->mac.type) {
2935 case ixgbe_mac_82599EB:
2936 ixgbe_check_sfp_event(adapter, eicr);
2938 case ixgbe_mac_X540:
2939 if (eicr & IXGBE_EICR_ECC) {
2940 e_info(link, "Received ECC Err, initiating reset\n");
2941 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2942 ixgbe_service_event_schedule(adapter);
2943 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2945 ixgbe_check_overtemp_event(adapter, eicr);
2951 ixgbe_check_fan_failure(adapter, eicr);
2952 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2953 ixgbe_ptp_check_pps_event(adapter, eicr);
2955 /* would disable interrupts here but EIAM disabled it */
2956 napi_schedule(&q_vector->napi);
2959 * re-enable link(maybe) and non-queue interrupts, no flush.
2960 * ixgbe_poll will re-enable the queue interrupts
2962 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2963 ixgbe_irq_enable(adapter, false, false);
2969 * ixgbe_request_irq - initialize interrupts
2970 * @adapter: board private structure
2972 * Attempts to configure interrupts using the best available
2973 * capabilities of the hardware and kernel.
2975 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2977 struct net_device *netdev = adapter->netdev;
2980 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2981 err = ixgbe_request_msix_irqs(adapter);
2982 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2983 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2984 netdev->name, adapter);
2986 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2987 netdev->name, adapter);
2990 e_err(probe, "request_irq failed, Error %d\n", err);
2995 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2999 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3000 free_irq(adapter->pdev->irq, adapter);
3004 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3005 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3006 struct msix_entry *entry = &adapter->msix_entries[vector];
3008 /* free only the irqs that were actually requested */
3009 if (!q_vector->rx.ring && !q_vector->tx.ring)
3012 /* clear the affinity_mask in the IRQ descriptor */
3013 irq_set_affinity_hint(entry->vector, NULL);
3015 free_irq(entry->vector, q_vector);
3018 free_irq(adapter->msix_entries[vector++].vector, adapter);
3022 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3023 * @adapter: board private structure
3025 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3027 switch (adapter->hw.mac.type) {
3028 case ixgbe_mac_82598EB:
3029 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3031 case ixgbe_mac_82599EB:
3032 case ixgbe_mac_X540:
3033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3034 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3035 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3040 IXGBE_WRITE_FLUSH(&adapter->hw);
3041 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3044 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3045 synchronize_irq(adapter->msix_entries[vector].vector);
3047 synchronize_irq(adapter->msix_entries[vector++].vector);
3049 synchronize_irq(adapter->pdev->irq);
3054 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3057 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3059 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3061 ixgbe_write_eitr(q_vector);
3063 ixgbe_set_ivar(adapter, 0, 0, 0);
3064 ixgbe_set_ivar(adapter, 1, 0, 0);
3066 e_info(hw, "Legacy interrupt IVAR setup done\n");
3070 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3071 * @adapter: board private structure
3072 * @ring: structure containing ring specific data
3074 * Configure the Tx descriptor ring after a reset.
3076 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3077 struct ixgbe_ring *ring)
3079 struct ixgbe_hw *hw = &adapter->hw;
3080 u64 tdba = ring->dma;
3082 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3083 u8 reg_idx = ring->reg_idx;
3085 /* disable queue to avoid issues while updating state */
3086 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3087 IXGBE_WRITE_FLUSH(hw);
3089 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3090 (tdba & DMA_BIT_MASK(32)));
3091 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3092 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3093 ring->count * sizeof(union ixgbe_adv_tx_desc));
3094 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3095 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3096 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3099 * set WTHRESH to encourage burst writeback, it should not be set
3100 * higher than 1 when:
3101 * - ITR is 0 as it could cause false TX hangs
3102 * - ITR is set to > 100k int/sec and BQL is enabled
3104 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3105 * to or less than the number of on chip descriptors, which is
3108 #if IS_ENABLED(CONFIG_BQL)
3109 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3111 if (!ring->q_vector || (ring->q_vector->itr < 8))
3113 txdctl |= (1 << 16); /* WTHRESH = 1 */
3115 txdctl |= (8 << 16); /* WTHRESH = 8 */
3118 * Setting PTHRESH to 32 both improves performance
3119 * and avoids a TX hang with DFP enabled
3121 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3122 32; /* PTHRESH = 32 */
3124 /* reinitialize flowdirector state */
3125 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3126 ring->atr_sample_rate = adapter->atr_sample_rate;
3127 ring->atr_count = 0;
3128 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3130 ring->atr_sample_rate = 0;
3133 /* initialize XPS */
3134 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3135 struct ixgbe_q_vector *q_vector = ring->q_vector;
3138 netif_set_xps_queue(ring->netdev,
3139 &q_vector->affinity_mask,
3143 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3146 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3148 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3149 if (hw->mac.type == ixgbe_mac_82598EB &&
3150 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3153 /* poll to verify queue is enabled */
3155 usleep_range(1000, 2000);
3156 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3157 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3159 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3162 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3164 struct ixgbe_hw *hw = &adapter->hw;
3166 u8 tcs = netdev_get_num_tc(adapter->netdev);
3168 if (hw->mac.type == ixgbe_mac_82598EB)
3171 /* disable the arbiter while setting MTQC */
3172 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3173 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3174 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3176 /* set transmit pool layout */
3177 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3178 mtqc = IXGBE_MTQC_VT_ENA;
3180 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3182 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3183 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3184 mtqc |= IXGBE_MTQC_32VF;
3186 mtqc |= IXGBE_MTQC_64VF;
3189 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3191 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3193 mtqc = IXGBE_MTQC_64Q_1PB;
3196 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3198 /* Enable Security TX Buffer IFG for multiple pb */
3200 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3201 sectx |= IXGBE_SECTX_DCB;
3202 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3205 /* re-enable the arbiter */
3206 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3207 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3211 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3212 * @adapter: board private structure
3214 * Configure the Tx unit of the MAC after a reset.
3216 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3218 struct ixgbe_hw *hw = &adapter->hw;
3222 ixgbe_setup_mtqc(adapter);
3224 if (hw->mac.type != ixgbe_mac_82598EB) {
3225 /* DMATXCTL.EN must be before Tx queues are enabled */
3226 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3227 dmatxctl |= IXGBE_DMATXCTL_TE;
3228 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3231 /* Setup the HW Tx Head and Tail descriptor pointers */
3232 for (i = 0; i < adapter->num_tx_queues; i++)
3233 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3236 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3237 struct ixgbe_ring *ring)
3239 struct ixgbe_hw *hw = &adapter->hw;
3240 u8 reg_idx = ring->reg_idx;
3241 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3243 srrctl |= IXGBE_SRRCTL_DROP_EN;
3245 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3248 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3249 struct ixgbe_ring *ring)
3251 struct ixgbe_hw *hw = &adapter->hw;
3252 u8 reg_idx = ring->reg_idx;
3253 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3255 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3257 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3260 #ifdef CONFIG_IXGBE_DCB
3261 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3263 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3267 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3269 if (adapter->ixgbe_ieee_pfc)
3270 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3273 * We should set the drop enable bit if:
3276 * Number of Rx queues > 1 and flow control is disabled
3278 * This allows us to avoid head of line blocking for security
3279 * and performance reasons.
3281 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3282 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3283 for (i = 0; i < adapter->num_rx_queues; i++)
3284 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3286 for (i = 0; i < adapter->num_rx_queues; i++)
3287 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3291 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3293 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3294 struct ixgbe_ring *rx_ring)
3296 struct ixgbe_hw *hw = &adapter->hw;
3298 u8 reg_idx = rx_ring->reg_idx;
3300 if (hw->mac.type == ixgbe_mac_82598EB) {
3301 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3304 * if VMDq is not active we must program one srrctl register
3305 * per RSS queue since we have enabled RDRXCTL.MVMEN
3310 /* configure header buffer length, needed for RSC */
3311 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3313 /* configure the packet buffer length */
3314 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3316 /* configure descriptor type */
3317 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3319 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3322 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3324 struct ixgbe_hw *hw = &adapter->hw;
3325 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3326 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3327 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3328 u32 mrqc = 0, reta = 0;
3331 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3334 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3335 * make full use of any rings they may have. We will use the
3336 * PSRTYPE register to control how many rings we use within the PF.
3338 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3341 /* Fill out hash function seeds */
3342 for (i = 0; i < 10; i++)
3343 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3345 /* Fill out redirection table */
3346 for (i = 0, j = 0; i < 128; i++, j++) {
3349 /* reta = 4-byte sliding window of
3350 * 0x00..(indices-1)(indices-1)00..etc. */
3351 reta = (reta << 8) | (j * 0x11);
3353 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3356 /* Disable indicating checksum in descriptor, enables RSS hash */
3357 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3358 rxcsum |= IXGBE_RXCSUM_PCSD;
3359 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3361 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3362 if (adapter->ring_feature[RING_F_RSS].mask)
3363 mrqc = IXGBE_MRQC_RSSEN;
3365 u8 tcs = netdev_get_num_tc(adapter->netdev);
3367 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3369 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3371 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3372 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3373 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3375 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3378 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3380 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3382 mrqc = IXGBE_MRQC_RSSEN;
3386 /* Perform hash on these packet types */
3387 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3388 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3389 IXGBE_MRQC_RSS_FIELD_IPV6 |
3390 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3392 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3393 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3394 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3395 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3397 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3401 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3402 * @adapter: address of board private structure
3403 * @index: index of ring to set
3405 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3406 struct ixgbe_ring *ring)
3408 struct ixgbe_hw *hw = &adapter->hw;
3410 u8 reg_idx = ring->reg_idx;
3412 if (!ring_is_rsc_enabled(ring))
3415 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3416 rscctrl |= IXGBE_RSCCTL_RSCEN;
3418 * we must limit the number of descriptors so that the
3419 * total size of max desc * buf_len is not greater
3422 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3423 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3426 #define IXGBE_MAX_RX_DESC_POLL 10
3427 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3428 struct ixgbe_ring *ring)
3430 struct ixgbe_hw *hw = &adapter->hw;
3431 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3433 u8 reg_idx = ring->reg_idx;
3435 if (ixgbe_removed(hw->hw_addr))
3437 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3438 if (hw->mac.type == ixgbe_mac_82598EB &&
3439 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3443 usleep_range(1000, 2000);
3444 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3445 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3448 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3449 "the polling period\n", reg_idx);
3453 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3454 struct ixgbe_ring *ring)
3456 struct ixgbe_hw *hw = &adapter->hw;
3457 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3459 u8 reg_idx = ring->reg_idx;
3461 if (ixgbe_removed(hw->hw_addr))
3463 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3464 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3466 /* write value back with RXDCTL.ENABLE bit cleared */
3467 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3469 if (hw->mac.type == ixgbe_mac_82598EB &&
3470 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3473 /* the hardware may take up to 100us to really disable the rx queue */
3476 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3477 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3480 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3481 "the polling period\n", reg_idx);
3485 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3486 struct ixgbe_ring *ring)
3488 struct ixgbe_hw *hw = &adapter->hw;
3489 u64 rdba = ring->dma;
3491 u8 reg_idx = ring->reg_idx;
3493 /* disable queue to avoid issues while updating state */
3494 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3495 ixgbe_disable_rx_queue(adapter, ring);
3497 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3498 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3499 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3500 ring->count * sizeof(union ixgbe_adv_rx_desc));
3501 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3502 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3503 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3505 ixgbe_configure_srrctl(adapter, ring);
3506 ixgbe_configure_rscctl(adapter, ring);
3508 if (hw->mac.type == ixgbe_mac_82598EB) {
3510 * enable cache line friendly hardware writes:
3511 * PTHRESH=32 descriptors (half the internal cache),
3512 * this also removes ugly rx_no_buffer_count increment
3513 * HTHRESH=4 descriptors (to minimize latency on fetch)
3514 * WTHRESH=8 burst writeback up to two cache lines
3516 rxdctl &= ~0x3FFFFF;
3520 /* enable receive descriptor ring */
3521 rxdctl |= IXGBE_RXDCTL_ENABLE;
3522 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3524 ixgbe_rx_desc_queue_enable(adapter, ring);
3525 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3528 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3530 struct ixgbe_hw *hw = &adapter->hw;
3531 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3534 /* PSRTYPE must be initialized in non 82598 adapters */
3535 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3536 IXGBE_PSRTYPE_UDPHDR |
3537 IXGBE_PSRTYPE_IPV4HDR |
3538 IXGBE_PSRTYPE_L2HDR |
3539 IXGBE_PSRTYPE_IPV6HDR;
3541 if (hw->mac.type == ixgbe_mac_82598EB)
3549 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3550 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3553 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3555 struct ixgbe_hw *hw = &adapter->hw;
3556 u32 reg_offset, vf_shift;
3557 u32 gcr_ext, vmdctl;
3560 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3563 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3564 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3565 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3566 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3567 vmdctl |= IXGBE_VT_CTL_REPLEN;
3568 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3570 vf_shift = VMDQ_P(0) % 32;
3571 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3573 /* Enable only the PF's pool for Tx/Rx */
3574 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3575 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3576 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3577 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3578 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3579 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3581 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3582 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3585 * Set up VF register offsets for selected VT Mode,
3586 * i.e. 32 or 64 VFs for SR-IOV
3588 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3589 case IXGBE_82599_VMDQ_8Q_MASK:
3590 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3592 case IXGBE_82599_VMDQ_4Q_MASK:
3593 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3596 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3600 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3603 /* Enable MAC Anti-Spoofing */
3604 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3606 /* For VFs that have spoof checking turned off */
3607 for (i = 0; i < adapter->num_vfs; i++) {
3608 if (!adapter->vfinfo[i].spoofchk_enabled)
3609 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3613 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3615 struct ixgbe_hw *hw = &adapter->hw;
3616 struct net_device *netdev = adapter->netdev;
3617 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3618 struct ixgbe_ring *rx_ring;
3623 /* adjust max frame to be able to do baby jumbo for FCoE */
3624 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3625 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3626 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3628 #endif /* IXGBE_FCOE */
3630 /* adjust max frame to be at least the size of a standard frame */
3631 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3632 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3634 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3635 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3636 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3637 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3639 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3642 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3643 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3644 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3645 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3648 * Setup the HW Rx Head and Tail Descriptor Pointers and
3649 * the Base and Length of the Rx Descriptor Ring
3651 for (i = 0; i < adapter->num_rx_queues; i++) {
3652 rx_ring = adapter->rx_ring[i];
3653 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3654 set_ring_rsc_enabled(rx_ring);
3656 clear_ring_rsc_enabled(rx_ring);
3660 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3662 struct ixgbe_hw *hw = &adapter->hw;
3663 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3665 switch (hw->mac.type) {
3666 case ixgbe_mac_82598EB:
3668 * For VMDq support of different descriptor types or
3669 * buffer sizes through the use of multiple SRRCTL
3670 * registers, RDRXCTL.MVMEN must be set to 1
3672 * also, the manual doesn't mention it clearly but DCA hints
3673 * will only use queue 0's tags unless this bit is set. Side
3674 * effects of setting this bit are only that SRRCTL must be
3675 * fully programmed [0..15]
3677 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3679 case ixgbe_mac_82599EB:
3680 case ixgbe_mac_X540:
3681 /* Disable RSC for ACK packets */
3682 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3683 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3684 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3685 /* hardware requires some bits to be set by default */
3686 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3687 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3690 /* We should do nothing since we don't know this hardware */
3694 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3698 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3699 * @adapter: board private structure
3701 * Configure the Rx unit of the MAC after a reset.
3703 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3705 struct ixgbe_hw *hw = &adapter->hw;
3709 /* disable receives while setting up the descriptors */
3710 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3711 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3713 ixgbe_setup_psrtype(adapter);
3714 ixgbe_setup_rdrxctl(adapter);
3717 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3718 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3719 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3720 rfctl |= IXGBE_RFCTL_RSC_DIS;
3721 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3723 /* Program registers for the distribution of queues */
3724 ixgbe_setup_mrqc(adapter);
3726 /* set_rx_buffer_len must be called before ring initialization */
3727 ixgbe_set_rx_buffer_len(adapter);
3730 * Setup the HW Rx Head and Tail Descriptor Pointers and
3731 * the Base and Length of the Rx Descriptor Ring
3733 for (i = 0; i < adapter->num_rx_queues; i++)
3734 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3736 /* disable drop enable for 82598 parts */
3737 if (hw->mac.type == ixgbe_mac_82598EB)
3738 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3740 /* enable all receives */
3741 rxctrl |= IXGBE_RXCTRL_RXEN;
3742 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3745 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3746 __be16 proto, u16 vid)
3748 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3749 struct ixgbe_hw *hw = &adapter->hw;
3751 /* add VID to filter table */
3752 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3753 set_bit(vid, adapter->active_vlans);
3758 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3759 __be16 proto, u16 vid)
3761 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3762 struct ixgbe_hw *hw = &adapter->hw;
3764 /* remove VID from filter table */
3765 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3766 clear_bit(vid, adapter->active_vlans);
3772 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3773 * @adapter: driver data
3775 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3777 struct ixgbe_hw *hw = &adapter->hw;
3781 switch (hw->mac.type) {
3782 case ixgbe_mac_82598EB:
3783 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3784 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3785 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3787 case ixgbe_mac_82599EB:
3788 case ixgbe_mac_X540:
3789 for (i = 0; i < adapter->num_rx_queues; i++) {
3790 struct ixgbe_ring *ring = adapter->rx_ring[i];
3792 if (ring->l2_accel_priv)
3795 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3796 vlnctrl &= ~IXGBE_RXDCTL_VME;
3797 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3806 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3807 * @adapter: driver data
3809 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3811 struct ixgbe_hw *hw = &adapter->hw;
3815 switch (hw->mac.type) {
3816 case ixgbe_mac_82598EB:
3817 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3818 vlnctrl |= IXGBE_VLNCTRL_VME;
3819 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3821 case ixgbe_mac_82599EB:
3822 case ixgbe_mac_X540:
3823 for (i = 0; i < adapter->num_rx_queues; i++) {
3824 struct ixgbe_ring *ring = adapter->rx_ring[i];
3826 if (ring->l2_accel_priv)
3829 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3830 vlnctrl |= IXGBE_RXDCTL_VME;
3831 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3839 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3843 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3845 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3846 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3850 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3851 * @netdev: network interface device structure
3853 * Writes multicast address list to the MTA hash table.
3854 * Returns: -ENOMEM on failure
3855 * 0 on no addresses written
3856 * X on writing X addresses to MTA
3858 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3860 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3861 struct ixgbe_hw *hw = &adapter->hw;
3863 if (!netif_running(netdev))
3866 if (hw->mac.ops.update_mc_addr_list)
3867 hw->mac.ops.update_mc_addr_list(hw, netdev);
3871 #ifdef CONFIG_PCI_IOV
3872 ixgbe_restore_vf_multicasts(adapter);
3875 return netdev_mc_count(netdev);
3878 #ifdef CONFIG_PCI_IOV
3879 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
3881 struct ixgbe_hw *hw = &adapter->hw;
3883 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3884 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3885 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
3886 adapter->mac_table[i].queue,
3889 hw->mac.ops.clear_rar(hw, i);
3891 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
3896 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
3898 struct ixgbe_hw *hw = &adapter->hw;
3900 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3901 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
3902 if (adapter->mac_table[i].state &
3903 IXGBE_MAC_STATE_IN_USE)
3904 hw->mac.ops.set_rar(hw, i,
3905 adapter->mac_table[i].addr,
3906 adapter->mac_table[i].queue,
3909 hw->mac.ops.clear_rar(hw, i);
3911 adapter->mac_table[i].state &=
3912 ~(IXGBE_MAC_STATE_MODIFIED);
3917 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
3920 struct ixgbe_hw *hw = &adapter->hw;
3922 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3923 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3924 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3925 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3926 adapter->mac_table[i].queue = 0;
3928 ixgbe_sync_mac_table(adapter);
3931 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
3933 struct ixgbe_hw *hw = &adapter->hw;
3936 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3937 if (adapter->mac_table[i].state == 0)
3943 /* this function destroys the first RAR entry */
3944 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
3947 struct ixgbe_hw *hw = &adapter->hw;
3949 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
3950 adapter->mac_table[0].queue = VMDQ_P(0);
3951 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
3952 IXGBE_MAC_STATE_IN_USE);
3953 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
3954 adapter->mac_table[0].queue,
3958 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3960 struct ixgbe_hw *hw = &adapter->hw;
3963 if (is_zero_ether_addr(addr))
3966 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3967 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3969 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
3970 IXGBE_MAC_STATE_IN_USE);
3971 ether_addr_copy(adapter->mac_table[i].addr, addr);
3972 adapter->mac_table[i].queue = queue;
3973 ixgbe_sync_mac_table(adapter);
3979 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3981 /* search table for addr, if found, set to 0 and sync */
3983 struct ixgbe_hw *hw = &adapter->hw;
3985 if (is_zero_ether_addr(addr))
3988 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3989 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
3990 adapter->mac_table[i].queue == queue) {
3991 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3992 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3993 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3994 adapter->mac_table[i].queue = 0;
3995 ixgbe_sync_mac_table(adapter);
4002 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4003 * @netdev: network interface device structure
4005 * Writes unicast address list to the RAR table.
4006 * Returns: -ENOMEM on failure/insufficient address space
4007 * 0 on no addresses written
4008 * X on writing X addresses to the RAR table
4010 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4012 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4015 /* return ENOMEM indicating insufficient memory for addresses */
4016 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4019 if (!netdev_uc_empty(netdev)) {
4020 struct netdev_hw_addr *ha;
4021 netdev_for_each_uc_addr(ha, netdev) {
4022 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4023 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4031 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4032 * @netdev: network interface device structure
4034 * The set_rx_method entry point is called whenever the unicast/multicast
4035 * address list or the network interface flags are updated. This routine is
4036 * responsible for configuring the hardware for proper unicast, multicast and
4039 void ixgbe_set_rx_mode(struct net_device *netdev)
4041 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4042 struct ixgbe_hw *hw = &adapter->hw;
4043 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4047 /* Check for Promiscuous and All Multicast modes */
4048 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4049 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4051 /* set all bits that we expect to always be set */
4052 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4053 fctrl |= IXGBE_FCTRL_BAM;
4054 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4055 fctrl |= IXGBE_FCTRL_PMCF;
4057 /* clear the bits we are changing the status of */
4058 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4059 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4060 if (netdev->flags & IFF_PROMISC) {
4061 hw->addr_ctrl.user_set_promisc = true;
4062 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4063 vmolr |= IXGBE_VMOLR_MPE;
4064 /* Only disable hardware filter vlans in promiscuous mode
4065 * if SR-IOV and VMDQ are disabled - otherwise ensure
4066 * that hardware VLAN filters remain enabled.
4068 if (!(adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4069 IXGBE_FLAG_SRIOV_ENABLED)))
4070 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4072 if (netdev->flags & IFF_ALLMULTI) {
4073 fctrl |= IXGBE_FCTRL_MPE;
4074 vmolr |= IXGBE_VMOLR_MPE;
4076 vlnctrl |= IXGBE_VLNCTRL_VFE;
4077 hw->addr_ctrl.user_set_promisc = false;
4081 * Write addresses to available RAR registers, if there is not
4082 * sufficient space to store all the addresses then enable
4083 * unicast promiscuous mode
4085 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4087 fctrl |= IXGBE_FCTRL_UPE;
4088 vmolr |= IXGBE_VMOLR_ROPE;
4091 /* Write addresses to the MTA, if the attempt fails
4092 * then we should just turn on promiscuous mode so
4093 * that we can at least receive multicast traffic
4095 count = ixgbe_write_mc_addr_list(netdev);
4097 fctrl |= IXGBE_FCTRL_MPE;
4098 vmolr |= IXGBE_VMOLR_MPE;
4100 vmolr |= IXGBE_VMOLR_ROMPE;
4103 if (hw->mac.type != ixgbe_mac_82598EB) {
4104 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4105 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4107 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4110 /* This is useful for sniffing bad packets. */
4111 if (adapter->netdev->features & NETIF_F_RXALL) {
4112 /* UPE and MPE will be handled by normal PROMISC logic
4113 * in e1000e_set_rx_mode */
4114 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4115 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4116 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4118 fctrl &= ~(IXGBE_FCTRL_DPF);
4119 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4122 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4123 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4125 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4126 ixgbe_vlan_strip_enable(adapter);
4128 ixgbe_vlan_strip_disable(adapter);
4131 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4135 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4136 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4137 napi_enable(&adapter->q_vector[q_idx]->napi);
4141 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4145 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4146 napi_disable(&adapter->q_vector[q_idx]->napi);
4147 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4148 pr_info("QV %d locked\n", q_idx);
4149 usleep_range(1000, 20000);
4154 #ifdef CONFIG_IXGBE_DCB
4156 * ixgbe_configure_dcb - Configure DCB hardware
4157 * @adapter: ixgbe adapter struct
4159 * This is called by the driver on open to configure the DCB hardware.
4160 * This is also called by the gennetlink interface when reconfiguring
4163 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4165 struct ixgbe_hw *hw = &adapter->hw;
4166 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4168 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4169 if (hw->mac.type == ixgbe_mac_82598EB)
4170 netif_set_gso_max_size(adapter->netdev, 65536);
4174 if (hw->mac.type == ixgbe_mac_82598EB)
4175 netif_set_gso_max_size(adapter->netdev, 32768);
4178 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4179 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4182 /* reconfigure the hardware */
4183 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4184 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4186 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4188 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4189 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4190 ixgbe_dcb_hw_ets(&adapter->hw,
4191 adapter->ixgbe_ieee_ets,
4193 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4194 adapter->ixgbe_ieee_pfc->pfc_en,
4195 adapter->ixgbe_ieee_ets->prio_tc);
4198 /* Enable RSS Hash per TC */
4199 if (hw->mac.type != ixgbe_mac_82598EB) {
4201 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4208 /* write msb to all 8 TCs in one write */
4209 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4214 /* Additional bittime to account for IXGBE framing */
4215 #define IXGBE_ETH_FRAMING 20
4218 * ixgbe_hpbthresh - calculate high water mark for flow control
4220 * @adapter: board private structure to calculate for
4221 * @pb: packet buffer to calculate
4223 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4225 struct ixgbe_hw *hw = &adapter->hw;
4226 struct net_device *dev = adapter->netdev;
4227 int link, tc, kb, marker;
4230 /* Calculate max LAN frame size */
4231 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4234 /* FCoE traffic class uses FCOE jumbo frames */
4235 if ((dev->features & NETIF_F_FCOE_MTU) &&
4236 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4237 (pb == ixgbe_fcoe_get_tc(adapter)))
4238 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4241 /* Calculate delay value for device */
4242 switch (hw->mac.type) {
4243 case ixgbe_mac_X540:
4244 dv_id = IXGBE_DV_X540(link, tc);
4247 dv_id = IXGBE_DV(link, tc);
4251 /* Loopback switch introduces additional latency */
4252 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4253 dv_id += IXGBE_B2BT(tc);
4255 /* Delay value is calculated in bit times convert to KB */
4256 kb = IXGBE_BT2KB(dv_id);
4257 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4259 marker = rx_pba - kb;
4261 /* It is possible that the packet buffer is not large enough
4262 * to provide required headroom. In this case throw an error
4263 * to user and a do the best we can.
4266 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4267 "headroom to support flow control."
4268 "Decrease MTU or number of traffic classes\n", pb);
4276 * ixgbe_lpbthresh - calculate low water mark for for flow control
4278 * @adapter: board private structure to calculate for
4279 * @pb: packet buffer to calculate
4281 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4283 struct ixgbe_hw *hw = &adapter->hw;
4284 struct net_device *dev = adapter->netdev;
4288 /* Calculate max LAN frame size */
4289 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4292 /* FCoE traffic class uses FCOE jumbo frames */
4293 if ((dev->features & NETIF_F_FCOE_MTU) &&
4294 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4295 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4296 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4299 /* Calculate delay value for device */
4300 switch (hw->mac.type) {
4301 case ixgbe_mac_X540:
4302 dv_id = IXGBE_LOW_DV_X540(tc);
4305 dv_id = IXGBE_LOW_DV(tc);
4309 /* Delay value is calculated in bit times convert to KB */
4310 return IXGBE_BT2KB(dv_id);
4314 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4316 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4318 struct ixgbe_hw *hw = &adapter->hw;
4319 int num_tc = netdev_get_num_tc(adapter->netdev);
4325 for (i = 0; i < num_tc; i++) {
4326 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4327 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4329 /* Low water marks must not be larger than high water marks */
4330 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4331 hw->fc.low_water[i] = 0;
4334 for (; i < MAX_TRAFFIC_CLASS; i++)
4335 hw->fc.high_water[i] = 0;
4338 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4340 struct ixgbe_hw *hw = &adapter->hw;
4342 u8 tc = netdev_get_num_tc(adapter->netdev);
4344 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4345 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4346 hdrm = 32 << adapter->fdir_pballoc;
4350 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4351 ixgbe_pbthresh_setup(adapter);
4354 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4356 struct ixgbe_hw *hw = &adapter->hw;
4357 struct hlist_node *node2;
4358 struct ixgbe_fdir_filter *filter;
4360 spin_lock(&adapter->fdir_perfect_lock);
4362 if (!hlist_empty(&adapter->fdir_filter_list))
4363 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4365 hlist_for_each_entry_safe(filter, node2,
4366 &adapter->fdir_filter_list, fdir_node) {
4367 ixgbe_fdir_write_perfect_filter_82599(hw,
4370 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4371 IXGBE_FDIR_DROP_QUEUE :
4372 adapter->rx_ring[filter->action]->reg_idx);
4375 spin_unlock(&adapter->fdir_perfect_lock);
4378 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4379 struct ixgbe_adapter *adapter)
4381 struct ixgbe_hw *hw = &adapter->hw;
4384 /* No unicast promiscuous support for VMDQ devices. */
4385 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4386 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4388 /* clear the affected bit */
4389 vmolr &= ~IXGBE_VMOLR_MPE;
4391 if (dev->flags & IFF_ALLMULTI) {
4392 vmolr |= IXGBE_VMOLR_MPE;
4394 vmolr |= IXGBE_VMOLR_ROMPE;
4395 hw->mac.ops.update_mc_addr_list(hw, dev);
4397 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4398 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4401 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4403 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4404 int rss_i = adapter->num_rx_queues_per_pool;
4405 struct ixgbe_hw *hw = &adapter->hw;
4406 u16 pool = vadapter->pool;
4407 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4408 IXGBE_PSRTYPE_UDPHDR |
4409 IXGBE_PSRTYPE_IPV4HDR |
4410 IXGBE_PSRTYPE_L2HDR |
4411 IXGBE_PSRTYPE_IPV6HDR;
4413 if (hw->mac.type == ixgbe_mac_82598EB)
4421 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4425 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4426 * @rx_ring: ring to free buffers from
4428 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4430 struct device *dev = rx_ring->dev;
4434 /* ring already cleared, nothing to do */
4435 if (!rx_ring->rx_buffer_info)
4438 /* Free all the Rx ring sk_buffs */
4439 for (i = 0; i < rx_ring->count; i++) {
4440 struct ixgbe_rx_buffer *rx_buffer;
4442 rx_buffer = &rx_ring->rx_buffer_info[i];
4443 if (rx_buffer->skb) {
4444 struct sk_buff *skb = rx_buffer->skb;
4445 if (IXGBE_CB(skb)->page_released) {
4448 ixgbe_rx_bufsz(rx_ring),
4450 IXGBE_CB(skb)->page_released = false;
4454 rx_buffer->skb = NULL;
4456 dma_unmap_page(dev, rx_buffer->dma,
4457 ixgbe_rx_pg_size(rx_ring),
4460 if (rx_buffer->page)
4461 __free_pages(rx_buffer->page,
4462 ixgbe_rx_pg_order(rx_ring));
4463 rx_buffer->page = NULL;
4466 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4467 memset(rx_ring->rx_buffer_info, 0, size);
4469 /* Zero out the descriptor ring */
4470 memset(rx_ring->desc, 0, rx_ring->size);
4472 rx_ring->next_to_alloc = 0;
4473 rx_ring->next_to_clean = 0;
4474 rx_ring->next_to_use = 0;
4477 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4478 struct ixgbe_ring *rx_ring)
4480 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4481 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4483 /* shutdown specific queue receive and wait for dma to settle */
4484 ixgbe_disable_rx_queue(adapter, rx_ring);
4485 usleep_range(10000, 20000);
4486 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4487 ixgbe_clean_rx_ring(rx_ring);
4488 rx_ring->l2_accel_priv = NULL;
4491 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4492 struct ixgbe_fwd_adapter *accel)
4494 struct ixgbe_adapter *adapter = accel->real_adapter;
4495 unsigned int rxbase = accel->rx_base_queue;
4496 unsigned int txbase = accel->tx_base_queue;
4499 netif_tx_stop_all_queues(vdev);
4501 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4502 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4503 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4506 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4507 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4508 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4515 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4516 struct ixgbe_fwd_adapter *accel)
4518 struct ixgbe_adapter *adapter = accel->real_adapter;
4519 unsigned int rxbase, txbase, queues;
4520 int i, baseq, err = 0;
4522 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4525 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4526 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4527 accel->pool, adapter->num_rx_pools,
4528 baseq, baseq + adapter->num_rx_queues_per_pool,
4529 adapter->fwd_bitmask);
4531 accel->netdev = vdev;
4532 accel->rx_base_queue = rxbase = baseq;
4533 accel->tx_base_queue = txbase = baseq;
4535 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4536 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4538 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4539 adapter->rx_ring[rxbase + i]->netdev = vdev;
4540 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4541 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4544 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4545 adapter->tx_ring[txbase + i]->netdev = vdev;
4546 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4549 queues = min_t(unsigned int,
4550 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4551 err = netif_set_real_num_tx_queues(vdev, queues);
4555 err = netif_set_real_num_rx_queues(vdev, queues);
4559 if (is_valid_ether_addr(vdev->dev_addr))
4560 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4562 ixgbe_fwd_psrtype(accel);
4563 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4566 ixgbe_fwd_ring_down(vdev, accel);
4570 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4572 struct net_device *upper;
4573 struct list_head *iter;
4576 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4577 if (netif_is_macvlan(upper)) {
4578 struct macvlan_dev *dfwd = netdev_priv(upper);
4579 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4581 if (dfwd->fwd_priv) {
4582 err = ixgbe_fwd_ring_up(upper, vadapter);
4590 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4592 struct ixgbe_hw *hw = &adapter->hw;
4594 ixgbe_configure_pb(adapter);
4595 #ifdef CONFIG_IXGBE_DCB
4596 ixgbe_configure_dcb(adapter);
4599 * We must restore virtualization before VLANs or else
4600 * the VLVF registers will not be populated
4602 ixgbe_configure_virtualization(adapter);
4604 ixgbe_set_rx_mode(adapter->netdev);
4605 ixgbe_restore_vlan(adapter);
4607 switch (hw->mac.type) {
4608 case ixgbe_mac_82599EB:
4609 case ixgbe_mac_X540:
4610 hw->mac.ops.disable_rx_buff(hw);
4616 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4617 ixgbe_init_fdir_signature_82599(&adapter->hw,
4618 adapter->fdir_pballoc);
4619 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4620 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4621 adapter->fdir_pballoc);
4622 ixgbe_fdir_filter_restore(adapter);
4625 switch (hw->mac.type) {
4626 case ixgbe_mac_82599EB:
4627 case ixgbe_mac_X540:
4628 hw->mac.ops.enable_rx_buff(hw);
4635 /* configure FCoE L2 filters, redirection table, and Rx control */
4636 ixgbe_configure_fcoe(adapter);
4638 #endif /* IXGBE_FCOE */
4639 ixgbe_configure_tx(adapter);
4640 ixgbe_configure_rx(adapter);
4641 ixgbe_configure_dfwd(adapter);
4644 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
4646 switch (hw->phy.type) {
4647 case ixgbe_phy_sfp_avago:
4648 case ixgbe_phy_sfp_ftl:
4649 case ixgbe_phy_sfp_intel:
4650 case ixgbe_phy_sfp_unknown:
4651 case ixgbe_phy_sfp_passive_tyco:
4652 case ixgbe_phy_sfp_passive_unknown:
4653 case ixgbe_phy_sfp_active_unknown:
4654 case ixgbe_phy_sfp_ftl_active:
4655 case ixgbe_phy_qsfp_passive_unknown:
4656 case ixgbe_phy_qsfp_active_unknown:
4657 case ixgbe_phy_qsfp_intel:
4658 case ixgbe_phy_qsfp_unknown:
4661 if (hw->mac.type == ixgbe_mac_82598EB)
4669 * ixgbe_sfp_link_config - set up SFP+ link
4670 * @adapter: pointer to private adapter struct
4672 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4675 * We are assuming the worst case scenario here, and that
4676 * is that an SFP was inserted/removed after the reset
4677 * but before SFP detection was enabled. As such the best
4678 * solution is to just start searching as soon as we start
4680 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4681 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4683 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4687 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4688 * @hw: pointer to private hardware struct
4690 * Returns 0 on success, negative on failure
4692 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4695 bool autoneg, link_up = false;
4696 u32 ret = IXGBE_ERR_LINK_SETUP;
4698 if (hw->mac.ops.check_link)
4699 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4704 speed = hw->phy.autoneg_advertised;
4705 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4706 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4711 if (hw->mac.ops.setup_link)
4712 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4717 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4719 struct ixgbe_hw *hw = &adapter->hw;
4722 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4723 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4725 gpie |= IXGBE_GPIE_EIAME;
4727 * use EIAM to auto-mask when MSI-X interrupt is asserted
4728 * this saves a register write for every interrupt
4730 switch (hw->mac.type) {
4731 case ixgbe_mac_82598EB:
4732 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4734 case ixgbe_mac_82599EB:
4735 case ixgbe_mac_X540:
4737 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4738 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4742 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4743 * specifically only auto mask tx and rx interrupts */
4744 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4747 /* XXX: to interrupt immediately for EICS writes, enable this */
4748 /* gpie |= IXGBE_GPIE_EIMEN; */
4750 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4751 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4753 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4754 case IXGBE_82599_VMDQ_8Q_MASK:
4755 gpie |= IXGBE_GPIE_VTMODE_16;
4757 case IXGBE_82599_VMDQ_4Q_MASK:
4758 gpie |= IXGBE_GPIE_VTMODE_32;
4761 gpie |= IXGBE_GPIE_VTMODE_64;
4766 /* Enable Thermal over heat sensor interrupt */
4767 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4768 switch (adapter->hw.mac.type) {
4769 case ixgbe_mac_82599EB:
4770 gpie |= IXGBE_SDP0_GPIEN;
4772 case ixgbe_mac_X540:
4773 gpie |= IXGBE_EIMS_TS;
4780 /* Enable fan failure interrupt */
4781 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4782 gpie |= IXGBE_SDP1_GPIEN;
4784 if (hw->mac.type == ixgbe_mac_82599EB) {
4785 gpie |= IXGBE_SDP1_GPIEN;
4786 gpie |= IXGBE_SDP2_GPIEN;
4789 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4792 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4794 struct ixgbe_hw *hw = &adapter->hw;
4798 ixgbe_get_hw_control(adapter);
4799 ixgbe_setup_gpie(adapter);
4801 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4802 ixgbe_configure_msix(adapter);
4804 ixgbe_configure_msi_and_legacy(adapter);
4806 /* enable the optics for 82599 SFP+ fiber */
4807 if (hw->mac.ops.enable_tx_laser)
4808 hw->mac.ops.enable_tx_laser(hw);
4810 smp_mb__before_atomic();
4811 clear_bit(__IXGBE_DOWN, &adapter->state);
4812 ixgbe_napi_enable_all(adapter);
4814 if (ixgbe_is_sfp(hw)) {
4815 ixgbe_sfp_link_config(adapter);
4817 err = ixgbe_non_sfp_link_config(hw);
4819 e_err(probe, "link_config FAILED %d\n", err);
4822 /* clear any pending interrupts, may auto mask */
4823 IXGBE_READ_REG(hw, IXGBE_EICR);
4824 ixgbe_irq_enable(adapter, true, true);
4827 * If this adapter has a fan, check to see if we had a failure
4828 * before we enabled the interrupt.
4830 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4831 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4832 if (esdp & IXGBE_ESDP_SDP1)
4833 e_crit(drv, "Fan has stopped, replace the adapter\n");
4836 /* bring the link up in the watchdog, this could race with our first
4837 * link up interrupt but shouldn't be a problem */
4838 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4839 adapter->link_check_timeout = jiffies;
4840 mod_timer(&adapter->service_timer, jiffies);
4842 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4843 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4844 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4845 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4848 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4850 WARN_ON(in_interrupt());
4851 /* put off any impending NetWatchDogTimeout */
4852 adapter->netdev->trans_start = jiffies;
4854 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4855 usleep_range(1000, 2000);
4856 ixgbe_down(adapter);
4858 * If SR-IOV enabled then wait a bit before bringing the adapter
4859 * back up to give the VFs time to respond to the reset. The
4860 * two second wait is based upon the watchdog timer cycle in
4863 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4866 clear_bit(__IXGBE_RESETTING, &adapter->state);
4869 void ixgbe_up(struct ixgbe_adapter *adapter)
4871 /* hardware has been reset, we need to reload some things */
4872 ixgbe_configure(adapter);
4874 ixgbe_up_complete(adapter);
4877 void ixgbe_reset(struct ixgbe_adapter *adapter)
4879 struct ixgbe_hw *hw = &adapter->hw;
4880 struct net_device *netdev = adapter->netdev;
4882 u8 old_addr[ETH_ALEN];
4884 if (ixgbe_removed(hw->hw_addr))
4886 /* lock SFP init bit to prevent race conditions with the watchdog */
4887 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4888 usleep_range(1000, 2000);
4890 /* clear all SFP and link config related flags while holding SFP_INIT */
4891 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4892 IXGBE_FLAG2_SFP_NEEDS_RESET);
4893 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4895 err = hw->mac.ops.init_hw(hw);
4898 case IXGBE_ERR_SFP_NOT_PRESENT:
4899 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4901 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4902 e_dev_err("master disable timed out\n");
4904 case IXGBE_ERR_EEPROM_VERSION:
4905 /* We are running on a pre-production device, log a warning */
4906 e_dev_warn("This device is a pre-production adapter/LOM. "
4907 "Please be aware there may be issues associated with "
4908 "your hardware. If you are experiencing problems "
4909 "please contact your Intel or hardware "
4910 "representative who provided you with this "
4914 e_dev_err("Hardware Error: %d\n", err);
4917 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4918 /* do not flush user set addresses */
4919 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
4920 ixgbe_flush_sw_mac_table(adapter);
4921 ixgbe_mac_set_default_filter(adapter, old_addr);
4923 /* update SAN MAC vmdq pool selection */
4924 if (hw->mac.san_mac_rar_index)
4925 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4927 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
4928 ixgbe_ptp_reset(adapter);
4932 * ixgbe_clean_tx_ring - Free Tx Buffers
4933 * @tx_ring: ring to be cleaned
4935 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4937 struct ixgbe_tx_buffer *tx_buffer_info;
4941 /* ring already cleared, nothing to do */
4942 if (!tx_ring->tx_buffer_info)
4945 /* Free all the Tx ring sk_buffs */
4946 for (i = 0; i < tx_ring->count; i++) {
4947 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4948 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4951 netdev_tx_reset_queue(txring_txq(tx_ring));
4953 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4954 memset(tx_ring->tx_buffer_info, 0, size);
4956 /* Zero out the descriptor ring */
4957 memset(tx_ring->desc, 0, tx_ring->size);
4959 tx_ring->next_to_use = 0;
4960 tx_ring->next_to_clean = 0;
4964 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4965 * @adapter: board private structure
4967 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4971 for (i = 0; i < adapter->num_rx_queues; i++)
4972 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4976 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4977 * @adapter: board private structure
4979 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4983 for (i = 0; i < adapter->num_tx_queues; i++)
4984 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4987 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4989 struct hlist_node *node2;
4990 struct ixgbe_fdir_filter *filter;
4992 spin_lock(&adapter->fdir_perfect_lock);
4994 hlist_for_each_entry_safe(filter, node2,
4995 &adapter->fdir_filter_list, fdir_node) {
4996 hlist_del(&filter->fdir_node);
4999 adapter->fdir_filter_count = 0;
5001 spin_unlock(&adapter->fdir_perfect_lock);
5004 void ixgbe_down(struct ixgbe_adapter *adapter)
5006 struct net_device *netdev = adapter->netdev;
5007 struct ixgbe_hw *hw = &adapter->hw;
5008 struct net_device *upper;
5009 struct list_head *iter;
5013 /* signal that we are down to the interrupt handler */
5014 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5015 return; /* do nothing if already down */
5017 /* disable receives */
5018 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
5019 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
5021 /* disable all enabled rx queues */
5022 for (i = 0; i < adapter->num_rx_queues; i++)
5023 /* this call also flushes the previous write */
5024 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5026 usleep_range(10000, 20000);
5028 netif_tx_stop_all_queues(netdev);
5030 /* call carrier off first to avoid false dev_watchdog timeouts */
5031 netif_carrier_off(netdev);
5032 netif_tx_disable(netdev);
5034 /* disable any upper devices */
5035 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5036 if (netif_is_macvlan(upper)) {
5037 struct macvlan_dev *vlan = netdev_priv(upper);
5039 if (vlan->fwd_priv) {
5040 netif_tx_stop_all_queues(upper);
5041 netif_carrier_off(upper);
5042 netif_tx_disable(upper);
5047 ixgbe_irq_disable(adapter);
5049 ixgbe_napi_disable_all(adapter);
5051 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5052 IXGBE_FLAG2_RESET_REQUESTED);
5053 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5055 del_timer_sync(&adapter->service_timer);
5057 if (adapter->num_vfs) {
5058 /* Clear EITR Select mapping */
5059 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5061 /* Mark all the VFs as inactive */
5062 for (i = 0 ; i < adapter->num_vfs; i++)
5063 adapter->vfinfo[i].clear_to_send = false;
5065 /* ping all the active vfs to let them know we are going down */
5066 ixgbe_ping_all_vfs(adapter);
5068 /* Disable all VFTE/VFRE TX/RX */
5069 ixgbe_disable_tx_rx(adapter);
5072 /* disable transmits in the hardware now that interrupts are off */
5073 for (i = 0; i < adapter->num_tx_queues; i++) {
5074 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5075 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5078 /* Disable the Tx DMA engine on 82599 and X540 */
5079 switch (hw->mac.type) {
5080 case ixgbe_mac_82599EB:
5081 case ixgbe_mac_X540:
5082 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5083 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5084 ~IXGBE_DMATXCTL_TE));
5090 if (!pci_channel_offline(adapter->pdev))
5091 ixgbe_reset(adapter);
5093 /* power down the optics for 82599 SFP+ fiber */
5094 if (hw->mac.ops.disable_tx_laser)
5095 hw->mac.ops.disable_tx_laser(hw);
5097 ixgbe_clean_all_tx_rings(adapter);
5098 ixgbe_clean_all_rx_rings(adapter);
5100 #ifdef CONFIG_IXGBE_DCA
5101 /* since we reset the hardware DCA settings were cleared */
5102 ixgbe_setup_dca(adapter);
5107 * ixgbe_tx_timeout - Respond to a Tx Hang
5108 * @netdev: network interface device structure
5110 static void ixgbe_tx_timeout(struct net_device *netdev)
5112 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5114 /* Do the reset outside of interrupt context */
5115 ixgbe_tx_timeout_reset(adapter);
5119 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5120 * @adapter: board private structure to initialize
5122 * ixgbe_sw_init initializes the Adapter private data structure.
5123 * Fields are initialized based on PCI device information and
5124 * OS network device settings (MTU size).
5126 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5128 struct ixgbe_hw *hw = &adapter->hw;
5129 struct pci_dev *pdev = adapter->pdev;
5130 unsigned int rss, fdir;
5132 #ifdef CONFIG_IXGBE_DCB
5134 struct tc_configuration *tc;
5137 /* PCI config space info */
5139 hw->vendor_id = pdev->vendor;
5140 hw->device_id = pdev->device;
5141 hw->revision_id = pdev->revision;
5142 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5143 hw->subsystem_device_id = pdev->subsystem_device;
5145 /* Set common capability flags and settings */
5146 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
5147 adapter->ring_feature[RING_F_RSS].limit = rss;
5148 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5149 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5150 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5151 adapter->atr_sample_rate = 20;
5152 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5153 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5154 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5155 #ifdef CONFIG_IXGBE_DCA
5156 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5159 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5160 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5161 #ifdef CONFIG_IXGBE_DCB
5162 /* Default traffic class to use for FCoE */
5163 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5164 #endif /* CONFIG_IXGBE_DCB */
5165 #endif /* IXGBE_FCOE */
5167 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5168 hw->mac.num_rar_entries,
5171 /* Set MAC specific capability flags and exceptions */
5172 switch (hw->mac.type) {
5173 case ixgbe_mac_82598EB:
5174 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5175 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5177 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5178 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5180 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5181 adapter->ring_feature[RING_F_FDIR].limit = 0;
5182 adapter->atr_sample_rate = 0;
5183 adapter->fdir_pballoc = 0;
5185 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5186 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5187 #ifdef CONFIG_IXGBE_DCB
5188 adapter->fcoe.up = 0;
5189 #endif /* IXGBE_DCB */
5190 #endif /* IXGBE_FCOE */
5192 case ixgbe_mac_82599EB:
5193 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5194 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5196 case ixgbe_mac_X540:
5197 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5198 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5199 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5206 /* FCoE support exists, always init the FCoE lock */
5207 spin_lock_init(&adapter->fcoe.lock);
5210 /* n-tuple support exists, always init our spinlock */
5211 spin_lock_init(&adapter->fdir_perfect_lock);
5213 #ifdef CONFIG_IXGBE_DCB
5214 switch (hw->mac.type) {
5215 case ixgbe_mac_X540:
5216 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5217 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5220 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5221 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5225 /* Configure DCB traffic classes */
5226 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5227 tc = &adapter->dcb_cfg.tc_config[j];
5228 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5229 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5230 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5231 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5232 tc->dcb_pfc = pfc_disabled;
5235 /* Initialize default user to priority mapping, UPx->TC0 */
5236 tc = &adapter->dcb_cfg.tc_config[0];
5237 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5238 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5240 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5241 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5242 adapter->dcb_cfg.pfc_mode_enable = false;
5243 adapter->dcb_set_bitmap = 0x00;
5244 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5245 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5246 sizeof(adapter->temp_dcb_cfg));
5250 /* default flow control settings */
5251 hw->fc.requested_mode = ixgbe_fc_full;
5252 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5253 ixgbe_pbthresh_setup(adapter);
5254 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5255 hw->fc.send_xon = true;
5256 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5258 #ifdef CONFIG_PCI_IOV
5260 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5262 /* assign number of SR-IOV VFs */
5263 if (hw->mac.type != ixgbe_mac_82598EB) {
5264 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5265 adapter->num_vfs = 0;
5266 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5268 adapter->num_vfs = max_vfs;
5271 #endif /* CONFIG_PCI_IOV */
5273 /* enable itr by default in dynamic mode */
5274 adapter->rx_itr_setting = 1;
5275 adapter->tx_itr_setting = 1;
5277 /* set default ring sizes */
5278 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5279 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5281 /* set default work limits */
5282 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5284 /* initialize eeprom parameters */
5285 if (ixgbe_init_eeprom_params_generic(hw)) {
5286 e_dev_err("EEPROM initialization failed\n");
5290 /* PF holds first pool slot */
5291 set_bit(0, &adapter->fwd_bitmask);
5292 set_bit(__IXGBE_DOWN, &adapter->state);
5298 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5299 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5301 * Return 0 on success, negative on failure
5303 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5305 struct device *dev = tx_ring->dev;
5306 int orig_node = dev_to_node(dev);
5310 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5312 if (tx_ring->q_vector)
5313 numa_node = tx_ring->q_vector->numa_node;
5315 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
5316 if (!tx_ring->tx_buffer_info)
5317 tx_ring->tx_buffer_info = vzalloc(size);
5318 if (!tx_ring->tx_buffer_info)
5321 u64_stats_init(&tx_ring->syncp);
5323 /* round up to nearest 4K */
5324 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5325 tx_ring->size = ALIGN(tx_ring->size, 4096);
5327 set_dev_node(dev, numa_node);
5328 tx_ring->desc = dma_alloc_coherent(dev,
5332 set_dev_node(dev, orig_node);
5334 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5335 &tx_ring->dma, GFP_KERNEL);
5339 tx_ring->next_to_use = 0;
5340 tx_ring->next_to_clean = 0;
5344 vfree(tx_ring->tx_buffer_info);
5345 tx_ring->tx_buffer_info = NULL;
5346 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5351 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5352 * @adapter: board private structure
5354 * If this function returns with an error, then it's possible one or
5355 * more of the rings is populated (while the rest are not). It is the
5356 * callers duty to clean those orphaned rings.
5358 * Return 0 on success, negative on failure
5360 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5364 for (i = 0; i < adapter->num_tx_queues; i++) {
5365 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5369 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5375 /* rewind the index freeing the rings as we go */
5377 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5382 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5383 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5385 * Returns 0 on success, negative on failure
5387 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5389 struct device *dev = rx_ring->dev;
5390 int orig_node = dev_to_node(dev);
5394 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5396 if (rx_ring->q_vector)
5397 numa_node = rx_ring->q_vector->numa_node;
5399 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
5400 if (!rx_ring->rx_buffer_info)
5401 rx_ring->rx_buffer_info = vzalloc(size);
5402 if (!rx_ring->rx_buffer_info)
5405 u64_stats_init(&rx_ring->syncp);
5407 /* Round up to nearest 4K */
5408 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5409 rx_ring->size = ALIGN(rx_ring->size, 4096);
5411 set_dev_node(dev, numa_node);
5412 rx_ring->desc = dma_alloc_coherent(dev,
5416 set_dev_node(dev, orig_node);
5418 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5419 &rx_ring->dma, GFP_KERNEL);
5423 rx_ring->next_to_clean = 0;
5424 rx_ring->next_to_use = 0;
5428 vfree(rx_ring->rx_buffer_info);
5429 rx_ring->rx_buffer_info = NULL;
5430 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5435 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5436 * @adapter: board private structure
5438 * If this function returns with an error, then it's possible one or
5439 * more of the rings is populated (while the rest are not). It is the
5440 * callers duty to clean those orphaned rings.
5442 * Return 0 on success, negative on failure
5444 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5448 for (i = 0; i < adapter->num_rx_queues; i++) {
5449 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5453 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5458 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5463 /* rewind the index freeing the rings as we go */
5465 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5470 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5471 * @tx_ring: Tx descriptor ring for a specific queue
5473 * Free all transmit software resources
5475 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5477 ixgbe_clean_tx_ring(tx_ring);
5479 vfree(tx_ring->tx_buffer_info);
5480 tx_ring->tx_buffer_info = NULL;
5482 /* if not set, then don't free */
5486 dma_free_coherent(tx_ring->dev, tx_ring->size,
5487 tx_ring->desc, tx_ring->dma);
5489 tx_ring->desc = NULL;
5493 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5494 * @adapter: board private structure
5496 * Free all transmit software resources
5498 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5502 for (i = 0; i < adapter->num_tx_queues; i++)
5503 if (adapter->tx_ring[i]->desc)
5504 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5508 * ixgbe_free_rx_resources - Free Rx Resources
5509 * @rx_ring: ring to clean the resources from
5511 * Free all receive software resources
5513 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5515 ixgbe_clean_rx_ring(rx_ring);
5517 vfree(rx_ring->rx_buffer_info);
5518 rx_ring->rx_buffer_info = NULL;
5520 /* if not set, then don't free */
5524 dma_free_coherent(rx_ring->dev, rx_ring->size,
5525 rx_ring->desc, rx_ring->dma);
5527 rx_ring->desc = NULL;
5531 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5532 * @adapter: board private structure
5534 * Free all receive software resources
5536 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5541 ixgbe_free_fcoe_ddp_resources(adapter);
5544 for (i = 0; i < adapter->num_rx_queues; i++)
5545 if (adapter->rx_ring[i]->desc)
5546 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5550 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5551 * @netdev: network interface device structure
5552 * @new_mtu: new value for maximum frame size
5554 * Returns 0 on success, negative on failure
5556 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5558 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5559 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5561 /* MTU < 68 is an error and causes problems on some kernels */
5562 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5566 * For 82599EB we cannot allow legacy VFs to enable their receive
5567 * paths when MTU greater than 1500 is configured. So display a
5568 * warning that legacy VFs will be disabled.
5570 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5571 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5572 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5573 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5575 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5577 /* must set new MTU before calling down or up */
5578 netdev->mtu = new_mtu;
5580 if (netif_running(netdev))
5581 ixgbe_reinit_locked(adapter);
5587 * ixgbe_open - Called when a network interface is made active
5588 * @netdev: network interface device structure
5590 * Returns 0 on success, negative value on failure
5592 * The open entry point is called when a network interface is made
5593 * active by the system (IFF_UP). At this point all resources needed
5594 * for transmit and receive operations are allocated, the interrupt
5595 * handler is registered with the OS, the watchdog timer is started,
5596 * and the stack is notified that the interface is ready.
5598 static int ixgbe_open(struct net_device *netdev)
5600 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5603 /* disallow open during test */
5604 if (test_bit(__IXGBE_TESTING, &adapter->state))
5607 netif_carrier_off(netdev);
5609 /* allocate transmit descriptors */
5610 err = ixgbe_setup_all_tx_resources(adapter);
5614 /* allocate receive descriptors */
5615 err = ixgbe_setup_all_rx_resources(adapter);
5619 ixgbe_configure(adapter);
5621 err = ixgbe_request_irq(adapter);
5625 /* Notify the stack of the actual queue counts. */
5626 if (adapter->num_rx_pools > 1)
5627 queues = adapter->num_rx_queues_per_pool;
5629 queues = adapter->num_tx_queues;
5631 err = netif_set_real_num_tx_queues(netdev, queues);
5633 goto err_set_queues;
5635 if (adapter->num_rx_pools > 1 &&
5636 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5637 queues = IXGBE_MAX_L2A_QUEUES;
5639 queues = adapter->num_rx_queues;
5640 err = netif_set_real_num_rx_queues(netdev, queues);
5642 goto err_set_queues;
5644 ixgbe_ptp_init(adapter);
5646 ixgbe_up_complete(adapter);
5651 ixgbe_free_irq(adapter);
5653 ixgbe_free_all_rx_resources(adapter);
5655 ixgbe_free_all_tx_resources(adapter);
5657 ixgbe_reset(adapter);
5663 * ixgbe_close - Disables a network interface
5664 * @netdev: network interface device structure
5666 * Returns 0, this is not allowed to fail
5668 * The close entry point is called when an interface is de-activated
5669 * by the OS. The hardware is still under the drivers control, but
5670 * needs to be disabled. A global MAC reset is issued to stop the
5671 * hardware, and all transmit and receive resources are freed.
5673 static int ixgbe_close(struct net_device *netdev)
5675 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5677 ixgbe_ptp_stop(adapter);
5679 ixgbe_down(adapter);
5680 ixgbe_free_irq(adapter);
5682 ixgbe_fdir_filter_exit(adapter);
5684 ixgbe_free_all_tx_resources(adapter);
5685 ixgbe_free_all_rx_resources(adapter);
5687 ixgbe_release_hw_control(adapter);
5693 static int ixgbe_resume(struct pci_dev *pdev)
5695 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5696 struct net_device *netdev = adapter->netdev;
5699 adapter->hw.hw_addr = adapter->io_addr;
5700 pci_set_power_state(pdev, PCI_D0);
5701 pci_restore_state(pdev);
5703 * pci_restore_state clears dev->state_saved so call
5704 * pci_save_state to restore it.
5706 pci_save_state(pdev);
5708 err = pci_enable_device_mem(pdev);
5710 e_dev_err("Cannot enable PCI device from suspend\n");
5713 smp_mb__before_atomic();
5714 clear_bit(__IXGBE_DISABLED, &adapter->state);
5715 pci_set_master(pdev);
5717 pci_wake_from_d3(pdev, false);
5719 ixgbe_reset(adapter);
5721 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5724 err = ixgbe_init_interrupt_scheme(adapter);
5725 if (!err && netif_running(netdev))
5726 err = ixgbe_open(netdev);
5733 netif_device_attach(netdev);
5737 #endif /* CONFIG_PM */
5739 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5741 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5742 struct net_device *netdev = adapter->netdev;
5743 struct ixgbe_hw *hw = &adapter->hw;
5745 u32 wufc = adapter->wol;
5750 netif_device_detach(netdev);
5753 if (netif_running(netdev)) {
5754 ixgbe_down(adapter);
5755 ixgbe_free_irq(adapter);
5756 ixgbe_free_all_tx_resources(adapter);
5757 ixgbe_free_all_rx_resources(adapter);
5761 ixgbe_clear_interrupt_scheme(adapter);
5764 retval = pci_save_state(pdev);
5769 if (hw->mac.ops.stop_link_on_d3)
5770 hw->mac.ops.stop_link_on_d3(hw);
5773 ixgbe_set_rx_mode(netdev);
5775 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5776 if (hw->mac.ops.enable_tx_laser)
5777 hw->mac.ops.enable_tx_laser(hw);
5779 /* turn on all-multi mode if wake on multicast is enabled */
5780 if (wufc & IXGBE_WUFC_MC) {
5781 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5782 fctrl |= IXGBE_FCTRL_MPE;
5783 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5786 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5787 ctrl |= IXGBE_CTRL_GIO_DIS;
5788 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5790 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5792 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5793 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5796 switch (hw->mac.type) {
5797 case ixgbe_mac_82598EB:
5798 pci_wake_from_d3(pdev, false);
5800 case ixgbe_mac_82599EB:
5801 case ixgbe_mac_X540:
5802 pci_wake_from_d3(pdev, !!wufc);
5808 *enable_wake = !!wufc;
5810 ixgbe_release_hw_control(adapter);
5812 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5813 pci_disable_device(pdev);
5819 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5824 retval = __ixgbe_shutdown(pdev, &wake);
5829 pci_prepare_to_sleep(pdev);
5831 pci_wake_from_d3(pdev, false);
5832 pci_set_power_state(pdev, PCI_D3hot);
5837 #endif /* CONFIG_PM */
5839 static void ixgbe_shutdown(struct pci_dev *pdev)
5843 __ixgbe_shutdown(pdev, &wake);
5845 if (system_state == SYSTEM_POWER_OFF) {
5846 pci_wake_from_d3(pdev, wake);
5847 pci_set_power_state(pdev, PCI_D3hot);
5852 * ixgbe_update_stats - Update the board statistics counters.
5853 * @adapter: board private structure
5855 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5857 struct net_device *netdev = adapter->netdev;
5858 struct ixgbe_hw *hw = &adapter->hw;
5859 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5861 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5862 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5863 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5864 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5866 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5867 test_bit(__IXGBE_RESETTING, &adapter->state))
5870 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5873 for (i = 0; i < adapter->num_rx_queues; i++) {
5874 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5875 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5877 adapter->rsc_total_count = rsc_count;
5878 adapter->rsc_total_flush = rsc_flush;
5881 for (i = 0; i < adapter->num_rx_queues; i++) {
5882 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5883 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5884 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5885 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5886 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5887 bytes += rx_ring->stats.bytes;
5888 packets += rx_ring->stats.packets;
5890 adapter->non_eop_descs = non_eop_descs;
5891 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5892 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5893 adapter->hw_csum_rx_error = hw_csum_rx_error;
5894 netdev->stats.rx_bytes = bytes;
5895 netdev->stats.rx_packets = packets;
5899 /* gather some stats to the adapter struct that are per queue */
5900 for (i = 0; i < adapter->num_tx_queues; i++) {
5901 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5902 restart_queue += tx_ring->tx_stats.restart_queue;
5903 tx_busy += tx_ring->tx_stats.tx_busy;
5904 bytes += tx_ring->stats.bytes;
5905 packets += tx_ring->stats.packets;
5907 adapter->restart_queue = restart_queue;
5908 adapter->tx_busy = tx_busy;
5909 netdev->stats.tx_bytes = bytes;
5910 netdev->stats.tx_packets = packets;
5912 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5914 /* 8 register reads */
5915 for (i = 0; i < 8; i++) {
5916 /* for packet buffers not used, the register should read 0 */
5917 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5919 hwstats->mpc[i] += mpc;
5920 total_mpc += hwstats->mpc[i];
5921 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5922 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5923 switch (hw->mac.type) {
5924 case ixgbe_mac_82598EB:
5925 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5926 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5927 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5928 hwstats->pxonrxc[i] +=
5929 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5931 case ixgbe_mac_82599EB:
5932 case ixgbe_mac_X540:
5933 hwstats->pxonrxc[i] +=
5934 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5941 /*16 register reads */
5942 for (i = 0; i < 16; i++) {
5943 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5944 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5945 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5946 (hw->mac.type == ixgbe_mac_X540)) {
5947 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5948 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5949 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5950 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5954 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5955 /* work around hardware counting issue */
5956 hwstats->gprc -= missed_rx;
5958 ixgbe_update_xoff_received(adapter);
5960 /* 82598 hardware only has a 32 bit counter in the high register */
5961 switch (hw->mac.type) {
5962 case ixgbe_mac_82598EB:
5963 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5964 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5965 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5966 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5968 case ixgbe_mac_X540:
5969 /* OS2BMC stats are X540 only*/
5970 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5971 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5972 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5973 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5974 case ixgbe_mac_82599EB:
5975 for (i = 0; i < 16; i++)
5976 adapter->hw_rx_no_dma_resources +=
5977 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5978 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5979 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5980 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5981 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5982 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5983 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5984 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5985 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5986 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5988 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5989 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5990 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5991 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5992 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5993 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5994 /* Add up per cpu counters for total ddp aloc fail */
5995 if (adapter->fcoe.ddp_pool) {
5996 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5997 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5999 u64 noddp = 0, noddp_ext_buff = 0;
6000 for_each_possible_cpu(cpu) {
6001 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6002 noddp += ddp_pool->noddp;
6003 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6005 hwstats->fcoe_noddp = noddp;
6006 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6008 #endif /* IXGBE_FCOE */
6013 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6014 hwstats->bprc += bprc;
6015 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6016 if (hw->mac.type == ixgbe_mac_82598EB)
6017 hwstats->mprc -= bprc;
6018 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6019 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6020 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6021 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6022 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6023 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6024 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6025 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6026 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6027 hwstats->lxontxc += lxon;
6028 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6029 hwstats->lxofftxc += lxoff;
6030 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6031 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6033 * 82598 errata - tx of flow control packets is included in tx counters
6035 xon_off_tot = lxon + lxoff;
6036 hwstats->gptc -= xon_off_tot;
6037 hwstats->mptc -= xon_off_tot;
6038 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6039 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6040 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6041 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6042 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6043 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6044 hwstats->ptc64 -= xon_off_tot;
6045 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6046 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6047 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6048 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6049 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6050 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6052 /* Fill out the OS statistics structure */
6053 netdev->stats.multicast = hwstats->mprc;
6056 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6057 netdev->stats.rx_dropped = 0;
6058 netdev->stats.rx_length_errors = hwstats->rlec;
6059 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6060 netdev->stats.rx_missed_errors = total_mpc;
6064 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6065 * @adapter: pointer to the device adapter structure
6067 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6069 struct ixgbe_hw *hw = &adapter->hw;
6072 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6075 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6077 /* if interface is down do nothing */
6078 if (test_bit(__IXGBE_DOWN, &adapter->state))
6081 /* do nothing if we are not using signature filters */
6082 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6085 adapter->fdir_overflow++;
6087 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6088 for (i = 0; i < adapter->num_tx_queues; i++)
6089 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6090 &(adapter->tx_ring[i]->state));
6091 /* re-enable flow director interrupts */
6092 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6094 e_err(probe, "failed to finish FDIR re-initialization, "
6095 "ignored adding FDIR ATR filters\n");
6100 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6101 * @adapter: pointer to the device adapter structure
6103 * This function serves two purposes. First it strobes the interrupt lines
6104 * in order to make certain interrupts are occurring. Secondly it sets the
6105 * bits needed to check for TX hangs. As a result we should immediately
6106 * determine if a hang has occurred.
6108 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6110 struct ixgbe_hw *hw = &adapter->hw;
6114 /* If we're down, removing or resetting, just bail */
6115 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6116 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6117 test_bit(__IXGBE_RESETTING, &adapter->state))
6120 /* Force detection of hung controller */
6121 if (netif_carrier_ok(adapter->netdev)) {
6122 for (i = 0; i < adapter->num_tx_queues; i++)
6123 set_check_for_tx_hang(adapter->tx_ring[i]);
6126 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6128 * for legacy and MSI interrupts don't set any bits
6129 * that are enabled for EIAM, because this operation
6130 * would set *both* EIMS and EICS for any bit in EIAM
6132 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6133 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6135 /* get one bit for every active tx/rx interrupt vector */
6136 for (i = 0; i < adapter->num_q_vectors; i++) {
6137 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6138 if (qv->rx.ring || qv->tx.ring)
6139 eics |= ((u64)1 << i);
6143 /* Cause software interrupt to ensure rings are cleaned */
6144 ixgbe_irq_rearm_queues(adapter, eics);
6149 * ixgbe_watchdog_update_link - update the link status
6150 * @adapter: pointer to the device adapter structure
6151 * @link_speed: pointer to a u32 to store the link_speed
6153 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6155 struct ixgbe_hw *hw = &adapter->hw;
6156 u32 link_speed = adapter->link_speed;
6157 bool link_up = adapter->link_up;
6158 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6160 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6163 if (hw->mac.ops.check_link) {
6164 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6166 /* always assume link is up, if no check link function */
6167 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6171 if (adapter->ixgbe_ieee_pfc)
6172 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6174 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6175 hw->mac.ops.fc_enable(hw);
6176 ixgbe_set_rx_drop_en(adapter);
6180 time_after(jiffies, (adapter->link_check_timeout +
6181 IXGBE_TRY_LINK_TIMEOUT))) {
6182 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6183 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6184 IXGBE_WRITE_FLUSH(hw);
6187 adapter->link_up = link_up;
6188 adapter->link_speed = link_speed;
6191 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6193 #ifdef CONFIG_IXGBE_DCB
6194 struct net_device *netdev = adapter->netdev;
6195 struct dcb_app app = {
6196 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6201 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6202 up = dcb_ieee_getapp_mask(netdev, &app);
6204 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6209 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6210 * print link up message
6211 * @adapter: pointer to the device adapter structure
6213 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6215 struct net_device *netdev = adapter->netdev;
6216 struct ixgbe_hw *hw = &adapter->hw;
6217 struct net_device *upper;
6218 struct list_head *iter;
6219 u32 link_speed = adapter->link_speed;
6220 bool flow_rx, flow_tx;
6222 /* only continue if link was previously down */
6223 if (netif_carrier_ok(netdev))
6226 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6228 switch (hw->mac.type) {
6229 case ixgbe_mac_82598EB: {
6230 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6231 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6232 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6233 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6236 case ixgbe_mac_X540:
6237 case ixgbe_mac_82599EB: {
6238 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6239 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6240 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6241 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6250 adapter->last_rx_ptp_check = jiffies;
6252 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6253 ixgbe_ptp_start_cyclecounter(adapter);
6255 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6256 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6258 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6260 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6263 ((flow_rx && flow_tx) ? "RX/TX" :
6265 (flow_tx ? "TX" : "None"))));
6267 netif_carrier_on(netdev);
6268 ixgbe_check_vf_rate_limit(adapter);
6270 /* enable transmits */
6271 netif_tx_wake_all_queues(adapter->netdev);
6273 /* enable any upper devices */
6275 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6276 if (netif_is_macvlan(upper)) {
6277 struct macvlan_dev *vlan = netdev_priv(upper);
6280 netif_tx_wake_all_queues(upper);
6285 /* update the default user priority for VFs */
6286 ixgbe_update_default_up(adapter);
6288 /* ping all the active vfs to let them know link has changed */
6289 ixgbe_ping_all_vfs(adapter);
6293 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6294 * print link down message
6295 * @adapter: pointer to the adapter structure
6297 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6299 struct net_device *netdev = adapter->netdev;
6300 struct ixgbe_hw *hw = &adapter->hw;
6302 adapter->link_up = false;
6303 adapter->link_speed = 0;
6305 /* only continue if link was up previously */
6306 if (!netif_carrier_ok(netdev))
6309 /* poll for SFP+ cable when link is down */
6310 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6311 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6313 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6314 ixgbe_ptp_start_cyclecounter(adapter);
6316 e_info(drv, "NIC Link is Down\n");
6317 netif_carrier_off(netdev);
6319 /* ping all the active vfs to let them know link has changed */
6320 ixgbe_ping_all_vfs(adapter);
6324 * ixgbe_watchdog_flush_tx - flush queues on link down
6325 * @adapter: pointer to the device adapter structure
6327 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6330 int some_tx_pending = 0;
6332 if (!netif_carrier_ok(adapter->netdev)) {
6333 for (i = 0; i < adapter->num_tx_queues; i++) {
6334 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6335 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
6336 some_tx_pending = 1;
6341 if (some_tx_pending) {
6342 /* We've lost link, so the controller stops DMA,
6343 * but we've got queued Tx work that's never going
6344 * to get done, so reset controller to flush Tx.
6345 * (Do the reset outside of interrupt context).
6347 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6348 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6353 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6357 /* Do not perform spoof check for 82598 or if not in IOV mode */
6358 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6359 adapter->num_vfs == 0)
6362 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6365 * ssvpc register is cleared on read, if zero then no
6366 * spoofed packets in the last interval.
6371 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6375 * ixgbe_watchdog_subtask - check and bring link up
6376 * @adapter: pointer to the device adapter structure
6378 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6380 /* if interface is down, removing or resetting, do nothing */
6381 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6382 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6383 test_bit(__IXGBE_RESETTING, &adapter->state))
6386 ixgbe_watchdog_update_link(adapter);
6388 if (adapter->link_up)
6389 ixgbe_watchdog_link_is_up(adapter);
6391 ixgbe_watchdog_link_is_down(adapter);
6393 ixgbe_spoof_check(adapter);
6394 ixgbe_update_stats(adapter);
6396 ixgbe_watchdog_flush_tx(adapter);
6400 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6401 * @adapter: the ixgbe adapter structure
6403 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6405 struct ixgbe_hw *hw = &adapter->hw;
6408 /* not searching for SFP so there is nothing to do here */
6409 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6410 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6413 /* someone else is in init, wait until next service event */
6414 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6417 err = hw->phy.ops.identify_sfp(hw);
6418 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6421 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6422 /* If no cable is present, then we need to reset
6423 * the next time we find a good cable. */
6424 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6431 /* exit if reset not needed */
6432 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6435 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6438 * A module may be identified correctly, but the EEPROM may not have
6439 * support for that module. setup_sfp() will fail in that case, so
6440 * we should not allow that module to load.
6442 if (hw->mac.type == ixgbe_mac_82598EB)
6443 err = hw->phy.ops.reset(hw);
6445 err = hw->mac.ops.setup_sfp(hw);
6447 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6450 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6451 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6454 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6456 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6457 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6458 e_dev_err("failed to initialize because an unsupported "
6459 "SFP+ module type was detected.\n");
6460 e_dev_err("Reload the driver after installing a "
6461 "supported module.\n");
6462 unregister_netdev(adapter->netdev);
6467 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6468 * @adapter: the ixgbe adapter structure
6470 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6472 struct ixgbe_hw *hw = &adapter->hw;
6474 bool autoneg = false;
6476 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6479 /* someone else is in init, wait until next service event */
6480 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6483 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6485 speed = hw->phy.autoneg_advertised;
6486 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6487 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6489 /* setup the highest link when no autoneg */
6491 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6492 speed = IXGBE_LINK_SPEED_10GB_FULL;
6496 if (hw->mac.ops.setup_link)
6497 hw->mac.ops.setup_link(hw, speed, true);
6499 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6500 adapter->link_check_timeout = jiffies;
6501 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6504 #ifdef CONFIG_PCI_IOV
6505 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6508 struct ixgbe_hw *hw = &adapter->hw;
6509 struct net_device *netdev = adapter->netdev;
6513 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6514 if (gpc) /* If incrementing then no need for the check below */
6517 * Check to see if a bad DMA write target from an errant or
6518 * malicious VF has caused a PCIe error. If so then we can
6519 * issue a VFLR to the offending VF(s) and then resume without
6520 * requesting a full slot reset.
6523 for (vf = 0; vf < adapter->num_vfs; vf++) {
6524 ciaa = (vf << 16) | 0x80000000;
6525 /* 32 bit read so align, we really want status at offset 6 */
6526 ciaa |= PCI_COMMAND;
6527 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6528 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
6530 /* disable debug mode asap after reading data */
6531 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6532 /* Get the upper 16 bits which will be the PCI status reg */
6534 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
6535 netdev_err(netdev, "VF %d Hung DMA\n", vf);
6537 ciaa = (vf << 16) | 0x80000000;
6539 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6540 ciad = 0x00008000; /* VFLR */
6541 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
6543 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6550 * ixgbe_service_timer - Timer Call-back
6551 * @data: pointer to adapter cast into an unsigned long
6553 static void ixgbe_service_timer(unsigned long data)
6555 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6556 unsigned long next_event_offset;
6559 /* poll faster when waiting for link */
6560 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6561 next_event_offset = HZ / 10;
6563 next_event_offset = HZ * 2;
6565 #ifdef CONFIG_PCI_IOV
6567 * don't bother with SR-IOV VF DMA hang check if there are
6568 * no VFs or the link is down
6570 if (!adapter->num_vfs ||
6571 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6572 goto normal_timer_service;
6574 /* If we have VFs allocated then we must check for DMA hangs */
6575 ixgbe_check_for_bad_vf(adapter);
6576 next_event_offset = HZ / 50;
6577 adapter->timer_event_accumulator++;
6579 if (adapter->timer_event_accumulator >= 100)
6580 adapter->timer_event_accumulator = 0;
6584 normal_timer_service:
6586 /* Reset the timer */
6587 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6590 ixgbe_service_event_schedule(adapter);
6593 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6595 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6598 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6600 /* If we're already down, removing or resetting, just bail */
6601 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6602 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6603 test_bit(__IXGBE_RESETTING, &adapter->state))
6606 ixgbe_dump(adapter);
6607 netdev_err(adapter->netdev, "Reset adapter\n");
6608 adapter->tx_timeout_count++;
6611 ixgbe_reinit_locked(adapter);
6616 * ixgbe_service_task - manages and runs subtasks
6617 * @work: pointer to work_struct containing our data
6619 static void ixgbe_service_task(struct work_struct *work)
6621 struct ixgbe_adapter *adapter = container_of(work,
6622 struct ixgbe_adapter,
6624 if (ixgbe_removed(adapter->hw.hw_addr)) {
6625 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6627 ixgbe_down(adapter);
6630 ixgbe_service_event_complete(adapter);
6633 ixgbe_reset_subtask(adapter);
6634 ixgbe_sfp_detection_subtask(adapter);
6635 ixgbe_sfp_link_config_subtask(adapter);
6636 ixgbe_check_overtemp_subtask(adapter);
6637 ixgbe_watchdog_subtask(adapter);
6638 ixgbe_fdir_reinit_subtask(adapter);
6639 ixgbe_check_hang_subtask(adapter);
6641 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6642 ixgbe_ptp_overflow_check(adapter);
6643 ixgbe_ptp_rx_hang(adapter);
6646 ixgbe_service_event_complete(adapter);
6649 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6650 struct ixgbe_tx_buffer *first,
6653 struct sk_buff *skb = first->skb;
6654 u32 vlan_macip_lens, type_tucmd;
6655 u32 mss_l4len_idx, l4len;
6658 if (skb->ip_summed != CHECKSUM_PARTIAL)
6661 if (!skb_is_gso(skb))
6664 err = skb_cow_head(skb, 0);
6668 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6669 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6671 if (first->protocol == htons(ETH_P_IP)) {
6672 struct iphdr *iph = ip_hdr(skb);
6675 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6679 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6680 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6681 IXGBE_TX_FLAGS_CSUM |
6682 IXGBE_TX_FLAGS_IPV4;
6683 } else if (skb_is_gso_v6(skb)) {
6684 ipv6_hdr(skb)->payload_len = 0;
6685 tcp_hdr(skb)->check =
6686 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6687 &ipv6_hdr(skb)->daddr,
6689 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6690 IXGBE_TX_FLAGS_CSUM;
6693 /* compute header lengths */
6694 l4len = tcp_hdrlen(skb);
6695 *hdr_len = skb_transport_offset(skb) + l4len;
6697 /* update gso size and bytecount with header size */
6698 first->gso_segs = skb_shinfo(skb)->gso_segs;
6699 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6701 /* mss_l4len_id: use 0 as index for TSO */
6702 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6703 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6705 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6706 vlan_macip_lens = skb_network_header_len(skb);
6707 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6708 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6710 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6716 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6717 struct ixgbe_tx_buffer *first)
6719 struct sk_buff *skb = first->skb;
6720 u32 vlan_macip_lens = 0;
6721 u32 mss_l4len_idx = 0;
6724 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6725 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6726 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6730 switch (first->protocol) {
6731 case htons(ETH_P_IP):
6732 vlan_macip_lens |= skb_network_header_len(skb);
6733 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6734 l4_hdr = ip_hdr(skb)->protocol;
6736 case htons(ETH_P_IPV6):
6737 vlan_macip_lens |= skb_network_header_len(skb);
6738 l4_hdr = ipv6_hdr(skb)->nexthdr;
6741 if (unlikely(net_ratelimit())) {
6742 dev_warn(tx_ring->dev,
6743 "partial checksum but proto=%x!\n",
6751 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6752 mss_l4len_idx = tcp_hdrlen(skb) <<
6753 IXGBE_ADVTXD_L4LEN_SHIFT;
6756 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6757 mss_l4len_idx = sizeof(struct sctphdr) <<
6758 IXGBE_ADVTXD_L4LEN_SHIFT;
6761 mss_l4len_idx = sizeof(struct udphdr) <<
6762 IXGBE_ADVTXD_L4LEN_SHIFT;
6765 if (unlikely(net_ratelimit())) {
6766 dev_warn(tx_ring->dev,
6767 "partial checksum but l4 proto=%x!\n",
6773 /* update TX checksum flag */
6774 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6777 /* vlan_macip_lens: MACLEN, VLAN tag */
6778 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6779 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6781 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6782 type_tucmd, mss_l4len_idx);
6785 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6786 ((_flag <= _result) ? \
6787 ((u32)(_input & _flag) * (_result / _flag)) : \
6788 ((u32)(_input & _flag) / (_flag / _result)))
6790 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6792 /* set type for advanced descriptor with frame checksum insertion */
6793 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6794 IXGBE_ADVTXD_DCMD_DEXT |
6795 IXGBE_ADVTXD_DCMD_IFCS;
6797 /* set HW vlan bit if vlan is present */
6798 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6799 IXGBE_ADVTXD_DCMD_VLE);
6801 /* set segmentation enable bits for TSO/FSO */
6802 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6803 IXGBE_ADVTXD_DCMD_TSE);
6805 /* set timestamp bit if present */
6806 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6807 IXGBE_ADVTXD_MAC_TSTAMP);
6809 /* insert frame checksum */
6810 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6815 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6816 u32 tx_flags, unsigned int paylen)
6818 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
6820 /* enable L4 checksum for TSO and TX checksum offload */
6821 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6822 IXGBE_TX_FLAGS_CSUM,
6823 IXGBE_ADVTXD_POPTS_TXSM);
6825 /* enble IPv4 checksum for TSO */
6826 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6827 IXGBE_TX_FLAGS_IPV4,
6828 IXGBE_ADVTXD_POPTS_IXSM);
6831 * Check Context must be set if Tx switch is enabled, which it
6832 * always is for case where virtual functions are running
6834 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6838 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6841 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6844 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6845 struct ixgbe_tx_buffer *first,
6848 struct sk_buff *skb = first->skb;
6849 struct ixgbe_tx_buffer *tx_buffer;
6850 union ixgbe_adv_tx_desc *tx_desc;
6851 struct skb_frag_struct *frag;
6853 unsigned int data_len, size;
6854 u32 tx_flags = first->tx_flags;
6855 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
6856 u16 i = tx_ring->next_to_use;
6858 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6860 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
6862 size = skb_headlen(skb);
6863 data_len = skb->data_len;
6866 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6867 if (data_len < sizeof(struct fcoe_crc_eof)) {
6868 size -= sizeof(struct fcoe_crc_eof) - data_len;
6871 data_len -= sizeof(struct fcoe_crc_eof);
6876 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6880 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6881 if (dma_mapping_error(tx_ring->dev, dma))
6884 /* record length, and DMA address */
6885 dma_unmap_len_set(tx_buffer, len, size);
6886 dma_unmap_addr_set(tx_buffer, dma, dma);
6888 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6890 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6891 tx_desc->read.cmd_type_len =
6892 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
6896 if (i == tx_ring->count) {
6897 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6900 tx_desc->read.olinfo_status = 0;
6902 dma += IXGBE_MAX_DATA_PER_TXD;
6903 size -= IXGBE_MAX_DATA_PER_TXD;
6905 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6908 if (likely(!data_len))
6911 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6915 if (i == tx_ring->count) {
6916 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6919 tx_desc->read.olinfo_status = 0;
6922 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6924 size = skb_frag_size(frag);
6928 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6931 tx_buffer = &tx_ring->tx_buffer_info[i];
6934 /* write last descriptor with RS and EOP bits */
6935 cmd_type |= size | IXGBE_TXD_CMD;
6936 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6938 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6940 /* set the timestamp */
6941 first->time_stamp = jiffies;
6944 * Force memory writes to complete before letting h/w know there
6945 * are new descriptors to fetch. (Only applicable for weak-ordered
6946 * memory model archs, such as IA-64).
6948 * We also need this memory barrier to make certain all of the
6949 * status bits have been updated before next_to_watch is written.
6953 /* set next_to_watch value indicating a packet is present */
6954 first->next_to_watch = tx_desc;
6957 if (i == tx_ring->count)
6960 tx_ring->next_to_use = i;
6962 /* notify HW of packet */
6963 ixgbe_write_tail(tx_ring, i);
6967 dev_err(tx_ring->dev, "TX DMA map failed\n");
6969 /* clear dma mappings for failed tx_buffer_info map */
6971 tx_buffer = &tx_ring->tx_buffer_info[i];
6972 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6973 if (tx_buffer == first)
6980 tx_ring->next_to_use = i;
6983 static void ixgbe_atr(struct ixgbe_ring *ring,
6984 struct ixgbe_tx_buffer *first)
6986 struct ixgbe_q_vector *q_vector = ring->q_vector;
6987 union ixgbe_atr_hash_dword input = { .dword = 0 };
6988 union ixgbe_atr_hash_dword common = { .dword = 0 };
6990 unsigned char *network;
6992 struct ipv6hdr *ipv6;
6997 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7001 /* do nothing if sampling is disabled */
7002 if (!ring->atr_sample_rate)
7007 /* snag network header to get L4 type and address */
7008 hdr.network = skb_network_header(first->skb);
7010 /* Currently only IPv4/IPv6 with TCP is supported */
7011 if ((first->protocol != htons(ETH_P_IPV6) ||
7012 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7013 (first->protocol != htons(ETH_P_IP) ||
7014 hdr.ipv4->protocol != IPPROTO_TCP))
7017 th = tcp_hdr(first->skb);
7019 /* skip this packet since it is invalid or the socket is closing */
7023 /* sample on all syn packets or once every atr sample count */
7024 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7027 /* reset sample count */
7028 ring->atr_count = 0;
7030 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7033 * src and dst are inverted, think how the receiver sees them
7035 * The input is broken into two sections, a non-compressed section
7036 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7037 * is XORed together and stored in the compressed dword.
7039 input.formatted.vlan_id = vlan_id;
7042 * since src port and flex bytes occupy the same word XOR them together
7043 * and write the value to source port portion of compressed dword
7045 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7046 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7048 common.port.src ^= th->dest ^ first->protocol;
7049 common.port.dst ^= th->source;
7051 if (first->protocol == htons(ETH_P_IP)) {
7052 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7053 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7055 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7056 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7057 hdr.ipv6->saddr.s6_addr32[1] ^
7058 hdr.ipv6->saddr.s6_addr32[2] ^
7059 hdr.ipv6->saddr.s6_addr32[3] ^
7060 hdr.ipv6->daddr.s6_addr32[0] ^
7061 hdr.ipv6->daddr.s6_addr32[1] ^
7062 hdr.ipv6->daddr.s6_addr32[2] ^
7063 hdr.ipv6->daddr.s6_addr32[3];
7066 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7067 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7068 input, common, ring->queue_index);
7071 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7073 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7074 /* Herbert's original patch had:
7075 * smp_mb__after_netif_stop_queue();
7076 * but since that doesn't exist yet, just open code it. */
7079 /* We need to check again in a case another CPU has just
7080 * made room available. */
7081 if (likely(ixgbe_desc_unused(tx_ring) < size))
7084 /* A reprieve! - use start_queue because it doesn't call schedule */
7085 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7086 ++tx_ring->tx_stats.restart_queue;
7090 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7092 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7094 return __ixgbe_maybe_stop_tx(tx_ring, size);
7097 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7098 void *accel_priv, select_queue_fallback_t fallback)
7100 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7102 struct ixgbe_adapter *adapter;
7103 struct ixgbe_ring_feature *f;
7108 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7113 * only execute the code below if protocol is FCoE
7114 * or FIP and we have FCoE enabled on the adapter
7116 switch (vlan_get_protocol(skb)) {
7117 case htons(ETH_P_FCOE):
7118 case htons(ETH_P_FIP):
7119 adapter = netdev_priv(dev);
7121 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7124 return fallback(dev, skb);
7127 f = &adapter->ring_feature[RING_F_FCOE];
7129 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7132 while (txq >= f->indices)
7135 return txq + f->offset;
7137 return fallback(dev, skb);
7141 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7142 struct ixgbe_adapter *adapter,
7143 struct ixgbe_ring *tx_ring)
7145 struct ixgbe_tx_buffer *first;
7149 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7150 __be16 protocol = skb->protocol;
7154 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7155 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7156 * + 2 desc gap to keep tail from touching head,
7157 * + 1 desc for context descriptor,
7158 * otherwise try next time
7160 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7161 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7163 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7164 tx_ring->tx_stats.tx_busy++;
7165 return NETDEV_TX_BUSY;
7168 /* record the location of the first descriptor for this packet */
7169 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7171 first->bytecount = skb->len;
7172 first->gso_segs = 1;
7174 /* if we have a HW VLAN tag being added default to the HW one */
7175 if (vlan_tx_tag_present(skb)) {
7176 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7177 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7178 /* else if it is a SW VLAN check the next protocol and store the tag */
7179 } else if (protocol == htons(ETH_P_8021Q)) {
7180 struct vlan_hdr *vhdr, _vhdr;
7181 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7185 protocol = vhdr->h_vlan_encapsulated_proto;
7186 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7187 IXGBE_TX_FLAGS_VLAN_SHIFT;
7188 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7191 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
7192 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7193 &adapter->state))) {
7194 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7195 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7197 /* schedule check for Tx timestamp */
7198 adapter->ptp_tx_skb = skb_get(skb);
7199 adapter->ptp_tx_start = jiffies;
7200 schedule_work(&adapter->ptp_tx_work);
7203 skb_tx_timestamp(skb);
7205 #ifdef CONFIG_PCI_IOV
7207 * Use the l2switch_enable flag - would be false if the DMA
7208 * Tx switch had been disabled.
7210 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7211 tx_flags |= IXGBE_TX_FLAGS_CC;
7214 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7215 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7216 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7217 (skb->priority != TC_PRIO_CONTROL))) {
7218 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7219 tx_flags |= (skb->priority & 0x7) <<
7220 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7221 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7222 struct vlan_ethhdr *vhdr;
7224 if (skb_cow_head(skb, 0))
7226 vhdr = (struct vlan_ethhdr *)skb->data;
7227 vhdr->h_vlan_TCI = htons(tx_flags >>
7228 IXGBE_TX_FLAGS_VLAN_SHIFT);
7230 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7234 /* record initial flags and protocol */
7235 first->tx_flags = tx_flags;
7236 first->protocol = protocol;
7239 /* setup tx offload for FCoE */
7240 if ((protocol == htons(ETH_P_FCOE)) &&
7241 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7242 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7249 #endif /* IXGBE_FCOE */
7250 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7254 ixgbe_tx_csum(tx_ring, first);
7256 /* add the ATR filter if ATR is on */
7257 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7258 ixgbe_atr(tx_ring, first);
7262 #endif /* IXGBE_FCOE */
7263 ixgbe_tx_map(tx_ring, first, hdr_len);
7265 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7267 return NETDEV_TX_OK;
7270 dev_kfree_skb_any(first->skb);
7273 return NETDEV_TX_OK;
7276 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7277 struct net_device *netdev,
7278 struct ixgbe_ring *ring)
7280 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7281 struct ixgbe_ring *tx_ring;
7284 * The minimum packet size for olinfo paylen is 17 so pad the skb
7285 * in order to meet this minimum size requirement.
7287 if (unlikely(skb->len < 17)) {
7288 if (skb_pad(skb, 17 - skb->len))
7289 return NETDEV_TX_OK;
7291 skb_set_tail_pointer(skb, 17);
7294 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7296 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7299 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7300 struct net_device *netdev)
7302 return __ixgbe_xmit_frame(skb, netdev, NULL);
7306 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7307 * @netdev: network interface device structure
7308 * @p: pointer to an address structure
7310 * Returns 0 on success, negative on failure
7312 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7314 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7315 struct ixgbe_hw *hw = &adapter->hw;
7316 struct sockaddr *addr = p;
7319 if (!is_valid_ether_addr(addr->sa_data))
7320 return -EADDRNOTAVAIL;
7322 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7323 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7324 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7326 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7327 return ret > 0 ? 0 : ret;
7331 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7333 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7334 struct ixgbe_hw *hw = &adapter->hw;
7338 if (prtad != hw->phy.mdio.prtad)
7340 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7346 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7347 u16 addr, u16 value)
7349 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7350 struct ixgbe_hw *hw = &adapter->hw;
7352 if (prtad != hw->phy.mdio.prtad)
7354 return hw->phy.ops.write_reg(hw, addr, devad, value);
7357 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7359 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7363 return ixgbe_ptp_set_ts_config(adapter, req);
7365 return ixgbe_ptp_get_ts_config(adapter, req);
7367 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7372 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7374 * @netdev: network interface device structure
7376 * Returns non-zero on failure
7378 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7381 struct ixgbe_adapter *adapter = netdev_priv(dev);
7382 struct ixgbe_hw *hw = &adapter->hw;
7384 if (is_valid_ether_addr(hw->mac.san_addr)) {
7386 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7389 /* update SAN MAC vmdq pool selection */
7390 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7396 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7398 * @netdev: network interface device structure
7400 * Returns non-zero on failure
7402 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7405 struct ixgbe_adapter *adapter = netdev_priv(dev);
7406 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7408 if (is_valid_ether_addr(mac->san_addr)) {
7410 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7416 #ifdef CONFIG_NET_POLL_CONTROLLER
7418 * Polling 'interrupt' - used by things like netconsole to send skbs
7419 * without having to re-enable interrupts. It's not called while
7420 * the interrupt routine is executing.
7422 static void ixgbe_netpoll(struct net_device *netdev)
7424 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7427 /* if interface is down do nothing */
7428 if (test_bit(__IXGBE_DOWN, &adapter->state))
7431 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
7432 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
7433 for (i = 0; i < adapter->num_q_vectors; i++)
7434 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7436 ixgbe_intr(adapter->pdev->irq, netdev);
7438 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
7442 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7443 struct rtnl_link_stats64 *stats)
7445 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7449 for (i = 0; i < adapter->num_rx_queues; i++) {
7450 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7456 start = u64_stats_fetch_begin_irq(&ring->syncp);
7457 packets = ring->stats.packets;
7458 bytes = ring->stats.bytes;
7459 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7460 stats->rx_packets += packets;
7461 stats->rx_bytes += bytes;
7465 for (i = 0; i < adapter->num_tx_queues; i++) {
7466 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7472 start = u64_stats_fetch_begin_irq(&ring->syncp);
7473 packets = ring->stats.packets;
7474 bytes = ring->stats.bytes;
7475 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7476 stats->tx_packets += packets;
7477 stats->tx_bytes += bytes;
7481 /* following stats updated by ixgbe_watchdog_task() */
7482 stats->multicast = netdev->stats.multicast;
7483 stats->rx_errors = netdev->stats.rx_errors;
7484 stats->rx_length_errors = netdev->stats.rx_length_errors;
7485 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7486 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7490 #ifdef CONFIG_IXGBE_DCB
7492 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7493 * @adapter: pointer to ixgbe_adapter
7494 * @tc: number of traffic classes currently enabled
7496 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7497 * 802.1Q priority maps to a packet buffer that exists.
7499 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7501 struct ixgbe_hw *hw = &adapter->hw;
7505 /* 82598 have a static priority to TC mapping that can not
7506 * be changed so no validation is needed.
7508 if (hw->mac.type == ixgbe_mac_82598EB)
7511 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7514 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7515 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7517 /* If up2tc is out of bounds default to zero */
7519 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7523 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7529 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7530 * @adapter: Pointer to adapter struct
7532 * Populate the netdev user priority to tc map
7534 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7536 struct net_device *dev = adapter->netdev;
7537 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7538 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7541 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7544 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7545 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7547 tc = ets->prio_tc[prio];
7549 netdev_set_prio_tc_map(dev, prio, tc);
7553 #endif /* CONFIG_IXGBE_DCB */
7555 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7557 * @netdev: net device to configure
7558 * @tc: number of traffic classes to enable
7560 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7562 struct ixgbe_adapter *adapter = netdev_priv(dev);
7563 struct ixgbe_hw *hw = &adapter->hw;
7566 /* Hardware supports up to 8 traffic classes */
7567 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7568 (hw->mac.type == ixgbe_mac_82598EB &&
7569 tc < MAX_TRAFFIC_CLASS))
7572 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7573 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7576 /* Hardware has to reinitialize queues and interrupts to
7577 * match packet buffer alignment. Unfortunately, the
7578 * hardware is not flexible enough to do this dynamically.
7580 if (netif_running(dev))
7582 ixgbe_clear_interrupt_scheme(adapter);
7584 #ifdef CONFIG_IXGBE_DCB
7586 netdev_set_num_tc(dev, tc);
7587 ixgbe_set_prio_tc_map(adapter);
7589 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7591 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7592 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7593 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7596 netdev_reset_tc(dev);
7598 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7599 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7601 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7603 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7604 adapter->dcb_cfg.pfc_mode_enable = false;
7607 ixgbe_validate_rtr(adapter, tc);
7609 #endif /* CONFIG_IXGBE_DCB */
7610 ixgbe_init_interrupt_scheme(adapter);
7612 if (netif_running(dev))
7613 return ixgbe_open(dev);
7618 #ifdef CONFIG_PCI_IOV
7619 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7621 struct net_device *netdev = adapter->netdev;
7624 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7629 void ixgbe_do_reset(struct net_device *netdev)
7631 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7633 if (netif_running(netdev))
7634 ixgbe_reinit_locked(adapter);
7636 ixgbe_reset(adapter);
7639 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7640 netdev_features_t features)
7642 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7644 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7645 if (!(features & NETIF_F_RXCSUM))
7646 features &= ~NETIF_F_LRO;
7648 /* Turn off LRO if not RSC capable */
7649 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7650 features &= ~NETIF_F_LRO;
7655 static int ixgbe_set_features(struct net_device *netdev,
7656 netdev_features_t features)
7658 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7659 netdev_features_t changed = netdev->features ^ features;
7660 bool need_reset = false;
7662 /* Make sure RSC matches LRO, reset if change */
7663 if (!(features & NETIF_F_LRO)) {
7664 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7666 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7667 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7668 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7669 if (adapter->rx_itr_setting == 1 ||
7670 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7671 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7673 } else if ((changed ^ features) & NETIF_F_LRO) {
7674 e_info(probe, "rx-usecs set too low, "
7680 * Check if Flow Director n-tuple support was enabled or disabled. If
7681 * the state changed, we need to reset.
7683 switch (features & NETIF_F_NTUPLE) {
7684 case NETIF_F_NTUPLE:
7685 /* turn off ATR, enable perfect filters and reset */
7686 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7689 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7690 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7693 /* turn off perfect filters, enable ATR and reset */
7694 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7697 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7699 /* We cannot enable ATR if SR-IOV is enabled */
7700 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7703 /* We cannot enable ATR if we have 2 or more traffic classes */
7704 if (netdev_get_num_tc(netdev) > 1)
7707 /* We cannot enable ATR if RSS is disabled */
7708 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7711 /* A sample rate of 0 indicates ATR disabled */
7712 if (!adapter->atr_sample_rate)
7715 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7719 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7720 ixgbe_vlan_strip_enable(adapter);
7722 ixgbe_vlan_strip_disable(adapter);
7724 if (changed & NETIF_F_RXALL)
7727 netdev->features = features;
7729 ixgbe_do_reset(netdev);
7734 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7735 struct net_device *dev,
7736 const unsigned char *addr,
7739 struct ixgbe_adapter *adapter = netdev_priv(dev);
7742 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7743 return ndo_dflt_fdb_add(ndm, tb, dev, addr, flags);
7745 /* Hardware does not support aging addresses so if a
7746 * ndm_state is given only allow permanent addresses
7748 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7749 pr_info("%s: FDB only supports static addresses\n",
7754 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7755 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
7757 if (netdev_uc_count(dev) < rar_uc_entries)
7758 err = dev_uc_add_excl(dev, addr);
7761 } else if (is_multicast_ether_addr(addr)) {
7762 err = dev_mc_add_excl(dev, addr);
7767 /* Only return duplicate errors if NLM_F_EXCL is set */
7768 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7774 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7775 struct nlmsghdr *nlh)
7777 struct ixgbe_adapter *adapter = netdev_priv(dev);
7778 struct nlattr *attr, *br_spec;
7781 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7784 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7786 nla_for_each_nested(attr, br_spec, rem) {
7790 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7793 mode = nla_get_u16(attr);
7794 if (mode == BRIDGE_MODE_VEPA) {
7796 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7797 } else if (mode == BRIDGE_MODE_VEB) {
7798 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7799 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7803 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7805 e_info(drv, "enabling bridge mode: %s\n",
7806 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7812 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7813 struct net_device *dev,
7816 struct ixgbe_adapter *adapter = netdev_priv(dev);
7819 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7822 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7823 mode = BRIDGE_MODE_VEB;
7825 mode = BRIDGE_MODE_VEPA;
7827 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
7830 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
7832 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
7833 struct ixgbe_adapter *adapter = netdev_priv(pdev);
7838 if (vdev->num_rx_queues != vdev->num_tx_queues) {
7839 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
7841 return ERR_PTR(-EINVAL);
7844 /* Check for hardware restriction on number of rx/tx queues */
7845 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
7846 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
7848 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7850 return ERR_PTR(-EINVAL);
7853 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7854 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
7855 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
7856 return ERR_PTR(-EBUSY);
7858 fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
7860 return ERR_PTR(-ENOMEM);
7862 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
7863 adapter->num_rx_pools++;
7864 set_bit(pool, &adapter->fwd_bitmask);
7865 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7867 /* Enable VMDq flag so device will be set in VM mode */
7868 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
7869 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7870 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
7872 /* Force reinit of ring allocation with VMDQ enabled */
7873 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7876 fwd_adapter->pool = pool;
7877 fwd_adapter->real_adapter = adapter;
7878 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
7881 netif_tx_start_all_queues(vdev);
7884 /* unwind counter and free adapter struct */
7886 "%s: dfwd hardware acceleration failed\n", vdev->name);
7887 clear_bit(pool, &adapter->fwd_bitmask);
7888 adapter->num_rx_pools--;
7890 return ERR_PTR(err);
7893 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
7895 struct ixgbe_fwd_adapter *fwd_adapter = priv;
7896 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
7899 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
7900 adapter->num_rx_pools--;
7902 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7903 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7904 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
7905 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7906 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7907 fwd_adapter->pool, adapter->num_rx_pools,
7908 fwd_adapter->rx_base_queue,
7909 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
7910 adapter->fwd_bitmask);
7914 static const struct net_device_ops ixgbe_netdev_ops = {
7915 .ndo_open = ixgbe_open,
7916 .ndo_stop = ixgbe_close,
7917 .ndo_start_xmit = ixgbe_xmit_frame,
7918 .ndo_select_queue = ixgbe_select_queue,
7919 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7920 .ndo_validate_addr = eth_validate_addr,
7921 .ndo_set_mac_address = ixgbe_set_mac,
7922 .ndo_change_mtu = ixgbe_change_mtu,
7923 .ndo_tx_timeout = ixgbe_tx_timeout,
7924 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7925 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7926 .ndo_do_ioctl = ixgbe_ioctl,
7927 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7928 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7929 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
7930 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7931 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7932 .ndo_get_stats64 = ixgbe_get_stats64,
7933 #ifdef CONFIG_IXGBE_DCB
7934 .ndo_setup_tc = ixgbe_setup_tc,
7936 #ifdef CONFIG_NET_POLL_CONTROLLER
7937 .ndo_poll_controller = ixgbe_netpoll,
7939 #ifdef CONFIG_NET_RX_BUSY_POLL
7940 .ndo_busy_poll = ixgbe_low_latency_recv,
7943 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7944 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7945 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7946 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7947 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7948 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7949 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7950 #endif /* IXGBE_FCOE */
7951 .ndo_set_features = ixgbe_set_features,
7952 .ndo_fix_features = ixgbe_fix_features,
7953 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7954 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7955 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7956 .ndo_dfwd_add_station = ixgbe_fwd_add,
7957 .ndo_dfwd_del_station = ixgbe_fwd_del,
7961 * ixgbe_enumerate_functions - Get the number of ports this device has
7962 * @adapter: adapter structure
7964 * This function enumerates the phsyical functions co-located on a single slot,
7965 * in order to determine how many ports a device has. This is most useful in
7966 * determining the required GT/s of PCIe bandwidth necessary for optimal
7969 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
7971 struct list_head *entry;
7974 /* Some cards can not use the generic count PCIe functions method,
7975 * because they are behind a parent switch, so we hardcode these with
7976 * the correct number of functions.
7978 if (ixgbe_pcie_from_parent(&adapter->hw)) {
7981 list_for_each(entry, &adapter->pdev->bus_list) {
7982 struct pci_dev *pdev =
7983 list_entry(entry, struct pci_dev, bus_list);
7984 /* don't count virtual functions */
7985 if (!pdev->is_virtfn)
7994 * ixgbe_wol_supported - Check whether device supports WoL
7995 * @hw: hw specific details
7996 * @device_id: the device ID
7997 * @subdev_id: the subsystem device ID
7999 * This function is used by probe and ethtool to determine
8000 * which devices have WoL support
8003 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8006 struct ixgbe_hw *hw = &adapter->hw;
8007 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8008 int is_wol_supported = 0;
8010 switch (device_id) {
8011 case IXGBE_DEV_ID_82599_SFP:
8012 /* Only these subdevices could supports WOL */
8013 switch (subdevice_id) {
8014 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8015 case IXGBE_SUBDEV_ID_82599_560FLR:
8016 /* only support first port */
8017 if (hw->bus.func != 0)
8019 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8020 case IXGBE_SUBDEV_ID_82599_SFP:
8021 case IXGBE_SUBDEV_ID_82599_RNDC:
8022 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8023 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8024 is_wol_supported = 1;
8028 case IXGBE_DEV_ID_82599EN_SFP:
8029 /* Only this subdevice supports WOL */
8030 switch (subdevice_id) {
8031 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8032 is_wol_supported = 1;
8036 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8037 /* All except this subdevice support WOL */
8038 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8039 is_wol_supported = 1;
8041 case IXGBE_DEV_ID_82599_KX4:
8042 is_wol_supported = 1;
8044 case IXGBE_DEV_ID_X540T:
8045 case IXGBE_DEV_ID_X540T1:
8046 /* check eeprom to see if enabled wol */
8047 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8048 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8049 (hw->bus.func == 0))) {
8050 is_wol_supported = 1;
8055 return is_wol_supported;
8059 * ixgbe_probe - Device Initialization Routine
8060 * @pdev: PCI device information struct
8061 * @ent: entry in ixgbe_pci_tbl
8063 * Returns 0 on success, negative on failure
8065 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8066 * The OS initialization, configuring of the adapter private structure,
8067 * and a hardware reset occur.
8069 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8071 struct net_device *netdev;
8072 struct ixgbe_adapter *adapter = NULL;
8073 struct ixgbe_hw *hw;
8074 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8075 static int cards_found;
8076 int i, err, pci_using_dac, expected_gts;
8077 unsigned int indices = MAX_TX_QUEUES;
8078 u8 part_str[IXGBE_PBANUM_LENGTH];
8084 /* Catch broken hardware that put the wrong VF device ID in
8085 * the PCIe SR-IOV capability.
8087 if (pdev->is_virtfn) {
8088 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8089 pci_name(pdev), pdev->vendor, pdev->device);
8093 err = pci_enable_device_mem(pdev);
8097 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8100 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8103 "No usable DMA configuration, aborting\n");
8109 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8110 IORESOURCE_MEM), ixgbe_driver_name);
8113 "pci_request_selected_regions failed 0x%x\n", err);
8117 pci_enable_pcie_error_reporting(pdev);
8119 pci_set_master(pdev);
8120 pci_save_state(pdev);
8122 if (ii->mac == ixgbe_mac_82598EB) {
8123 #ifdef CONFIG_IXGBE_DCB
8124 /* 8 TC w/ 4 queues per TC */
8125 indices = 4 * MAX_TRAFFIC_CLASS;
8127 indices = IXGBE_MAX_RSS_INDICES;
8131 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8134 goto err_alloc_etherdev;
8137 SET_NETDEV_DEV(netdev, &pdev->dev);
8139 adapter = netdev_priv(netdev);
8140 pci_set_drvdata(pdev, adapter);
8142 adapter->netdev = netdev;
8143 adapter->pdev = pdev;
8146 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8148 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8149 pci_resource_len(pdev, 0));
8150 adapter->io_addr = hw->hw_addr;
8156 netdev->netdev_ops = &ixgbe_netdev_ops;
8157 ixgbe_set_ethtool_ops(netdev);
8158 netdev->watchdog_timeo = 5 * HZ;
8159 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
8161 adapter->bd_number = cards_found;
8164 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8165 hw->mac.type = ii->mac;
8168 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8169 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
8170 if (ixgbe_removed(hw->hw_addr)) {
8174 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8175 if (!(eec & (1 << 8)))
8176 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8179 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8180 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8181 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8182 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8183 hw->phy.mdio.mmds = 0;
8184 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8185 hw->phy.mdio.dev = netdev;
8186 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8187 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8189 ii->get_invariants(hw);
8191 /* setup the private structure */
8192 err = ixgbe_sw_init(adapter);
8196 /* Make it possible the adapter to be woken up via WOL */
8197 switch (adapter->hw.mac.type) {
8198 case ixgbe_mac_82599EB:
8199 case ixgbe_mac_X540:
8200 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8207 * If there is a fan on this device and it has failed log the
8210 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8211 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8212 if (esdp & IXGBE_ESDP_SDP1)
8213 e_crit(probe, "Fan has stopped, replace the adapter\n");
8216 if (allow_unsupported_sfp)
8217 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8219 /* reset_hw fills in the perm_addr as well */
8220 hw->phy.reset_if_overtemp = true;
8221 err = hw->mac.ops.reset_hw(hw);
8222 hw->phy.reset_if_overtemp = false;
8223 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8224 hw->mac.type == ixgbe_mac_82598EB) {
8226 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8227 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8228 e_dev_err("Reload the driver after installing a supported module.\n");
8231 e_dev_err("HW Init failed: %d\n", err);
8235 #ifdef CONFIG_PCI_IOV
8236 /* SR-IOV not supported on the 82598 */
8237 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8240 ixgbe_init_mbx_params_pf(hw);
8241 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8242 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8243 ixgbe_enable_sriov(adapter);
8247 netdev->features = NETIF_F_SG |
8250 NETIF_F_HW_VLAN_CTAG_TX |
8251 NETIF_F_HW_VLAN_CTAG_RX |
8252 NETIF_F_HW_VLAN_CTAG_FILTER |
8258 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8260 switch (adapter->hw.mac.type) {
8261 case ixgbe_mac_82599EB:
8262 case ixgbe_mac_X540:
8263 netdev->features |= NETIF_F_SCTP_CSUM;
8264 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8271 netdev->hw_features |= NETIF_F_RXALL;
8273 netdev->vlan_features |= NETIF_F_TSO;
8274 netdev->vlan_features |= NETIF_F_TSO6;
8275 netdev->vlan_features |= NETIF_F_IP_CSUM;
8276 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8277 netdev->vlan_features |= NETIF_F_SG;
8279 netdev->priv_flags |= IFF_UNICAST_FLT;
8280 netdev->priv_flags |= IFF_SUPP_NOFCS;
8282 #ifdef CONFIG_IXGBE_DCB
8283 netdev->dcbnl_ops = &dcbnl_ops;
8287 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8288 unsigned int fcoe_l;
8290 if (hw->mac.ops.get_device_caps) {
8291 hw->mac.ops.get_device_caps(hw, &device_caps);
8292 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8293 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8297 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8298 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8300 netdev->features |= NETIF_F_FSO |
8303 netdev->vlan_features |= NETIF_F_FSO |
8307 #endif /* IXGBE_FCOE */
8308 if (pci_using_dac) {
8309 netdev->features |= NETIF_F_HIGHDMA;
8310 netdev->vlan_features |= NETIF_F_HIGHDMA;
8313 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8314 netdev->hw_features |= NETIF_F_LRO;
8315 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8316 netdev->features |= NETIF_F_LRO;
8318 /* make sure the EEPROM is good */
8319 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8320 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8325 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8327 if (!is_valid_ether_addr(netdev->dev_addr)) {
8328 e_dev_err("invalid MAC address\n");
8333 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8335 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8336 (unsigned long) adapter);
8338 if (ixgbe_removed(hw->hw_addr)) {
8342 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8343 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8344 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8346 err = ixgbe_init_interrupt_scheme(adapter);
8350 /* WOL not supported for all devices */
8352 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8353 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8354 pdev->subsystem_device);
8355 if (hw->wol_enabled)
8356 adapter->wol = IXGBE_WUFC_MAG;
8358 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8360 /* save off EEPROM version number */
8361 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8362 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8364 /* pick up the PCI bus settings for reporting later */
8365 hw->mac.ops.get_bus_info(hw);
8366 if (ixgbe_pcie_from_parent(hw))
8367 ixgbe_get_parent_bus_info(adapter);
8369 /* calculate the expected PCIe bandwidth required for optimal
8370 * performance. Note that some older parts will never have enough
8371 * bandwidth due to being older generation PCIe parts. We clamp these
8372 * parts to ensure no warning is displayed if it can't be fixed.
8374 switch (hw->mac.type) {
8375 case ixgbe_mac_82598EB:
8376 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8379 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8382 ixgbe_check_minimum_link(adapter, expected_gts);
8384 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
8386 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
8387 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8388 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8389 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8392 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8393 hw->mac.type, hw->phy.type, part_str);
8395 e_dev_info("%pM\n", netdev->dev_addr);
8397 /* reset the hardware with the new settings */
8398 err = hw->mac.ops.start_hw(hw);
8399 if (err == IXGBE_ERR_EEPROM_VERSION) {
8400 /* We are running on a pre-production device, log a warning */
8401 e_dev_warn("This device is a pre-production adapter/LOM. "
8402 "Please be aware there may be issues associated "
8403 "with your hardware. If you are experiencing "
8404 "problems please contact your Intel or hardware "
8405 "representative who provided you with this "
8408 strcpy(netdev->name, "eth%d");
8409 err = register_netdev(netdev);
8413 /* power down the optics for 82599 SFP+ fiber */
8414 if (hw->mac.ops.disable_tx_laser)
8415 hw->mac.ops.disable_tx_laser(hw);
8417 /* carrier off reporting is important to ethtool even BEFORE open */
8418 netif_carrier_off(netdev);
8420 #ifdef CONFIG_IXGBE_DCA
8421 if (dca_add_requester(&pdev->dev) == 0) {
8422 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8423 ixgbe_setup_dca(adapter);
8426 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8427 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8428 for (i = 0; i < adapter->num_vfs; i++)
8429 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8432 /* firmware requires driver version to be 0xFFFFFFFF
8433 * since os does not support feature
8435 if (hw->mac.ops.set_fw_drv_ver)
8436 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8439 /* add san mac addr to netdev */
8440 ixgbe_add_sanmac_netdev(netdev);
8442 e_dev_info("%s\n", ixgbe_default_device_descr);
8445 #ifdef CONFIG_IXGBE_HWMON
8446 if (ixgbe_sysfs_init(adapter))
8447 e_err(probe, "failed to allocate sysfs resources\n");
8448 #endif /* CONFIG_IXGBE_HWMON */
8450 ixgbe_dbg_adapter_init(adapter);
8452 /* Need link setup for MNG FW, else wait for IXGBE_UP */
8453 if (ixgbe_mng_enabled(hw) && hw->mac.ops.setup_link)
8454 hw->mac.ops.setup_link(hw,
8455 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8461 ixgbe_release_hw_control(adapter);
8462 ixgbe_clear_interrupt_scheme(adapter);
8464 ixgbe_disable_sriov(adapter);
8465 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8466 iounmap(adapter->io_addr);
8467 kfree(adapter->mac_table);
8469 free_netdev(netdev);
8471 pci_release_selected_regions(pdev,
8472 pci_select_bars(pdev, IORESOURCE_MEM));
8475 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8476 pci_disable_device(pdev);
8481 * ixgbe_remove - Device Removal Routine
8482 * @pdev: PCI device information struct
8484 * ixgbe_remove is called by the PCI subsystem to alert the driver
8485 * that it should release a PCI device. The could be caused by a
8486 * Hot-Plug event, or because the driver is going to be removed from
8489 static void ixgbe_remove(struct pci_dev *pdev)
8491 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8492 struct net_device *netdev = adapter->netdev;
8494 ixgbe_dbg_adapter_exit(adapter);
8496 set_bit(__IXGBE_REMOVING, &adapter->state);
8497 cancel_work_sync(&adapter->service_task);
8500 #ifdef CONFIG_IXGBE_DCA
8501 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8502 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8503 dca_remove_requester(&pdev->dev);
8504 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8508 #ifdef CONFIG_IXGBE_HWMON
8509 ixgbe_sysfs_exit(adapter);
8510 #endif /* CONFIG_IXGBE_HWMON */
8512 /* remove the added san mac */
8513 ixgbe_del_sanmac_netdev(netdev);
8515 if (netdev->reg_state == NETREG_REGISTERED)
8516 unregister_netdev(netdev);
8518 #ifdef CONFIG_PCI_IOV
8520 * Only disable SR-IOV on unload if the user specified the now
8521 * deprecated max_vfs module parameter.
8524 ixgbe_disable_sriov(adapter);
8526 ixgbe_clear_interrupt_scheme(adapter);
8528 ixgbe_release_hw_control(adapter);
8531 kfree(adapter->ixgbe_ieee_pfc);
8532 kfree(adapter->ixgbe_ieee_ets);
8535 iounmap(adapter->io_addr);
8536 pci_release_selected_regions(pdev, pci_select_bars(pdev,
8539 e_dev_info("complete\n");
8541 kfree(adapter->mac_table);
8542 free_netdev(netdev);
8544 pci_disable_pcie_error_reporting(pdev);
8546 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8547 pci_disable_device(pdev);
8551 * ixgbe_io_error_detected - called when PCI error is detected
8552 * @pdev: Pointer to PCI device
8553 * @state: The current pci connection state
8555 * This function is called after a PCI bus error affecting
8556 * this device has been detected.
8558 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8559 pci_channel_state_t state)
8561 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8562 struct net_device *netdev = adapter->netdev;
8564 #ifdef CONFIG_PCI_IOV
8565 struct ixgbe_hw *hw = &adapter->hw;
8566 struct pci_dev *bdev, *vfdev;
8567 u32 dw0, dw1, dw2, dw3;
8569 u16 req_id, pf_func;
8571 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8572 adapter->num_vfs == 0)
8573 goto skip_bad_vf_detection;
8575 bdev = pdev->bus->self;
8576 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8577 bdev = bdev->bus->self;
8580 goto skip_bad_vf_detection;
8582 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8584 goto skip_bad_vf_detection;
8586 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8587 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8588 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8589 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8590 if (ixgbe_removed(hw->hw_addr))
8591 goto skip_bad_vf_detection;
8594 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8595 if (!(req_id & 0x0080))
8596 goto skip_bad_vf_detection;
8598 pf_func = req_id & 0x01;
8599 if ((pf_func & 1) == (pdev->devfn & 1)) {
8600 unsigned int device_id;
8602 vf = (req_id & 0x7F) >> 1;
8603 e_dev_err("VF %d has caused a PCIe error\n", vf);
8604 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8605 "%8.8x\tdw3: %8.8x\n",
8606 dw0, dw1, dw2, dw3);
8607 switch (adapter->hw.mac.type) {
8608 case ixgbe_mac_82599EB:
8609 device_id = IXGBE_82599_VF_DEVICE_ID;
8611 case ixgbe_mac_X540:
8612 device_id = IXGBE_X540_VF_DEVICE_ID;
8619 /* Find the pci device of the offending VF */
8620 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8622 if (vfdev->devfn == (req_id & 0xFF))
8624 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8628 * There's a slim chance the VF could have been hot plugged,
8629 * so if it is no longer present we don't need to issue the
8630 * VFLR. Just clean up the AER in that case.
8633 e_dev_err("Issuing VFLR to VF %d\n", vf);
8634 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
8635 /* Free device reference count */
8639 pci_cleanup_aer_uncorrect_error_status(pdev);
8643 * Even though the error may have occurred on the other port
8644 * we still need to increment the vf error reference count for
8645 * both ports because the I/O resume function will be called
8648 adapter->vferr_refcount++;
8650 return PCI_ERS_RESULT_RECOVERED;
8652 skip_bad_vf_detection:
8653 #endif /* CONFIG_PCI_IOV */
8654 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
8655 return PCI_ERS_RESULT_DISCONNECT;
8658 netif_device_detach(netdev);
8660 if (state == pci_channel_io_perm_failure) {
8662 return PCI_ERS_RESULT_DISCONNECT;
8665 if (netif_running(netdev))
8666 ixgbe_down(adapter);
8668 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8669 pci_disable_device(pdev);
8672 /* Request a slot reset. */
8673 return PCI_ERS_RESULT_NEED_RESET;
8677 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8678 * @pdev: Pointer to PCI device
8680 * Restart the card from scratch, as if from a cold-boot.
8682 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
8684 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8685 pci_ers_result_t result;
8688 if (pci_enable_device_mem(pdev)) {
8689 e_err(probe, "Cannot re-enable PCI device after reset.\n");
8690 result = PCI_ERS_RESULT_DISCONNECT;
8692 smp_mb__before_atomic();
8693 clear_bit(__IXGBE_DISABLED, &adapter->state);
8694 adapter->hw.hw_addr = adapter->io_addr;
8695 pci_set_master(pdev);
8696 pci_restore_state(pdev);
8697 pci_save_state(pdev);
8699 pci_wake_from_d3(pdev, false);
8701 ixgbe_reset(adapter);
8702 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8703 result = PCI_ERS_RESULT_RECOVERED;
8706 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8708 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8709 "failed 0x%0x\n", err);
8710 /* non-fatal, continue */
8717 * ixgbe_io_resume - called when traffic can start flowing again.
8718 * @pdev: Pointer to PCI device
8720 * This callback is called when the error recovery driver tells us that
8721 * its OK to resume normal operation.
8723 static void ixgbe_io_resume(struct pci_dev *pdev)
8725 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8726 struct net_device *netdev = adapter->netdev;
8728 #ifdef CONFIG_PCI_IOV
8729 if (adapter->vferr_refcount) {
8730 e_info(drv, "Resuming after VF err\n");
8731 adapter->vferr_refcount--;
8736 if (netif_running(netdev))
8739 netif_device_attach(netdev);
8742 static const struct pci_error_handlers ixgbe_err_handler = {
8743 .error_detected = ixgbe_io_error_detected,
8744 .slot_reset = ixgbe_io_slot_reset,
8745 .resume = ixgbe_io_resume,
8748 static struct pci_driver ixgbe_driver = {
8749 .name = ixgbe_driver_name,
8750 .id_table = ixgbe_pci_tbl,
8751 .probe = ixgbe_probe,
8752 .remove = ixgbe_remove,
8754 .suspend = ixgbe_suspend,
8755 .resume = ixgbe_resume,
8757 .shutdown = ixgbe_shutdown,
8758 .sriov_configure = ixgbe_pci_sriov_configure,
8759 .err_handler = &ixgbe_err_handler
8763 * ixgbe_init_module - Driver Registration Routine
8765 * ixgbe_init_module is the first routine called when the driver is
8766 * loaded. All it does is register with the PCI subsystem.
8768 static int __init ixgbe_init_module(void)
8771 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
8772 pr_info("%s\n", ixgbe_copyright);
8776 ret = pci_register_driver(&ixgbe_driver);
8782 #ifdef CONFIG_IXGBE_DCA
8783 dca_register_notify(&dca_notifier);
8789 module_init(ixgbe_init_module);
8792 * ixgbe_exit_module - Driver Exit Cleanup Routine
8794 * ixgbe_exit_module is called just before the driver is removed
8797 static void __exit ixgbe_exit_module(void)
8799 #ifdef CONFIG_IXGBE_DCA
8800 dca_unregister_notify(&dca_notifier);
8802 pci_unregister_driver(&ixgbe_driver);
8806 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8809 #ifdef CONFIG_IXGBE_DCA
8810 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
8815 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
8816 __ixgbe_notify_dca);
8818 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
8821 #endif /* CONFIG_IXGBE_DCA */
8823 module_exit(ixgbe_exit_module);