1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_bridge.h>
48 #include <linux/prefetch.h>
49 #include <scsi/fc/fc_fcoe.h>
52 #include "ixgbe_common.h"
53 #include "ixgbe_dcb_82599.h"
54 #include "ixgbe_sriov.h"
56 char ixgbe_driver_name[] = "ixgbe";
57 static const char ixgbe_driver_string[] =
58 "Intel(R) 10 Gigabit PCI Express Network Driver";
60 char ixgbe_default_device_descr[] =
61 "Intel(R) 10 Gigabit Network Connection";
63 static char ixgbe_default_device_descr[] =
64 "Intel(R) 10 Gigabit Network Connection";
66 #define DRV_VERSION "3.11.33-k"
67 const char ixgbe_driver_version[] = DRV_VERSION;
68 static const char ixgbe_copyright[] =
69 "Copyright (c) 1999-2012 Intel Corporation.";
71 static const struct ixgbe_info *ixgbe_info_tbl[] = {
72 [board_82598] = &ixgbe_82598_info,
73 [board_82599] = &ixgbe_82599_info,
74 [board_X540] = &ixgbe_X540_info,
77 /* ixgbe_pci_tbl - PCI Device ID Table
79 * Wildcard entries (PCI_ANY_ID) should come last
80 * Last entry must be all 0s
82 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
83 * Class, Class Mask, private data (not used) }
85 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
115 /* required last entry */
118 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
120 #ifdef CONFIG_IXGBE_DCA
121 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
123 static struct notifier_block dca_notifier = {
124 .notifier_call = ixgbe_notify_dca,
130 #ifdef CONFIG_PCI_IOV
131 static unsigned int max_vfs;
132 module_param(max_vfs, uint, 0);
133 MODULE_PARM_DESC(max_vfs,
134 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
135 #endif /* CONFIG_PCI_IOV */
137 static unsigned int allow_unsupported_sfp;
138 module_param(allow_unsupported_sfp, uint, 0);
139 MODULE_PARM_DESC(allow_unsupported_sfp,
140 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
142 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
143 static int debug = -1;
144 module_param(debug, int, 0);
145 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
147 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
148 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
149 MODULE_LICENSE("GPL");
150 MODULE_VERSION(DRV_VERSION);
152 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
154 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
155 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
156 schedule_work(&adapter->service_task);
159 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
161 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
163 /* flush memory to make sure state is correct before next watchdog */
164 smp_mb__before_clear_bit();
165 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
168 struct ixgbe_reg_info {
173 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
175 /* General Registers */
176 {IXGBE_CTRL, "CTRL"},
177 {IXGBE_STATUS, "STATUS"},
178 {IXGBE_CTRL_EXT, "CTRL_EXT"},
180 /* Interrupt Registers */
181 {IXGBE_EICR, "EICR"},
184 {IXGBE_SRRCTL(0), "SRRCTL"},
185 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
186 {IXGBE_RDLEN(0), "RDLEN"},
187 {IXGBE_RDH(0), "RDH"},
188 {IXGBE_RDT(0), "RDT"},
189 {IXGBE_RXDCTL(0), "RXDCTL"},
190 {IXGBE_RDBAL(0), "RDBAL"},
191 {IXGBE_RDBAH(0), "RDBAH"},
194 {IXGBE_TDBAL(0), "TDBAL"},
195 {IXGBE_TDBAH(0), "TDBAH"},
196 {IXGBE_TDLEN(0), "TDLEN"},
197 {IXGBE_TDH(0), "TDH"},
198 {IXGBE_TDT(0), "TDT"},
199 {IXGBE_TXDCTL(0), "TXDCTL"},
201 /* List Terminator */
207 * ixgbe_regdump - register printout routine
209 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
215 switch (reginfo->ofs) {
216 case IXGBE_SRRCTL(0):
217 for (i = 0; i < 64; i++)
218 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
220 case IXGBE_DCA_RXCTRL(0):
221 for (i = 0; i < 64; i++)
222 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
225 for (i = 0; i < 64; i++)
226 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
229 for (i = 0; i < 64; i++)
230 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
233 for (i = 0; i < 64; i++)
234 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
236 case IXGBE_RXDCTL(0):
237 for (i = 0; i < 64; i++)
238 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
241 for (i = 0; i < 64; i++)
242 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
245 for (i = 0; i < 64; i++)
246 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
249 for (i = 0; i < 64; i++)
250 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
253 for (i = 0; i < 64; i++)
254 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
257 for (i = 0; i < 64; i++)
258 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
261 for (i = 0; i < 64; i++)
262 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
265 for (i = 0; i < 64; i++)
266 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
268 case IXGBE_TXDCTL(0):
269 for (i = 0; i < 64; i++)
270 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
273 pr_info("%-15s %08x\n", reginfo->name,
274 IXGBE_READ_REG(hw, reginfo->ofs));
278 for (i = 0; i < 8; i++) {
279 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
280 pr_err("%-15s", rname);
281 for (j = 0; j < 8; j++)
282 pr_cont(" %08x", regs[i*8+j]);
289 * ixgbe_dump - Print registers, tx-rings and rx-rings
291 static void ixgbe_dump(struct ixgbe_adapter *adapter)
293 struct net_device *netdev = adapter->netdev;
294 struct ixgbe_hw *hw = &adapter->hw;
295 struct ixgbe_reg_info *reginfo;
297 struct ixgbe_ring *tx_ring;
298 struct ixgbe_tx_buffer *tx_buffer;
299 union ixgbe_adv_tx_desc *tx_desc;
300 struct my_u0 { u64 a; u64 b; } *u0;
301 struct ixgbe_ring *rx_ring;
302 union ixgbe_adv_rx_desc *rx_desc;
303 struct ixgbe_rx_buffer *rx_buffer_info;
307 if (!netif_msg_hw(adapter))
310 /* Print netdevice Info */
312 dev_info(&adapter->pdev->dev, "Net device Info\n");
313 pr_info("Device Name state "
314 "trans_start last_rx\n");
315 pr_info("%-15s %016lX %016lX %016lX\n",
322 /* Print Registers */
323 dev_info(&adapter->pdev->dev, "Register Dump\n");
324 pr_info(" Register Name Value\n");
325 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
326 reginfo->name; reginfo++) {
327 ixgbe_regdump(hw, reginfo);
330 /* Print TX Ring Summary */
331 if (!netdev || !netif_running(netdev))
334 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
335 pr_info(" %s %s %s %s\n",
336 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
337 "leng", "ntw", "timestamp");
338 for (n = 0; n < adapter->num_tx_queues; n++) {
339 tx_ring = adapter->tx_ring[n];
340 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
341 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
342 n, tx_ring->next_to_use, tx_ring->next_to_clean,
343 (u64)dma_unmap_addr(tx_buffer, dma),
344 dma_unmap_len(tx_buffer, len),
345 tx_buffer->next_to_watch,
346 (u64)tx_buffer->time_stamp);
350 if (!netif_msg_tx_done(adapter))
351 goto rx_ring_summary;
353 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * 82598 Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
365 * 82598 Advanced Transmit Descriptor (Write-Back Format)
366 * +--------------------------------------------------------------+
368 * +--------------------------------------------------------------+
369 * 8 | RSV | STA | NXTSEQ |
370 * +--------------------------------------------------------------+
373 * 82599+ Advanced Transmit Descriptor
374 * +--------------------------------------------------------------+
375 * 0 | Buffer Address [63:0] |
376 * +--------------------------------------------------------------+
377 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
378 * +--------------------------------------------------------------+
379 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
381 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
382 * +--------------------------------------------------------------+
384 * +--------------------------------------------------------------+
385 * 8 | RSV | STA | RSV |
386 * +--------------------------------------------------------------+
390 for (n = 0; n < adapter->num_tx_queues; n++) {
391 tx_ring = adapter->tx_ring[n];
392 pr_info("------------------------------------\n");
393 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
394 pr_info("------------------------------------\n");
395 pr_info("%s%s %s %s %s %s\n",
396 "T [desc] [address 63:0 ] ",
397 "[PlPOIdStDDt Ln] [bi->dma ] ",
398 "leng", "ntw", "timestamp", "bi->skb");
400 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
401 tx_desc = IXGBE_TX_DESC(tx_ring, i);
402 tx_buffer = &tx_ring->tx_buffer_info[i];
403 u0 = (struct my_u0 *)tx_desc;
404 if (dma_unmap_len(tx_buffer, len) > 0) {
405 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
409 (u64)dma_unmap_addr(tx_buffer, dma),
410 dma_unmap_len(tx_buffer, len),
411 tx_buffer->next_to_watch,
412 (u64)tx_buffer->time_stamp,
414 if (i == tx_ring->next_to_use &&
415 i == tx_ring->next_to_clean)
417 else if (i == tx_ring->next_to_use)
419 else if (i == tx_ring->next_to_clean)
424 if (netif_msg_pktdata(adapter) &&
426 print_hex_dump(KERN_INFO, "",
427 DUMP_PREFIX_ADDRESS, 16, 1,
428 tx_buffer->skb->data,
429 dma_unmap_len(tx_buffer, len),
435 /* Print RX Rings Summary */
437 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
438 pr_info("Queue [NTU] [NTC]\n");
439 for (n = 0; n < adapter->num_rx_queues; n++) {
440 rx_ring = adapter->rx_ring[n];
441 pr_info("%5d %5X %5X\n",
442 n, rx_ring->next_to_use, rx_ring->next_to_clean);
446 if (!netif_msg_rx_status(adapter))
449 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
451 /* Receive Descriptor Formats
453 * 82598 Advanced Receive Descriptor (Read) Format
455 * +-----------------------------------------------------+
456 * 0 | Packet Buffer Address [63:1] |A0/NSE|
457 * +----------------------------------------------+------+
458 * 8 | Header Buffer Address [63:1] | DD |
459 * +-----------------------------------------------------+
462 * 82598 Advanced Receive Descriptor (Write-Back) Format
464 * 63 48 47 32 31 30 21 20 16 15 4 3 0
465 * +------------------------------------------------------+
466 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
467 * | Packet | IP | | | | Type | Type |
468 * | Checksum | Ident | | | | | |
469 * +------------------------------------------------------+
470 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
471 * +------------------------------------------------------+
472 * 63 48 47 32 31 20 19 0
474 * 82599+ Advanced Receive Descriptor (Read) Format
476 * +-----------------------------------------------------+
477 * 0 | Packet Buffer Address [63:1] |A0/NSE|
478 * +----------------------------------------------+------+
479 * 8 | Header Buffer Address [63:1] | DD |
480 * +-----------------------------------------------------+
483 * 82599+ Advanced Receive Descriptor (Write-Back) Format
485 * 63 48 47 32 31 30 21 20 17 16 4 3 0
486 * +------------------------------------------------------+
487 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
488 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
489 * |/ Flow Dir Flt ID | | | | | |
490 * +------------------------------------------------------+
491 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
492 * +------------------------------------------------------+
493 * 63 48 47 32 31 20 19 0
496 for (n = 0; n < adapter->num_rx_queues; n++) {
497 rx_ring = adapter->rx_ring[n];
498 pr_info("------------------------------------\n");
499 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
500 pr_info("------------------------------------\n");
502 "R [desc] [ PktBuf A0] ",
503 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
504 "<-- Adv Rx Read format\n");
506 "RWB[desc] [PcsmIpSHl PtRs] ",
507 "[vl er S cks ln] ---------------- [bi->skb ] ",
508 "<-- Adv Rx Write-Back format\n");
510 for (i = 0; i < rx_ring->count; i++) {
511 rx_buffer_info = &rx_ring->rx_buffer_info[i];
512 rx_desc = IXGBE_RX_DESC(rx_ring, i);
513 u0 = (struct my_u0 *)rx_desc;
514 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
515 if (staterr & IXGBE_RXD_STAT_DD) {
516 /* Descriptor Done */
517 pr_info("RWB[0x%03X] %016llX "
518 "%016llX ---------------- %p", i,
521 rx_buffer_info->skb);
523 pr_info("R [0x%03X] %016llX "
524 "%016llX %016llX %p", i,
527 (u64)rx_buffer_info->dma,
528 rx_buffer_info->skb);
530 if (netif_msg_pktdata(adapter) &&
531 rx_buffer_info->dma) {
532 print_hex_dump(KERN_INFO, "",
533 DUMP_PREFIX_ADDRESS, 16, 1,
534 page_address(rx_buffer_info->page) +
535 rx_buffer_info->page_offset,
536 ixgbe_rx_bufsz(rx_ring), true);
540 if (i == rx_ring->next_to_use)
542 else if (i == rx_ring->next_to_clean)
554 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
558 /* Let firmware take over control of h/w */
559 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
560 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
561 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
564 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
568 /* Let firmware know the driver has taken over */
569 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
570 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
571 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
575 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
576 * @adapter: pointer to adapter struct
577 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
578 * @queue: queue to map the corresponding interrupt to
579 * @msix_vector: the vector to map to the corresponding queue
582 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
583 u8 queue, u8 msix_vector)
586 struct ixgbe_hw *hw = &adapter->hw;
587 switch (hw->mac.type) {
588 case ixgbe_mac_82598EB:
589 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
592 index = (((direction * 64) + queue) >> 2) & 0x1F;
593 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
594 ivar &= ~(0xFF << (8 * (queue & 0x3)));
595 ivar |= (msix_vector << (8 * (queue & 0x3)));
596 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
598 case ixgbe_mac_82599EB:
600 if (direction == -1) {
602 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
603 index = ((queue & 1) * 8);
604 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
605 ivar &= ~(0xFF << index);
606 ivar |= (msix_vector << index);
607 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
610 /* tx or rx causes */
611 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
612 index = ((16 * (queue & 1)) + (8 * direction));
613 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
614 ivar &= ~(0xFF << index);
615 ivar |= (msix_vector << index);
616 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
624 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
629 switch (adapter->hw.mac.type) {
630 case ixgbe_mac_82598EB:
631 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
632 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
634 case ixgbe_mac_82599EB:
636 mask = (qmask & 0xFFFFFFFF);
637 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
638 mask = (qmask >> 32);
639 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
646 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
647 struct ixgbe_tx_buffer *tx_buffer)
649 if (tx_buffer->skb) {
650 dev_kfree_skb_any(tx_buffer->skb);
651 if (dma_unmap_len(tx_buffer, len))
652 dma_unmap_single(ring->dev,
653 dma_unmap_addr(tx_buffer, dma),
654 dma_unmap_len(tx_buffer, len),
656 } else if (dma_unmap_len(tx_buffer, len)) {
657 dma_unmap_page(ring->dev,
658 dma_unmap_addr(tx_buffer, dma),
659 dma_unmap_len(tx_buffer, len),
662 tx_buffer->next_to_watch = NULL;
663 tx_buffer->skb = NULL;
664 dma_unmap_len_set(tx_buffer, len, 0);
665 /* tx_buffer must be completely set up in the transmit path */
668 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
670 struct ixgbe_hw *hw = &adapter->hw;
671 struct ixgbe_hw_stats *hwstats = &adapter->stats;
675 if ((hw->fc.current_mode != ixgbe_fc_full) &&
676 (hw->fc.current_mode != ixgbe_fc_rx_pause))
679 switch (hw->mac.type) {
680 case ixgbe_mac_82598EB:
681 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
684 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
686 hwstats->lxoffrxc += data;
688 /* refill credits (no tx hang) if we received xoff */
692 for (i = 0; i < adapter->num_tx_queues; i++)
693 clear_bit(__IXGBE_HANG_CHECK_ARMED,
694 &adapter->tx_ring[i]->state);
697 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
699 struct ixgbe_hw *hw = &adapter->hw;
700 struct ixgbe_hw_stats *hwstats = &adapter->stats;
704 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
706 if (adapter->ixgbe_ieee_pfc)
707 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
709 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
710 ixgbe_update_xoff_rx_lfc(adapter);
714 /* update stats for each tc, only valid with PFC enabled */
715 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
718 switch (hw->mac.type) {
719 case ixgbe_mac_82598EB:
720 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
723 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
725 hwstats->pxoffrxc[i] += pxoffrxc;
726 /* Get the TC for given UP */
727 tc = netdev_get_prio_tc_map(adapter->netdev, i);
728 xoff[tc] += pxoffrxc;
731 /* disarm tx queues that have received xoff frames */
732 for (i = 0; i < adapter->num_tx_queues; i++) {
733 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
735 tc = tx_ring->dcb_tc;
737 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
741 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
743 return ring->stats.packets;
746 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
748 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
749 struct ixgbe_hw *hw = &adapter->hw;
751 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
752 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
755 return (head < tail) ?
756 tail - head : (tail + ring->count - head);
761 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
763 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
764 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
765 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
768 clear_check_for_tx_hang(tx_ring);
771 * Check for a hung queue, but be thorough. This verifies
772 * that a transmit has been completed since the previous
773 * check AND there is at least one packet pending. The
774 * ARMED bit is set to indicate a potential hang. The
775 * bit is cleared if a pause frame is received to remove
776 * false hang detection due to PFC or 802.3x frames. By
777 * requiring this to fail twice we avoid races with
778 * pfc clearing the ARMED bit and conditions where we
779 * run the check_tx_hang logic with a transmit completion
780 * pending but without time to complete it yet.
782 if ((tx_done_old == tx_done) && tx_pending) {
783 /* make sure it is true for two checks in a row */
784 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
787 /* update completed stats and continue */
788 tx_ring->tx_stats.tx_done_old = tx_done;
789 /* reset the countdown */
790 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
797 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
798 * @adapter: driver private struct
800 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
803 /* Do the reset outside of interrupt context */
804 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
805 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
806 ixgbe_service_event_schedule(adapter);
811 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
812 * @q_vector: structure containing interrupt and ring information
813 * @tx_ring: tx ring to clean
815 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
816 struct ixgbe_ring *tx_ring)
818 struct ixgbe_adapter *adapter = q_vector->adapter;
819 struct ixgbe_tx_buffer *tx_buffer;
820 union ixgbe_adv_tx_desc *tx_desc;
821 unsigned int total_bytes = 0, total_packets = 0;
822 unsigned int budget = q_vector->tx.work_limit;
823 unsigned int i = tx_ring->next_to_clean;
825 if (test_bit(__IXGBE_DOWN, &adapter->state))
828 tx_buffer = &tx_ring->tx_buffer_info[i];
829 tx_desc = IXGBE_TX_DESC(tx_ring, i);
833 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
835 /* if next_to_watch is not set then there is no work pending */
839 /* prevent any other reads prior to eop_desc */
842 /* if DD is not set pending work has not been completed */
843 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
846 /* clear next_to_watch to prevent false hangs */
847 tx_buffer->next_to_watch = NULL;
849 /* update the statistics for this packet */
850 total_bytes += tx_buffer->bytecount;
851 total_packets += tx_buffer->gso_segs;
853 if (unlikely(tx_buffer->tx_flags & IXGBE_TX_FLAGS_TSTAMP))
854 ixgbe_ptp_tx_hwtstamp(q_vector, tx_buffer->skb);
857 dev_kfree_skb_any(tx_buffer->skb);
859 /* unmap skb header data */
860 dma_unmap_single(tx_ring->dev,
861 dma_unmap_addr(tx_buffer, dma),
862 dma_unmap_len(tx_buffer, len),
865 /* clear tx_buffer data */
866 tx_buffer->skb = NULL;
867 dma_unmap_len_set(tx_buffer, len, 0);
869 /* unmap remaining buffers */
870 while (tx_desc != eop_desc) {
876 tx_buffer = tx_ring->tx_buffer_info;
877 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
880 /* unmap any remaining paged data */
881 if (dma_unmap_len(tx_buffer, len)) {
882 dma_unmap_page(tx_ring->dev,
883 dma_unmap_addr(tx_buffer, dma),
884 dma_unmap_len(tx_buffer, len),
886 dma_unmap_len_set(tx_buffer, len, 0);
890 /* move us one more past the eop_desc for start of next pkt */
896 tx_buffer = tx_ring->tx_buffer_info;
897 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
900 /* issue prefetch for next Tx descriptor */
903 /* update budget accounting */
905 } while (likely(budget));
908 tx_ring->next_to_clean = i;
909 u64_stats_update_begin(&tx_ring->syncp);
910 tx_ring->stats.bytes += total_bytes;
911 tx_ring->stats.packets += total_packets;
912 u64_stats_update_end(&tx_ring->syncp);
913 q_vector->tx.total_bytes += total_bytes;
914 q_vector->tx.total_packets += total_packets;
916 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
917 /* schedule immediate reset if we believe we hung */
918 struct ixgbe_hw *hw = &adapter->hw;
919 e_err(drv, "Detected Tx Unit Hang\n"
921 " TDH, TDT <%x>, <%x>\n"
922 " next_to_use <%x>\n"
923 " next_to_clean <%x>\n"
924 "tx_buffer_info[next_to_clean]\n"
925 " time_stamp <%lx>\n"
927 tx_ring->queue_index,
928 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
929 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
930 tx_ring->next_to_use, i,
931 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
933 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
936 "tx hang %d detected on queue %d, resetting adapter\n",
937 adapter->tx_timeout_count + 1, tx_ring->queue_index);
939 /* schedule immediate reset if we believe we hung */
940 ixgbe_tx_timeout_reset(adapter);
942 /* the adapter is about to reset, no point in enabling stuff */
946 netdev_tx_completed_queue(txring_txq(tx_ring),
947 total_packets, total_bytes);
949 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
950 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
951 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
952 /* Make sure that anybody stopping the queue after this
953 * sees the new next_to_clean.
956 if (__netif_subqueue_stopped(tx_ring->netdev,
957 tx_ring->queue_index)
958 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
959 netif_wake_subqueue(tx_ring->netdev,
960 tx_ring->queue_index);
961 ++tx_ring->tx_stats.restart_queue;
968 #ifdef CONFIG_IXGBE_DCA
969 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
970 struct ixgbe_ring *tx_ring,
973 struct ixgbe_hw *hw = &adapter->hw;
974 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
977 switch (hw->mac.type) {
978 case ixgbe_mac_82598EB:
979 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
981 case ixgbe_mac_82599EB:
983 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
984 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
987 /* for unknown hardware do not write register */
992 * We can enable relaxed ordering for reads, but not writes when
993 * DCA is enabled. This is due to a known issue in some chipsets
994 * which will cause the DCA tag to be cleared.
996 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
997 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
998 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1000 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1003 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1004 struct ixgbe_ring *rx_ring,
1007 struct ixgbe_hw *hw = &adapter->hw;
1008 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1009 u8 reg_idx = rx_ring->reg_idx;
1012 switch (hw->mac.type) {
1013 case ixgbe_mac_82599EB:
1014 case ixgbe_mac_X540:
1015 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1022 * We can enable relaxed ordering for reads, but not writes when
1023 * DCA is enabled. This is due to a known issue in some chipsets
1024 * which will cause the DCA tag to be cleared.
1026 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1027 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1029 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1032 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1034 struct ixgbe_adapter *adapter = q_vector->adapter;
1035 struct ixgbe_ring *ring;
1036 int cpu = get_cpu();
1038 if (q_vector->cpu == cpu)
1041 ixgbe_for_each_ring(ring, q_vector->tx)
1042 ixgbe_update_tx_dca(adapter, ring, cpu);
1044 ixgbe_for_each_ring(ring, q_vector->rx)
1045 ixgbe_update_rx_dca(adapter, ring, cpu);
1047 q_vector->cpu = cpu;
1052 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1056 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1059 /* always use CB2 mode, difference is masked in the CB driver */
1060 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1062 for (i = 0; i < adapter->num_q_vectors; i++) {
1063 adapter->q_vector[i]->cpu = -1;
1064 ixgbe_update_dca(adapter->q_vector[i]);
1068 static int __ixgbe_notify_dca(struct device *dev, void *data)
1070 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1071 unsigned long event = *(unsigned long *)data;
1073 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1077 case DCA_PROVIDER_ADD:
1078 /* if we're already enabled, don't do it again */
1079 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1081 if (dca_add_requester(dev) == 0) {
1082 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1083 ixgbe_setup_dca(adapter);
1086 /* Fall Through since DCA is disabled. */
1087 case DCA_PROVIDER_REMOVE:
1088 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1089 dca_remove_requester(dev);
1090 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1091 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1099 #endif /* CONFIG_IXGBE_DCA */
1100 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1101 union ixgbe_adv_rx_desc *rx_desc,
1102 struct sk_buff *skb)
1104 if (ring->netdev->features & NETIF_F_RXHASH)
1105 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1110 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1111 * @ring: structure containing ring specific data
1112 * @rx_desc: advanced rx descriptor
1114 * Returns : true if it is FCoE pkt
1116 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1117 union ixgbe_adv_rx_desc *rx_desc)
1119 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1121 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1122 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1123 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1124 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1127 #endif /* IXGBE_FCOE */
1129 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1130 * @ring: structure containing ring specific data
1131 * @rx_desc: current Rx descriptor being processed
1132 * @skb: skb currently being received and modified
1134 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1135 union ixgbe_adv_rx_desc *rx_desc,
1136 struct sk_buff *skb)
1138 skb_checksum_none_assert(skb);
1140 /* Rx csum disabled */
1141 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1144 /* if IP and error */
1145 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1146 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1147 ring->rx_stats.csum_err++;
1151 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1154 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1155 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1158 * 82599 errata, UDP frames with a 0 checksum can be marked as
1161 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1162 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1165 ring->rx_stats.csum_err++;
1169 /* It must be a TCP or UDP packet with a valid checksum */
1170 skb->ip_summed = CHECKSUM_UNNECESSARY;
1173 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1175 rx_ring->next_to_use = val;
1177 /* update next to alloc since we have filled the ring */
1178 rx_ring->next_to_alloc = val;
1180 * Force memory writes to complete before letting h/w
1181 * know there are new descriptors to fetch. (Only
1182 * applicable for weak-ordered memory model archs,
1186 writel(val, rx_ring->tail);
1189 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1190 struct ixgbe_rx_buffer *bi)
1192 struct page *page = bi->page;
1193 dma_addr_t dma = bi->dma;
1195 /* since we are recycling buffers we should seldom need to alloc */
1199 /* alloc new page for storage */
1200 if (likely(!page)) {
1201 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1202 bi->skb, ixgbe_rx_pg_order(rx_ring));
1203 if (unlikely(!page)) {
1204 rx_ring->rx_stats.alloc_rx_page_failed++;
1210 /* map page for use */
1211 dma = dma_map_page(rx_ring->dev, page, 0,
1212 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1215 * if mapping failed free memory back to system since
1216 * there isn't much point in holding memory we can't use
1218 if (dma_mapping_error(rx_ring->dev, dma)) {
1219 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1222 rx_ring->rx_stats.alloc_rx_page_failed++;
1227 bi->page_offset = 0;
1233 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1234 * @rx_ring: ring to place buffers on
1235 * @cleaned_count: number of buffers to replace
1237 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1239 union ixgbe_adv_rx_desc *rx_desc;
1240 struct ixgbe_rx_buffer *bi;
1241 u16 i = rx_ring->next_to_use;
1247 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1248 bi = &rx_ring->rx_buffer_info[i];
1249 i -= rx_ring->count;
1252 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1256 * Refresh the desc even if buffer_addrs didn't change
1257 * because each write-back erases this info.
1259 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1265 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1266 bi = rx_ring->rx_buffer_info;
1267 i -= rx_ring->count;
1270 /* clear the hdr_addr for the next_to_use descriptor */
1271 rx_desc->read.hdr_addr = 0;
1274 } while (cleaned_count);
1276 i += rx_ring->count;
1278 if (rx_ring->next_to_use != i)
1279 ixgbe_release_rx_desc(rx_ring, i);
1283 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1284 * @data: pointer to the start of the headers
1285 * @max_len: total length of section to find headers in
1287 * This function is meant to determine the length of headers that will
1288 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1289 * motivation of doing this is to only perform one pull for IPv4 TCP
1290 * packets so that we can do basic things like calculating the gso_size
1291 * based on the average data per packet.
1293 static unsigned int ixgbe_get_headlen(unsigned char *data,
1294 unsigned int max_len)
1297 unsigned char *network;
1300 struct vlan_hdr *vlan;
1303 struct ipv6hdr *ipv6;
1306 u8 nexthdr = 0; /* default to not TCP */
1309 /* this should never happen, but better safe than sorry */
1310 if (max_len < ETH_HLEN)
1313 /* initialize network frame pointer */
1316 /* set first protocol and move network header forward */
1317 protocol = hdr.eth->h_proto;
1318 hdr.network += ETH_HLEN;
1320 /* handle any vlan tag if present */
1321 if (protocol == __constant_htons(ETH_P_8021Q)) {
1322 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1325 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1326 hdr.network += VLAN_HLEN;
1329 /* handle L3 protocols */
1330 if (protocol == __constant_htons(ETH_P_IP)) {
1331 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1334 /* access ihl as a u8 to avoid unaligned access on ia64 */
1335 hlen = (hdr.network[0] & 0x0F) << 2;
1337 /* verify hlen meets minimum size requirements */
1338 if (hlen < sizeof(struct iphdr))
1339 return hdr.network - data;
1341 /* record next protocol if header is present */
1342 if (!hdr.ipv4->frag_off)
1343 nexthdr = hdr.ipv4->protocol;
1344 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
1345 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
1348 /* record next protocol */
1349 nexthdr = hdr.ipv6->nexthdr;
1350 hlen = sizeof(struct ipv6hdr);
1352 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1353 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1355 hlen = FCOE_HEADER_LEN;
1358 return hdr.network - data;
1361 /* relocate pointer to start of L4 header */
1362 hdr.network += hlen;
1364 /* finally sort out TCP/UDP */
1365 if (nexthdr == IPPROTO_TCP) {
1366 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1369 /* access doff as a u8 to avoid unaligned access on ia64 */
1370 hlen = (hdr.network[12] & 0xF0) >> 2;
1372 /* verify hlen meets minimum size requirements */
1373 if (hlen < sizeof(struct tcphdr))
1374 return hdr.network - data;
1376 hdr.network += hlen;
1377 } else if (nexthdr == IPPROTO_UDP) {
1378 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
1381 hdr.network += sizeof(struct udphdr);
1385 * If everything has gone correctly hdr.network should be the
1386 * data section of the packet and will be the end of the header.
1387 * If not then it probably represents the end of the last recognized
1390 if ((hdr.network - data) < max_len)
1391 return hdr.network - data;
1396 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1397 struct sk_buff *skb)
1399 u16 hdr_len = skb_headlen(skb);
1401 /* set gso_size to avoid messing up TCP MSS */
1402 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1403 IXGBE_CB(skb)->append_cnt);
1404 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1407 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1408 struct sk_buff *skb)
1410 /* if append_cnt is 0 then frame is not RSC */
1411 if (!IXGBE_CB(skb)->append_cnt)
1414 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1415 rx_ring->rx_stats.rsc_flush++;
1417 ixgbe_set_rsc_gso_size(rx_ring, skb);
1419 /* gso_size is computed using append_cnt so always clear it last */
1420 IXGBE_CB(skb)->append_cnt = 0;
1424 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1425 * @rx_ring: rx descriptor ring packet is being transacted on
1426 * @rx_desc: pointer to the EOP Rx descriptor
1427 * @skb: pointer to current skb being populated
1429 * This function checks the ring, descriptor, and packet information in
1430 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1431 * other fields within the skb.
1433 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1434 union ixgbe_adv_rx_desc *rx_desc,
1435 struct sk_buff *skb)
1437 struct net_device *dev = rx_ring->netdev;
1439 ixgbe_update_rsc_stats(rx_ring, skb);
1441 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1443 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1445 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
1447 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
1448 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1449 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1450 __vlan_hwaccel_put_tag(skb, vid);
1453 skb_record_rx_queue(skb, rx_ring->queue_index);
1455 skb->protocol = eth_type_trans(skb, dev);
1458 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1459 struct sk_buff *skb)
1461 struct ixgbe_adapter *adapter = q_vector->adapter;
1463 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1464 napi_gro_receive(&q_vector->napi, skb);
1470 * ixgbe_is_non_eop - process handling of non-EOP buffers
1471 * @rx_ring: Rx ring being processed
1472 * @rx_desc: Rx descriptor for current buffer
1473 * @skb: Current socket buffer containing buffer in progress
1475 * This function updates next to clean. If the buffer is an EOP buffer
1476 * this function exits returning false, otherwise it will place the
1477 * sk_buff in the next buffer to be chained and return true indicating
1478 * that this is in fact a non-EOP buffer.
1480 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1481 union ixgbe_adv_rx_desc *rx_desc,
1482 struct sk_buff *skb)
1484 u32 ntc = rx_ring->next_to_clean + 1;
1486 /* fetch, update, and store next to clean */
1487 ntc = (ntc < rx_ring->count) ? ntc : 0;
1488 rx_ring->next_to_clean = ntc;
1490 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1492 /* update RSC append count if present */
1493 if (ring_is_rsc_enabled(rx_ring)) {
1494 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1495 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1497 if (unlikely(rsc_enabled)) {
1498 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1500 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1501 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1503 /* update ntc based on RSC value */
1504 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1505 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1506 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1510 /* if we are the last buffer then there is nothing else to do */
1511 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1514 /* place skb in next buffer to be received */
1515 rx_ring->rx_buffer_info[ntc].skb = skb;
1516 rx_ring->rx_stats.non_eop_descs++;
1522 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1523 * @rx_ring: rx descriptor ring packet is being transacted on
1524 * @skb: pointer to current skb being adjusted
1526 * This function is an ixgbe specific version of __pskb_pull_tail. The
1527 * main difference between this version and the original function is that
1528 * this function can make several assumptions about the state of things
1529 * that allow for significant optimizations versus the standard function.
1530 * As a result we can do things like drop a frag and maintain an accurate
1531 * truesize for the skb.
1533 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1534 struct sk_buff *skb)
1536 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1538 unsigned int pull_len;
1541 * it is valid to use page_address instead of kmap since we are
1542 * working with pages allocated out of the lomem pool per
1543 * alloc_page(GFP_ATOMIC)
1545 va = skb_frag_address(frag);
1548 * we need the header to contain the greater of either ETH_HLEN or
1549 * 60 bytes if the skb->len is less than 60 for skb_pad.
1551 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1553 /* align pull length to size of long to optimize memcpy performance */
1554 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1556 /* update all of the pointers */
1557 skb_frag_size_sub(frag, pull_len);
1558 frag->page_offset += pull_len;
1559 skb->data_len -= pull_len;
1560 skb->tail += pull_len;
1564 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1565 * @rx_ring: rx descriptor ring packet is being transacted on
1566 * @skb: pointer to current skb being updated
1568 * This function provides a basic DMA sync up for the first fragment of an
1569 * skb. The reason for doing this is that the first fragment cannot be
1570 * unmapped until we have reached the end of packet descriptor for a buffer
1573 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1574 struct sk_buff *skb)
1576 /* if the page was released unmap it, else just sync our portion */
1577 if (unlikely(IXGBE_CB(skb)->page_released)) {
1578 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1579 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1580 IXGBE_CB(skb)->page_released = false;
1582 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1584 dma_sync_single_range_for_cpu(rx_ring->dev,
1587 ixgbe_rx_bufsz(rx_ring),
1590 IXGBE_CB(skb)->dma = 0;
1594 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1595 * @rx_ring: rx descriptor ring packet is being transacted on
1596 * @rx_desc: pointer to the EOP Rx descriptor
1597 * @skb: pointer to current skb being fixed
1599 * Check for corrupted packet headers caused by senders on the local L2
1600 * embedded NIC switch not setting up their Tx Descriptors right. These
1601 * should be very rare.
1603 * Also address the case where we are pulling data in on pages only
1604 * and as such no data is present in the skb header.
1606 * In addition if skb is not at least 60 bytes we need to pad it so that
1607 * it is large enough to qualify as a valid Ethernet frame.
1609 * Returns true if an error was encountered and skb was freed.
1611 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1612 union ixgbe_adv_rx_desc *rx_desc,
1613 struct sk_buff *skb)
1615 struct net_device *netdev = rx_ring->netdev;
1617 /* verify that the packet does not have any known errors */
1618 if (unlikely(ixgbe_test_staterr(rx_desc,
1619 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1620 !(netdev->features & NETIF_F_RXALL))) {
1621 dev_kfree_skb_any(skb);
1625 /* place header in linear portion of buffer */
1626 if (skb_is_nonlinear(skb))
1627 ixgbe_pull_tail(rx_ring, skb);
1630 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1631 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1635 /* if skb_pad returns an error the skb was freed */
1636 if (unlikely(skb->len < 60)) {
1637 int pad_len = 60 - skb->len;
1639 if (skb_pad(skb, pad_len))
1641 __skb_put(skb, pad_len);
1648 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1649 * @rx_ring: rx descriptor ring to store buffers on
1650 * @old_buff: donor buffer to have page reused
1652 * Synchronizes page for reuse by the adapter
1654 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1655 struct ixgbe_rx_buffer *old_buff)
1657 struct ixgbe_rx_buffer *new_buff;
1658 u16 nta = rx_ring->next_to_alloc;
1660 new_buff = &rx_ring->rx_buffer_info[nta];
1662 /* update, and store next to alloc */
1664 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1666 /* transfer page from old buffer to new buffer */
1667 new_buff->page = old_buff->page;
1668 new_buff->dma = old_buff->dma;
1669 new_buff->page_offset = old_buff->page_offset;
1671 /* sync the buffer for use by the device */
1672 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1673 new_buff->page_offset,
1674 ixgbe_rx_bufsz(rx_ring),
1679 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1680 * @rx_ring: rx descriptor ring to transact packets on
1681 * @rx_buffer: buffer containing page to add
1682 * @rx_desc: descriptor containing length of buffer written by hardware
1683 * @skb: sk_buff to place the data into
1685 * This function will add the data contained in rx_buffer->page to the skb.
1686 * This is done either through a direct copy if the data in the buffer is
1687 * less than the skb header size, otherwise it will just attach the page as
1688 * a frag to the skb.
1690 * The function will then update the page offset if necessary and return
1691 * true if the buffer can be reused by the adapter.
1693 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1694 struct ixgbe_rx_buffer *rx_buffer,
1695 union ixgbe_adv_rx_desc *rx_desc,
1696 struct sk_buff *skb)
1698 struct page *page = rx_buffer->page;
1699 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1700 #if (PAGE_SIZE < 8192)
1701 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1703 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1704 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1705 ixgbe_rx_bufsz(rx_ring);
1708 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1709 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1711 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1713 /* we can reuse buffer as-is, just make sure it is local */
1714 if (likely(page_to_nid(page) == numa_node_id()))
1717 /* this page cannot be reused so discard it */
1722 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1723 rx_buffer->page_offset, size, truesize);
1725 /* avoid re-using remote pages */
1726 if (unlikely(page_to_nid(page) != numa_node_id()))
1729 #if (PAGE_SIZE < 8192)
1730 /* if we are only owner of page we can reuse it */
1731 if (unlikely(page_count(page) != 1))
1734 /* flip page offset to other buffer */
1735 rx_buffer->page_offset ^= truesize;
1738 * since we are the only owner of the page and we need to
1739 * increment it, just set the value to 2 in order to avoid
1740 * an unecessary locked operation
1742 atomic_set(&page->_count, 2);
1744 /* move offset up to the next cache line */
1745 rx_buffer->page_offset += truesize;
1747 if (rx_buffer->page_offset > last_offset)
1750 /* bump ref count on page before it is given to the stack */
1757 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1758 union ixgbe_adv_rx_desc *rx_desc)
1760 struct ixgbe_rx_buffer *rx_buffer;
1761 struct sk_buff *skb;
1764 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1765 page = rx_buffer->page;
1768 skb = rx_buffer->skb;
1771 void *page_addr = page_address(page) +
1772 rx_buffer->page_offset;
1774 /* prefetch first cache line of first page */
1775 prefetch(page_addr);
1776 #if L1_CACHE_BYTES < 128
1777 prefetch(page_addr + L1_CACHE_BYTES);
1780 /* allocate a skb to store the frags */
1781 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1783 if (unlikely(!skb)) {
1784 rx_ring->rx_stats.alloc_rx_buff_failed++;
1789 * we will be copying header into skb->data in
1790 * pskb_may_pull so it is in our interest to prefetch
1791 * it now to avoid a possible cache miss
1793 prefetchw(skb->data);
1796 * Delay unmapping of the first packet. It carries the
1797 * header information, HW may still access the header
1798 * after the writeback. Only unmap it when EOP is
1801 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1804 IXGBE_CB(skb)->dma = rx_buffer->dma;
1806 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1807 ixgbe_dma_sync_frag(rx_ring, skb);
1810 /* we are reusing so sync this buffer for CPU use */
1811 dma_sync_single_range_for_cpu(rx_ring->dev,
1813 rx_buffer->page_offset,
1814 ixgbe_rx_bufsz(rx_ring),
1818 /* pull page into skb */
1819 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
1820 /* hand second half of page back to the ring */
1821 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1822 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1823 /* the page has been released from the ring */
1824 IXGBE_CB(skb)->page_released = true;
1826 /* we are not reusing the buffer so unmap it */
1827 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1828 ixgbe_rx_pg_size(rx_ring),
1832 /* clear contents of buffer_info */
1833 rx_buffer->skb = NULL;
1835 rx_buffer->page = NULL;
1841 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1842 * @q_vector: structure containing interrupt and ring information
1843 * @rx_ring: rx descriptor ring to transact packets on
1844 * @budget: Total limit on number of packets to process
1846 * This function provides a "bounce buffer" approach to Rx interrupt
1847 * processing. The advantage to this is that on systems that have
1848 * expensive overhead for IOMMU access this provides a means of avoiding
1849 * it by maintaining the mapping of the page to the syste.
1851 * Returns true if all work is completed without reaching budget
1853 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1854 struct ixgbe_ring *rx_ring,
1857 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1859 struct ixgbe_adapter *adapter = q_vector->adapter;
1861 unsigned int mss = 0;
1862 #endif /* IXGBE_FCOE */
1863 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1866 union ixgbe_adv_rx_desc *rx_desc;
1867 struct sk_buff *skb;
1869 /* return some buffers to hardware, one at a time is too slow */
1870 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1871 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1875 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1877 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1881 * This memory barrier is needed to keep us from reading
1882 * any other fields out of the rx_desc until we know the
1883 * RXD_STAT_DD bit is set
1887 /* retrieve a buffer from the ring */
1888 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
1890 /* exit if we failed to retrieve a buffer */
1896 /* place incomplete frames back on ring for completion */
1897 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1900 /* verify the packet layout is correct */
1901 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1904 /* probably a little skewed due to removing CRC */
1905 total_rx_bytes += skb->len;
1907 /* populate checksum, timestamp, VLAN, and protocol */
1908 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1911 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1912 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
1913 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1914 /* include DDPed FCoE data */
1915 if (ddp_bytes > 0) {
1917 mss = rx_ring->netdev->mtu -
1918 sizeof(struct fcoe_hdr) -
1919 sizeof(struct fc_frame_header) -
1920 sizeof(struct fcoe_crc_eof);
1924 total_rx_bytes += ddp_bytes;
1925 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
1929 dev_kfree_skb_any(skb);
1934 #endif /* IXGBE_FCOE */
1935 ixgbe_rx_skb(q_vector, skb);
1937 /* update budget accounting */
1939 } while (likely(total_rx_packets < budget));
1941 u64_stats_update_begin(&rx_ring->syncp);
1942 rx_ring->stats.packets += total_rx_packets;
1943 rx_ring->stats.bytes += total_rx_bytes;
1944 u64_stats_update_end(&rx_ring->syncp);
1945 q_vector->rx.total_packets += total_rx_packets;
1946 q_vector->rx.total_bytes += total_rx_bytes;
1949 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1951 return (total_rx_packets < budget);
1955 * ixgbe_configure_msix - Configure MSI-X hardware
1956 * @adapter: board private structure
1958 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1961 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1963 struct ixgbe_q_vector *q_vector;
1967 /* Populate MSIX to EITR Select */
1968 if (adapter->num_vfs > 32) {
1969 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1970 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1974 * Populate the IVAR table and set the ITR values to the
1975 * corresponding register.
1977 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1978 struct ixgbe_ring *ring;
1979 q_vector = adapter->q_vector[v_idx];
1981 ixgbe_for_each_ring(ring, q_vector->rx)
1982 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1984 ixgbe_for_each_ring(ring, q_vector->tx)
1985 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1987 ixgbe_write_eitr(q_vector);
1990 switch (adapter->hw.mac.type) {
1991 case ixgbe_mac_82598EB:
1992 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1995 case ixgbe_mac_82599EB:
1996 case ixgbe_mac_X540:
1997 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2002 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2004 /* set up to autoclear timer, and the vectors */
2005 mask = IXGBE_EIMS_ENABLE_MASK;
2006 mask &= ~(IXGBE_EIMS_OTHER |
2007 IXGBE_EIMS_MAILBOX |
2010 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2013 enum latency_range {
2017 latency_invalid = 255
2021 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2022 * @q_vector: structure containing interrupt and ring information
2023 * @ring_container: structure containing ring performance data
2025 * Stores a new ITR value based on packets and byte
2026 * counts during the last interrupt. The advantage of per interrupt
2027 * computation is faster updates and more accurate ITR for the current
2028 * traffic pattern. Constants in this function were computed
2029 * based on theoretical maximum wire speed and thresholds were set based
2030 * on testing data as well as attempting to minimize response time
2031 * while increasing bulk throughput.
2032 * this functionality is controlled by the InterruptThrottleRate module
2033 * parameter (see ixgbe_param.c)
2035 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2036 struct ixgbe_ring_container *ring_container)
2038 int bytes = ring_container->total_bytes;
2039 int packets = ring_container->total_packets;
2042 u8 itr_setting = ring_container->itr;
2047 /* simple throttlerate management
2048 * 0-10MB/s lowest (100000 ints/s)
2049 * 10-20MB/s low (20000 ints/s)
2050 * 20-1249MB/s bulk (8000 ints/s)
2052 /* what was last interrupt timeslice? */
2053 timepassed_us = q_vector->itr >> 2;
2054 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2056 switch (itr_setting) {
2057 case lowest_latency:
2058 if (bytes_perint > 10)
2059 itr_setting = low_latency;
2062 if (bytes_perint > 20)
2063 itr_setting = bulk_latency;
2064 else if (bytes_perint <= 10)
2065 itr_setting = lowest_latency;
2068 if (bytes_perint <= 20)
2069 itr_setting = low_latency;
2073 /* clear work counters since we have the values we need */
2074 ring_container->total_bytes = 0;
2075 ring_container->total_packets = 0;
2077 /* write updated itr to ring container */
2078 ring_container->itr = itr_setting;
2082 * ixgbe_write_eitr - write EITR register in hardware specific way
2083 * @q_vector: structure containing interrupt and ring information
2085 * This function is made to be called by ethtool and by the driver
2086 * when it needs to update EITR registers at runtime. Hardware
2087 * specific quirks/differences are taken care of here.
2089 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2091 struct ixgbe_adapter *adapter = q_vector->adapter;
2092 struct ixgbe_hw *hw = &adapter->hw;
2093 int v_idx = q_vector->v_idx;
2094 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2096 switch (adapter->hw.mac.type) {
2097 case ixgbe_mac_82598EB:
2098 /* must write high and low 16 bits to reset counter */
2099 itr_reg |= (itr_reg << 16);
2101 case ixgbe_mac_82599EB:
2102 case ixgbe_mac_X540:
2104 * set the WDIS bit to not clear the timer bits and cause an
2105 * immediate assertion of the interrupt
2107 itr_reg |= IXGBE_EITR_CNT_WDIS;
2112 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2115 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2117 u32 new_itr = q_vector->itr;
2120 ixgbe_update_itr(q_vector, &q_vector->tx);
2121 ixgbe_update_itr(q_vector, &q_vector->rx);
2123 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2125 switch (current_itr) {
2126 /* counts and packets in update_itr are dependent on these numbers */
2127 case lowest_latency:
2128 new_itr = IXGBE_100K_ITR;
2131 new_itr = IXGBE_20K_ITR;
2134 new_itr = IXGBE_8K_ITR;
2140 if (new_itr != q_vector->itr) {
2141 /* do an exponential smoothing */
2142 new_itr = (10 * new_itr * q_vector->itr) /
2143 ((9 * new_itr) + q_vector->itr);
2145 /* save the algorithm value here */
2146 q_vector->itr = new_itr;
2148 ixgbe_write_eitr(q_vector);
2153 * ixgbe_check_overtemp_subtask - check for over temperature
2154 * @adapter: pointer to adapter
2156 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2158 struct ixgbe_hw *hw = &adapter->hw;
2159 u32 eicr = adapter->interrupt_event;
2161 if (test_bit(__IXGBE_DOWN, &adapter->state))
2164 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2165 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2168 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2170 switch (hw->device_id) {
2171 case IXGBE_DEV_ID_82599_T3_LOM:
2173 * Since the warning interrupt is for both ports
2174 * we don't have to check if:
2175 * - This interrupt wasn't for our port.
2176 * - We may have missed the interrupt so always have to
2177 * check if we got a LSC
2179 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2180 !(eicr & IXGBE_EICR_LSC))
2183 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2185 bool link_up = false;
2187 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2193 /* Check if this is not due to overtemp */
2194 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2199 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2204 "Network adapter has been stopped because it has over heated. "
2205 "Restart the computer. If the problem persists, "
2206 "power off the system and replace the adapter\n");
2208 adapter->interrupt_event = 0;
2211 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2213 struct ixgbe_hw *hw = &adapter->hw;
2215 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2216 (eicr & IXGBE_EICR_GPI_SDP1)) {
2217 e_crit(probe, "Fan has stopped, replace the adapter\n");
2218 /* write to clear the interrupt */
2219 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2223 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2225 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2228 switch (adapter->hw.mac.type) {
2229 case ixgbe_mac_82599EB:
2231 * Need to check link state so complete overtemp check
2234 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2235 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2236 adapter->interrupt_event = eicr;
2237 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2238 ixgbe_service_event_schedule(adapter);
2242 case ixgbe_mac_X540:
2243 if (!(eicr & IXGBE_EICR_TS))
2251 "Network adapter has been stopped because it has over heated. "
2252 "Restart the computer. If the problem persists, "
2253 "power off the system and replace the adapter\n");
2256 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2258 struct ixgbe_hw *hw = &adapter->hw;
2260 if (eicr & IXGBE_EICR_GPI_SDP2) {
2261 /* Clear the interrupt */
2262 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2263 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2264 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2265 ixgbe_service_event_schedule(adapter);
2269 if (eicr & IXGBE_EICR_GPI_SDP1) {
2270 /* Clear the interrupt */
2271 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2272 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2273 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2274 ixgbe_service_event_schedule(adapter);
2279 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2281 struct ixgbe_hw *hw = &adapter->hw;
2284 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2285 adapter->link_check_timeout = jiffies;
2286 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2287 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2288 IXGBE_WRITE_FLUSH(hw);
2289 ixgbe_service_event_schedule(adapter);
2293 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2297 struct ixgbe_hw *hw = &adapter->hw;
2299 switch (hw->mac.type) {
2300 case ixgbe_mac_82598EB:
2301 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2302 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2304 case ixgbe_mac_82599EB:
2305 case ixgbe_mac_X540:
2306 mask = (qmask & 0xFFFFFFFF);
2308 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2309 mask = (qmask >> 32);
2311 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2316 /* skip the flush */
2319 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2323 struct ixgbe_hw *hw = &adapter->hw;
2325 switch (hw->mac.type) {
2326 case ixgbe_mac_82598EB:
2327 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2328 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2330 case ixgbe_mac_82599EB:
2331 case ixgbe_mac_X540:
2332 mask = (qmask & 0xFFFFFFFF);
2334 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2335 mask = (qmask >> 32);
2337 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2342 /* skip the flush */
2346 * ixgbe_irq_enable - Enable default interrupt generation settings
2347 * @adapter: board private structure
2349 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2352 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2354 /* don't reenable LSC while waiting for link */
2355 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2356 mask &= ~IXGBE_EIMS_LSC;
2358 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2359 switch (adapter->hw.mac.type) {
2360 case ixgbe_mac_82599EB:
2361 mask |= IXGBE_EIMS_GPI_SDP0;
2363 case ixgbe_mac_X540:
2364 mask |= IXGBE_EIMS_TS;
2369 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2370 mask |= IXGBE_EIMS_GPI_SDP1;
2371 switch (adapter->hw.mac.type) {
2372 case ixgbe_mac_82599EB:
2373 mask |= IXGBE_EIMS_GPI_SDP1;
2374 mask |= IXGBE_EIMS_GPI_SDP2;
2375 case ixgbe_mac_X540:
2376 mask |= IXGBE_EIMS_ECC;
2377 mask |= IXGBE_EIMS_MAILBOX;
2383 if (adapter->hw.mac.type == ixgbe_mac_X540)
2384 mask |= IXGBE_EIMS_TIMESYNC;
2386 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2387 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2388 mask |= IXGBE_EIMS_FLOW_DIR;
2390 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2392 ixgbe_irq_enable_queues(adapter, ~0);
2394 IXGBE_WRITE_FLUSH(&adapter->hw);
2397 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2399 struct ixgbe_adapter *adapter = data;
2400 struct ixgbe_hw *hw = &adapter->hw;
2404 * Workaround for Silicon errata. Use clear-by-write instead
2405 * of clear-by-read. Reading with EICS will return the
2406 * interrupt causes without clearing, which later be done
2407 * with the write to EICR.
2409 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2410 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2412 if (eicr & IXGBE_EICR_LSC)
2413 ixgbe_check_lsc(adapter);
2415 if (eicr & IXGBE_EICR_MAILBOX)
2416 ixgbe_msg_task(adapter);
2418 switch (hw->mac.type) {
2419 case ixgbe_mac_82599EB:
2420 case ixgbe_mac_X540:
2421 if (eicr & IXGBE_EICR_ECC)
2422 e_info(link, "Received unrecoverable ECC Err, please "
2424 /* Handle Flow Director Full threshold interrupt */
2425 if (eicr & IXGBE_EICR_FLOW_DIR) {
2426 int reinit_count = 0;
2428 for (i = 0; i < adapter->num_tx_queues; i++) {
2429 struct ixgbe_ring *ring = adapter->tx_ring[i];
2430 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2435 /* no more flow director interrupts until after init */
2436 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2437 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2438 ixgbe_service_event_schedule(adapter);
2441 ixgbe_check_sfp_event(adapter, eicr);
2442 ixgbe_check_overtemp_event(adapter, eicr);
2448 ixgbe_check_fan_failure(adapter, eicr);
2450 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2451 ixgbe_ptp_check_pps_event(adapter, eicr);
2453 /* re-enable the original interrupt state, no lsc, no queues */
2454 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2455 ixgbe_irq_enable(adapter, false, false);
2460 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2462 struct ixgbe_q_vector *q_vector = data;
2464 /* EIAM disabled interrupts (on this vector) for us */
2466 if (q_vector->rx.ring || q_vector->tx.ring)
2467 napi_schedule(&q_vector->napi);
2473 * ixgbe_poll - NAPI Rx polling callback
2474 * @napi: structure for representing this polling device
2475 * @budget: how many packets driver is allowed to clean
2477 * This function is used for legacy and MSI, NAPI mode
2479 int ixgbe_poll(struct napi_struct *napi, int budget)
2481 struct ixgbe_q_vector *q_vector =
2482 container_of(napi, struct ixgbe_q_vector, napi);
2483 struct ixgbe_adapter *adapter = q_vector->adapter;
2484 struct ixgbe_ring *ring;
2485 int per_ring_budget;
2486 bool clean_complete = true;
2488 #ifdef CONFIG_IXGBE_DCA
2489 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2490 ixgbe_update_dca(q_vector);
2493 ixgbe_for_each_ring(ring, q_vector->tx)
2494 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2496 /* attempt to distribute budget to each queue fairly, but don't allow
2497 * the budget to go below 1 because we'll exit polling */
2498 if (q_vector->rx.count > 1)
2499 per_ring_budget = max(budget/q_vector->rx.count, 1);
2501 per_ring_budget = budget;
2503 ixgbe_for_each_ring(ring, q_vector->rx)
2504 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2507 /* If all work not completed, return budget and keep polling */
2508 if (!clean_complete)
2511 /* all work done, exit the polling mode */
2512 napi_complete(napi);
2513 if (adapter->rx_itr_setting & 1)
2514 ixgbe_set_itr(q_vector);
2515 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2516 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2522 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2523 * @adapter: board private structure
2525 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2526 * interrupts from the kernel.
2528 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2530 struct net_device *netdev = adapter->netdev;
2534 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2535 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2536 struct msix_entry *entry = &adapter->msix_entries[vector];
2538 if (q_vector->tx.ring && q_vector->rx.ring) {
2539 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2540 "%s-%s-%d", netdev->name, "TxRx", ri++);
2542 } else if (q_vector->rx.ring) {
2543 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2544 "%s-%s-%d", netdev->name, "rx", ri++);
2545 } else if (q_vector->tx.ring) {
2546 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2547 "%s-%s-%d", netdev->name, "tx", ti++);
2549 /* skip this unused q_vector */
2552 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2553 q_vector->name, q_vector);
2555 e_err(probe, "request_irq failed for MSIX interrupt "
2556 "Error: %d\n", err);
2557 goto free_queue_irqs;
2559 /* If Flow Director is enabled, set interrupt affinity */
2560 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2561 /* assign the mask for this irq */
2562 irq_set_affinity_hint(entry->vector,
2563 &q_vector->affinity_mask);
2567 err = request_irq(adapter->msix_entries[vector].vector,
2568 ixgbe_msix_other, 0, netdev->name, adapter);
2570 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2571 goto free_queue_irqs;
2579 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2581 free_irq(adapter->msix_entries[vector].vector,
2582 adapter->q_vector[vector]);
2584 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2585 pci_disable_msix(adapter->pdev);
2586 kfree(adapter->msix_entries);
2587 adapter->msix_entries = NULL;
2592 * ixgbe_intr - legacy mode Interrupt Handler
2593 * @irq: interrupt number
2594 * @data: pointer to a network interface device structure
2596 static irqreturn_t ixgbe_intr(int irq, void *data)
2598 struct ixgbe_adapter *adapter = data;
2599 struct ixgbe_hw *hw = &adapter->hw;
2600 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2604 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2605 * before the read of EICR.
2607 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2609 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2610 * therefore no explicit interrupt disable is necessary */
2611 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2614 * shared interrupt alert!
2615 * make sure interrupts are enabled because the read will
2616 * have disabled interrupts due to EIAM
2617 * finish the workaround of silicon errata on 82598. Unmask
2618 * the interrupt that we masked before the EICR read.
2620 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2621 ixgbe_irq_enable(adapter, true, true);
2622 return IRQ_NONE; /* Not our interrupt */
2625 if (eicr & IXGBE_EICR_LSC)
2626 ixgbe_check_lsc(adapter);
2628 switch (hw->mac.type) {
2629 case ixgbe_mac_82599EB:
2630 ixgbe_check_sfp_event(adapter, eicr);
2632 case ixgbe_mac_X540:
2633 if (eicr & IXGBE_EICR_ECC)
2634 e_info(link, "Received unrecoverable ECC err, please "
2636 ixgbe_check_overtemp_event(adapter, eicr);
2642 ixgbe_check_fan_failure(adapter, eicr);
2643 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2644 ixgbe_ptp_check_pps_event(adapter, eicr);
2646 /* would disable interrupts here but EIAM disabled it */
2647 napi_schedule(&q_vector->napi);
2650 * re-enable link(maybe) and non-queue interrupts, no flush.
2651 * ixgbe_poll will re-enable the queue interrupts
2653 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2654 ixgbe_irq_enable(adapter, false, false);
2660 * ixgbe_request_irq - initialize interrupts
2661 * @adapter: board private structure
2663 * Attempts to configure interrupts using the best available
2664 * capabilities of the hardware and kernel.
2666 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2668 struct net_device *netdev = adapter->netdev;
2671 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2672 err = ixgbe_request_msix_irqs(adapter);
2673 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2674 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2675 netdev->name, adapter);
2677 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2678 netdev->name, adapter);
2681 e_err(probe, "request_irq failed, Error %d\n", err);
2686 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2690 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2691 free_irq(adapter->pdev->irq, adapter);
2695 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2696 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2697 struct msix_entry *entry = &adapter->msix_entries[vector];
2699 /* free only the irqs that were actually requested */
2700 if (!q_vector->rx.ring && !q_vector->tx.ring)
2703 /* clear the affinity_mask in the IRQ descriptor */
2704 irq_set_affinity_hint(entry->vector, NULL);
2706 free_irq(entry->vector, q_vector);
2709 free_irq(adapter->msix_entries[vector++].vector, adapter);
2713 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2714 * @adapter: board private structure
2716 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2718 switch (adapter->hw.mac.type) {
2719 case ixgbe_mac_82598EB:
2720 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2722 case ixgbe_mac_82599EB:
2723 case ixgbe_mac_X540:
2724 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2725 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2726 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2731 IXGBE_WRITE_FLUSH(&adapter->hw);
2732 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2735 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2736 synchronize_irq(adapter->msix_entries[vector].vector);
2738 synchronize_irq(adapter->msix_entries[vector++].vector);
2740 synchronize_irq(adapter->pdev->irq);
2745 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2748 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2750 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2752 ixgbe_write_eitr(q_vector);
2754 ixgbe_set_ivar(adapter, 0, 0, 0);
2755 ixgbe_set_ivar(adapter, 1, 0, 0);
2757 e_info(hw, "Legacy interrupt IVAR setup done\n");
2761 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2762 * @adapter: board private structure
2763 * @ring: structure containing ring specific data
2765 * Configure the Tx descriptor ring after a reset.
2767 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2768 struct ixgbe_ring *ring)
2770 struct ixgbe_hw *hw = &adapter->hw;
2771 u64 tdba = ring->dma;
2773 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2774 u8 reg_idx = ring->reg_idx;
2776 /* disable queue to avoid issues while updating state */
2777 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2778 IXGBE_WRITE_FLUSH(hw);
2780 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2781 (tdba & DMA_BIT_MASK(32)));
2782 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2783 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2784 ring->count * sizeof(union ixgbe_adv_tx_desc));
2785 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2786 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2787 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2790 * set WTHRESH to encourage burst writeback, it should not be set
2791 * higher than 1 when ITR is 0 as it could cause false TX hangs
2793 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2794 * to or less than the number of on chip descriptors, which is
2797 if (!ring->q_vector || (ring->q_vector->itr < 8))
2798 txdctl |= (1 << 16); /* WTHRESH = 1 */
2800 txdctl |= (8 << 16); /* WTHRESH = 8 */
2803 * Setting PTHRESH to 32 both improves performance
2804 * and avoids a TX hang with DFP enabled
2806 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2807 32; /* PTHRESH = 32 */
2809 /* reinitialize flowdirector state */
2810 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2811 ring->atr_sample_rate = adapter->atr_sample_rate;
2812 ring->atr_count = 0;
2813 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2815 ring->atr_sample_rate = 0;
2818 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2821 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2823 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2824 if (hw->mac.type == ixgbe_mac_82598EB &&
2825 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2828 /* poll to verify queue is enabled */
2830 usleep_range(1000, 2000);
2831 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2832 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2834 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2837 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2839 struct ixgbe_hw *hw = &adapter->hw;
2841 u8 tcs = netdev_get_num_tc(adapter->netdev);
2843 if (hw->mac.type == ixgbe_mac_82598EB)
2846 /* disable the arbiter while setting MTQC */
2847 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2848 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2849 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2851 /* set transmit pool layout */
2852 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2853 mtqc = IXGBE_MTQC_VT_ENA;
2855 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2857 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2858 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
2859 mtqc |= IXGBE_MTQC_32VF;
2861 mtqc |= IXGBE_MTQC_64VF;
2864 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2866 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2868 mtqc = IXGBE_MTQC_64Q_1PB;
2871 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
2873 /* Enable Security TX Buffer IFG for multiple pb */
2875 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2876 sectx |= IXGBE_SECTX_DCB;
2877 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
2880 /* re-enable the arbiter */
2881 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2882 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2886 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2887 * @adapter: board private structure
2889 * Configure the Tx unit of the MAC after a reset.
2891 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2893 struct ixgbe_hw *hw = &adapter->hw;
2897 ixgbe_setup_mtqc(adapter);
2899 if (hw->mac.type != ixgbe_mac_82598EB) {
2900 /* DMATXCTL.EN must be before Tx queues are enabled */
2901 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2902 dmatxctl |= IXGBE_DMATXCTL_TE;
2903 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2906 /* Setup the HW Tx Head and Tail descriptor pointers */
2907 for (i = 0; i < adapter->num_tx_queues; i++)
2908 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2911 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2912 struct ixgbe_ring *ring)
2914 struct ixgbe_hw *hw = &adapter->hw;
2915 u8 reg_idx = ring->reg_idx;
2916 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2918 srrctl |= IXGBE_SRRCTL_DROP_EN;
2920 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2923 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2924 struct ixgbe_ring *ring)
2926 struct ixgbe_hw *hw = &adapter->hw;
2927 u8 reg_idx = ring->reg_idx;
2928 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2930 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2932 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2935 #ifdef CONFIG_IXGBE_DCB
2936 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2938 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2942 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2944 if (adapter->ixgbe_ieee_pfc)
2945 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2948 * We should set the drop enable bit if:
2951 * Number of Rx queues > 1 and flow control is disabled
2953 * This allows us to avoid head of line blocking for security
2954 * and performance reasons.
2956 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2957 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2958 for (i = 0; i < adapter->num_rx_queues; i++)
2959 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2961 for (i = 0; i < adapter->num_rx_queues; i++)
2962 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2966 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2968 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2969 struct ixgbe_ring *rx_ring)
2971 struct ixgbe_hw *hw = &adapter->hw;
2973 u8 reg_idx = rx_ring->reg_idx;
2975 if (hw->mac.type == ixgbe_mac_82598EB) {
2976 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
2979 * if VMDq is not active we must program one srrctl register
2980 * per RSS queue since we have enabled RDRXCTL.MVMEN
2985 /* configure header buffer length, needed for RSC */
2986 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
2988 /* configure the packet buffer length */
2989 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2991 /* configure descriptor type */
2992 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
2994 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2997 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2999 struct ixgbe_hw *hw = &adapter->hw;
3000 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3001 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3002 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3003 u32 mrqc = 0, reta = 0;
3006 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3009 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3010 * make full use of any rings they may have. We will use the
3011 * PSRTYPE register to control how many rings we use within the PF.
3013 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3016 /* Fill out hash function seeds */
3017 for (i = 0; i < 10; i++)
3018 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3020 /* Fill out redirection table */
3021 for (i = 0, j = 0; i < 128; i++, j++) {
3024 /* reta = 4-byte sliding window of
3025 * 0x00..(indices-1)(indices-1)00..etc. */
3026 reta = (reta << 8) | (j * 0x11);
3028 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3031 /* Disable indicating checksum in descriptor, enables RSS hash */
3032 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3033 rxcsum |= IXGBE_RXCSUM_PCSD;
3034 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3036 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3037 if (adapter->ring_feature[RING_F_RSS].mask)
3038 mrqc = IXGBE_MRQC_RSSEN;
3040 u8 tcs = netdev_get_num_tc(adapter->netdev);
3042 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3044 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3046 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3047 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3048 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3050 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3053 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3055 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3057 mrqc = IXGBE_MRQC_RSSEN;
3061 /* Perform hash on these packet types */
3062 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3063 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3064 IXGBE_MRQC_RSS_FIELD_IPV6 |
3065 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3067 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3068 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3069 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3070 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3072 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3076 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3077 * @adapter: address of board private structure
3078 * @index: index of ring to set
3080 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3081 struct ixgbe_ring *ring)
3083 struct ixgbe_hw *hw = &adapter->hw;
3085 u8 reg_idx = ring->reg_idx;
3087 if (!ring_is_rsc_enabled(ring))
3090 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3091 rscctrl |= IXGBE_RSCCTL_RSCEN;
3093 * we must limit the number of descriptors so that the
3094 * total size of max desc * buf_len is not greater
3097 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3098 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3101 #define IXGBE_MAX_RX_DESC_POLL 10
3102 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3103 struct ixgbe_ring *ring)
3105 struct ixgbe_hw *hw = &adapter->hw;
3106 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3108 u8 reg_idx = ring->reg_idx;
3110 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3111 if (hw->mac.type == ixgbe_mac_82598EB &&
3112 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3116 usleep_range(1000, 2000);
3117 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3118 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3121 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3122 "the polling period\n", reg_idx);
3126 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3127 struct ixgbe_ring *ring)
3129 struct ixgbe_hw *hw = &adapter->hw;
3130 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3132 u8 reg_idx = ring->reg_idx;
3134 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3135 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3137 /* write value back with RXDCTL.ENABLE bit cleared */
3138 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3140 if (hw->mac.type == ixgbe_mac_82598EB &&
3141 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3144 /* the hardware may take up to 100us to really disable the rx queue */
3147 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3148 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3151 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3152 "the polling period\n", reg_idx);
3156 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3157 struct ixgbe_ring *ring)
3159 struct ixgbe_hw *hw = &adapter->hw;
3160 u64 rdba = ring->dma;
3162 u8 reg_idx = ring->reg_idx;
3164 /* disable queue to avoid issues while updating state */
3165 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3166 ixgbe_disable_rx_queue(adapter, ring);
3168 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3169 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3170 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3171 ring->count * sizeof(union ixgbe_adv_rx_desc));
3172 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3173 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3174 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3176 ixgbe_configure_srrctl(adapter, ring);
3177 ixgbe_configure_rscctl(adapter, ring);
3179 if (hw->mac.type == ixgbe_mac_82598EB) {
3181 * enable cache line friendly hardware writes:
3182 * PTHRESH=32 descriptors (half the internal cache),
3183 * this also removes ugly rx_no_buffer_count increment
3184 * HTHRESH=4 descriptors (to minimize latency on fetch)
3185 * WTHRESH=8 burst writeback up to two cache lines
3187 rxdctl &= ~0x3FFFFF;
3191 /* enable receive descriptor ring */
3192 rxdctl |= IXGBE_RXDCTL_ENABLE;
3193 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3195 ixgbe_rx_desc_queue_enable(adapter, ring);
3196 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3199 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3201 struct ixgbe_hw *hw = &adapter->hw;
3202 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3205 /* PSRTYPE must be initialized in non 82598 adapters */
3206 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3207 IXGBE_PSRTYPE_UDPHDR |
3208 IXGBE_PSRTYPE_IPV4HDR |
3209 IXGBE_PSRTYPE_L2HDR |
3210 IXGBE_PSRTYPE_IPV6HDR;
3212 if (hw->mac.type == ixgbe_mac_82598EB)
3220 for (p = 0; p < adapter->num_rx_pools; p++)
3221 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(p)),
3225 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3227 struct ixgbe_hw *hw = &adapter->hw;
3228 u32 reg_offset, vf_shift;
3229 u32 gcr_ext, vmdctl;
3232 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3235 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3236 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3237 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3238 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3239 vmdctl |= IXGBE_VT_CTL_REPLEN;
3240 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3242 vf_shift = VMDQ_P(0) % 32;
3243 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3245 /* Enable only the PF's pool for Tx/Rx */
3246 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3247 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3248 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3249 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3250 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3251 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3253 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3254 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3257 * Set up VF register offsets for selected VT Mode,
3258 * i.e. 32 or 64 VFs for SR-IOV
3260 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3261 case IXGBE_82599_VMDQ_8Q_MASK:
3262 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3264 case IXGBE_82599_VMDQ_4Q_MASK:
3265 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3268 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3272 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3275 /* Enable MAC Anti-Spoofing */
3276 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3278 /* For VFs that have spoof checking turned off */
3279 for (i = 0; i < adapter->num_vfs; i++) {
3280 if (!adapter->vfinfo[i].spoofchk_enabled)
3281 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3285 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3287 struct ixgbe_hw *hw = &adapter->hw;
3288 struct net_device *netdev = adapter->netdev;
3289 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3290 struct ixgbe_ring *rx_ring;
3295 /* adjust max frame to be able to do baby jumbo for FCoE */
3296 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3297 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3298 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3300 #endif /* IXGBE_FCOE */
3302 /* adjust max frame to be at least the size of a standard frame */
3303 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3304 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3306 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3307 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3308 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3309 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3311 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3314 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3315 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3316 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3317 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3320 * Setup the HW Rx Head and Tail Descriptor Pointers and
3321 * the Base and Length of the Rx Descriptor Ring
3323 for (i = 0; i < adapter->num_rx_queues; i++) {
3324 rx_ring = adapter->rx_ring[i];
3325 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3326 set_ring_rsc_enabled(rx_ring);
3328 clear_ring_rsc_enabled(rx_ring);
3332 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3334 struct ixgbe_hw *hw = &adapter->hw;
3335 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3337 switch (hw->mac.type) {
3338 case ixgbe_mac_82598EB:
3340 * For VMDq support of different descriptor types or
3341 * buffer sizes through the use of multiple SRRCTL
3342 * registers, RDRXCTL.MVMEN must be set to 1
3344 * also, the manual doesn't mention it clearly but DCA hints
3345 * will only use queue 0's tags unless this bit is set. Side
3346 * effects of setting this bit are only that SRRCTL must be
3347 * fully programmed [0..15]
3349 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3351 case ixgbe_mac_82599EB:
3352 case ixgbe_mac_X540:
3353 /* Disable RSC for ACK packets */
3354 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3355 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3356 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3357 /* hardware requires some bits to be set by default */
3358 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3359 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3362 /* We should do nothing since we don't know this hardware */
3366 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3370 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3371 * @adapter: board private structure
3373 * Configure the Rx unit of the MAC after a reset.
3375 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3377 struct ixgbe_hw *hw = &adapter->hw;
3381 /* disable receives while setting up the descriptors */
3382 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3383 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3385 ixgbe_setup_psrtype(adapter);
3386 ixgbe_setup_rdrxctl(adapter);
3388 /* Program registers for the distribution of queues */
3389 ixgbe_setup_mrqc(adapter);
3391 /* set_rx_buffer_len must be called before ring initialization */
3392 ixgbe_set_rx_buffer_len(adapter);
3395 * Setup the HW Rx Head and Tail Descriptor Pointers and
3396 * the Base and Length of the Rx Descriptor Ring
3398 for (i = 0; i < adapter->num_rx_queues; i++)
3399 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3401 /* disable drop enable for 82598 parts */
3402 if (hw->mac.type == ixgbe_mac_82598EB)
3403 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3405 /* enable all receives */
3406 rxctrl |= IXGBE_RXCTRL_RXEN;
3407 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3410 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3412 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3413 struct ixgbe_hw *hw = &adapter->hw;
3415 /* add VID to filter table */
3416 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3417 set_bit(vid, adapter->active_vlans);
3422 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3424 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3425 struct ixgbe_hw *hw = &adapter->hw;
3427 /* remove VID from filter table */
3428 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3429 clear_bit(vid, adapter->active_vlans);
3435 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3436 * @adapter: driver data
3438 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3440 struct ixgbe_hw *hw = &adapter->hw;
3443 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3444 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3445 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3449 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3450 * @adapter: driver data
3452 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3454 struct ixgbe_hw *hw = &adapter->hw;
3457 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3458 vlnctrl |= IXGBE_VLNCTRL_VFE;
3459 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3460 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3464 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3465 * @adapter: driver data
3467 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3469 struct ixgbe_hw *hw = &adapter->hw;
3473 switch (hw->mac.type) {
3474 case ixgbe_mac_82598EB:
3475 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3476 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3477 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3479 case ixgbe_mac_82599EB:
3480 case ixgbe_mac_X540:
3481 for (i = 0; i < adapter->num_rx_queues; i++) {
3482 j = adapter->rx_ring[i]->reg_idx;
3483 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3484 vlnctrl &= ~IXGBE_RXDCTL_VME;
3485 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3494 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3495 * @adapter: driver data
3497 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3499 struct ixgbe_hw *hw = &adapter->hw;
3503 switch (hw->mac.type) {
3504 case ixgbe_mac_82598EB:
3505 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3506 vlnctrl |= IXGBE_VLNCTRL_VME;
3507 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3509 case ixgbe_mac_82599EB:
3510 case ixgbe_mac_X540:
3511 for (i = 0; i < adapter->num_rx_queues; i++) {
3512 j = adapter->rx_ring[i]->reg_idx;
3513 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3514 vlnctrl |= IXGBE_RXDCTL_VME;
3515 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3523 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3527 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3529 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3530 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3534 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3535 * @netdev: network interface device structure
3537 * Writes unicast address list to the RAR table.
3538 * Returns: -ENOMEM on failure/insufficient address space
3539 * 0 on no addresses written
3540 * X on writing X addresses to the RAR table
3542 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3544 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3545 struct ixgbe_hw *hw = &adapter->hw;
3546 unsigned int rar_entries = hw->mac.num_rar_entries - 1;
3549 /* In SR-IOV mode significantly less RAR entries are available */
3550 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3551 rar_entries = IXGBE_MAX_PF_MACVLANS - 1;
3553 /* return ENOMEM indicating insufficient memory for addresses */
3554 if (netdev_uc_count(netdev) > rar_entries)
3557 if (!netdev_uc_empty(netdev)) {
3558 struct netdev_hw_addr *ha;
3559 /* return error if we do not support writing to RAR table */
3560 if (!hw->mac.ops.set_rar)
3563 netdev_for_each_uc_addr(ha, netdev) {
3566 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3567 VMDQ_P(0), IXGBE_RAH_AV);
3571 /* write the addresses in reverse order to avoid write combining */
3572 for (; rar_entries > 0 ; rar_entries--)
3573 hw->mac.ops.clear_rar(hw, rar_entries);
3579 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3580 * @netdev: network interface device structure
3582 * The set_rx_method entry point is called whenever the unicast/multicast
3583 * address list or the network interface flags are updated. This routine is
3584 * responsible for configuring the hardware for proper unicast, multicast and
3587 void ixgbe_set_rx_mode(struct net_device *netdev)
3589 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3590 struct ixgbe_hw *hw = &adapter->hw;
3591 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3594 /* Check for Promiscuous and All Multicast modes */
3596 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3598 /* set all bits that we expect to always be set */
3599 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3600 fctrl |= IXGBE_FCTRL_BAM;
3601 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3602 fctrl |= IXGBE_FCTRL_PMCF;
3604 /* clear the bits we are changing the status of */
3605 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3607 if (netdev->flags & IFF_PROMISC) {
3608 hw->addr_ctrl.user_set_promisc = true;
3609 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3610 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3611 /* don't hardware filter vlans in promisc mode */
3612 ixgbe_vlan_filter_disable(adapter);
3614 if (netdev->flags & IFF_ALLMULTI) {
3615 fctrl |= IXGBE_FCTRL_MPE;
3616 vmolr |= IXGBE_VMOLR_MPE;
3619 * Write addresses to the MTA, if the attempt fails
3620 * then we should just turn on promiscuous mode so
3621 * that we can at least receive multicast traffic
3623 hw->mac.ops.update_mc_addr_list(hw, netdev);
3624 vmolr |= IXGBE_VMOLR_ROMPE;
3626 ixgbe_vlan_filter_enable(adapter);
3627 hw->addr_ctrl.user_set_promisc = false;
3631 * Write addresses to available RAR registers, if there is not
3632 * sufficient space to store all the addresses then enable
3633 * unicast promiscuous mode
3635 count = ixgbe_write_uc_addr_list(netdev);
3637 fctrl |= IXGBE_FCTRL_UPE;
3638 vmolr |= IXGBE_VMOLR_ROPE;
3641 if (adapter->num_vfs)
3642 ixgbe_restore_vf_multicasts(adapter);
3644 if (hw->mac.type != ixgbe_mac_82598EB) {
3645 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
3646 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3648 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
3651 /* This is useful for sniffing bad packets. */
3652 if (adapter->netdev->features & NETIF_F_RXALL) {
3653 /* UPE and MPE will be handled by normal PROMISC logic
3654 * in e1000e_set_rx_mode */
3655 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3656 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3657 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3659 fctrl &= ~(IXGBE_FCTRL_DPF);
3660 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3663 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3665 if (netdev->features & NETIF_F_HW_VLAN_RX)
3666 ixgbe_vlan_strip_enable(adapter);
3668 ixgbe_vlan_strip_disable(adapter);
3671 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3675 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3676 napi_enable(&adapter->q_vector[q_idx]->napi);
3679 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3683 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
3684 napi_disable(&adapter->q_vector[q_idx]->napi);
3687 #ifdef CONFIG_IXGBE_DCB
3689 * ixgbe_configure_dcb - Configure DCB hardware
3690 * @adapter: ixgbe adapter struct
3692 * This is called by the driver on open to configure the DCB hardware.
3693 * This is also called by the gennetlink interface when reconfiguring
3696 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3698 struct ixgbe_hw *hw = &adapter->hw;
3699 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3701 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3702 if (hw->mac.type == ixgbe_mac_82598EB)
3703 netif_set_gso_max_size(adapter->netdev, 65536);
3707 if (hw->mac.type == ixgbe_mac_82598EB)
3708 netif_set_gso_max_size(adapter->netdev, 32768);
3711 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3712 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3715 /* reconfigure the hardware */
3716 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3717 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3719 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3721 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3722 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3723 ixgbe_dcb_hw_ets(&adapter->hw,
3724 adapter->ixgbe_ieee_ets,
3726 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3727 adapter->ixgbe_ieee_pfc->pfc_en,
3728 adapter->ixgbe_ieee_ets->prio_tc);
3731 /* Enable RSS Hash per TC */
3732 if (hw->mac.type != ixgbe_mac_82598EB) {
3734 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
3741 /* write msb to all 8 TCs in one write */
3742 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
3747 /* Additional bittime to account for IXGBE framing */
3748 #define IXGBE_ETH_FRAMING 20
3751 * ixgbe_hpbthresh - calculate high water mark for flow control
3753 * @adapter: board private structure to calculate for
3754 * @pb: packet buffer to calculate
3756 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3758 struct ixgbe_hw *hw = &adapter->hw;
3759 struct net_device *dev = adapter->netdev;
3760 int link, tc, kb, marker;
3763 /* Calculate max LAN frame size */
3764 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3767 /* FCoE traffic class uses FCOE jumbo frames */
3768 if ((dev->features & NETIF_F_FCOE_MTU) &&
3769 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
3770 (pb == ixgbe_fcoe_get_tc(adapter)))
3771 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3774 /* Calculate delay value for device */
3775 switch (hw->mac.type) {
3776 case ixgbe_mac_X540:
3777 dv_id = IXGBE_DV_X540(link, tc);
3780 dv_id = IXGBE_DV(link, tc);
3784 /* Loopback switch introduces additional latency */
3785 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3786 dv_id += IXGBE_B2BT(tc);
3788 /* Delay value is calculated in bit times convert to KB */
3789 kb = IXGBE_BT2KB(dv_id);
3790 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3792 marker = rx_pba - kb;
3794 /* It is possible that the packet buffer is not large enough
3795 * to provide required headroom. In this case throw an error
3796 * to user and a do the best we can.
3799 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3800 "headroom to support flow control."
3801 "Decrease MTU or number of traffic classes\n", pb);
3809 * ixgbe_lpbthresh - calculate low water mark for for flow control
3811 * @adapter: board private structure to calculate for
3812 * @pb: packet buffer to calculate
3814 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3816 struct ixgbe_hw *hw = &adapter->hw;
3817 struct net_device *dev = adapter->netdev;
3821 /* Calculate max LAN frame size */
3822 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3824 /* Calculate delay value for device */
3825 switch (hw->mac.type) {
3826 case ixgbe_mac_X540:
3827 dv_id = IXGBE_LOW_DV_X540(tc);
3830 dv_id = IXGBE_LOW_DV(tc);
3834 /* Delay value is calculated in bit times convert to KB */
3835 return IXGBE_BT2KB(dv_id);
3839 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3841 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3843 struct ixgbe_hw *hw = &adapter->hw;
3844 int num_tc = netdev_get_num_tc(adapter->netdev);
3850 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3852 for (i = 0; i < num_tc; i++) {
3853 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3855 /* Low water marks must not be larger than high water marks */
3856 if (hw->fc.low_water > hw->fc.high_water[i])
3857 hw->fc.low_water = 0;
3861 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3863 struct ixgbe_hw *hw = &adapter->hw;
3865 u8 tc = netdev_get_num_tc(adapter->netdev);
3867 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3868 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3869 hdrm = 32 << adapter->fdir_pballoc;
3873 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3874 ixgbe_pbthresh_setup(adapter);
3877 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3879 struct ixgbe_hw *hw = &adapter->hw;
3880 struct hlist_node *node, *node2;
3881 struct ixgbe_fdir_filter *filter;
3883 spin_lock(&adapter->fdir_perfect_lock);
3885 if (!hlist_empty(&adapter->fdir_filter_list))
3886 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3888 hlist_for_each_entry_safe(filter, node, node2,
3889 &adapter->fdir_filter_list, fdir_node) {
3890 ixgbe_fdir_write_perfect_filter_82599(hw,
3893 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3894 IXGBE_FDIR_DROP_QUEUE :
3895 adapter->rx_ring[filter->action]->reg_idx);
3898 spin_unlock(&adapter->fdir_perfect_lock);
3901 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3903 struct ixgbe_hw *hw = &adapter->hw;
3905 ixgbe_configure_pb(adapter);
3906 #ifdef CONFIG_IXGBE_DCB
3907 ixgbe_configure_dcb(adapter);
3910 * We must restore virtualization before VLANs or else
3911 * the VLVF registers will not be populated
3913 ixgbe_configure_virtualization(adapter);
3915 ixgbe_set_rx_mode(adapter->netdev);
3916 ixgbe_restore_vlan(adapter);
3918 switch (hw->mac.type) {
3919 case ixgbe_mac_82599EB:
3920 case ixgbe_mac_X540:
3921 hw->mac.ops.disable_rx_buff(hw);
3927 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3928 ixgbe_init_fdir_signature_82599(&adapter->hw,
3929 adapter->fdir_pballoc);
3930 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3931 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3932 adapter->fdir_pballoc);
3933 ixgbe_fdir_filter_restore(adapter);
3936 switch (hw->mac.type) {
3937 case ixgbe_mac_82599EB:
3938 case ixgbe_mac_X540:
3939 hw->mac.ops.enable_rx_buff(hw);
3946 /* configure FCoE L2 filters, redirection table, and Rx control */
3947 ixgbe_configure_fcoe(adapter);
3949 #endif /* IXGBE_FCOE */
3950 ixgbe_configure_tx(adapter);
3951 ixgbe_configure_rx(adapter);
3954 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3956 switch (hw->phy.type) {
3957 case ixgbe_phy_sfp_avago:
3958 case ixgbe_phy_sfp_ftl:
3959 case ixgbe_phy_sfp_intel:
3960 case ixgbe_phy_sfp_unknown:
3961 case ixgbe_phy_sfp_passive_tyco:
3962 case ixgbe_phy_sfp_passive_unknown:
3963 case ixgbe_phy_sfp_active_unknown:
3964 case ixgbe_phy_sfp_ftl_active:
3967 if (hw->mac.type == ixgbe_mac_82598EB)
3975 * ixgbe_sfp_link_config - set up SFP+ link
3976 * @adapter: pointer to private adapter struct
3978 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3981 * We are assuming the worst case scenario here, and that
3982 * is that an SFP was inserted/removed after the reset
3983 * but before SFP detection was enabled. As such the best
3984 * solution is to just start searching as soon as we start
3986 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3987 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
3989 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
3993 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3994 * @hw: pointer to private hardware struct
3996 * Returns 0 on success, negative on failure
3998 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4001 bool negotiation, link_up = false;
4002 u32 ret = IXGBE_ERR_LINK_SETUP;
4004 if (hw->mac.ops.check_link)
4005 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
4010 autoneg = hw->phy.autoneg_advertised;
4011 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4012 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
4017 if (hw->mac.ops.setup_link)
4018 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
4023 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4025 struct ixgbe_hw *hw = &adapter->hw;
4028 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4029 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4031 gpie |= IXGBE_GPIE_EIAME;
4033 * use EIAM to auto-mask when MSI-X interrupt is asserted
4034 * this saves a register write for every interrupt
4036 switch (hw->mac.type) {
4037 case ixgbe_mac_82598EB:
4038 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4040 case ixgbe_mac_82599EB:
4041 case ixgbe_mac_X540:
4043 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4044 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4048 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4049 * specifically only auto mask tx and rx interrupts */
4050 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4053 /* XXX: to interrupt immediately for EICS writes, enable this */
4054 /* gpie |= IXGBE_GPIE_EIMEN; */
4056 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4057 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4059 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4060 case IXGBE_82599_VMDQ_8Q_MASK:
4061 gpie |= IXGBE_GPIE_VTMODE_16;
4063 case IXGBE_82599_VMDQ_4Q_MASK:
4064 gpie |= IXGBE_GPIE_VTMODE_32;
4067 gpie |= IXGBE_GPIE_VTMODE_64;
4072 /* Enable Thermal over heat sensor interrupt */
4073 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4074 switch (adapter->hw.mac.type) {
4075 case ixgbe_mac_82599EB:
4076 gpie |= IXGBE_SDP0_GPIEN;
4078 case ixgbe_mac_X540:
4079 gpie |= IXGBE_EIMS_TS;
4086 /* Enable fan failure interrupt */
4087 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4088 gpie |= IXGBE_SDP1_GPIEN;
4090 if (hw->mac.type == ixgbe_mac_82599EB) {
4091 gpie |= IXGBE_SDP1_GPIEN;
4092 gpie |= IXGBE_SDP2_GPIEN;
4095 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4098 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4100 struct ixgbe_hw *hw = &adapter->hw;
4104 ixgbe_get_hw_control(adapter);
4105 ixgbe_setup_gpie(adapter);
4107 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4108 ixgbe_configure_msix(adapter);
4110 ixgbe_configure_msi_and_legacy(adapter);
4112 /* enable the optics for 82599 SFP+ fiber */
4113 if (hw->mac.ops.enable_tx_laser)
4114 hw->mac.ops.enable_tx_laser(hw);
4116 clear_bit(__IXGBE_DOWN, &adapter->state);
4117 ixgbe_napi_enable_all(adapter);
4119 if (ixgbe_is_sfp(hw)) {
4120 ixgbe_sfp_link_config(adapter);
4122 err = ixgbe_non_sfp_link_config(hw);
4124 e_err(probe, "link_config FAILED %d\n", err);
4127 /* clear any pending interrupts, may auto mask */
4128 IXGBE_READ_REG(hw, IXGBE_EICR);
4129 ixgbe_irq_enable(adapter, true, true);
4132 * If this adapter has a fan, check to see if we had a failure
4133 * before we enabled the interrupt.
4135 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4136 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4137 if (esdp & IXGBE_ESDP_SDP1)
4138 e_crit(drv, "Fan has stopped, replace the adapter\n");
4141 /* enable transmits */
4142 netif_tx_start_all_queues(adapter->netdev);
4144 /* bring the link up in the watchdog, this could race with our first
4145 * link up interrupt but shouldn't be a problem */
4146 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4147 adapter->link_check_timeout = jiffies;
4148 mod_timer(&adapter->service_timer, jiffies);
4150 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4151 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4152 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4153 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4156 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4158 WARN_ON(in_interrupt());
4159 /* put off any impending NetWatchDogTimeout */
4160 adapter->netdev->trans_start = jiffies;
4162 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4163 usleep_range(1000, 2000);
4164 ixgbe_down(adapter);
4166 * If SR-IOV enabled then wait a bit before bringing the adapter
4167 * back up to give the VFs time to respond to the reset. The
4168 * two second wait is based upon the watchdog timer cycle in
4171 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4174 clear_bit(__IXGBE_RESETTING, &adapter->state);
4177 void ixgbe_up(struct ixgbe_adapter *adapter)
4179 /* hardware has been reset, we need to reload some things */
4180 ixgbe_configure(adapter);
4182 ixgbe_up_complete(adapter);
4185 void ixgbe_reset(struct ixgbe_adapter *adapter)
4187 struct ixgbe_hw *hw = &adapter->hw;
4190 /* lock SFP init bit to prevent race conditions with the watchdog */
4191 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4192 usleep_range(1000, 2000);
4194 /* clear all SFP and link config related flags while holding SFP_INIT */
4195 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4196 IXGBE_FLAG2_SFP_NEEDS_RESET);
4197 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4199 err = hw->mac.ops.init_hw(hw);
4202 case IXGBE_ERR_SFP_NOT_PRESENT:
4203 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4205 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4206 e_dev_err("master disable timed out\n");
4208 case IXGBE_ERR_EEPROM_VERSION:
4209 /* We are running on a pre-production device, log a warning */
4210 e_dev_warn("This device is a pre-production adapter/LOM. "
4211 "Please be aware there may be issues associated with "
4212 "your hardware. If you are experiencing problems "
4213 "please contact your Intel or hardware "
4214 "representative who provided you with this "
4218 e_dev_err("Hardware Error: %d\n", err);
4221 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4223 /* reprogram the RAR[0] in case user changed it. */
4224 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
4226 /* update SAN MAC vmdq pool selection */
4227 if (hw->mac.san_mac_rar_index)
4228 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4230 if (adapter->flags2 & IXGBE_FLAG2_PTP_ENABLED)
4231 ixgbe_ptp_reset(adapter);
4235 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4236 * @rx_ring: ring to free buffers from
4238 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4240 struct device *dev = rx_ring->dev;
4244 /* ring already cleared, nothing to do */
4245 if (!rx_ring->rx_buffer_info)
4248 /* Free all the Rx ring sk_buffs */
4249 for (i = 0; i < rx_ring->count; i++) {
4250 struct ixgbe_rx_buffer *rx_buffer;
4252 rx_buffer = &rx_ring->rx_buffer_info[i];
4253 if (rx_buffer->skb) {
4254 struct sk_buff *skb = rx_buffer->skb;
4255 if (IXGBE_CB(skb)->page_released) {
4258 ixgbe_rx_bufsz(rx_ring),
4260 IXGBE_CB(skb)->page_released = false;
4264 rx_buffer->skb = NULL;
4266 dma_unmap_page(dev, rx_buffer->dma,
4267 ixgbe_rx_pg_size(rx_ring),
4270 if (rx_buffer->page)
4271 __free_pages(rx_buffer->page,
4272 ixgbe_rx_pg_order(rx_ring));
4273 rx_buffer->page = NULL;
4276 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4277 memset(rx_ring->rx_buffer_info, 0, size);
4279 /* Zero out the descriptor ring */
4280 memset(rx_ring->desc, 0, rx_ring->size);
4282 rx_ring->next_to_alloc = 0;
4283 rx_ring->next_to_clean = 0;
4284 rx_ring->next_to_use = 0;
4288 * ixgbe_clean_tx_ring - Free Tx Buffers
4289 * @tx_ring: ring to be cleaned
4291 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4293 struct ixgbe_tx_buffer *tx_buffer_info;
4297 /* ring already cleared, nothing to do */
4298 if (!tx_ring->tx_buffer_info)
4301 /* Free all the Tx ring sk_buffs */
4302 for (i = 0; i < tx_ring->count; i++) {
4303 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4304 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4307 netdev_tx_reset_queue(txring_txq(tx_ring));
4309 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4310 memset(tx_ring->tx_buffer_info, 0, size);
4312 /* Zero out the descriptor ring */
4313 memset(tx_ring->desc, 0, tx_ring->size);
4315 tx_ring->next_to_use = 0;
4316 tx_ring->next_to_clean = 0;
4320 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4321 * @adapter: board private structure
4323 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4327 for (i = 0; i < adapter->num_rx_queues; i++)
4328 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4332 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4333 * @adapter: board private structure
4335 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4339 for (i = 0; i < adapter->num_tx_queues; i++)
4340 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4343 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4345 struct hlist_node *node, *node2;
4346 struct ixgbe_fdir_filter *filter;
4348 spin_lock(&adapter->fdir_perfect_lock);
4350 hlist_for_each_entry_safe(filter, node, node2,
4351 &adapter->fdir_filter_list, fdir_node) {
4352 hlist_del(&filter->fdir_node);
4355 adapter->fdir_filter_count = 0;
4357 spin_unlock(&adapter->fdir_perfect_lock);
4360 void ixgbe_down(struct ixgbe_adapter *adapter)
4362 struct net_device *netdev = adapter->netdev;
4363 struct ixgbe_hw *hw = &adapter->hw;
4367 /* signal that we are down to the interrupt handler */
4368 set_bit(__IXGBE_DOWN, &adapter->state);
4370 /* disable receives */
4371 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4372 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4374 /* disable all enabled rx queues */
4375 for (i = 0; i < adapter->num_rx_queues; i++)
4376 /* this call also flushes the previous write */
4377 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4379 usleep_range(10000, 20000);
4381 netif_tx_stop_all_queues(netdev);
4383 /* call carrier off first to avoid false dev_watchdog timeouts */
4384 netif_carrier_off(netdev);
4385 netif_tx_disable(netdev);
4387 ixgbe_irq_disable(adapter);
4389 ixgbe_napi_disable_all(adapter);
4391 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4392 IXGBE_FLAG2_RESET_REQUESTED);
4393 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4395 del_timer_sync(&adapter->service_timer);
4397 if (adapter->num_vfs) {
4398 /* Clear EITR Select mapping */
4399 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4401 /* Mark all the VFs as inactive */
4402 for (i = 0 ; i < adapter->num_vfs; i++)
4403 adapter->vfinfo[i].clear_to_send = false;
4405 /* ping all the active vfs to let them know we are going down */
4406 ixgbe_ping_all_vfs(adapter);
4408 /* Disable all VFTE/VFRE TX/RX */
4409 ixgbe_disable_tx_rx(adapter);
4412 /* disable transmits in the hardware now that interrupts are off */
4413 for (i = 0; i < adapter->num_tx_queues; i++) {
4414 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4415 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4418 /* Disable the Tx DMA engine on 82599 and X540 */
4419 switch (hw->mac.type) {
4420 case ixgbe_mac_82599EB:
4421 case ixgbe_mac_X540:
4422 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4423 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4424 ~IXGBE_DMATXCTL_TE));
4430 if (!pci_channel_offline(adapter->pdev))
4431 ixgbe_reset(adapter);
4433 /* power down the optics for 82599 SFP+ fiber */
4434 if (hw->mac.ops.disable_tx_laser)
4435 hw->mac.ops.disable_tx_laser(hw);
4437 ixgbe_clean_all_tx_rings(adapter);
4438 ixgbe_clean_all_rx_rings(adapter);
4440 #ifdef CONFIG_IXGBE_DCA
4441 /* since we reset the hardware DCA settings were cleared */
4442 ixgbe_setup_dca(adapter);
4447 * ixgbe_tx_timeout - Respond to a Tx Hang
4448 * @netdev: network interface device structure
4450 static void ixgbe_tx_timeout(struct net_device *netdev)
4452 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4454 /* Do the reset outside of interrupt context */
4455 ixgbe_tx_timeout_reset(adapter);
4459 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4460 * @adapter: board private structure to initialize
4462 * ixgbe_sw_init initializes the Adapter private data structure.
4463 * Fields are initialized based on PCI device information and
4464 * OS network device settings (MTU size).
4466 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
4468 struct ixgbe_hw *hw = &adapter->hw;
4469 struct pci_dev *pdev = adapter->pdev;
4472 #ifdef CONFIG_IXGBE_DCB
4474 struct tc_configuration *tc;
4477 /* PCI config space info */
4479 hw->vendor_id = pdev->vendor;
4480 hw->device_id = pdev->device;
4481 hw->revision_id = pdev->revision;
4482 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4483 hw->subsystem_device_id = pdev->subsystem_device;
4485 /* Set capability flags */
4486 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4487 adapter->ring_feature[RING_F_RSS].limit = rss;
4488 switch (hw->mac.type) {
4489 case ixgbe_mac_82598EB:
4490 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4491 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4492 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
4494 case ixgbe_mac_X540:
4495 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
4496 if (fwsm & IXGBE_FWSM_TS_ENABLED)
4497 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4498 case ixgbe_mac_82599EB:
4499 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
4500 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4501 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4502 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4503 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4504 /* Flow Director hash filters enabled */
4505 adapter->atr_sample_rate = 20;
4506 adapter->ring_feature[RING_F_FDIR].limit =
4507 IXGBE_MAX_FDIR_INDICES;
4508 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4510 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4511 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4512 #ifdef CONFIG_IXGBE_DCB
4513 /* Default traffic class to use for FCoE */
4514 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4516 #endif /* IXGBE_FCOE */
4523 /* FCoE support exists, always init the FCoE lock */
4524 spin_lock_init(&adapter->fcoe.lock);
4527 /* n-tuple support exists, always init our spinlock */
4528 spin_lock_init(&adapter->fdir_perfect_lock);
4530 #ifdef CONFIG_IXGBE_DCB
4531 switch (hw->mac.type) {
4532 case ixgbe_mac_X540:
4533 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4534 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4537 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4538 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4542 /* Configure DCB traffic classes */
4543 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4544 tc = &adapter->dcb_cfg.tc_config[j];
4545 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4546 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4547 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4548 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4549 tc->dcb_pfc = pfc_disabled;
4552 /* Initialize default user to priority mapping, UPx->TC0 */
4553 tc = &adapter->dcb_cfg.tc_config[0];
4554 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4555 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4557 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4558 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4559 adapter->dcb_cfg.pfc_mode_enable = false;
4560 adapter->dcb_set_bitmap = 0x00;
4561 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4562 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4563 sizeof(adapter->temp_dcb_cfg));
4567 /* default flow control settings */
4568 hw->fc.requested_mode = ixgbe_fc_full;
4569 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4570 ixgbe_pbthresh_setup(adapter);
4571 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4572 hw->fc.send_xon = true;
4573 hw->fc.disable_fc_autoneg =
4574 (ixgbe_device_supports_autoneg_fc(hw) == 0) ? false : true;
4576 #ifdef CONFIG_PCI_IOV
4577 /* assign number of SR-IOV VFs */
4578 if (hw->mac.type != ixgbe_mac_82598EB)
4579 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
4582 /* enable itr by default in dynamic mode */
4583 adapter->rx_itr_setting = 1;
4584 adapter->tx_itr_setting = 1;
4586 /* set default ring sizes */
4587 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4588 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4590 /* set default work limits */
4591 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4593 /* initialize eeprom parameters */
4594 if (ixgbe_init_eeprom_params_generic(hw)) {
4595 e_dev_err("EEPROM initialization failed\n");
4599 set_bit(__IXGBE_DOWN, &adapter->state);
4605 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4606 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4608 * Return 0 on success, negative on failure
4610 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4612 struct device *dev = tx_ring->dev;
4613 int orig_node = dev_to_node(dev);
4617 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4619 if (tx_ring->q_vector)
4620 numa_node = tx_ring->q_vector->numa_node;
4622 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4623 if (!tx_ring->tx_buffer_info)
4624 tx_ring->tx_buffer_info = vzalloc(size);
4625 if (!tx_ring->tx_buffer_info)
4628 /* round up to nearest 4K */
4629 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4630 tx_ring->size = ALIGN(tx_ring->size, 4096);
4632 set_dev_node(dev, numa_node);
4633 tx_ring->desc = dma_alloc_coherent(dev,
4637 set_dev_node(dev, orig_node);
4639 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4640 &tx_ring->dma, GFP_KERNEL);
4644 tx_ring->next_to_use = 0;
4645 tx_ring->next_to_clean = 0;
4649 vfree(tx_ring->tx_buffer_info);
4650 tx_ring->tx_buffer_info = NULL;
4651 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4656 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4657 * @adapter: board private structure
4659 * If this function returns with an error, then it's possible one or
4660 * more of the rings is populated (while the rest are not). It is the
4661 * callers duty to clean those orphaned rings.
4663 * Return 0 on success, negative on failure
4665 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4669 for (i = 0; i < adapter->num_tx_queues; i++) {
4670 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4674 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4680 /* rewind the index freeing the rings as we go */
4682 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4687 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4688 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4690 * Returns 0 on success, negative on failure
4692 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4694 struct device *dev = rx_ring->dev;
4695 int orig_node = dev_to_node(dev);
4699 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4701 if (rx_ring->q_vector)
4702 numa_node = rx_ring->q_vector->numa_node;
4704 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4705 if (!rx_ring->rx_buffer_info)
4706 rx_ring->rx_buffer_info = vzalloc(size);
4707 if (!rx_ring->rx_buffer_info)
4710 /* Round up to nearest 4K */
4711 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4712 rx_ring->size = ALIGN(rx_ring->size, 4096);
4714 set_dev_node(dev, numa_node);
4715 rx_ring->desc = dma_alloc_coherent(dev,
4719 set_dev_node(dev, orig_node);
4721 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4722 &rx_ring->dma, GFP_KERNEL);
4726 rx_ring->next_to_clean = 0;
4727 rx_ring->next_to_use = 0;
4731 vfree(rx_ring->rx_buffer_info);
4732 rx_ring->rx_buffer_info = NULL;
4733 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4738 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4739 * @adapter: board private structure
4741 * If this function returns with an error, then it's possible one or
4742 * more of the rings is populated (while the rest are not). It is the
4743 * callers duty to clean those orphaned rings.
4745 * Return 0 on success, negative on failure
4747 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4751 for (i = 0; i < adapter->num_rx_queues; i++) {
4752 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4756 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4761 err = ixgbe_setup_fcoe_ddp_resources(adapter);
4766 /* rewind the index freeing the rings as we go */
4768 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4773 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4774 * @tx_ring: Tx descriptor ring for a specific queue
4776 * Free all transmit software resources
4778 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4780 ixgbe_clean_tx_ring(tx_ring);
4782 vfree(tx_ring->tx_buffer_info);
4783 tx_ring->tx_buffer_info = NULL;
4785 /* if not set, then don't free */
4789 dma_free_coherent(tx_ring->dev, tx_ring->size,
4790 tx_ring->desc, tx_ring->dma);
4792 tx_ring->desc = NULL;
4796 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4797 * @adapter: board private structure
4799 * Free all transmit software resources
4801 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4805 for (i = 0; i < adapter->num_tx_queues; i++)
4806 if (adapter->tx_ring[i]->desc)
4807 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4811 * ixgbe_free_rx_resources - Free Rx Resources
4812 * @rx_ring: ring to clean the resources from
4814 * Free all receive software resources
4816 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4818 ixgbe_clean_rx_ring(rx_ring);
4820 vfree(rx_ring->rx_buffer_info);
4821 rx_ring->rx_buffer_info = NULL;
4823 /* if not set, then don't free */
4827 dma_free_coherent(rx_ring->dev, rx_ring->size,
4828 rx_ring->desc, rx_ring->dma);
4830 rx_ring->desc = NULL;
4834 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4835 * @adapter: board private structure
4837 * Free all receive software resources
4839 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4844 ixgbe_free_fcoe_ddp_resources(adapter);
4847 for (i = 0; i < adapter->num_rx_queues; i++)
4848 if (adapter->rx_ring[i]->desc)
4849 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4853 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4854 * @netdev: network interface device structure
4855 * @new_mtu: new value for maximum frame size
4857 * Returns 0 on success, negative on failure
4859 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4861 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4862 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4864 /* MTU < 68 is an error and causes problems on some kernels */
4865 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4869 * For 82599EB we cannot allow legacy VFs to enable their receive
4870 * paths when MTU greater than 1500 is configured. So display a
4871 * warning that legacy VFs will be disabled.
4873 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4874 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4875 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4876 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
4878 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4880 /* must set new MTU before calling down or up */
4881 netdev->mtu = new_mtu;
4883 if (netif_running(netdev))
4884 ixgbe_reinit_locked(adapter);
4890 * ixgbe_open - Called when a network interface is made active
4891 * @netdev: network interface device structure
4893 * Returns 0 on success, negative value on failure
4895 * The open entry point is called when a network interface is made
4896 * active by the system (IFF_UP). At this point all resources needed
4897 * for transmit and receive operations are allocated, the interrupt
4898 * handler is registered with the OS, the watchdog timer is started,
4899 * and the stack is notified that the interface is ready.
4901 static int ixgbe_open(struct net_device *netdev)
4903 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4906 /* disallow open during test */
4907 if (test_bit(__IXGBE_TESTING, &adapter->state))
4910 netif_carrier_off(netdev);
4912 /* allocate transmit descriptors */
4913 err = ixgbe_setup_all_tx_resources(adapter);
4917 /* allocate receive descriptors */
4918 err = ixgbe_setup_all_rx_resources(adapter);
4922 ixgbe_configure(adapter);
4924 err = ixgbe_request_irq(adapter);
4928 /* Notify the stack of the actual queue counts. */
4929 err = netif_set_real_num_tx_queues(netdev,
4930 adapter->num_rx_pools > 1 ? 1 :
4931 adapter->num_tx_queues);
4933 goto err_set_queues;
4936 err = netif_set_real_num_rx_queues(netdev,
4937 adapter->num_rx_pools > 1 ? 1 :
4938 adapter->num_rx_queues);
4940 goto err_set_queues;
4942 ixgbe_ptp_init(adapter);
4944 ixgbe_up_complete(adapter);
4949 ixgbe_free_irq(adapter);
4951 ixgbe_free_all_rx_resources(adapter);
4953 ixgbe_free_all_tx_resources(adapter);
4955 ixgbe_reset(adapter);
4961 * ixgbe_close - Disables a network interface
4962 * @netdev: network interface device structure
4964 * Returns 0, this is not allowed to fail
4966 * The close entry point is called when an interface is de-activated
4967 * by the OS. The hardware is still under the drivers control, but
4968 * needs to be disabled. A global MAC reset is issued to stop the
4969 * hardware, and all transmit and receive resources are freed.
4971 static int ixgbe_close(struct net_device *netdev)
4973 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4975 ixgbe_ptp_stop(adapter);
4977 ixgbe_down(adapter);
4978 ixgbe_free_irq(adapter);
4980 ixgbe_fdir_filter_exit(adapter);
4982 ixgbe_free_all_tx_resources(adapter);
4983 ixgbe_free_all_rx_resources(adapter);
4985 ixgbe_release_hw_control(adapter);
4991 static int ixgbe_resume(struct pci_dev *pdev)
4993 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4994 struct net_device *netdev = adapter->netdev;
4997 pci_set_power_state(pdev, PCI_D0);
4998 pci_restore_state(pdev);
5000 * pci_restore_state clears dev->state_saved so call
5001 * pci_save_state to restore it.
5003 pci_save_state(pdev);
5005 err = pci_enable_device_mem(pdev);
5007 e_dev_err("Cannot enable PCI device from suspend\n");
5010 pci_set_master(pdev);
5012 pci_wake_from_d3(pdev, false);
5014 ixgbe_reset(adapter);
5016 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5019 err = ixgbe_init_interrupt_scheme(adapter);
5020 if (!err && netif_running(netdev))
5021 err = ixgbe_open(netdev);
5028 netif_device_attach(netdev);
5032 #endif /* CONFIG_PM */
5034 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5036 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5037 struct net_device *netdev = adapter->netdev;
5038 struct ixgbe_hw *hw = &adapter->hw;
5040 u32 wufc = adapter->wol;
5045 netif_device_detach(netdev);
5047 if (netif_running(netdev)) {
5049 ixgbe_down(adapter);
5050 ixgbe_free_irq(adapter);
5051 ixgbe_free_all_tx_resources(adapter);
5052 ixgbe_free_all_rx_resources(adapter);
5056 ixgbe_clear_interrupt_scheme(adapter);
5059 retval = pci_save_state(pdev);
5065 ixgbe_set_rx_mode(netdev);
5067 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5068 if (hw->mac.ops.enable_tx_laser)
5069 hw->mac.ops.enable_tx_laser(hw);
5071 /* turn on all-multi mode if wake on multicast is enabled */
5072 if (wufc & IXGBE_WUFC_MC) {
5073 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5074 fctrl |= IXGBE_FCTRL_MPE;
5075 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5078 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5079 ctrl |= IXGBE_CTRL_GIO_DIS;
5080 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5082 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5084 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5085 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5088 switch (hw->mac.type) {
5089 case ixgbe_mac_82598EB:
5090 pci_wake_from_d3(pdev, false);
5092 case ixgbe_mac_82599EB:
5093 case ixgbe_mac_X540:
5094 pci_wake_from_d3(pdev, !!wufc);
5100 *enable_wake = !!wufc;
5102 ixgbe_release_hw_control(adapter);
5104 pci_disable_device(pdev);
5110 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5115 retval = __ixgbe_shutdown(pdev, &wake);
5120 pci_prepare_to_sleep(pdev);
5122 pci_wake_from_d3(pdev, false);
5123 pci_set_power_state(pdev, PCI_D3hot);
5128 #endif /* CONFIG_PM */
5130 static void ixgbe_shutdown(struct pci_dev *pdev)
5134 __ixgbe_shutdown(pdev, &wake);
5136 if (system_state == SYSTEM_POWER_OFF) {
5137 pci_wake_from_d3(pdev, wake);
5138 pci_set_power_state(pdev, PCI_D3hot);
5143 * ixgbe_update_stats - Update the board statistics counters.
5144 * @adapter: board private structure
5146 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5148 struct net_device *netdev = adapter->netdev;
5149 struct ixgbe_hw *hw = &adapter->hw;
5150 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5152 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5153 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5154 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5155 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5157 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5158 test_bit(__IXGBE_RESETTING, &adapter->state))
5161 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5164 for (i = 0; i < adapter->num_rx_queues; i++) {
5165 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5166 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5168 adapter->rsc_total_count = rsc_count;
5169 adapter->rsc_total_flush = rsc_flush;
5172 for (i = 0; i < adapter->num_rx_queues; i++) {
5173 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5174 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5175 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5176 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5177 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5178 bytes += rx_ring->stats.bytes;
5179 packets += rx_ring->stats.packets;
5181 adapter->non_eop_descs = non_eop_descs;
5182 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5183 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5184 adapter->hw_csum_rx_error = hw_csum_rx_error;
5185 netdev->stats.rx_bytes = bytes;
5186 netdev->stats.rx_packets = packets;
5190 /* gather some stats to the adapter struct that are per queue */
5191 for (i = 0; i < adapter->num_tx_queues; i++) {
5192 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5193 restart_queue += tx_ring->tx_stats.restart_queue;
5194 tx_busy += tx_ring->tx_stats.tx_busy;
5195 bytes += tx_ring->stats.bytes;
5196 packets += tx_ring->stats.packets;
5198 adapter->restart_queue = restart_queue;
5199 adapter->tx_busy = tx_busy;
5200 netdev->stats.tx_bytes = bytes;
5201 netdev->stats.tx_packets = packets;
5203 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5205 /* 8 register reads */
5206 for (i = 0; i < 8; i++) {
5207 /* for packet buffers not used, the register should read 0 */
5208 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5210 hwstats->mpc[i] += mpc;
5211 total_mpc += hwstats->mpc[i];
5212 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5213 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5214 switch (hw->mac.type) {
5215 case ixgbe_mac_82598EB:
5216 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5217 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5218 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5219 hwstats->pxonrxc[i] +=
5220 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5222 case ixgbe_mac_82599EB:
5223 case ixgbe_mac_X540:
5224 hwstats->pxonrxc[i] +=
5225 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5232 /*16 register reads */
5233 for (i = 0; i < 16; i++) {
5234 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5235 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5236 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5237 (hw->mac.type == ixgbe_mac_X540)) {
5238 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5239 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5240 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5241 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5245 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5246 /* work around hardware counting issue */
5247 hwstats->gprc -= missed_rx;
5249 ixgbe_update_xoff_received(adapter);
5251 /* 82598 hardware only has a 32 bit counter in the high register */
5252 switch (hw->mac.type) {
5253 case ixgbe_mac_82598EB:
5254 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5255 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5256 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5257 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5259 case ixgbe_mac_X540:
5260 /* OS2BMC stats are X540 only*/
5261 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5262 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5263 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5264 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5265 case ixgbe_mac_82599EB:
5266 for (i = 0; i < 16; i++)
5267 adapter->hw_rx_no_dma_resources +=
5268 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5269 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5270 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5271 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5272 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5273 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5274 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5275 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5276 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5277 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5279 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5280 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5281 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5282 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5283 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5284 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5285 /* Add up per cpu counters for total ddp aloc fail */
5286 if (adapter->fcoe.ddp_pool) {
5287 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5288 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5290 u64 noddp = 0, noddp_ext_buff = 0;
5291 for_each_possible_cpu(cpu) {
5292 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
5293 noddp += ddp_pool->noddp;
5294 noddp_ext_buff += ddp_pool->noddp_ext_buff;
5296 hwstats->fcoe_noddp = noddp;
5297 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
5299 #endif /* IXGBE_FCOE */
5304 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5305 hwstats->bprc += bprc;
5306 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5307 if (hw->mac.type == ixgbe_mac_82598EB)
5308 hwstats->mprc -= bprc;
5309 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5310 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5311 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5312 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5313 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5314 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5315 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5316 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5317 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5318 hwstats->lxontxc += lxon;
5319 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5320 hwstats->lxofftxc += lxoff;
5321 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5322 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5324 * 82598 errata - tx of flow control packets is included in tx counters
5326 xon_off_tot = lxon + lxoff;
5327 hwstats->gptc -= xon_off_tot;
5328 hwstats->mptc -= xon_off_tot;
5329 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5330 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5331 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5332 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5333 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5334 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5335 hwstats->ptc64 -= xon_off_tot;
5336 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5337 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5338 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5339 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5340 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5341 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5343 /* Fill out the OS statistics structure */
5344 netdev->stats.multicast = hwstats->mprc;
5347 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5348 netdev->stats.rx_dropped = 0;
5349 netdev->stats.rx_length_errors = hwstats->rlec;
5350 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5351 netdev->stats.rx_missed_errors = total_mpc;
5355 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5356 * @adapter: pointer to the device adapter structure
5358 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5360 struct ixgbe_hw *hw = &adapter->hw;
5363 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5366 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5368 /* if interface is down do nothing */
5369 if (test_bit(__IXGBE_DOWN, &adapter->state))
5372 /* do nothing if we are not using signature filters */
5373 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5376 adapter->fdir_overflow++;
5378 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5379 for (i = 0; i < adapter->num_tx_queues; i++)
5380 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5381 &(adapter->tx_ring[i]->state));
5382 /* re-enable flow director interrupts */
5383 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5385 e_err(probe, "failed to finish FDIR re-initialization, "
5386 "ignored adding FDIR ATR filters\n");
5391 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5392 * @adapter: pointer to the device adapter structure
5394 * This function serves two purposes. First it strobes the interrupt lines
5395 * in order to make certain interrupts are occurring. Secondly it sets the
5396 * bits needed to check for TX hangs. As a result we should immediately
5397 * determine if a hang has occurred.
5399 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5401 struct ixgbe_hw *hw = &adapter->hw;
5405 /* If we're down or resetting, just bail */
5406 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5407 test_bit(__IXGBE_RESETTING, &adapter->state))
5410 /* Force detection of hung controller */
5411 if (netif_carrier_ok(adapter->netdev)) {
5412 for (i = 0; i < adapter->num_tx_queues; i++)
5413 set_check_for_tx_hang(adapter->tx_ring[i]);
5416 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5418 * for legacy and MSI interrupts don't set any bits
5419 * that are enabled for EIAM, because this operation
5420 * would set *both* EIMS and EICS for any bit in EIAM
5422 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5423 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5425 /* get one bit for every active tx/rx interrupt vector */
5426 for (i = 0; i < adapter->num_q_vectors; i++) {
5427 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5428 if (qv->rx.ring || qv->tx.ring)
5429 eics |= ((u64)1 << i);
5433 /* Cause software interrupt to ensure rings are cleaned */
5434 ixgbe_irq_rearm_queues(adapter, eics);
5439 * ixgbe_watchdog_update_link - update the link status
5440 * @adapter: pointer to the device adapter structure
5441 * @link_speed: pointer to a u32 to store the link_speed
5443 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5445 struct ixgbe_hw *hw = &adapter->hw;
5446 u32 link_speed = adapter->link_speed;
5447 bool link_up = adapter->link_up;
5448 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5450 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5453 if (hw->mac.ops.check_link) {
5454 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5456 /* always assume link is up, if no check link function */
5457 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5461 if (adapter->ixgbe_ieee_pfc)
5462 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5464 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5465 hw->mac.ops.fc_enable(hw);
5466 ixgbe_set_rx_drop_en(adapter);
5470 time_after(jiffies, (adapter->link_check_timeout +
5471 IXGBE_TRY_LINK_TIMEOUT))) {
5472 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5473 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5474 IXGBE_WRITE_FLUSH(hw);
5477 adapter->link_up = link_up;
5478 adapter->link_speed = link_speed;
5481 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
5483 #ifdef CONFIG_IXGBE_DCB
5484 struct net_device *netdev = adapter->netdev;
5485 struct dcb_app app = {
5486 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
5491 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
5492 up = dcb_ieee_getapp_mask(netdev, &app);
5494 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
5499 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5500 * print link up message
5501 * @adapter: pointer to the device adapter structure
5503 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5505 struct net_device *netdev = adapter->netdev;
5506 struct ixgbe_hw *hw = &adapter->hw;
5507 u32 link_speed = adapter->link_speed;
5508 bool flow_rx, flow_tx;
5510 /* only continue if link was previously down */
5511 if (netif_carrier_ok(netdev))
5514 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5516 switch (hw->mac.type) {
5517 case ixgbe_mac_82598EB: {
5518 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5519 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5520 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5521 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5524 case ixgbe_mac_X540:
5525 case ixgbe_mac_82599EB: {
5526 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5527 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5528 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5529 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5538 if (adapter->flags2 & IXGBE_FLAG2_PTP_ENABLED)
5539 ixgbe_ptp_start_cyclecounter(adapter);
5541 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5542 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5544 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5546 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5549 ((flow_rx && flow_tx) ? "RX/TX" :
5551 (flow_tx ? "TX" : "None"))));
5553 netif_carrier_on(netdev);
5554 ixgbe_check_vf_rate_limit(adapter);
5556 /* update the default user priority for VFs */
5557 ixgbe_update_default_up(adapter);
5559 /* ping all the active vfs to let them know link has changed */
5560 ixgbe_ping_all_vfs(adapter);
5564 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5565 * print link down message
5566 * @adapter: pointer to the adapter structure
5568 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5570 struct net_device *netdev = adapter->netdev;
5571 struct ixgbe_hw *hw = &adapter->hw;
5573 adapter->link_up = false;
5574 adapter->link_speed = 0;
5576 /* only continue if link was up previously */
5577 if (!netif_carrier_ok(netdev))
5580 /* poll for SFP+ cable when link is down */
5581 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5582 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5584 if (adapter->flags2 & IXGBE_FLAG2_PTP_ENABLED)
5585 ixgbe_ptp_start_cyclecounter(adapter);
5587 e_info(drv, "NIC Link is Down\n");
5588 netif_carrier_off(netdev);
5590 /* ping all the active vfs to let them know link has changed */
5591 ixgbe_ping_all_vfs(adapter);
5595 * ixgbe_watchdog_flush_tx - flush queues on link down
5596 * @adapter: pointer to the device adapter structure
5598 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5601 int some_tx_pending = 0;
5603 if (!netif_carrier_ok(adapter->netdev)) {
5604 for (i = 0; i < adapter->num_tx_queues; i++) {
5605 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5606 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5607 some_tx_pending = 1;
5612 if (some_tx_pending) {
5613 /* We've lost link, so the controller stops DMA,
5614 * but we've got queued Tx work that's never going
5615 * to get done, so reset controller to flush Tx.
5616 * (Do the reset outside of interrupt context).
5618 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5623 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5627 /* Do not perform spoof check for 82598 or if not in IOV mode */
5628 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
5629 adapter->num_vfs == 0)
5632 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5635 * ssvpc register is cleared on read, if zero then no
5636 * spoofed packets in the last interval.
5641 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
5645 * ixgbe_watchdog_subtask - check and bring link up
5646 * @adapter: pointer to the device adapter structure
5648 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5650 /* if interface is down do nothing */
5651 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5652 test_bit(__IXGBE_RESETTING, &adapter->state))
5655 ixgbe_watchdog_update_link(adapter);
5657 if (adapter->link_up)
5658 ixgbe_watchdog_link_is_up(adapter);
5660 ixgbe_watchdog_link_is_down(adapter);
5662 ixgbe_spoof_check(adapter);
5663 ixgbe_update_stats(adapter);
5665 ixgbe_watchdog_flush_tx(adapter);
5669 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5670 * @adapter: the ixgbe adapter structure
5672 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5674 struct ixgbe_hw *hw = &adapter->hw;
5677 /* not searching for SFP so there is nothing to do here */
5678 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5679 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5682 /* someone else is in init, wait until next service event */
5683 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5686 err = hw->phy.ops.identify_sfp(hw);
5687 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5690 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5691 /* If no cable is present, then we need to reset
5692 * the next time we find a good cable. */
5693 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5700 /* exit if reset not needed */
5701 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5704 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5707 * A module may be identified correctly, but the EEPROM may not have
5708 * support for that module. setup_sfp() will fail in that case, so
5709 * we should not allow that module to load.
5711 if (hw->mac.type == ixgbe_mac_82598EB)
5712 err = hw->phy.ops.reset(hw);
5714 err = hw->mac.ops.setup_sfp(hw);
5716 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5719 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5720 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5723 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5725 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5726 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5727 e_dev_err("failed to initialize because an unsupported "
5728 "SFP+ module type was detected.\n");
5729 e_dev_err("Reload the driver after installing a "
5730 "supported module.\n");
5731 unregister_netdev(adapter->netdev);
5736 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5737 * @adapter: the ixgbe adapter structure
5739 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5741 struct ixgbe_hw *hw = &adapter->hw;
5745 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5748 /* someone else is in init, wait until next service event */
5749 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5752 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5754 autoneg = hw->phy.autoneg_advertised;
5755 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5756 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5757 if (hw->mac.ops.setup_link)
5758 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5760 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5761 adapter->link_check_timeout = jiffies;
5762 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5765 #ifdef CONFIG_PCI_IOV
5766 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5769 struct ixgbe_hw *hw = &adapter->hw;
5770 struct net_device *netdev = adapter->netdev;
5774 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5775 if (gpc) /* If incrementing then no need for the check below */
5778 * Check to see if a bad DMA write target from an errant or
5779 * malicious VF has caused a PCIe error. If so then we can
5780 * issue a VFLR to the offending VF(s) and then resume without
5781 * requesting a full slot reset.
5784 for (vf = 0; vf < adapter->num_vfs; vf++) {
5785 ciaa = (vf << 16) | 0x80000000;
5786 /* 32 bit read so align, we really want status at offset 6 */
5787 ciaa |= PCI_COMMAND;
5788 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5789 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5791 /* disable debug mode asap after reading data */
5792 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5793 /* Get the upper 16 bits which will be the PCI status reg */
5795 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5796 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5798 ciaa = (vf << 16) | 0x80000000;
5800 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5801 ciad = 0x00008000; /* VFLR */
5802 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5804 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5811 * ixgbe_service_timer - Timer Call-back
5812 * @data: pointer to adapter cast into an unsigned long
5814 static void ixgbe_service_timer(unsigned long data)
5816 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5817 unsigned long next_event_offset;
5820 /* poll faster when waiting for link */
5821 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5822 next_event_offset = HZ / 10;
5824 next_event_offset = HZ * 2;
5826 #ifdef CONFIG_PCI_IOV
5828 * don't bother with SR-IOV VF DMA hang check if there are
5829 * no VFs or the link is down
5831 if (!adapter->num_vfs ||
5832 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5833 goto normal_timer_service;
5835 /* If we have VFs allocated then we must check for DMA hangs */
5836 ixgbe_check_for_bad_vf(adapter);
5837 next_event_offset = HZ / 50;
5838 adapter->timer_event_accumulator++;
5840 if (adapter->timer_event_accumulator >= 100)
5841 adapter->timer_event_accumulator = 0;
5845 normal_timer_service:
5847 /* Reset the timer */
5848 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5851 ixgbe_service_event_schedule(adapter);
5854 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5856 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5859 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5861 /* If we're already down or resetting, just bail */
5862 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5863 test_bit(__IXGBE_RESETTING, &adapter->state))
5866 ixgbe_dump(adapter);
5867 netdev_err(adapter->netdev, "Reset adapter\n");
5868 adapter->tx_timeout_count++;
5870 ixgbe_reinit_locked(adapter);
5874 * ixgbe_service_task - manages and runs subtasks
5875 * @work: pointer to work_struct containing our data
5877 static void ixgbe_service_task(struct work_struct *work)
5879 struct ixgbe_adapter *adapter = container_of(work,
5880 struct ixgbe_adapter,
5883 ixgbe_reset_subtask(adapter);
5884 ixgbe_sfp_detection_subtask(adapter);
5885 ixgbe_sfp_link_config_subtask(adapter);
5886 ixgbe_check_overtemp_subtask(adapter);
5887 ixgbe_watchdog_subtask(adapter);
5888 ixgbe_fdir_reinit_subtask(adapter);
5889 ixgbe_check_hang_subtask(adapter);
5890 ixgbe_ptp_overflow_check(adapter);
5892 ixgbe_service_event_complete(adapter);
5895 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5896 struct ixgbe_tx_buffer *first,
5899 struct sk_buff *skb = first->skb;
5900 u32 vlan_macip_lens, type_tucmd;
5901 u32 mss_l4len_idx, l4len;
5903 if (!skb_is_gso(skb))
5906 if (skb_header_cloned(skb)) {
5907 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5912 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5913 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5915 if (first->protocol == __constant_htons(ETH_P_IP)) {
5916 struct iphdr *iph = ip_hdr(skb);
5919 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5923 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5924 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5925 IXGBE_TX_FLAGS_CSUM |
5926 IXGBE_TX_FLAGS_IPV4;
5927 } else if (skb_is_gso_v6(skb)) {
5928 ipv6_hdr(skb)->payload_len = 0;
5929 tcp_hdr(skb)->check =
5930 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5931 &ipv6_hdr(skb)->daddr,
5933 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5934 IXGBE_TX_FLAGS_CSUM;
5937 /* compute header lengths */
5938 l4len = tcp_hdrlen(skb);
5939 *hdr_len = skb_transport_offset(skb) + l4len;
5941 /* update gso size and bytecount with header size */
5942 first->gso_segs = skb_shinfo(skb)->gso_segs;
5943 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5945 /* mss_l4len_id: use 1 as index for TSO */
5946 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5947 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5948 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5950 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5951 vlan_macip_lens = skb_network_header_len(skb);
5952 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5953 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5955 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5961 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5962 struct ixgbe_tx_buffer *first)
5964 struct sk_buff *skb = first->skb;
5965 u32 vlan_macip_lens = 0;
5966 u32 mss_l4len_idx = 0;
5969 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5970 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN)) {
5971 if (unlikely(skb->no_fcs))
5972 first->tx_flags |= IXGBE_TX_FLAGS_NO_IFCS;
5973 if (!(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
5978 switch (first->protocol) {
5979 case __constant_htons(ETH_P_IP):
5980 vlan_macip_lens |= skb_network_header_len(skb);
5981 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5982 l4_hdr = ip_hdr(skb)->protocol;
5984 case __constant_htons(ETH_P_IPV6):
5985 vlan_macip_lens |= skb_network_header_len(skb);
5986 l4_hdr = ipv6_hdr(skb)->nexthdr;
5989 if (unlikely(net_ratelimit())) {
5990 dev_warn(tx_ring->dev,
5991 "partial checksum but proto=%x!\n",
5999 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6000 mss_l4len_idx = tcp_hdrlen(skb) <<
6001 IXGBE_ADVTXD_L4LEN_SHIFT;
6004 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6005 mss_l4len_idx = sizeof(struct sctphdr) <<
6006 IXGBE_ADVTXD_L4LEN_SHIFT;
6009 mss_l4len_idx = sizeof(struct udphdr) <<
6010 IXGBE_ADVTXD_L4LEN_SHIFT;
6013 if (unlikely(net_ratelimit())) {
6014 dev_warn(tx_ring->dev,
6015 "partial checksum but l4 proto=%x!\n",
6021 /* update TX checksum flag */
6022 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6025 /* vlan_macip_lens: MACLEN, VLAN tag */
6026 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6027 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6029 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6030 type_tucmd, mss_l4len_idx);
6033 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
6035 /* set type for advanced descriptor with frame checksum insertion */
6036 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
6037 IXGBE_ADVTXD_DCMD_DEXT);
6039 /* set HW vlan bit if vlan is present */
6040 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
6041 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
6043 if (tx_flags & IXGBE_TX_FLAGS_TSTAMP)
6044 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);
6046 /* set segmentation enable bits for TSO/FSO */
6048 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
6050 if (tx_flags & IXGBE_TX_FLAGS_TSO)
6052 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
6054 /* insert frame checksum */
6055 if (!(tx_flags & IXGBE_TX_FLAGS_NO_IFCS))
6056 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS);
6061 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6062 u32 tx_flags, unsigned int paylen)
6064 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
6066 /* enable L4 checksum for TSO and TX checksum offload */
6067 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
6068 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
6070 /* enble IPv4 checksum for TSO */
6071 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
6072 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
6074 /* use index 1 context for TSO/FSO/FCOE */
6076 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
6078 if (tx_flags & IXGBE_TX_FLAGS_TSO)
6080 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
6083 * Check Context must be set if Tx switch is enabled, which it
6084 * always is for case where virtual functions are running
6087 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
6089 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
6091 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
6093 tx_desc->read.olinfo_status = olinfo_status;
6096 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6099 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6100 struct ixgbe_tx_buffer *first,
6104 struct sk_buff *skb = first->skb;
6105 struct ixgbe_tx_buffer *tx_buffer;
6106 union ixgbe_adv_tx_desc *tx_desc;
6107 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6108 unsigned int data_len = skb->data_len;
6109 unsigned int size = skb_headlen(skb);
6110 unsigned int paylen = skb->len - hdr_len;
6111 u32 tx_flags = first->tx_flags;
6113 u16 i = tx_ring->next_to_use;
6115 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6117 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
6118 cmd_type = ixgbe_tx_cmd_type(tx_flags);
6121 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6122 if (data_len < sizeof(struct fcoe_crc_eof)) {
6123 size -= sizeof(struct fcoe_crc_eof) - data_len;
6126 data_len -= sizeof(struct fcoe_crc_eof);
6131 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6132 if (dma_mapping_error(tx_ring->dev, dma))
6135 /* record length, and DMA address */
6136 dma_unmap_len_set(first, len, size);
6137 dma_unmap_addr_set(first, dma, dma);
6139 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6142 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6143 tx_desc->read.cmd_type_len =
6144 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
6148 if (i == tx_ring->count) {
6149 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6153 dma += IXGBE_MAX_DATA_PER_TXD;
6154 size -= IXGBE_MAX_DATA_PER_TXD;
6156 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6157 tx_desc->read.olinfo_status = 0;
6160 if (likely(!data_len))
6163 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
6167 if (i == tx_ring->count) {
6168 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6173 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6175 size = skb_frag_size(frag);
6179 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6181 if (dma_mapping_error(tx_ring->dev, dma))
6184 tx_buffer = &tx_ring->tx_buffer_info[i];
6185 dma_unmap_len_set(tx_buffer, len, size);
6186 dma_unmap_addr_set(tx_buffer, dma, dma);
6188 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6189 tx_desc->read.olinfo_status = 0;
6194 /* write last descriptor with RS and EOP bits */
6195 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6196 tx_desc->read.cmd_type_len = cmd_type;
6198 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6200 /* set the timestamp */
6201 first->time_stamp = jiffies;
6204 * Force memory writes to complete before letting h/w know there
6205 * are new descriptors to fetch. (Only applicable for weak-ordered
6206 * memory model archs, such as IA-64).
6208 * We also need this memory barrier to make certain all of the
6209 * status bits have been updated before next_to_watch is written.
6213 /* set next_to_watch value indicating a packet is present */
6214 first->next_to_watch = tx_desc;
6217 if (i == tx_ring->count)
6220 tx_ring->next_to_use = i;
6222 /* notify HW of packet */
6223 writel(i, tx_ring->tail);
6227 dev_err(tx_ring->dev, "TX DMA map failed\n");
6229 /* clear dma mappings for failed tx_buffer_info map */
6231 tx_buffer = &tx_ring->tx_buffer_info[i];
6232 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6233 if (tx_buffer == first)
6240 tx_ring->next_to_use = i;
6243 static void ixgbe_atr(struct ixgbe_ring *ring,
6244 struct ixgbe_tx_buffer *first)
6246 struct ixgbe_q_vector *q_vector = ring->q_vector;
6247 union ixgbe_atr_hash_dword input = { .dword = 0 };
6248 union ixgbe_atr_hash_dword common = { .dword = 0 };
6250 unsigned char *network;
6252 struct ipv6hdr *ipv6;
6257 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6261 /* do nothing if sampling is disabled */
6262 if (!ring->atr_sample_rate)
6267 /* snag network header to get L4 type and address */
6268 hdr.network = skb_network_header(first->skb);
6270 /* Currently only IPv4/IPv6 with TCP is supported */
6271 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6272 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6273 (first->protocol != __constant_htons(ETH_P_IP) ||
6274 hdr.ipv4->protocol != IPPROTO_TCP))
6277 th = tcp_hdr(first->skb);
6279 /* skip this packet since it is invalid or the socket is closing */
6283 /* sample on all syn packets or once every atr sample count */
6284 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6287 /* reset sample count */
6288 ring->atr_count = 0;
6290 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6293 * src and dst are inverted, think how the receiver sees them
6295 * The input is broken into two sections, a non-compressed section
6296 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6297 * is XORed together and stored in the compressed dword.
6299 input.formatted.vlan_id = vlan_id;
6302 * since src port and flex bytes occupy the same word XOR them together
6303 * and write the value to source port portion of compressed dword
6305 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6306 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6308 common.port.src ^= th->dest ^ first->protocol;
6309 common.port.dst ^= th->source;
6311 if (first->protocol == __constant_htons(ETH_P_IP)) {
6312 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6313 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6315 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6316 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6317 hdr.ipv6->saddr.s6_addr32[1] ^
6318 hdr.ipv6->saddr.s6_addr32[2] ^
6319 hdr.ipv6->saddr.s6_addr32[3] ^
6320 hdr.ipv6->daddr.s6_addr32[0] ^
6321 hdr.ipv6->daddr.s6_addr32[1] ^
6322 hdr.ipv6->daddr.s6_addr32[2] ^
6323 hdr.ipv6->daddr.s6_addr32[3];
6326 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6327 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6328 input, common, ring->queue_index);
6331 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6333 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6334 /* Herbert's original patch had:
6335 * smp_mb__after_netif_stop_queue();
6336 * but since that doesn't exist yet, just open code it. */
6339 /* We need to check again in a case another CPU has just
6340 * made room available. */
6341 if (likely(ixgbe_desc_unused(tx_ring) < size))
6344 /* A reprieve! - use start_queue because it doesn't call schedule */
6345 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6346 ++tx_ring->tx_stats.restart_queue;
6350 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6352 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6354 return __ixgbe_maybe_stop_tx(tx_ring, size);
6357 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6359 struct ixgbe_adapter *adapter = netdev_priv(dev);
6360 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6363 __be16 protocol = vlan_get_protocol(skb);
6365 if (((protocol == htons(ETH_P_FCOE)) ||
6366 (protocol == htons(ETH_P_FIP))) &&
6367 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6368 struct ixgbe_ring_feature *f;
6370 f = &adapter->ring_feature[RING_F_FCOE];
6372 while (txq >= f->indices)
6374 txq += adapter->ring_feature[RING_F_FCOE].offset;
6380 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6381 while (unlikely(txq >= dev->real_num_tx_queues))
6382 txq -= dev->real_num_tx_queues;
6386 return skb_tx_hash(dev, skb);
6389 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6390 struct ixgbe_adapter *adapter,
6391 struct ixgbe_ring *tx_ring)
6393 struct ixgbe_tx_buffer *first;
6396 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6399 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6400 __be16 protocol = skb->protocol;
6404 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6405 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6406 * + 2 desc gap to keep tail from touching head,
6407 * + 1 desc for context descriptor,
6408 * otherwise try next time
6410 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6411 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6412 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6414 count += skb_shinfo(skb)->nr_frags;
6416 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6417 tx_ring->tx_stats.tx_busy++;
6418 return NETDEV_TX_BUSY;
6421 /* record the location of the first descriptor for this packet */
6422 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6424 first->bytecount = skb->len;
6425 first->gso_segs = 1;
6427 /* if we have a HW VLAN tag being added default to the HW one */
6428 if (vlan_tx_tag_present(skb)) {
6429 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6430 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6431 /* else if it is a SW VLAN check the next protocol and store the tag */
6432 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6433 struct vlan_hdr *vhdr, _vhdr;
6434 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6438 protocol = vhdr->h_vlan_encapsulated_proto;
6439 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6440 IXGBE_TX_FLAGS_VLAN_SHIFT;
6441 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6444 skb_tx_timestamp(skb);
6446 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6447 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6448 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
6451 #ifdef CONFIG_PCI_IOV
6453 * Use the l2switch_enable flag - would be false if the DMA
6454 * Tx switch had been disabled.
6456 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6457 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6460 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6461 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6462 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6463 (skb->priority != TC_PRIO_CONTROL))) {
6464 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6465 tx_flags |= (skb->priority & 0x7) <<
6466 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6467 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6468 struct vlan_ethhdr *vhdr;
6469 if (skb_header_cloned(skb) &&
6470 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6472 vhdr = (struct vlan_ethhdr *)skb->data;
6473 vhdr->h_vlan_TCI = htons(tx_flags >>
6474 IXGBE_TX_FLAGS_VLAN_SHIFT);
6476 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6480 /* record initial flags and protocol */
6481 first->tx_flags = tx_flags;
6482 first->protocol = protocol;
6485 /* setup tx offload for FCoE */
6486 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6487 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
6488 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6495 #endif /* IXGBE_FCOE */
6496 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6500 ixgbe_tx_csum(tx_ring, first);
6502 /* add the ATR filter if ATR is on */
6503 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6504 ixgbe_atr(tx_ring, first);
6508 #endif /* IXGBE_FCOE */
6509 ixgbe_tx_map(tx_ring, first, hdr_len);
6511 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6513 return NETDEV_TX_OK;
6516 dev_kfree_skb_any(first->skb);
6519 return NETDEV_TX_OK;
6522 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6523 struct net_device *netdev)
6525 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6526 struct ixgbe_ring *tx_ring;
6529 * The minimum packet size for olinfo paylen is 17 so pad the skb
6530 * in order to meet this minimum size requirement.
6532 if (unlikely(skb->len < 17)) {
6533 if (skb_pad(skb, 17 - skb->len))
6534 return NETDEV_TX_OK;
6536 skb_set_tail_pointer(skb, 17);
6539 tx_ring = adapter->tx_ring[skb->queue_mapping];
6540 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6544 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6545 * @netdev: network interface device structure
6546 * @p: pointer to an address structure
6548 * Returns 0 on success, negative on failure
6550 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6552 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6553 struct ixgbe_hw *hw = &adapter->hw;
6554 struct sockaddr *addr = p;
6556 if (!is_valid_ether_addr(addr->sa_data))
6557 return -EADDRNOTAVAIL;
6559 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6560 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6562 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
6568 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6570 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6571 struct ixgbe_hw *hw = &adapter->hw;
6575 if (prtad != hw->phy.mdio.prtad)
6577 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6583 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6584 u16 addr, u16 value)
6586 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6587 struct ixgbe_hw *hw = &adapter->hw;
6589 if (prtad != hw->phy.mdio.prtad)
6591 return hw->phy.ops.write_reg(hw, addr, devad, value);
6594 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6596 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6600 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
6602 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6607 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6609 * @netdev: network interface device structure
6611 * Returns non-zero on failure
6613 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6616 struct ixgbe_adapter *adapter = netdev_priv(dev);
6617 struct ixgbe_hw *hw = &adapter->hw;
6619 if (is_valid_ether_addr(hw->mac.san_addr)) {
6621 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
6624 /* update SAN MAC vmdq pool selection */
6625 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
6631 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6633 * @netdev: network interface device structure
6635 * Returns non-zero on failure
6637 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6640 struct ixgbe_adapter *adapter = netdev_priv(dev);
6641 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6643 if (is_valid_ether_addr(mac->san_addr)) {
6645 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6651 #ifdef CONFIG_NET_POLL_CONTROLLER
6653 * Polling 'interrupt' - used by things like netconsole to send skbs
6654 * without having to re-enable interrupts. It's not called while
6655 * the interrupt routine is executing.
6657 static void ixgbe_netpoll(struct net_device *netdev)
6659 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6662 /* if interface is down do nothing */
6663 if (test_bit(__IXGBE_DOWN, &adapter->state))
6666 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6667 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6668 for (i = 0; i < adapter->num_q_vectors; i++)
6669 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
6671 ixgbe_intr(adapter->pdev->irq, netdev);
6673 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6677 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6678 struct rtnl_link_stats64 *stats)
6680 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6684 for (i = 0; i < adapter->num_rx_queues; i++) {
6685 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6691 start = u64_stats_fetch_begin_bh(&ring->syncp);
6692 packets = ring->stats.packets;
6693 bytes = ring->stats.bytes;
6694 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6695 stats->rx_packets += packets;
6696 stats->rx_bytes += bytes;
6700 for (i = 0; i < adapter->num_tx_queues; i++) {
6701 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6707 start = u64_stats_fetch_begin_bh(&ring->syncp);
6708 packets = ring->stats.packets;
6709 bytes = ring->stats.bytes;
6710 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6711 stats->tx_packets += packets;
6712 stats->tx_bytes += bytes;
6716 /* following stats updated by ixgbe_watchdog_task() */
6717 stats->multicast = netdev->stats.multicast;
6718 stats->rx_errors = netdev->stats.rx_errors;
6719 stats->rx_length_errors = netdev->stats.rx_length_errors;
6720 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6721 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6725 #ifdef CONFIG_IXGBE_DCB
6727 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6728 * @adapter: pointer to ixgbe_adapter
6729 * @tc: number of traffic classes currently enabled
6731 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6732 * 802.1Q priority maps to a packet buffer that exists.
6734 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6736 struct ixgbe_hw *hw = &adapter->hw;
6740 /* 82598 have a static priority to TC mapping that can not
6741 * be changed so no validation is needed.
6743 if (hw->mac.type == ixgbe_mac_82598EB)
6746 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6749 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6750 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6752 /* If up2tc is out of bounds default to zero */
6754 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6758 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6764 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
6765 * @adapter: Pointer to adapter struct
6767 * Populate the netdev user priority to tc map
6769 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
6771 struct net_device *dev = adapter->netdev;
6772 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
6773 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
6776 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
6779 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
6780 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
6782 tc = ets->prio_tc[prio];
6784 netdev_set_prio_tc_map(dev, prio, tc);
6789 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6791 * @netdev: net device to configure
6792 * @tc: number of traffic classes to enable
6794 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6796 struct ixgbe_adapter *adapter = netdev_priv(dev);
6797 struct ixgbe_hw *hw = &adapter->hw;
6799 /* Hardware supports up to 8 traffic classes */
6800 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6801 (hw->mac.type == ixgbe_mac_82598EB &&
6802 tc < MAX_TRAFFIC_CLASS))
6805 /* Hardware has to reinitialize queues and interrupts to
6806 * match packet buffer alignment. Unfortunately, the
6807 * hardware is not flexible enough to do this dynamically.
6809 if (netif_running(dev))
6811 ixgbe_clear_interrupt_scheme(adapter);
6814 netdev_set_num_tc(dev, tc);
6815 ixgbe_set_prio_tc_map(adapter);
6817 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6819 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6820 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6821 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6824 netdev_reset_tc(dev);
6826 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6827 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6829 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6831 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6832 adapter->dcb_cfg.pfc_mode_enable = false;
6835 ixgbe_init_interrupt_scheme(adapter);
6836 ixgbe_validate_rtr(adapter, tc);
6837 if (netif_running(dev))
6843 #endif /* CONFIG_IXGBE_DCB */
6844 void ixgbe_do_reset(struct net_device *netdev)
6846 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6848 if (netif_running(netdev))
6849 ixgbe_reinit_locked(adapter);
6851 ixgbe_reset(adapter);
6854 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6855 netdev_features_t features)
6857 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6859 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6860 if (!(features & NETIF_F_RXCSUM))
6861 features &= ~NETIF_F_LRO;
6863 /* Turn off LRO if not RSC capable */
6864 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6865 features &= ~NETIF_F_LRO;
6870 static int ixgbe_set_features(struct net_device *netdev,
6871 netdev_features_t features)
6873 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6874 netdev_features_t changed = netdev->features ^ features;
6875 bool need_reset = false;
6877 /* Make sure RSC matches LRO, reset if change */
6878 if (!(features & NETIF_F_LRO)) {
6879 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6881 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6882 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6883 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6884 if (adapter->rx_itr_setting == 1 ||
6885 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6886 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6888 } else if ((changed ^ features) & NETIF_F_LRO) {
6889 e_info(probe, "rx-usecs set too low, "
6895 * Check if Flow Director n-tuple support was enabled or disabled. If
6896 * the state changed, we need to reset.
6898 switch (features & NETIF_F_NTUPLE) {
6899 case NETIF_F_NTUPLE:
6900 /* turn off ATR, enable perfect filters and reset */
6901 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
6904 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6905 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6908 /* turn off perfect filters, enable ATR and reset */
6909 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6912 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6914 /* We cannot enable ATR if SR-IOV is enabled */
6915 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6918 /* We cannot enable ATR if we have 2 or more traffic classes */
6919 if (netdev_get_num_tc(netdev) > 1)
6922 /* We cannot enable ATR if RSS is disabled */
6923 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
6926 /* A sample rate of 0 indicates ATR disabled */
6927 if (!adapter->atr_sample_rate)
6930 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6934 if (features & NETIF_F_HW_VLAN_RX)
6935 ixgbe_vlan_strip_enable(adapter);
6937 ixgbe_vlan_strip_disable(adapter);
6939 if (changed & NETIF_F_RXALL)
6942 netdev->features = features;
6944 ixgbe_do_reset(netdev);
6949 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
6950 struct net_device *dev,
6951 const unsigned char *addr,
6954 struct ixgbe_adapter *adapter = netdev_priv(dev);
6957 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
6960 /* Hardware does not support aging addresses so if a
6961 * ndm_state is given only allow permanent addresses
6963 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
6964 pr_info("%s: FDB only supports static addresses\n",
6969 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
6970 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
6972 if (netdev_uc_count(dev) < rar_uc_entries)
6973 err = dev_uc_add_excl(dev, addr);
6976 } else if (is_multicast_ether_addr(addr)) {
6977 err = dev_mc_add_excl(dev, addr);
6982 /* Only return duplicate errors if NLM_F_EXCL is set */
6983 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6989 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
6990 struct net_device *dev,
6991 const unsigned char *addr)
6993 struct ixgbe_adapter *adapter = netdev_priv(dev);
6994 int err = -EOPNOTSUPP;
6996 if (ndm->ndm_state & NUD_PERMANENT) {
6997 pr_info("%s: FDB only supports static addresses\n",
7002 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7003 if (is_unicast_ether_addr(addr))
7004 err = dev_uc_del(dev, addr);
7005 else if (is_multicast_ether_addr(addr))
7006 err = dev_mc_del(dev, addr);
7014 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
7015 struct netlink_callback *cb,
7016 struct net_device *dev,
7019 struct ixgbe_adapter *adapter = netdev_priv(dev);
7021 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7022 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
7027 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7028 struct nlmsghdr *nlh)
7030 struct ixgbe_adapter *adapter = netdev_priv(dev);
7031 struct nlattr *attr, *br_spec;
7034 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7037 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7039 nla_for_each_nested(attr, br_spec, rem) {
7043 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7046 mode = nla_get_u16(attr);
7047 if (mode == BRIDGE_MODE_VEPA) {
7049 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7050 } else if (mode == BRIDGE_MODE_VEB) {
7051 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7052 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7056 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7058 e_info(drv, "enabling bridge mode: %s\n",
7059 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7065 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7066 struct net_device *dev)
7068 struct ixgbe_adapter *adapter = netdev_priv(dev);
7071 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7074 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7075 mode = BRIDGE_MODE_VEB;
7077 mode = BRIDGE_MODE_VEPA;
7079 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
7082 static const struct net_device_ops ixgbe_netdev_ops = {
7083 .ndo_open = ixgbe_open,
7084 .ndo_stop = ixgbe_close,
7085 .ndo_start_xmit = ixgbe_xmit_frame,
7086 .ndo_select_queue = ixgbe_select_queue,
7087 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7088 .ndo_validate_addr = eth_validate_addr,
7089 .ndo_set_mac_address = ixgbe_set_mac,
7090 .ndo_change_mtu = ixgbe_change_mtu,
7091 .ndo_tx_timeout = ixgbe_tx_timeout,
7092 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7093 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7094 .ndo_do_ioctl = ixgbe_ioctl,
7095 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7096 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7097 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
7098 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7099 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7100 .ndo_get_stats64 = ixgbe_get_stats64,
7101 #ifdef CONFIG_IXGBE_DCB
7102 .ndo_setup_tc = ixgbe_setup_tc,
7104 #ifdef CONFIG_NET_POLL_CONTROLLER
7105 .ndo_poll_controller = ixgbe_netpoll,
7108 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7109 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7110 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7111 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7112 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7113 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7114 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7115 #endif /* IXGBE_FCOE */
7116 .ndo_set_features = ixgbe_set_features,
7117 .ndo_fix_features = ixgbe_fix_features,
7118 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7119 .ndo_fdb_del = ixgbe_ndo_fdb_del,
7120 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
7121 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7122 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7126 * ixgbe_wol_supported - Check whether device supports WoL
7127 * @hw: hw specific details
7128 * @device_id: the device ID
7129 * @subdev_id: the subsystem device ID
7131 * This function is used by probe and ethtool to determine
7132 * which devices have WoL support
7135 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
7138 struct ixgbe_hw *hw = &adapter->hw;
7139 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
7140 int is_wol_supported = 0;
7142 switch (device_id) {
7143 case IXGBE_DEV_ID_82599_SFP:
7144 /* Only these subdevices could supports WOL */
7145 switch (subdevice_id) {
7146 case IXGBE_SUBDEV_ID_82599_560FLR:
7147 /* only support first port */
7148 if (hw->bus.func != 0)
7150 case IXGBE_SUBDEV_ID_82599_SFP:
7151 case IXGBE_SUBDEV_ID_82599_RNDC:
7152 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
7153 is_wol_supported = 1;
7157 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
7158 /* All except this subdevice support WOL */
7159 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
7160 is_wol_supported = 1;
7162 case IXGBE_DEV_ID_82599_KX4:
7163 is_wol_supported = 1;
7165 case IXGBE_DEV_ID_X540T:
7166 case IXGBE_DEV_ID_X540T1:
7167 /* check eeprom to see if enabled wol */
7168 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
7169 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
7170 (hw->bus.func == 0))) {
7171 is_wol_supported = 1;
7176 return is_wol_supported;
7180 * ixgbe_probe - Device Initialization Routine
7181 * @pdev: PCI device information struct
7182 * @ent: entry in ixgbe_pci_tbl
7184 * Returns 0 on success, negative on failure
7186 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7187 * The OS initialization, configuring of the adapter private structure,
7188 * and a hardware reset occur.
7190 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7192 struct net_device *netdev;
7193 struct ixgbe_adapter *adapter = NULL;
7194 struct ixgbe_hw *hw;
7195 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7196 static int cards_found;
7197 int i, err, pci_using_dac;
7198 u8 part_str[IXGBE_PBANUM_LENGTH];
7199 unsigned int indices = num_possible_cpus();
7200 unsigned int dcb_max = 0;
7206 /* Catch broken hardware that put the wrong VF device ID in
7207 * the PCIe SR-IOV capability.
7209 if (pdev->is_virtfn) {
7210 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7211 pci_name(pdev), pdev->vendor, pdev->device);
7215 err = pci_enable_device_mem(pdev);
7219 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
7220 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7223 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
7225 err = dma_set_coherent_mask(&pdev->dev,
7229 "No usable DMA configuration, aborting\n");
7236 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7237 IORESOURCE_MEM), ixgbe_driver_name);
7240 "pci_request_selected_regions failed 0x%x\n", err);
7244 pci_enable_pcie_error_reporting(pdev);
7246 pci_set_master(pdev);
7247 pci_save_state(pdev);
7249 #ifdef CONFIG_IXGBE_DCB
7250 if (ii->mac == ixgbe_mac_82598EB)
7251 dcb_max = min_t(unsigned int, indices * MAX_TRAFFIC_CLASS,
7252 IXGBE_MAX_RSS_INDICES);
7254 dcb_max = min_t(unsigned int, indices * MAX_TRAFFIC_CLASS,
7255 IXGBE_MAX_FDIR_INDICES);
7258 if (ii->mac == ixgbe_mac_82598EB)
7259 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
7261 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
7264 indices += min_t(unsigned int, num_possible_cpus(),
7265 IXGBE_MAX_FCOE_INDICES);
7267 indices = max_t(unsigned int, dcb_max, indices);
7268 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7271 goto err_alloc_etherdev;
7274 SET_NETDEV_DEV(netdev, &pdev->dev);
7276 adapter = netdev_priv(netdev);
7277 pci_set_drvdata(pdev, adapter);
7279 adapter->netdev = netdev;
7280 adapter->pdev = pdev;
7283 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7285 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7286 pci_resource_len(pdev, 0));
7292 netdev->netdev_ops = &ixgbe_netdev_ops;
7293 ixgbe_set_ethtool_ops(netdev);
7294 netdev->watchdog_timeo = 5 * HZ;
7295 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7297 adapter->bd_number = cards_found;
7300 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7301 hw->mac.type = ii->mac;
7304 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7305 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7306 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7307 if (!(eec & (1 << 8)))
7308 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7311 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7312 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7313 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7314 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7315 hw->phy.mdio.mmds = 0;
7316 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7317 hw->phy.mdio.dev = netdev;
7318 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7319 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7321 ii->get_invariants(hw);
7323 /* setup the private structure */
7324 err = ixgbe_sw_init(adapter);
7328 /* Make it possible the adapter to be woken up via WOL */
7329 switch (adapter->hw.mac.type) {
7330 case ixgbe_mac_82599EB:
7331 case ixgbe_mac_X540:
7332 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7339 * If there is a fan on this device and it has failed log the
7342 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7343 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7344 if (esdp & IXGBE_ESDP_SDP1)
7345 e_crit(probe, "Fan has stopped, replace the adapter\n");
7348 if (allow_unsupported_sfp)
7349 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7351 /* reset_hw fills in the perm_addr as well */
7352 hw->phy.reset_if_overtemp = true;
7353 err = hw->mac.ops.reset_hw(hw);
7354 hw->phy.reset_if_overtemp = false;
7355 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7356 hw->mac.type == ixgbe_mac_82598EB) {
7358 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7359 e_dev_err("failed to load because an unsupported SFP+ "
7360 "module type was detected.\n");
7361 e_dev_err("Reload the driver after installing a supported "
7365 e_dev_err("HW Init failed: %d\n", err);
7369 #ifdef CONFIG_PCI_IOV
7370 ixgbe_enable_sriov(adapter, ii);
7373 netdev->features = NETIF_F_SG |
7376 NETIF_F_HW_VLAN_TX |
7377 NETIF_F_HW_VLAN_RX |
7378 NETIF_F_HW_VLAN_FILTER |
7384 netdev->hw_features = netdev->features;
7386 switch (adapter->hw.mac.type) {
7387 case ixgbe_mac_82599EB:
7388 case ixgbe_mac_X540:
7389 netdev->features |= NETIF_F_SCTP_CSUM;
7390 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7397 netdev->hw_features |= NETIF_F_RXALL;
7399 netdev->vlan_features |= NETIF_F_TSO;
7400 netdev->vlan_features |= NETIF_F_TSO6;
7401 netdev->vlan_features |= NETIF_F_IP_CSUM;
7402 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7403 netdev->vlan_features |= NETIF_F_SG;
7405 netdev->priv_flags |= IFF_UNICAST_FLT;
7406 netdev->priv_flags |= IFF_SUPP_NOFCS;
7408 #ifdef CONFIG_IXGBE_DCB
7409 netdev->dcbnl_ops = &dcbnl_ops;
7413 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7414 if (hw->mac.ops.get_device_caps) {
7415 hw->mac.ops.get_device_caps(hw, &device_caps);
7416 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7417 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7420 adapter->ring_feature[RING_F_FCOE].limit = IXGBE_FCRETA_SIZE;
7422 netdev->features |= NETIF_F_FSO |
7425 netdev->vlan_features |= NETIF_F_FSO |
7429 #endif /* IXGBE_FCOE */
7430 if (pci_using_dac) {
7431 netdev->features |= NETIF_F_HIGHDMA;
7432 netdev->vlan_features |= NETIF_F_HIGHDMA;
7435 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7436 netdev->hw_features |= NETIF_F_LRO;
7437 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7438 netdev->features |= NETIF_F_LRO;
7440 /* make sure the EEPROM is good */
7441 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7442 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7447 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7448 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7450 if (!is_valid_ether_addr(netdev->perm_addr)) {
7451 e_dev_err("invalid MAC address\n");
7456 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7457 (unsigned long) adapter);
7459 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7460 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7462 err = ixgbe_init_interrupt_scheme(adapter);
7466 /* WOL not supported for all devices */
7468 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7469 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7470 adapter->wol = IXGBE_WUFC_MAG;
7472 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7474 /* save off EEPROM version number */
7475 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7476 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7478 /* pick up the PCI bus settings for reporting later */
7479 hw->mac.ops.get_bus_info(hw);
7481 /* print bus type/speed/width info */
7482 e_dev_info("(PCI Express:%s:%s) %pM\n",
7483 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7484 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7486 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7487 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7488 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7492 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7494 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7495 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7496 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7497 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7500 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7501 hw->mac.type, hw->phy.type, part_str);
7503 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7504 e_dev_warn("PCI-Express bandwidth available for this card is "
7505 "not sufficient for optimal performance.\n");
7506 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7510 /* reset the hardware with the new settings */
7511 err = hw->mac.ops.start_hw(hw);
7512 if (err == IXGBE_ERR_EEPROM_VERSION) {
7513 /* We are running on a pre-production device, log a warning */
7514 e_dev_warn("This device is a pre-production adapter/LOM. "
7515 "Please be aware there may be issues associated "
7516 "with your hardware. If you are experiencing "
7517 "problems please contact your Intel or hardware "
7518 "representative who provided you with this "
7521 strcpy(netdev->name, "eth%d");
7522 err = register_netdev(netdev);
7526 /* power down the optics for 82599 SFP+ fiber */
7527 if (hw->mac.ops.disable_tx_laser)
7528 hw->mac.ops.disable_tx_laser(hw);
7530 /* carrier off reporting is important to ethtool even BEFORE open */
7531 netif_carrier_off(netdev);
7533 #ifdef CONFIG_IXGBE_DCA
7534 if (dca_add_requester(&pdev->dev) == 0) {
7535 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7536 ixgbe_setup_dca(adapter);
7539 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7540 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7541 for (i = 0; i < adapter->num_vfs; i++)
7542 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7545 /* firmware requires driver version to be 0xFFFFFFFF
7546 * since os does not support feature
7548 if (hw->mac.ops.set_fw_drv_ver)
7549 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7552 /* add san mac addr to netdev */
7553 ixgbe_add_sanmac_netdev(netdev);
7555 e_dev_info("%s\n", ixgbe_default_device_descr);
7558 #ifdef CONFIG_IXGBE_HWMON
7559 if (ixgbe_sysfs_init(adapter))
7560 e_err(probe, "failed to allocate sysfs resources\n");
7561 #endif /* CONFIG_IXGBE_HWMON */
7563 #ifdef CONFIG_DEBUG_FS
7564 ixgbe_dbg_adapter_init(adapter);
7565 #endif /* CONFIG_DEBUG_FS */
7570 ixgbe_release_hw_control(adapter);
7571 ixgbe_clear_interrupt_scheme(adapter);
7573 ixgbe_disable_sriov(adapter);
7574 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7575 iounmap(hw->hw_addr);
7577 free_netdev(netdev);
7579 pci_release_selected_regions(pdev,
7580 pci_select_bars(pdev, IORESOURCE_MEM));
7583 pci_disable_device(pdev);
7588 * ixgbe_remove - Device Removal Routine
7589 * @pdev: PCI device information struct
7591 * ixgbe_remove is called by the PCI subsystem to alert the driver
7592 * that it should release a PCI device. The could be caused by a
7593 * Hot-Plug event, or because the driver is going to be removed from
7596 static void ixgbe_remove(struct pci_dev *pdev)
7598 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7599 struct net_device *netdev = adapter->netdev;
7601 #ifdef CONFIG_DEBUG_FS
7602 ixgbe_dbg_adapter_exit(adapter);
7603 #endif /*CONFIG_DEBUG_FS */
7605 set_bit(__IXGBE_DOWN, &adapter->state);
7606 cancel_work_sync(&adapter->service_task);
7609 #ifdef CONFIG_IXGBE_DCA
7610 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7611 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7612 dca_remove_requester(&pdev->dev);
7613 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7617 #ifdef CONFIG_IXGBE_HWMON
7618 ixgbe_sysfs_exit(adapter);
7619 #endif /* CONFIG_IXGBE_HWMON */
7621 /* remove the added san mac */
7622 ixgbe_del_sanmac_netdev(netdev);
7624 if (netdev->reg_state == NETREG_REGISTERED)
7625 unregister_netdev(netdev);
7627 ixgbe_disable_sriov(adapter);
7629 ixgbe_clear_interrupt_scheme(adapter);
7631 ixgbe_release_hw_control(adapter);
7634 kfree(adapter->ixgbe_ieee_pfc);
7635 kfree(adapter->ixgbe_ieee_ets);
7638 iounmap(adapter->hw.hw_addr);
7639 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7642 e_dev_info("complete\n");
7644 free_netdev(netdev);
7646 pci_disable_pcie_error_reporting(pdev);
7648 pci_disable_device(pdev);
7652 * ixgbe_io_error_detected - called when PCI error is detected
7653 * @pdev: Pointer to PCI device
7654 * @state: The current pci connection state
7656 * This function is called after a PCI bus error affecting
7657 * this device has been detected.
7659 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7660 pci_channel_state_t state)
7662 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7663 struct net_device *netdev = adapter->netdev;
7665 #ifdef CONFIG_PCI_IOV
7666 struct pci_dev *bdev, *vfdev;
7667 u32 dw0, dw1, dw2, dw3;
7669 u16 req_id, pf_func;
7671 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7672 adapter->num_vfs == 0)
7673 goto skip_bad_vf_detection;
7675 bdev = pdev->bus->self;
7676 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
7677 bdev = bdev->bus->self;
7680 goto skip_bad_vf_detection;
7682 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7684 goto skip_bad_vf_detection;
7686 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7687 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7688 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7689 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7692 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7693 if (!(req_id & 0x0080))
7694 goto skip_bad_vf_detection;
7696 pf_func = req_id & 0x01;
7697 if ((pf_func & 1) == (pdev->devfn & 1)) {
7698 unsigned int device_id;
7700 vf = (req_id & 0x7F) >> 1;
7701 e_dev_err("VF %d has caused a PCIe error\n", vf);
7702 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7703 "%8.8x\tdw3: %8.8x\n",
7704 dw0, dw1, dw2, dw3);
7705 switch (adapter->hw.mac.type) {
7706 case ixgbe_mac_82599EB:
7707 device_id = IXGBE_82599_VF_DEVICE_ID;
7709 case ixgbe_mac_X540:
7710 device_id = IXGBE_X540_VF_DEVICE_ID;
7717 /* Find the pci device of the offending VF */
7718 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
7720 if (vfdev->devfn == (req_id & 0xFF))
7722 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
7726 * There's a slim chance the VF could have been hot plugged,
7727 * so if it is no longer present we don't need to issue the
7728 * VFLR. Just clean up the AER in that case.
7731 e_dev_err("Issuing VFLR to VF %d\n", vf);
7732 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7735 pci_cleanup_aer_uncorrect_error_status(pdev);
7739 * Even though the error may have occurred on the other port
7740 * we still need to increment the vf error reference count for
7741 * both ports because the I/O resume function will be called
7744 adapter->vferr_refcount++;
7746 return PCI_ERS_RESULT_RECOVERED;
7748 skip_bad_vf_detection:
7749 #endif /* CONFIG_PCI_IOV */
7750 netif_device_detach(netdev);
7752 if (state == pci_channel_io_perm_failure)
7753 return PCI_ERS_RESULT_DISCONNECT;
7755 if (netif_running(netdev))
7756 ixgbe_down(adapter);
7757 pci_disable_device(pdev);
7759 /* Request a slot reset. */
7760 return PCI_ERS_RESULT_NEED_RESET;
7764 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7765 * @pdev: Pointer to PCI device
7767 * Restart the card from scratch, as if from a cold-boot.
7769 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7771 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7772 pci_ers_result_t result;
7775 if (pci_enable_device_mem(pdev)) {
7776 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7777 result = PCI_ERS_RESULT_DISCONNECT;
7779 pci_set_master(pdev);
7780 pci_restore_state(pdev);
7781 pci_save_state(pdev);
7783 pci_wake_from_d3(pdev, false);
7785 ixgbe_reset(adapter);
7786 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7787 result = PCI_ERS_RESULT_RECOVERED;
7790 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7792 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7793 "failed 0x%0x\n", err);
7794 /* non-fatal, continue */
7801 * ixgbe_io_resume - called when traffic can start flowing again.
7802 * @pdev: Pointer to PCI device
7804 * This callback is called when the error recovery driver tells us that
7805 * its OK to resume normal operation.
7807 static void ixgbe_io_resume(struct pci_dev *pdev)
7809 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7810 struct net_device *netdev = adapter->netdev;
7812 #ifdef CONFIG_PCI_IOV
7813 if (adapter->vferr_refcount) {
7814 e_info(drv, "Resuming after VF err\n");
7815 adapter->vferr_refcount--;
7820 if (netif_running(netdev))
7823 netif_device_attach(netdev);
7826 static const struct pci_error_handlers ixgbe_err_handler = {
7827 .error_detected = ixgbe_io_error_detected,
7828 .slot_reset = ixgbe_io_slot_reset,
7829 .resume = ixgbe_io_resume,
7832 static struct pci_driver ixgbe_driver = {
7833 .name = ixgbe_driver_name,
7834 .id_table = ixgbe_pci_tbl,
7835 .probe = ixgbe_probe,
7836 .remove = ixgbe_remove,
7838 .suspend = ixgbe_suspend,
7839 .resume = ixgbe_resume,
7841 .shutdown = ixgbe_shutdown,
7842 .err_handler = &ixgbe_err_handler
7846 * ixgbe_init_module - Driver Registration Routine
7848 * ixgbe_init_module is the first routine called when the driver is
7849 * loaded. All it does is register with the PCI subsystem.
7851 static int __init ixgbe_init_module(void)
7854 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7855 pr_info("%s\n", ixgbe_copyright);
7857 #ifdef CONFIG_DEBUG_FS
7859 #endif /* CONFIG_DEBUG_FS */
7861 #ifdef CONFIG_IXGBE_DCA
7862 dca_register_notify(&dca_notifier);
7865 ret = pci_register_driver(&ixgbe_driver);
7869 module_init(ixgbe_init_module);
7872 * ixgbe_exit_module - Driver Exit Cleanup Routine
7874 * ixgbe_exit_module is called just before the driver is removed
7877 static void __exit ixgbe_exit_module(void)
7879 #ifdef CONFIG_IXGBE_DCA
7880 dca_unregister_notify(&dca_notifier);
7882 pci_unregister_driver(&ixgbe_driver);
7884 #ifdef CONFIG_DEBUG_FS
7886 #endif /* CONFIG_DEBUG_FS */
7888 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7891 #ifdef CONFIG_IXGBE_DCA
7892 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7897 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7898 __ixgbe_notify_dca);
7900 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7903 #endif /* CONFIG_IXGBE_DCA */
7905 module_exit(ixgbe_exit_module);