2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
46 struct mlx5_flow_handle *
47 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
48 struct mlx5_flow_spec *spec,
49 struct mlx5_esw_flow_attr *attr)
51 struct mlx5_flow_destination dest[2] = {};
52 struct mlx5_flow_act flow_act = {0};
53 struct mlx5_fc *counter = NULL;
54 struct mlx5_flow_handle *rule;
58 if (esw->mode != SRIOV_OFFLOADS)
59 return ERR_PTR(-EOPNOTSUPP);
61 /* per flow vlan pop/push is emulated, don't set that into the firmware */
62 flow_act.action = attr->action & ~(MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH | MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
64 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
65 dest[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
66 dest[i].vport_num = attr->out_rep->vport;
69 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
70 counter = mlx5_fc_create(esw->dev, true);
71 if (IS_ERR(counter)) {
72 rule = ERR_CAST(counter);
73 goto err_counter_alloc;
75 dest[i].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
76 dest[i].counter = counter;
80 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
81 MLX5_SET(fte_match_set_misc, misc, source_port, attr->in_rep->vport);
83 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
84 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
86 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS |
87 MLX5_MATCH_MISC_PARAMETERS;
88 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_DECAP)
89 spec->match_criteria_enable |= MLX5_MATCH_INNER_HEADERS;
91 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
92 flow_act.modify_id = attr->mod_hdr_id;
94 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)
95 flow_act.encap_id = attr->encap_id;
97 rule = mlx5_add_flow_rules((struct mlx5_flow_table *)esw->fdb_table.fdb,
98 spec, &flow_act, dest, i);
102 esw->offloads.num_flows++;
107 mlx5_fc_destroy(esw->dev, counter);
113 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
114 struct mlx5_flow_handle *rule,
115 struct mlx5_esw_flow_attr *attr)
117 struct mlx5_fc *counter = NULL;
119 counter = mlx5_flow_rule_counter(rule);
120 mlx5_del_flow_rules(rule);
121 mlx5_fc_destroy(esw->dev, counter);
122 esw->offloads.num_flows--;
125 static int esw_set_global_vlan_pop(struct mlx5_eswitch *esw, u8 val)
127 struct mlx5_eswitch_rep *rep;
128 int vf_vport, err = 0;
130 esw_debug(esw->dev, "%s applying global %s policy\n", __func__, val ? "pop" : "none");
131 for (vf_vport = 1; vf_vport < esw->enabled_vports; vf_vport++) {
132 rep = &esw->offloads.vport_reps[vf_vport];
136 err = __mlx5_eswitch_set_vport_vlan(esw, rep->vport, 0, 0, val);
145 static struct mlx5_eswitch_rep *
146 esw_vlan_action_get_vport(struct mlx5_esw_flow_attr *attr, bool push, bool pop)
148 struct mlx5_eswitch_rep *in_rep, *out_rep, *vport = NULL;
150 in_rep = attr->in_rep;
151 out_rep = attr->out_rep;
163 static int esw_add_vlan_action_check(struct mlx5_esw_flow_attr *attr,
164 bool push, bool pop, bool fwd)
166 struct mlx5_eswitch_rep *in_rep, *out_rep;
168 if ((push || pop) && !fwd)
171 in_rep = attr->in_rep;
172 out_rep = attr->out_rep;
174 if (push && in_rep->vport == FDB_UPLINK_VPORT)
177 if (pop && out_rep->vport == FDB_UPLINK_VPORT)
180 /* vport has vlan push configured, can't offload VF --> wire rules w.o it */
181 if (!push && !pop && fwd)
182 if (in_rep->vlan && out_rep->vport == FDB_UPLINK_VPORT)
185 /* protects against (1) setting rules with different vlans to push and
186 * (2) setting rules w.o vlans (attr->vlan = 0) && w. vlans to push (!= 0)
188 if (push && in_rep->vlan_refcount && (in_rep->vlan != attr->vlan))
197 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
198 struct mlx5_esw_flow_attr *attr)
200 struct offloads_fdb *offloads = &esw->fdb_table.offloads;
201 struct mlx5_eswitch_rep *vport = NULL;
205 push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
206 pop = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
207 fwd = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST);
209 err = esw_add_vlan_action_check(attr, push, pop, fwd);
213 attr->vlan_handled = false;
215 vport = esw_vlan_action_get_vport(attr, push, pop);
217 if (!push && !pop && fwd) {
218 /* tracks VF --> wire rules without vlan push action */
219 if (attr->out_rep->vport == FDB_UPLINK_VPORT) {
220 vport->vlan_refcount++;
221 attr->vlan_handled = true;
230 if (!(offloads->vlan_push_pop_refcount)) {
231 /* it's the 1st vlan rule, apply global vlan pop policy */
232 err = esw_set_global_vlan_pop(esw, SET_VLAN_STRIP);
236 offloads->vlan_push_pop_refcount++;
239 if (vport->vlan_refcount)
242 err = __mlx5_eswitch_set_vport_vlan(esw, vport->vport, attr->vlan, 0,
243 SET_VLAN_INSERT | SET_VLAN_STRIP);
246 vport->vlan = attr->vlan;
248 vport->vlan_refcount++;
252 attr->vlan_handled = true;
256 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
257 struct mlx5_esw_flow_attr *attr)
259 struct offloads_fdb *offloads = &esw->fdb_table.offloads;
260 struct mlx5_eswitch_rep *vport = NULL;
264 if (!attr->vlan_handled)
267 push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
268 pop = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
269 fwd = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST);
271 vport = esw_vlan_action_get_vport(attr, push, pop);
273 if (!push && !pop && fwd) {
274 /* tracks VF --> wire rules without vlan push action */
275 if (attr->out_rep->vport == FDB_UPLINK_VPORT)
276 vport->vlan_refcount--;
282 vport->vlan_refcount--;
283 if (vport->vlan_refcount)
284 goto skip_unset_push;
287 err = __mlx5_eswitch_set_vport_vlan(esw, vport->vport,
288 0, 0, SET_VLAN_STRIP);
294 offloads->vlan_push_pop_refcount--;
295 if (offloads->vlan_push_pop_refcount)
298 /* no more vlan rules, stop global vlan pop policy */
299 err = esw_set_global_vlan_pop(esw, 0);
305 static struct mlx5_flow_handle *
306 mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw, int vport, u32 sqn)
308 struct mlx5_flow_act flow_act = {0};
309 struct mlx5_flow_destination dest;
310 struct mlx5_flow_handle *flow_rule;
311 struct mlx5_flow_spec *spec;
314 spec = mlx5_vzalloc(sizeof(*spec));
316 esw_warn(esw->dev, "FDB: Failed to alloc match parameters\n");
317 flow_rule = ERR_PTR(-ENOMEM);
321 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
322 MLX5_SET(fte_match_set_misc, misc, source_sqn, sqn);
323 MLX5_SET(fte_match_set_misc, misc, source_port, 0x0); /* source vport is 0 */
325 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
326 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_sqn);
327 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
329 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
330 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
331 dest.vport_num = vport;
332 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
334 flow_rule = mlx5_add_flow_rules(esw->fdb_table.offloads.fdb, spec,
335 &flow_act, &dest, 1);
336 if (IS_ERR(flow_rule))
337 esw_warn(esw->dev, "FDB: Failed to add send to vport rule err %ld\n", PTR_ERR(flow_rule));
343 void mlx5_eswitch_sqs2vport_stop(struct mlx5_eswitch *esw,
344 struct mlx5_eswitch_rep *rep)
346 struct mlx5_esw_sq *esw_sq, *tmp;
348 if (esw->mode != SRIOV_OFFLOADS)
351 list_for_each_entry_safe(esw_sq, tmp, &rep->vport_sqs_list, list) {
352 mlx5_del_flow_rules(esw_sq->send_to_vport_rule);
353 list_del(&esw_sq->list);
358 int mlx5_eswitch_sqs2vport_start(struct mlx5_eswitch *esw,
359 struct mlx5_eswitch_rep *rep,
360 u16 *sqns_array, int sqns_num)
362 struct mlx5_flow_handle *flow_rule;
363 struct mlx5_esw_sq *esw_sq;
367 if (esw->mode != SRIOV_OFFLOADS)
370 for (i = 0; i < sqns_num; i++) {
371 esw_sq = kzalloc(sizeof(*esw_sq), GFP_KERNEL);
377 /* Add re-inject rule to the PF/representor sqs */
378 flow_rule = mlx5_eswitch_add_send_to_vport_rule(esw,
381 if (IS_ERR(flow_rule)) {
382 err = PTR_ERR(flow_rule);
386 esw_sq->send_to_vport_rule = flow_rule;
387 list_add(&esw_sq->list, &rep->vport_sqs_list);
392 mlx5_eswitch_sqs2vport_stop(esw, rep);
396 static int esw_add_fdb_miss_rule(struct mlx5_eswitch *esw)
398 struct mlx5_flow_act flow_act = {0};
399 struct mlx5_flow_destination dest;
400 struct mlx5_flow_handle *flow_rule = NULL;
401 struct mlx5_flow_spec *spec;
404 spec = mlx5_vzalloc(sizeof(*spec));
406 esw_warn(esw->dev, "FDB: Failed to alloc match parameters\n");
411 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
413 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
415 flow_rule = mlx5_add_flow_rules(esw->fdb_table.offloads.fdb, spec,
416 &flow_act, &dest, 1);
417 if (IS_ERR(flow_rule)) {
418 err = PTR_ERR(flow_rule);
419 esw_warn(esw->dev, "FDB: Failed to add miss flow rule err %d\n", err);
423 esw->fdb_table.offloads.miss_rule = flow_rule;
429 #define ESW_OFFLOADS_NUM_GROUPS 4
431 static int esw_create_offloads_fast_fdb_table(struct mlx5_eswitch *esw)
433 struct mlx5_core_dev *dev = esw->dev;
434 struct mlx5_flow_namespace *root_ns;
435 struct mlx5_flow_table *fdb = NULL;
436 int esw_size, err = 0;
439 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
441 esw_warn(dev, "Failed to get FDB flow namespace\n");
446 esw_debug(dev, "Create offloads FDB table, min (max esw size(2^%d), max counters(%d)*groups(%d))\n",
447 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size),
448 MLX5_CAP_GEN(dev, max_flow_counter), ESW_OFFLOADS_NUM_GROUPS);
450 esw_size = min_t(int, MLX5_CAP_GEN(dev, max_flow_counter) * ESW_OFFLOADS_NUM_GROUPS,
451 1 << MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
453 if (esw->offloads.encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE)
454 flags |= MLX5_FLOW_TABLE_TUNNEL_EN;
456 fdb = mlx5_create_auto_grouped_flow_table(root_ns, FDB_FAST_PATH,
458 ESW_OFFLOADS_NUM_GROUPS, 0,
462 esw_warn(dev, "Failed to create Fast path FDB Table err %d\n", err);
465 esw->fdb_table.fdb = fdb;
471 static void esw_destroy_offloads_fast_fdb_table(struct mlx5_eswitch *esw)
473 mlx5_destroy_flow_table(esw->fdb_table.fdb);
476 #define MAX_PF_SQ 256
478 static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw, int nvports)
480 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
481 struct mlx5_flow_table_attr ft_attr = {};
482 struct mlx5_core_dev *dev = esw->dev;
483 struct mlx5_flow_namespace *root_ns;
484 struct mlx5_flow_table *fdb = NULL;
485 int table_size, ix, err = 0;
486 struct mlx5_flow_group *g;
487 void *match_criteria;
490 esw_debug(esw->dev, "Create offloads FDB Tables\n");
491 flow_group_in = mlx5_vzalloc(inlen);
495 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
497 esw_warn(dev, "Failed to get FDB flow namespace\n");
502 err = esw_create_offloads_fast_fdb_table(esw);
506 table_size = nvports + MAX_PF_SQ + 1;
508 ft_attr.max_fte = table_size;
509 ft_attr.prio = FDB_SLOW_PATH;
511 fdb = mlx5_create_flow_table(root_ns, &ft_attr);
514 esw_warn(dev, "Failed to create slow path FDB Table err %d\n", err);
517 esw->fdb_table.offloads.fdb = fdb;
519 /* create send-to-vport group */
520 memset(flow_group_in, 0, inlen);
521 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
522 MLX5_MATCH_MISC_PARAMETERS);
524 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
526 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_sqn);
527 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
529 ix = nvports + MAX_PF_SQ;
530 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
531 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix - 1);
533 g = mlx5_create_flow_group(fdb, flow_group_in);
536 esw_warn(dev, "Failed to create send-to-vport flow group err(%d)\n", err);
539 esw->fdb_table.offloads.send_to_vport_grp = g;
541 /* create miss group */
542 memset(flow_group_in, 0, inlen);
543 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, 0);
545 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, ix);
546 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix + 1);
548 g = mlx5_create_flow_group(fdb, flow_group_in);
551 esw_warn(dev, "Failed to create miss flow group err(%d)\n", err);
554 esw->fdb_table.offloads.miss_grp = g;
556 err = esw_add_fdb_miss_rule(esw);
563 mlx5_destroy_flow_group(esw->fdb_table.offloads.miss_grp);
565 mlx5_destroy_flow_group(esw->fdb_table.offloads.send_to_vport_grp);
567 mlx5_destroy_flow_table(esw->fdb_table.offloads.fdb);
569 mlx5_destroy_flow_table(esw->fdb_table.fdb);
572 kvfree(flow_group_in);
576 static void esw_destroy_offloads_fdb_tables(struct mlx5_eswitch *esw)
578 if (!esw->fdb_table.fdb)
581 esw_debug(esw->dev, "Destroy offloads FDB Tables\n");
582 mlx5_del_flow_rules(esw->fdb_table.offloads.miss_rule);
583 mlx5_destroy_flow_group(esw->fdb_table.offloads.send_to_vport_grp);
584 mlx5_destroy_flow_group(esw->fdb_table.offloads.miss_grp);
586 mlx5_destroy_flow_table(esw->fdb_table.offloads.fdb);
587 esw_destroy_offloads_fast_fdb_table(esw);
590 static int esw_create_offloads_table(struct mlx5_eswitch *esw)
592 struct mlx5_flow_table_attr ft_attr = {};
593 struct mlx5_core_dev *dev = esw->dev;
594 struct mlx5_flow_table *ft_offloads;
595 struct mlx5_flow_namespace *ns;
598 ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_OFFLOADS);
600 esw_warn(esw->dev, "Failed to get offloads flow namespace\n");
604 ft_attr.max_fte = dev->priv.sriov.num_vfs + 2;
606 ft_offloads = mlx5_create_flow_table(ns, &ft_attr);
607 if (IS_ERR(ft_offloads)) {
608 err = PTR_ERR(ft_offloads);
609 esw_warn(esw->dev, "Failed to create offloads table, err %d\n", err);
613 esw->offloads.ft_offloads = ft_offloads;
617 static void esw_destroy_offloads_table(struct mlx5_eswitch *esw)
619 struct mlx5_esw_offload *offloads = &esw->offloads;
621 mlx5_destroy_flow_table(offloads->ft_offloads);
624 static int esw_create_vport_rx_group(struct mlx5_eswitch *esw)
626 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
627 struct mlx5_flow_group *g;
628 struct mlx5_priv *priv = &esw->dev->priv;
630 void *match_criteria, *misc;
632 int nvports = priv->sriov.num_vfs + 2;
634 flow_group_in = mlx5_vzalloc(inlen);
638 /* create vport rx group */
639 memset(flow_group_in, 0, inlen);
640 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
641 MLX5_MATCH_MISC_PARAMETERS);
643 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
644 misc = MLX5_ADDR_OF(fte_match_param, match_criteria, misc_parameters);
645 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
647 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
648 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, nvports - 1);
650 g = mlx5_create_flow_group(esw->offloads.ft_offloads, flow_group_in);
654 mlx5_core_warn(esw->dev, "Failed to create vport rx group err %d\n", err);
658 esw->offloads.vport_rx_group = g;
660 kfree(flow_group_in);
664 static void esw_destroy_vport_rx_group(struct mlx5_eswitch *esw)
666 mlx5_destroy_flow_group(esw->offloads.vport_rx_group);
669 struct mlx5_flow_handle *
670 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn)
672 struct mlx5_flow_act flow_act = {0};
673 struct mlx5_flow_destination dest;
674 struct mlx5_flow_handle *flow_rule;
675 struct mlx5_flow_spec *spec;
678 spec = mlx5_vzalloc(sizeof(*spec));
680 esw_warn(esw->dev, "Failed to alloc match parameters\n");
681 flow_rule = ERR_PTR(-ENOMEM);
685 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
686 MLX5_SET(fte_match_set_misc, misc, source_port, vport);
688 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
689 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
691 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
692 dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR;
695 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
696 flow_rule = mlx5_add_flow_rules(esw->offloads.ft_offloads, spec,
697 &flow_act, &dest, 1);
698 if (IS_ERR(flow_rule)) {
699 esw_warn(esw->dev, "fs offloads: Failed to add vport rx rule err %ld\n", PTR_ERR(flow_rule));
708 static int esw_offloads_start(struct mlx5_eswitch *esw)
710 int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
712 if (esw->mode != SRIOV_LEGACY) {
713 esw_warn(esw->dev, "Can't set offloads mode, SRIOV legacy not enabled\n");
717 mlx5_eswitch_disable_sriov(esw);
718 err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_OFFLOADS);
720 esw_warn(esw->dev, "Failed setting eswitch to offloads, err %d\n", err);
721 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
723 esw_warn(esw->dev, "Failed setting eswitch back to legacy, err %d\n", err1);
725 if (esw->offloads.inline_mode == MLX5_INLINE_MODE_NONE) {
726 if (mlx5_eswitch_inline_mode_get(esw,
728 &esw->offloads.inline_mode)) {
729 esw->offloads.inline_mode = MLX5_INLINE_MODE_L2;
730 esw_warn(esw->dev, "Inline mode is different between vports\n");
736 int esw_offloads_init(struct mlx5_eswitch *esw, int nvports)
738 struct mlx5_eswitch_rep *rep;
742 /* disable PF RoCE so missed packets don't go through RoCE steering */
743 mlx5_dev_list_lock();
744 mlx5_remove_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
745 mlx5_dev_list_unlock();
747 err = esw_create_offloads_fdb_tables(esw, nvports);
751 err = esw_create_offloads_table(esw);
755 err = esw_create_vport_rx_group(esw);
759 for (vport = 0; vport < nvports; vport++) {
760 rep = &esw->offloads.vport_reps[vport];
764 err = rep->load(esw, rep);
772 for (vport--; vport >= 0; vport--) {
773 rep = &esw->offloads.vport_reps[vport];
776 rep->unload(esw, rep);
778 esw_destroy_vport_rx_group(esw);
781 esw_destroy_offloads_table(esw);
784 esw_destroy_offloads_fdb_tables(esw);
787 /* enable back PF RoCE */
788 mlx5_dev_list_lock();
789 mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
790 mlx5_dev_list_unlock();
795 static int esw_offloads_stop(struct mlx5_eswitch *esw)
797 int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
799 mlx5_eswitch_disable_sriov(esw);
800 err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
802 esw_warn(esw->dev, "Failed setting eswitch to legacy, err %d\n", err);
803 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_OFFLOADS);
805 esw_warn(esw->dev, "Failed setting eswitch back to offloads, err %d\n", err);
808 /* enable back PF RoCE */
809 mlx5_dev_list_lock();
810 mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
811 mlx5_dev_list_unlock();
816 void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports)
818 struct mlx5_eswitch_rep *rep;
821 for (vport = 0; vport < nvports; vport++) {
822 rep = &esw->offloads.vport_reps[vport];
825 rep->unload(esw, rep);
828 esw_destroy_vport_rx_group(esw);
829 esw_destroy_offloads_table(esw);
830 esw_destroy_offloads_fdb_tables(esw);
833 static int esw_mode_from_devlink(u16 mode, u16 *mlx5_mode)
836 case DEVLINK_ESWITCH_MODE_LEGACY:
837 *mlx5_mode = SRIOV_LEGACY;
839 case DEVLINK_ESWITCH_MODE_SWITCHDEV:
840 *mlx5_mode = SRIOV_OFFLOADS;
849 static int esw_mode_to_devlink(u16 mlx5_mode, u16 *mode)
853 *mode = DEVLINK_ESWITCH_MODE_LEGACY;
856 *mode = DEVLINK_ESWITCH_MODE_SWITCHDEV;
865 static int esw_inline_mode_from_devlink(u8 mode, u8 *mlx5_mode)
868 case DEVLINK_ESWITCH_INLINE_MODE_NONE:
869 *mlx5_mode = MLX5_INLINE_MODE_NONE;
871 case DEVLINK_ESWITCH_INLINE_MODE_LINK:
872 *mlx5_mode = MLX5_INLINE_MODE_L2;
874 case DEVLINK_ESWITCH_INLINE_MODE_NETWORK:
875 *mlx5_mode = MLX5_INLINE_MODE_IP;
877 case DEVLINK_ESWITCH_INLINE_MODE_TRANSPORT:
878 *mlx5_mode = MLX5_INLINE_MODE_TCP_UDP;
887 static int esw_inline_mode_to_devlink(u8 mlx5_mode, u8 *mode)
890 case MLX5_INLINE_MODE_NONE:
891 *mode = DEVLINK_ESWITCH_INLINE_MODE_NONE;
893 case MLX5_INLINE_MODE_L2:
894 *mode = DEVLINK_ESWITCH_INLINE_MODE_LINK;
896 case MLX5_INLINE_MODE_IP:
897 *mode = DEVLINK_ESWITCH_INLINE_MODE_NETWORK;
899 case MLX5_INLINE_MODE_TCP_UDP:
900 *mode = DEVLINK_ESWITCH_INLINE_MODE_TRANSPORT;
909 static int mlx5_devlink_eswitch_check(struct devlink *devlink)
911 struct mlx5_core_dev *dev = devlink_priv(devlink);
913 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
916 if (!MLX5_CAP_GEN(dev, vport_group_manager))
919 if (dev->priv.eswitch->mode == SRIOV_NONE)
925 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
927 struct mlx5_core_dev *dev = devlink_priv(devlink);
928 u16 cur_mlx5_mode, mlx5_mode = 0;
931 err = mlx5_devlink_eswitch_check(devlink);
935 cur_mlx5_mode = dev->priv.eswitch->mode;
937 if (esw_mode_from_devlink(mode, &mlx5_mode))
940 if (cur_mlx5_mode == mlx5_mode)
943 if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV)
944 return esw_offloads_start(dev->priv.eswitch);
945 else if (mode == DEVLINK_ESWITCH_MODE_LEGACY)
946 return esw_offloads_stop(dev->priv.eswitch);
951 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
953 struct mlx5_core_dev *dev = devlink_priv(devlink);
956 err = mlx5_devlink_eswitch_check(devlink);
960 return esw_mode_to_devlink(dev->priv.eswitch->mode, mode);
963 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode)
965 struct mlx5_core_dev *dev = devlink_priv(devlink);
966 struct mlx5_eswitch *esw = dev->priv.eswitch;
970 err = mlx5_devlink_eswitch_check(devlink);
974 switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) {
975 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
976 if (mode == DEVLINK_ESWITCH_INLINE_MODE_NONE)
979 case MLX5_CAP_INLINE_MODE_L2:
980 esw_warn(dev, "Inline mode can't be set\n");
982 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
986 if (esw->offloads.num_flows > 0) {
987 esw_warn(dev, "Can't set inline mode when flows are configured\n");
991 err = esw_inline_mode_from_devlink(mode, &mlx5_mode);
995 for (vport = 1; vport < esw->enabled_vports; vport++) {
996 err = mlx5_modify_nic_vport_min_inline(dev, vport, mlx5_mode);
998 esw_warn(dev, "Failed to set min inline on vport %d\n",
1000 goto revert_inline_mode;
1004 esw->offloads.inline_mode = mlx5_mode;
1009 mlx5_modify_nic_vport_min_inline(dev,
1011 esw->offloads.inline_mode);
1016 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)
1018 struct mlx5_core_dev *dev = devlink_priv(devlink);
1019 struct mlx5_eswitch *esw = dev->priv.eswitch;
1022 err = mlx5_devlink_eswitch_check(devlink);
1026 return esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode);
1029 int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch *esw, int nvfs, u8 *mode)
1031 u8 prev_mlx5_mode, mlx5_mode = MLX5_INLINE_MODE_L2;
1032 struct mlx5_core_dev *dev = esw->dev;
1035 if (!MLX5_CAP_GEN(dev, vport_group_manager))
1038 if (esw->mode == SRIOV_NONE)
1041 switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) {
1042 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1043 mlx5_mode = MLX5_INLINE_MODE_NONE;
1045 case MLX5_CAP_INLINE_MODE_L2:
1046 mlx5_mode = MLX5_INLINE_MODE_L2;
1048 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1053 for (vport = 1; vport <= nvfs; vport++) {
1054 mlx5_query_nic_vport_min_inline(dev, vport, &mlx5_mode);
1055 if (vport > 1 && prev_mlx5_mode != mlx5_mode)
1057 prev_mlx5_mode = mlx5_mode;
1065 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap)
1067 struct mlx5_core_dev *dev = devlink_priv(devlink);
1068 struct mlx5_eswitch *esw = dev->priv.eswitch;
1071 err = mlx5_devlink_eswitch_check(devlink);
1075 if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE &&
1076 (!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) ||
1077 !MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap)))
1080 if (encap && encap != DEVLINK_ESWITCH_ENCAP_MODE_BASIC)
1083 if (esw->mode == SRIOV_LEGACY) {
1084 esw->offloads.encap = encap;
1088 if (esw->offloads.encap == encap)
1091 if (esw->offloads.num_flows > 0) {
1092 esw_warn(dev, "Can't set encapsulation when flows are configured\n");
1096 esw_destroy_offloads_fast_fdb_table(esw);
1098 esw->offloads.encap = encap;
1099 err = esw_create_offloads_fast_fdb_table(esw);
1101 esw_warn(esw->dev, "Failed re-creating fast FDB table, err %d\n", err);
1102 esw->offloads.encap = !encap;
1103 (void) esw_create_offloads_fast_fdb_table(esw);
1108 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap)
1110 struct mlx5_core_dev *dev = devlink_priv(devlink);
1111 struct mlx5_eswitch *esw = dev->priv.eswitch;
1114 err = mlx5_devlink_eswitch_check(devlink);
1118 *encap = esw->offloads.encap;
1122 void mlx5_eswitch_register_vport_rep(struct mlx5_eswitch *esw,
1124 struct mlx5_eswitch_rep *__rep)
1126 struct mlx5_esw_offload *offloads = &esw->offloads;
1127 struct mlx5_eswitch_rep *rep;
1129 rep = &offloads->vport_reps[vport_index];
1131 memset(rep, 0, sizeof(*rep));
1133 rep->load = __rep->load;
1134 rep->unload = __rep->unload;
1135 rep->vport = __rep->vport;
1136 rep->netdev = __rep->netdev;
1137 ether_addr_copy(rep->hw_id, __rep->hw_id);
1139 INIT_LIST_HEAD(&rep->vport_sqs_list);
1143 void mlx5_eswitch_unregister_vport_rep(struct mlx5_eswitch *esw,
1146 struct mlx5_esw_offload *offloads = &esw->offloads;
1147 struct mlx5_eswitch_rep *rep;
1149 rep = &offloads->vport_reps[vport_index];
1151 if (esw->mode == SRIOV_OFFLOADS && esw->vports[vport_index].enabled)
1152 rep->unload(esw, rep);
1157 struct net_device *mlx5_eswitch_get_uplink_netdev(struct mlx5_eswitch *esw)
1159 #define UPLINK_REP_INDEX 0
1160 struct mlx5_esw_offload *offloads = &esw->offloads;
1161 struct mlx5_eswitch_rep *rep;
1163 rep = &offloads->vport_reps[UPLINK_REP_INDEX];