2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 struct crb_addr_pair {
16 #define QLCNIC_MAX_CRB_XFORM 60
17 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
19 #define crb_addr_transform(name) \
20 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
21 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
23 #define QLCNIC_ADDR_ERROR (0xffffffff)
26 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
28 static void crb_addr_transform_setup(void)
30 crb_addr_transform(XDMA);
31 crb_addr_transform(TIMR);
32 crb_addr_transform(SRE);
33 crb_addr_transform(SQN3);
34 crb_addr_transform(SQN2);
35 crb_addr_transform(SQN1);
36 crb_addr_transform(SQN0);
37 crb_addr_transform(SQS3);
38 crb_addr_transform(SQS2);
39 crb_addr_transform(SQS1);
40 crb_addr_transform(SQS0);
41 crb_addr_transform(RPMX7);
42 crb_addr_transform(RPMX6);
43 crb_addr_transform(RPMX5);
44 crb_addr_transform(RPMX4);
45 crb_addr_transform(RPMX3);
46 crb_addr_transform(RPMX2);
47 crb_addr_transform(RPMX1);
48 crb_addr_transform(RPMX0);
49 crb_addr_transform(ROMUSB);
50 crb_addr_transform(SN);
51 crb_addr_transform(QMN);
52 crb_addr_transform(QMS);
53 crb_addr_transform(PGNI);
54 crb_addr_transform(PGND);
55 crb_addr_transform(PGN3);
56 crb_addr_transform(PGN2);
57 crb_addr_transform(PGN1);
58 crb_addr_transform(PGN0);
59 crb_addr_transform(PGSI);
60 crb_addr_transform(PGSD);
61 crb_addr_transform(PGS3);
62 crb_addr_transform(PGS2);
63 crb_addr_transform(PGS1);
64 crb_addr_transform(PGS0);
65 crb_addr_transform(PS);
66 crb_addr_transform(PH);
67 crb_addr_transform(NIU);
68 crb_addr_transform(I2Q);
69 crb_addr_transform(EG);
70 crb_addr_transform(MN);
71 crb_addr_transform(MS);
72 crb_addr_transform(CAS2);
73 crb_addr_transform(CAS1);
74 crb_addr_transform(CAS0);
75 crb_addr_transform(CAM);
76 crb_addr_transform(C2C1);
77 crb_addr_transform(C2C0);
78 crb_addr_transform(SMB);
79 crb_addr_transform(OCM0);
80 crb_addr_transform(I2C0);
83 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
85 struct qlcnic_recv_context *recv_ctx;
86 struct qlcnic_host_rds_ring *rds_ring;
87 struct qlcnic_rx_buffer *rx_buf;
90 recv_ctx = adapter->recv_ctx;
91 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
92 rds_ring = &recv_ctx->rds_rings[ring];
93 for (i = 0; i < rds_ring->num_desc; ++i) {
94 rx_buf = &(rds_ring->rx_buf_arr[i]);
95 if (rx_buf->skb == NULL)
98 pci_unmap_single(adapter->pdev,
103 dev_kfree_skb_any(rx_buf->skb);
108 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
110 struct qlcnic_recv_context *recv_ctx;
111 struct qlcnic_host_rds_ring *rds_ring;
112 struct qlcnic_rx_buffer *rx_buf;
115 recv_ctx = adapter->recv_ctx;
116 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
117 rds_ring = &recv_ctx->rds_rings[ring];
119 INIT_LIST_HEAD(&rds_ring->free_list);
121 rx_buf = rds_ring->rx_buf_arr;
122 for (i = 0; i < rds_ring->num_desc; i++) {
123 list_add_tail(&rx_buf->list,
124 &rds_ring->free_list);
130 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
131 struct qlcnic_host_tx_ring *tx_ring)
133 struct qlcnic_cmd_buffer *cmd_buf;
134 struct qlcnic_skb_frag *buffrag;
137 cmd_buf = tx_ring->cmd_buf_arr;
138 for (i = 0; i < tx_ring->num_desc; i++) {
139 buffrag = cmd_buf->frag_array;
141 pci_unmap_single(adapter->pdev, buffrag->dma,
142 buffrag->length, PCI_DMA_TODEVICE);
145 for (j = 1; j < cmd_buf->frag_count; j++) {
148 pci_unmap_page(adapter->pdev, buffrag->dma,
155 dev_kfree_skb_any(cmd_buf->skb);
162 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
164 struct qlcnic_recv_context *recv_ctx;
165 struct qlcnic_host_rds_ring *rds_ring;
168 recv_ctx = adapter->recv_ctx;
170 if (recv_ctx->rds_rings == NULL)
173 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
174 rds_ring = &recv_ctx->rds_rings[ring];
175 vfree(rds_ring->rx_buf_arr);
176 rds_ring->rx_buf_arr = NULL;
178 kfree(recv_ctx->rds_rings);
181 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
183 struct qlcnic_recv_context *recv_ctx;
184 struct qlcnic_host_rds_ring *rds_ring;
185 struct qlcnic_host_sds_ring *sds_ring;
186 struct qlcnic_rx_buffer *rx_buf;
189 recv_ctx = adapter->recv_ctx;
191 rds_ring = kcalloc(adapter->max_rds_rings,
192 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
193 if (rds_ring == NULL)
196 recv_ctx->rds_rings = rds_ring;
198 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
199 rds_ring = &recv_ctx->rds_rings[ring];
201 case RCV_RING_NORMAL:
202 rds_ring->num_desc = adapter->num_rxd;
203 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
204 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
208 rds_ring->num_desc = adapter->num_jumbo_rxd;
210 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
212 if (adapter->ahw->capabilities &
213 QLCNIC_FW_CAPABILITY_HW_LRO)
214 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
217 rds_ring->dma_size + NET_IP_ALIGN;
220 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
221 if (rds_ring->rx_buf_arr == NULL)
224 INIT_LIST_HEAD(&rds_ring->free_list);
226 * Now go through all of them, set reference handles
227 * and put them in the queues.
229 rx_buf = rds_ring->rx_buf_arr;
230 for (i = 0; i < rds_ring->num_desc; i++) {
231 list_add_tail(&rx_buf->list,
232 &rds_ring->free_list);
233 rx_buf->ref_handle = i;
236 spin_lock_init(&rds_ring->lock);
239 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
240 sds_ring = &recv_ctx->sds_rings[ring];
241 sds_ring->irq = adapter->msix_entries[ring].vector;
242 sds_ring->adapter = adapter;
243 sds_ring->num_desc = adapter->num_rxd;
244 if (qlcnic_82xx_check(adapter)) {
245 if (qlcnic_check_multi_tx(adapter) &&
246 !adapter->ahw->diag_test)
247 sds_ring->tx_ring = &adapter->tx_ring[ring];
249 sds_ring->tx_ring = &adapter->tx_ring[0];
251 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
252 INIT_LIST_HEAD(&sds_ring->free_list[i]);
258 qlcnic_free_sw_resources(adapter);
263 * Utility to translate from internal Phantom CRB address
264 * to external PCI CRB address.
266 static u32 qlcnic_decode_crb_addr(u32 addr)
269 u32 base_addr, offset, pci_base;
271 crb_addr_transform_setup();
273 pci_base = QLCNIC_ADDR_ERROR;
274 base_addr = addr & 0xfff00000;
275 offset = addr & 0x000fffff;
277 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
278 if (crb_addr_xform[i] == base_addr) {
283 if (pci_base == QLCNIC_ADDR_ERROR)
286 return pci_base + offset;
289 #define QLCNIC_MAX_ROM_WAIT_USEC 100
291 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
299 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
301 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
302 dev_err(&adapter->pdev->dev,
303 "Timeout reached waiting for rom done");
311 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
316 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
317 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
318 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
319 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
320 if (qlcnic_wait_rom_done(adapter)) {
321 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
324 /* reset abyte_cnt and dummy_byte_cnt */
325 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
327 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
329 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
335 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
336 u8 *bytes, size_t size)
341 for (addridx = addr; addridx < (addr + size); addridx += 4) {
343 ret = do_rom_fast_read(adapter, addridx, &v);
346 *(__le32 *)bytes = cpu_to_le32(v);
354 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
355 u8 *bytes, size_t size)
359 ret = qlcnic_rom_lock(adapter);
363 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
365 qlcnic_rom_unlock(adapter);
369 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
373 if (qlcnic_rom_lock(adapter) != 0)
376 ret = do_rom_fast_read(adapter, addr, valp);
377 qlcnic_rom_unlock(adapter);
381 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
384 int i, n, init_delay;
385 struct crb_addr_pair *buf;
388 struct pci_dev *pdev = adapter->pdev;
390 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
391 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
393 /* Halt all the indiviual PEGs and other blocks */
394 /* disable all I2Q */
395 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
396 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
397 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
398 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
402 /* disable all niu interrupts */
403 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
404 /* disable xge rx/tx */
405 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
406 /* disable xg1 rx/tx */
407 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
408 /* disable sideband mac */
409 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
410 /* disable ap0 mac */
411 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
412 /* disable ap1 mac */
413 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
416 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
419 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
422 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
425 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
426 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
427 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
428 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
432 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
433 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
434 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
435 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
439 qlcnic_rom_unlock(adapter);
440 /* big hammer don't reset CAM block on reset */
441 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
443 /* Init HW CRB block */
444 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
445 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
446 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
449 offset = n & 0xffffU;
450 n = (n >> 16) & 0xffffU;
453 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
457 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
461 for (i = 0; i < n; i++) {
462 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
463 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
472 for (i = 0; i < n; i++) {
474 off = qlcnic_decode_crb_addr(buf[i].addr);
475 if (off == QLCNIC_ADDR_ERROR) {
476 dev_err(&pdev->dev, "CRB init value out of range %x\n",
480 off += QLCNIC_PCI_CRBSPACE;
485 /* skipping cold reboot MAGIC */
486 if (off == QLCNIC_CAM_RAM(0x1fc))
488 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
490 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
492 if (off == (ROMUSB_GLB + 0xa8))
494 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
496 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
498 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
500 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
502 /* skip the function enable register */
503 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
505 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
507 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
511 /* After writing this register, HW needs time for CRB */
512 /* to quiet down (else crb_window returns 0xffffffff) */
513 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
516 QLCWR32(adapter, off, buf[i].data);
522 /* Initialize protocol process engine */
523 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
524 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
525 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
526 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
538 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
539 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
544 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
547 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
550 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
553 case PHAN_INITIALIZE_COMPLETE:
554 case PHAN_INITIALIZE_ACK:
556 case PHAN_INITIALIZE_FAILED:
562 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
566 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
567 PHAN_INITIALIZE_FAILED);
570 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
571 "complete, state: 0x%x.\n", val);
576 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
579 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
582 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
584 if (val == PHAN_PEG_RCV_INITIALIZED)
587 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
592 dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
593 "complete, state: 0x%x.\n", val);
601 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
605 err = qlcnic_cmd_peg_ready(adapter);
609 err = qlcnic_receive_peg_ready(adapter);
613 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
619 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
624 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
625 val = QLC_DEV_GET_DRV(val, adapter->portnum);
626 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
627 dev_err(&adapter->pdev->dev,
628 "Not an Ethernet NIC func=%u\n", val);
631 adapter->ahw->physical_port = (val >> 2);
632 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
633 timeo = QLCNIC_INIT_TIMEOUT_SECS;
635 adapter->dev_init_timeo = timeo;
637 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
638 timeo = QLCNIC_RESET_TIMEOUT_SECS;
640 adapter->reset_ack_timeo = timeo;
645 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
646 struct qlcnic_flt_entry *region_entry)
648 struct qlcnic_flt_header flt_hdr;
649 struct qlcnic_flt_entry *flt_entry;
653 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
654 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
656 sizeof(struct qlcnic_flt_header));
658 dev_warn(&adapter->pdev->dev,
659 "error reading flash layout header\n");
663 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
664 flt_entry = vzalloc(entry_size);
665 if (flt_entry == NULL)
668 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
669 sizeof(struct qlcnic_flt_header),
670 (u8 *)flt_entry, entry_size);
672 dev_warn(&adapter->pdev->dev,
673 "error reading flash layout entries\n");
677 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
678 if (flt_entry[i].region == region)
682 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
683 dev_warn(&adapter->pdev->dev,
684 "region=%x not found in %d regions\n", region, i);
688 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
696 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
698 struct qlcnic_flt_entry fw_entry;
699 u32 ver = -1, min_ver;
702 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
703 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
706 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
710 /* 0-4:-signature, 4-8:-fw version */
711 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
714 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
717 ver = QLCNIC_DECODE_VERSION(ver);
718 min_ver = QLCNIC_MIN_FW_VERSION;
721 dev_err(&adapter->pdev->dev,
722 "firmware version %d.%d.%d unsupported."
723 "Min supported version %d.%d.%d\n",
724 _major(ver), _minor(ver), _build(ver),
725 _major(min_ver), _minor(min_ver), _build(min_ver));
733 qlcnic_has_mn(struct qlcnic_adapter *adapter)
738 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
741 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
748 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
751 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
752 entries = le32_to_cpu(directory->num_entries);
754 for (i = 0; i < entries; i++) {
756 u32 offs = le32_to_cpu(directory->findex) +
757 i * le32_to_cpu(directory->entry_size);
758 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
760 if (tab_type == section)
761 return (struct uni_table_desc *) &unirom[offs];
767 #define FILEHEADER_SIZE (14 * 4)
770 qlcnic_validate_header(struct qlcnic_adapter *adapter)
772 const u8 *unirom = adapter->fw->data;
773 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
774 u32 entries, entry_size, tab_size, fw_file_size;
776 fw_file_size = adapter->fw->size;
778 if (fw_file_size < FILEHEADER_SIZE)
781 entries = le32_to_cpu(directory->num_entries);
782 entry_size = le32_to_cpu(directory->entry_size);
783 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
785 if (fw_file_size < tab_size)
792 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
794 struct uni_table_desc *tab_desc;
795 struct uni_data_desc *descr;
796 u32 offs, tab_size, data_size, idx;
797 const u8 *unirom = adapter->fw->data;
800 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
801 QLCNIC_UNI_BOOTLD_IDX_OFF);
802 idx = le32_to_cpu(temp);
803 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
808 tab_size = le32_to_cpu(tab_desc->findex) +
809 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
811 if (adapter->fw->size < tab_size)
814 offs = le32_to_cpu(tab_desc->findex) +
815 le32_to_cpu(tab_desc->entry_size) * idx;
816 descr = (struct uni_data_desc *)&unirom[offs];
818 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
820 if (adapter->fw->size < data_size)
827 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
829 struct uni_table_desc *tab_desc;
830 struct uni_data_desc *descr;
831 const u8 *unirom = adapter->fw->data;
832 u32 offs, tab_size, data_size, idx;
835 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
836 QLCNIC_UNI_FIRMWARE_IDX_OFF);
837 idx = le32_to_cpu(temp);
838 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
843 tab_size = le32_to_cpu(tab_desc->findex) +
844 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
846 if (adapter->fw->size < tab_size)
849 offs = le32_to_cpu(tab_desc->findex) +
850 le32_to_cpu(tab_desc->entry_size) * idx;
851 descr = (struct uni_data_desc *)&unirom[offs];
852 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
854 if (adapter->fw->size < data_size)
861 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
863 struct uni_table_desc *ptab_descr;
864 const u8 *unirom = adapter->fw->data;
865 int mn_present = qlcnic_has_mn(adapter);
866 u32 entries, entry_size, tab_size, i;
869 ptab_descr = qlcnic_get_table_desc(unirom,
870 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
874 entries = le32_to_cpu(ptab_descr->num_entries);
875 entry_size = le32_to_cpu(ptab_descr->entry_size);
876 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
878 if (adapter->fw->size < tab_size)
882 for (i = 0; i < entries; i++) {
884 u32 flags, file_chiprev, offs;
885 u8 chiprev = adapter->ahw->revision_id;
888 offs = le32_to_cpu(ptab_descr->findex) +
889 i * le32_to_cpu(ptab_descr->entry_size);
890 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
891 flags = le32_to_cpu(temp);
892 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
893 file_chiprev = le32_to_cpu(temp);
895 flagbit = mn_present ? 1 : 2;
897 if ((chiprev == file_chiprev) &&
898 ((1ULL << flagbit) & flags)) {
899 adapter->file_prd_off = offs;
911 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
913 if (qlcnic_validate_header(adapter)) {
914 dev_err(&adapter->pdev->dev,
915 "unified image: header validation failed\n");
919 if (qlcnic_validate_product_offs(adapter)) {
920 dev_err(&adapter->pdev->dev,
921 "unified image: product validation failed\n");
925 if (qlcnic_validate_bootld(adapter)) {
926 dev_err(&adapter->pdev->dev,
927 "unified image: bootld validation failed\n");
931 if (qlcnic_validate_fw(adapter)) {
932 dev_err(&adapter->pdev->dev,
933 "unified image: firmware validation failed\n");
941 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
942 u32 section, u32 idx_offset)
944 const u8 *unirom = adapter->fw->data;
945 struct uni_table_desc *tab_desc;
949 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
950 idx = le32_to_cpu(temp);
952 tab_desc = qlcnic_get_table_desc(unirom, section);
954 if (tab_desc == NULL)
957 offs = le32_to_cpu(tab_desc->findex) +
958 le32_to_cpu(tab_desc->entry_size) * idx;
960 return (struct uni_data_desc *)&unirom[offs];
964 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
966 u32 offs = QLCNIC_BOOTLD_START;
967 struct uni_data_desc *data_desc;
969 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
970 QLCNIC_UNI_BOOTLD_IDX_OFF);
972 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
973 offs = le32_to_cpu(data_desc->findex);
975 return (u8 *)&adapter->fw->data[offs];
979 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
981 u32 offs = QLCNIC_IMAGE_START;
982 struct uni_data_desc *data_desc;
984 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
985 QLCNIC_UNI_FIRMWARE_IDX_OFF);
986 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
987 offs = le32_to_cpu(data_desc->findex);
989 return (u8 *)&adapter->fw->data[offs];
992 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
994 struct uni_data_desc *data_desc;
995 const u8 *unirom = adapter->fw->data;
997 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
998 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1000 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
1001 return le32_to_cpu(data_desc->size);
1003 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1006 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1008 struct uni_data_desc *fw_data_desc;
1009 const struct firmware *fw = adapter->fw;
1010 u32 major, minor, sub;
1011 __le32 version_offset;
1015 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1016 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1017 return le32_to_cpu(version_offset);
1020 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1021 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1022 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1023 le32_to_cpu(fw_data_desc->size) - 17;
1025 for (i = 0; i < 12; i++) {
1026 if (!strncmp(&ver_str[i], "REV=", 4)) {
1027 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1028 &major, &minor, &sub);
1032 return major + (minor << 8) + (sub << 16);
1039 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1041 const struct firmware *fw = adapter->fw;
1042 u32 bios_ver, prd_off = adapter->file_prd_off;
1046 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1047 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1048 return le32_to_cpu(*(__le32 *)version_offset);
1051 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1052 bios_ver = le32_to_cpu(temp);
1054 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1057 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1059 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1060 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1062 qlcnic_pcie_sem_unlock(adapter, 2);
1066 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1068 u32 heartbeat, ret = -EIO;
1069 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1071 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1072 QLCNIC_PEG_ALIVE_COUNTER);
1075 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1076 heartbeat = QLC_SHARED_REG_RD32(adapter,
1077 QLCNIC_PEG_ALIVE_COUNTER);
1078 if (heartbeat != adapter->heartbeat) {
1079 ret = QLCNIC_RCODE_SUCCESS;
1082 } while (--retries);
1088 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1090 if ((adapter->flags & QLCNIC_FW_HANG) ||
1091 qlcnic_check_fw_hearbeat(adapter)) {
1092 qlcnic_rom_lock_recovery(adapter);
1096 if (adapter->need_fw_reset)
1105 static const char *fw_name[] = {
1106 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1107 QLCNIC_FLASH_ROMIMAGE_NAME,
1111 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1114 u32 i, flashaddr, size;
1115 const struct firmware *fw = adapter->fw;
1116 struct pci_dev *pdev = adapter->pdev;
1118 dev_info(&pdev->dev, "loading firmware from %s\n",
1119 fw_name[adapter->ahw->fw_type]);
1124 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1126 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1127 flashaddr = QLCNIC_BOOTLD_START;
1129 for (i = 0; i < size; i++) {
1130 data = le64_to_cpu(ptr64[i]);
1132 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1138 size = qlcnic_get_fw_size(adapter) / 8;
1140 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1141 flashaddr = QLCNIC_IMAGE_START;
1143 for (i = 0; i < size; i++) {
1144 data = le64_to_cpu(ptr64[i]);
1146 if (qlcnic_pci_mem_write_2M(adapter,
1153 size = qlcnic_get_fw_size(adapter) % 8;
1155 data = le64_to_cpu(ptr64[i]);
1157 if (qlcnic_pci_mem_write_2M(adapter,
1166 struct qlcnic_flt_entry bootld_entry;
1168 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1171 size = bootld_entry.size / 8;
1172 flashaddr = bootld_entry.start_addr;
1174 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1175 flashaddr = QLCNIC_BOOTLD_START;
1176 dev_info(&pdev->dev,
1177 "using legacy method to get flash fw region");
1180 for (i = 0; i < size; i++) {
1181 if (qlcnic_rom_fast_read(adapter,
1182 flashaddr, (int *)&lo) != 0)
1184 if (qlcnic_rom_fast_read(adapter,
1185 flashaddr + 4, (int *)&hi) != 0)
1188 data = (((u64)hi << 32) | lo);
1190 if (qlcnic_pci_mem_write_2M(adapter,
1199 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1200 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1205 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1208 u32 ver, bios, min_size;
1209 struct pci_dev *pdev = adapter->pdev;
1210 const struct firmware *fw = adapter->fw;
1211 u8 fw_type = adapter->ahw->fw_type;
1213 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1214 if (qlcnic_validate_unified_romimage(adapter))
1217 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1219 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1220 if (val != QLCNIC_BDINFO_MAGIC)
1223 min_size = QLCNIC_FW_MIN_SIZE;
1226 if (fw->size < min_size)
1229 val = qlcnic_get_fw_version(adapter);
1230 ver = QLCNIC_DECODE_VERSION(val);
1232 if (ver < QLCNIC_MIN_FW_VERSION) {
1234 "%s: firmware version %d.%d.%d unsupported\n",
1235 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1239 val = qlcnic_get_bios_version(adapter);
1240 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1242 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1247 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1252 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1256 switch (adapter->ahw->fw_type) {
1257 case QLCNIC_UNKNOWN_ROMIMAGE:
1258 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1261 case QLCNIC_UNIFIED_ROMIMAGE:
1263 fw_type = QLCNIC_FLASH_ROMIMAGE;
1267 adapter->ahw->fw_type = fw_type;
1272 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1274 struct pci_dev *pdev = adapter->pdev;
1277 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1280 qlcnic_get_next_fwtype(adapter);
1282 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1285 rc = request_firmware(&adapter->fw,
1286 fw_name[adapter->ahw->fw_type],
1291 rc = qlcnic_validate_firmware(adapter);
1293 release_firmware(adapter->fw);
1302 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1304 release_firmware(adapter->fw);