drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  39
  40 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  41         .read_crb                       = qlcnic_83xx_read_crb,
  42         .write_crb                      = qlcnic_83xx_write_crb,
  43         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  44         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  45         .get_mac_address                = qlcnic_83xx_get_mac_address,
  46         .setup_intr                     = qlcnic_83xx_setup_intr,
  47         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  48         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  49         .get_func_no                    = qlcnic_83xx_get_func_no,
  50         .api_lock                       = qlcnic_83xx_cam_lock,
  51         .api_unlock                     = qlcnic_83xx_cam_unlock,
  52         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  53         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  54         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  55         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  56         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  57         .setup_link_event               = qlcnic_83xx_setup_link_event,
  58         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  59         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  60         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  61         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  62         .napi_enable                    = qlcnic_83xx_napi_enable,
  63         .napi_disable                   = qlcnic_83xx_napi_disable,
  64         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  65         .config_rss                     = qlcnic_83xx_config_rss,
  66         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  67         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  68         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  69         .get_board_info                 = qlcnic_83xx_get_port_info,
  70         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  71 };
  72
  73 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  74         .config_bridged_mode    = qlcnic_config_bridged_mode,
  75         .config_led             = qlcnic_config_led,
  76         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  77         .napi_add               = qlcnic_83xx_napi_add,
  78         .napi_del               = qlcnic_83xx_napi_del,
  79         .shutdown               = qlcnic_sriov_vf_shutdown,
  80         .resume                 = qlcnic_sriov_vf_resume,
  81         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  82         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  83 };
  84
  85 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  86         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  87         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  88         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  89         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  90 };
  91
  92 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  93 {
  94         return (val & (1 << QLC_BC_MSG)) ? true : false;
  95 }
  96
  97 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  98 {
  99         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 100 }
 101
 102 static inline bool qlcnic_sriov_flr_check(u32 val)
 103 {
 104         return (val & (1 << QLC_BC_FLR)) ? true : false;
 105 }
 106
 107 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 108 {
 109         return (val >> 4) & 0xff;
 110 }
 111
 112 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 113 {
 114         struct pci_dev *dev = adapter->pdev;
 115         int pos;
 116         u16 stride, offset;
 117
 118         if (qlcnic_sriov_vf_check(adapter))
 119                 return 0;
 120
 121         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 122         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 123         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 124
 125         return (dev->devfn + offset + stride * vf_id) & 0xff;
 126 }
 127
 128 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 129 {
 130         struct qlcnic_sriov *sriov;
 131         struct qlcnic_back_channel *bc;
 132         struct workqueue_struct *wq;
 133         struct qlcnic_vport *vp;
 134         struct qlcnic_vf_info *vf;
 135         int err, i;
 136
 137         if (!qlcnic_sriov_enable_check(adapter))
 138                 return -EIO;
 139
 140         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 141         if (!sriov)
 142                 return -ENOMEM;
 143
 144         adapter->ahw->sriov = sriov;
 145         sriov->num_vfs = num_vfs;
 146         bc = &sriov->bc;
 147         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 148                                  num_vfs, GFP_KERNEL);
 149         if (!sriov->vf_info) {
 150                 err = -ENOMEM;
 151                 goto qlcnic_free_sriov;
 152         }
 153
 154         wq = create_singlethread_workqueue("bc-trans");
 155         if (wq == NULL) {
 156                 err = -ENOMEM;
 157                 dev_err(&adapter->pdev->dev,
 158                         "Cannot create bc-trans workqueue\n");
 159                 goto qlcnic_free_vf_info;
 160         }
 161
 162         bc->bc_trans_wq = wq;
 163
 164         wq = create_singlethread_workqueue("async");
 165         if (wq == NULL) {
 166                 err = -ENOMEM;
 167                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 168                 goto qlcnic_destroy_trans_wq;
 169         }
 170
 171         bc->bc_async_wq =  wq;
 172         INIT_LIST_HEAD(&bc->async_list);
 173
 174         for (i = 0; i < num_vfs; i++) {
 175                 vf = &sriov->vf_info[i];
 176                 vf->adapter = adapter;
 177                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 178                 mutex_init(&vf->send_cmd_lock);
 179                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 180                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 181                 spin_lock_init(&vf->rcv_act.lock);
 182                 spin_lock_init(&vf->rcv_pend.lock);
 183                 init_completion(&vf->ch_free_cmpl);
 184
 185                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 186
 187                 if (qlcnic_sriov_pf_check(adapter)) {
 188                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 189                         if (!vp) {
 190                                 err = -ENOMEM;
 191                                 goto qlcnic_destroy_async_wq;
 192                         }
 193                         sriov->vf_info[i].vp = vp;
 194                         vp->max_tx_bw = MAX_BW;
 195                         vp->spoofchk = true;
 196                         random_ether_addr(vp->mac);
 197                         dev_info(&adapter->pdev->dev,
 198                                  "MAC Address %pM is configured for VF %d\n",
 199                                  vp->mac, i);
 200                 }
 201         }
 202
 203         return 0;
 204
 205 qlcnic_destroy_async_wq:
 206         destroy_workqueue(bc->bc_async_wq);
 207
 208 qlcnic_destroy_trans_wq:
 209         destroy_workqueue(bc->bc_trans_wq);
 210
 211 qlcnic_free_vf_info:
 212         kfree(sriov->vf_info);
 213
 214 qlcnic_free_sriov:
 215         kfree(adapter->ahw->sriov);
 216         return err;
 217 }
 218
 219 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 220 {
 221         struct qlcnic_bc_trans *trans;
 222         struct qlcnic_cmd_args cmd;
 223         unsigned long flags;
 224
 225         spin_lock_irqsave(&t_list->lock, flags);
 226
 227         while (!list_empty(&t_list->wait_list)) {
 228                 trans = list_first_entry(&t_list->wait_list,
 229                                          struct qlcnic_bc_trans, list);
 230                 list_del(&trans->list);
 231                 t_list->count--;
 232                 cmd.req.arg = (u32 *)trans->req_pay;
 233                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 234                 qlcnic_free_mbx_args(&cmd);
 235                 qlcnic_sriov_cleanup_transaction(trans);
 236         }
 237
 238         spin_unlock_irqrestore(&t_list->lock, flags);
 239 }
 240
 241 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 242 {
 243         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 244         struct qlcnic_back_channel *bc = &sriov->bc;
 245         struct qlcnic_vf_info *vf;
 246         int i;
 247
 248         if (!qlcnic_sriov_enable_check(adapter))
 249                 return;
 250
 251         qlcnic_sriov_cleanup_async_list(bc);
 252         destroy_workqueue(bc->bc_async_wq);
 253
 254         for (i = 0; i < sriov->num_vfs; i++) {
 255                 vf = &sriov->vf_info[i];
 256                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 257                 cancel_work_sync(&vf->trans_work);
 258                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 259         }
 260
 261         destroy_workqueue(bc->bc_trans_wq);
 262
 263         for (i = 0; i < sriov->num_vfs; i++)
 264                 kfree(sriov->vf_info[i].vp);
 265
 266         kfree(sriov->vf_info);
 267         kfree(adapter->ahw->sriov);
 268 }
 269
 270 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 271 {
 272         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 273         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 274         __qlcnic_sriov_cleanup(adapter);
 275 }
 276
 277 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 278 {
 279         if (qlcnic_sriov_pf_check(adapter))
 280                 qlcnic_sriov_pf_cleanup(adapter);
 281
 282         if (qlcnic_sriov_vf_check(adapter))
 283                 qlcnic_sriov_vf_cleanup(adapter);
 284 }
 285
 286 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 287                                     u32 *pay, u8 pci_func, u8 size)
 288 {
 289         struct qlcnic_hardware_context *ahw = adapter->ahw;
 290         struct qlcnic_mailbox *mbx = ahw->mailbox;
 291         struct qlcnic_cmd_args cmd;
 292         unsigned long timeout;
 293         int err;
 294
 295         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 296         cmd.hdr = hdr;
 297         cmd.pay = pay;
 298         cmd.pay_size = size;
 299         cmd.func_num = pci_func;
 300         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 301         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 302
 303         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 304         if (err) {
 305                 dev_err(&adapter->pdev->dev,
 306                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 307                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 308                         ahw->op_mode);
 309                 return err;
 310         }
 311
 312         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 313                 dev_err(&adapter->pdev->dev,
 314                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 315                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 316                         ahw->op_mode);
 317                 flush_workqueue(mbx->work_q);
 318         }
 319
 320         return cmd.rsp_opcode;
 321 }
 322
 323 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 324 {
 325         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 326         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 327         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 328         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 329         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 330         adapter->max_rds_rings = MAX_RDS_RINGS;
 331 }
 332
 333 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 334                                    struct qlcnic_info *npar_info, u16 vport_id)
 335 {
 336         struct device *dev = &adapter->pdev->dev;
 337         struct qlcnic_cmd_args cmd;
 338         int err;
 339         u32 status;
 340
 341         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 342         if (err)
 343                 return err;
 344
 345         cmd.req.arg[1] = vport_id << 16 | 0x1;
 346         err = qlcnic_issue_cmd(adapter, &cmd);
 347         if (err) {
 348                 dev_err(&adapter->pdev->dev,
 349                         "Failed to get vport info, err=%d\n", err);
 350                 qlcnic_free_mbx_args(&cmd);
 351                 return err;
 352         }
 353
 354         status = cmd.rsp.arg[2] & 0xffff;
 355         if (status & BIT_0)
 356                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 357         if (status & BIT_1)
 358                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 359         if (status & BIT_2)
 360                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 361         if (status & BIT_3)
 362                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 363         if (status & BIT_4)
 364                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 365         if (status & BIT_5)
 366                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 367         if (status & BIT_6)
 368                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 369         if (status & BIT_7)
 370                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 371         if (status & BIT_8)
 372                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 373         if (status & BIT_9)
 374                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 375
 376         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 377         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 378         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 379         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 380
 381         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 382                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 383                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 384                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 385                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 386                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 387                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 388                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 389                  npar_info->max_rx_mcast_mac_filters,
 390                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 391                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 392                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 393                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 394                  npar_info->max_remote_ipv6_addrs);
 395
 396         qlcnic_free_mbx_args(&cmd);
 397         return err;
 398 }
 399
 400 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 401                                       struct qlcnic_cmd_args *cmd)
 402 {
 403         adapter->rx_pvid = (cmd->rsp.arg[1] >> 16) & 0xffff;
 404         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 405         return 0;
 406 }
 407
 408 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 409                                             struct qlcnic_cmd_args *cmd)
 410 {
 411         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 412         int i, num_vlans;
 413         u16 *vlans;
 414
 415         if (sriov->allowed_vlans)
 416                 return 0;
 417
 418         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 419         if (!sriov->any_vlan)
 420                 return 0;
 421
 422         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 423         num_vlans = sriov->num_allowed_vlans;
 424         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 425         if (!sriov->allowed_vlans)
 426                 return -ENOMEM;
 427
 428         vlans = (u16 *)&cmd->rsp.arg[3];
 429         for (i = 0; i < num_vlans; i++)
 430                 sriov->allowed_vlans[i] = vlans[i];
 431
 432         return 0;
 433 }
 434
 435 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 436 {
 437         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 438         struct qlcnic_cmd_args cmd;
 439         int ret;
 440
 441         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 442         if (ret)
 443                 return ret;
 444
 445         ret = qlcnic_issue_cmd(adapter, &cmd);
 446         if (ret) {
 447                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 448                         ret);
 449         } else {
 450                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 451                 switch (sriov->vlan_mode) {
 452                 case QLC_GUEST_VLAN_MODE:
 453                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 454                         break;
 455                 case QLC_PVID_MODE:
 456                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 457                         break;
 458                 }
 459         }
 460
 461         qlcnic_free_mbx_args(&cmd);
 462         return ret;
 463 }
 464
 465 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 466 {
 467         struct qlcnic_hardware_context *ahw = adapter->ahw;
 468         struct qlcnic_info nic_info;
 469         int err;
 470
 471         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 472         if (err)
 473                 return err;
 474
 475         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 476         if (err)
 477                 return -EIO;
 478
 479         err = qlcnic_sriov_get_vf_acl(adapter);
 480         if (err)
 481                 return err;
 482
 483         if (qlcnic_83xx_get_port_info(adapter))
 484                 return -EIO;
 485
 486         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 487         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 488         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 489                  adapter->ahw->fw_hal_version);
 490
 491         ahw->physical_port = (u8) nic_info.phys_port;
 492         ahw->switch_mode = nic_info.switch_mode;
 493         ahw->max_mtu = nic_info.max_mtu;
 494         ahw->op_mode = nic_info.op_mode;
 495         ahw->capabilities = nic_info.capabilities;
 496         return 0;
 497 }
 498
 499 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 500                                  int pci_using_dac)
 501 {
 502         int err;
 503
 504         INIT_LIST_HEAD(&adapter->vf_mc_list);
 505         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 506                 dev_warn(&adapter->pdev->dev,
 507                          "83xx adapter do not support MSI interrupts\n");
 508
 509         err = qlcnic_setup_intr(adapter, 1);
 510         if (err) {
 511                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 512                 goto err_out_disable_msi;
 513         }
 514
 515         err = qlcnic_83xx_setup_mbx_intr(adapter);
 516         if (err)
 517                 goto err_out_disable_msi;
 518
 519         err = qlcnic_sriov_init(adapter, 1);
 520         if (err)
 521                 goto err_out_disable_mbx_intr;
 522
 523         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 524         if (err)
 525                 goto err_out_cleanup_sriov;
 526
 527         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 528         if (err)
 529                 goto err_out_disable_bc_intr;
 530
 531         err = qlcnic_sriov_vf_init_driver(adapter);
 532         if (err)
 533                 goto err_out_send_channel_term;
 534
 535         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 536         if (err)
 537                 goto err_out_send_channel_term;
 538
 539         pci_set_drvdata(adapter->pdev, adapter);
 540         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 541                  adapter->netdev->name);
 542         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 543                              adapter->ahw->idc.delay);
 544         return 0;
 545
 546 err_out_send_channel_term:
 547         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 548
 549 err_out_disable_bc_intr:
 550         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 551
 552 err_out_cleanup_sriov:
 553         __qlcnic_sriov_cleanup(adapter);
 554
 555 err_out_disable_mbx_intr:
 556         qlcnic_83xx_free_mbx_intr(adapter);
 557
 558 err_out_disable_msi:
 559         qlcnic_teardown_intr(adapter);
 560         return err;
 561 }
 562
 563 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 564 {
 565         u32 state;
 566
 567         do {
 568                 msleep(20);
 569                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 570                         return -EIO;
 571                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 572         } while (state != QLC_83XX_IDC_DEV_READY);
 573
 574         return 0;
 575 }
 576
 577 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 578 {
 579         struct qlcnic_hardware_context *ahw = adapter->ahw;
 580         int err;
 581
 582         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 583         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 584         ahw->reset_context = 0;
 585         adapter->fw_fail_cnt = 0;
 586         ahw->msix_supported = 1;
 587         adapter->need_fw_reset = 0;
 588         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 589
 590         err = qlcnic_sriov_check_dev_ready(adapter);
 591         if (err)
 592                 return err;
 593
 594         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 595         if (err)
 596                 return err;
 597
 598         if (qlcnic_read_mac_addr(adapter))
 599                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 600
 601         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 602
 603         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 604         return 0;
 605 }
 606
 607 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 608 {
 609         struct qlcnic_hardware_context *ahw = adapter->ahw;
 610
 611         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 612         dev_info(&adapter->pdev->dev,
 613                  "HAL Version: %d Non Privileged SRIOV function\n",
 614                  ahw->fw_hal_version);
 615         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 616         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 617         return;
 618 }
 619
 620 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 621 {
 622         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 623         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 624         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 625 }
 626
 627 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 628 {
 629         u32 pay_size;
 630
 631         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 632
 633         if (pay_size)
 634                 pay_size = QLC_BC_PAYLOAD_SZ;
 635         else
 636                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 637
 638         return pay_size;
 639 }
 640
 641 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 642 {
 643         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 644         u8 i;
 645
 646         if (qlcnic_sriov_vf_check(adapter))
 647                 return 0;
 648
 649         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 650                 if (vf_info[i].pci_func == pci_func)
 651                         return i;
 652         }
 653
 654         return -EINVAL;
 655 }
 656
 657 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 658 {
 659         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 660         if (!*trans)
 661                 return -ENOMEM;
 662
 663         init_completion(&(*trans)->resp_cmpl);
 664         return 0;
 665 }
 666
 667 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 668                                             u32 size)
 669 {
 670         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 671         if (!*hdr)
 672                 return -ENOMEM;
 673
 674         return 0;
 675 }
 676
 677 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 678 {
 679         const struct qlcnic_mailbox_metadata *mbx_tbl;
 680         int i, size;
 681
 682         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 683         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 684
 685         for (i = 0; i < size; i++) {
 686                 if (type == mbx_tbl[i].cmd) {
 687                         mbx->op_type = QLC_BC_CMD;
 688                         mbx->req.num = mbx_tbl[i].in_args;
 689                         mbx->rsp.num = mbx_tbl[i].out_args;
 690                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 691                                                GFP_ATOMIC);
 692                         if (!mbx->req.arg)
 693                                 return -ENOMEM;
 694                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 695                                                GFP_ATOMIC);
 696                         if (!mbx->rsp.arg) {
 697                                 kfree(mbx->req.arg);
 698                                 mbx->req.arg = NULL;
 699                                 return -ENOMEM;
 700                         }
 701                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 702                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 703                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 704                                            (3 << 29));
 705                         return 0;
 706                 }
 707         }
 708         return -EINVAL;
 709 }
 710
 711 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 712                                        struct qlcnic_cmd_args *cmd,
 713                                        u16 seq, u8 msg_type)
 714 {
 715         struct qlcnic_bc_hdr *hdr;
 716         int i;
 717         u32 num_regs, bc_pay_sz;
 718         u16 remainder;
 719         u8 cmd_op, num_frags, t_num_frags;
 720
 721         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 722         if (msg_type == QLC_BC_COMMAND) {
 723                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 724                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 725                 num_regs = cmd->req.num;
 726                 trans->req_pay_size = (num_regs * 4);
 727                 num_regs = cmd->rsp.num;
 728                 trans->rsp_pay_size = (num_regs * 4);
 729                 cmd_op = cmd->req.arg[0] & 0xff;
 730                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 731                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 732                 if (remainder)
 733                         num_frags++;
 734                 t_num_frags = num_frags;
 735                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 736                         return -ENOMEM;
 737                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 738                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 739                 if (remainder)
 740                         num_frags++;
 741                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 742                         return -ENOMEM;
 743                 num_frags  = t_num_frags;
 744                 hdr = trans->req_hdr;
 745         }  else {
 746                 cmd->req.arg = (u32 *)trans->req_pay;
 747                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 748                 cmd_op = cmd->req.arg[0] & 0xff;
 749                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 750                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 751                 if (remainder)
 752                         num_frags++;
 753                 cmd->req.num = trans->req_pay_size / 4;
 754                 cmd->rsp.num = trans->rsp_pay_size / 4;
 755                 hdr = trans->rsp_hdr;
 756         }
 757
 758         trans->trans_id = seq;
 759         trans->cmd_id = cmd_op;
 760         for (i = 0; i < num_frags; i++) {
 761                 hdr[i].version = 2;
 762                 hdr[i].msg_type = msg_type;
 763                 hdr[i].op_type = cmd->op_type;
 764                 hdr[i].num_cmds = 1;
 765                 hdr[i].num_frags = num_frags;
 766                 hdr[i].frag_num = i + 1;
 767                 hdr[i].cmd_op = cmd_op;
 768                 hdr[i].seq_id = seq;
 769         }
 770         return 0;
 771 }
 772
 773 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 774 {
 775         if (!trans)
 776                 return;
 777         kfree(trans->req_hdr);
 778         kfree(trans->rsp_hdr);
 779         kfree(trans);
 780 }
 781
 782 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 783                                     struct qlcnic_bc_trans *trans, u8 type)
 784 {
 785         struct qlcnic_trans_list *t_list;
 786         unsigned long flags;
 787         int ret = 0;
 788
 789         if (type == QLC_BC_RESPONSE) {
 790                 t_list = &vf->rcv_act;
 791                 spin_lock_irqsave(&t_list->lock, flags);
 792                 t_list->count--;
 793                 list_del(&trans->list);
 794                 if (t_list->count > 0)
 795                         ret = 1;
 796                 spin_unlock_irqrestore(&t_list->lock, flags);
 797         }
 798         if (type == QLC_BC_COMMAND) {
 799                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 800                         msleep(100);
 801                 vf->send_cmd = NULL;
 802                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 803         }
 804         return ret;
 805 }
 806
 807 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 808                                          struct qlcnic_vf_info *vf,
 809                                          work_func_t func)
 810 {
 811         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 812             vf->adapter->need_fw_reset)
 813                 return;
 814
 815         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 816 }
 817
 818 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 819 {
 820         struct completion *cmpl = &trans->resp_cmpl;
 821
 822         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 823                 trans->trans_state = QLC_END;
 824         else
 825                 trans->trans_state = QLC_ABORT;
 826
 827         return;
 828 }
 829
 830 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 831                                             u8 type)
 832 {
 833         if (type == QLC_BC_RESPONSE) {
 834                 trans->curr_rsp_frag++;
 835                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 836                         trans->trans_state = QLC_INIT;
 837                 else
 838                         trans->trans_state = QLC_END;
 839         } else {
 840                 trans->curr_req_frag++;
 841                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 842                         trans->trans_state = QLC_INIT;
 843                 else
 844                         trans->trans_state = QLC_WAIT_FOR_RESP;
 845         }
 846 }
 847
 848 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 849                                                u8 type)
 850 {
 851         struct qlcnic_vf_info *vf = trans->vf;
 852         struct completion *cmpl = &vf->ch_free_cmpl;
 853
 854         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 855                 trans->trans_state = QLC_ABORT;
 856                 return;
 857         }
 858
 859         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 860         qlcnic_sriov_handle_multi_frags(trans, type);
 861 }
 862
 863 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 864                                      u32 *hdr, u32 *pay, u32 size)
 865 {
 866         struct qlcnic_hardware_context *ahw = adapter->ahw;
 867         u32 fw_mbx;
 868         u8 i, max = 2, hdr_size, j;
 869
 870         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 871         max = (size / sizeof(u32)) + hdr_size;
 872
 873         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 874         for (i = 2, j = 0; j < hdr_size; i++, j++)
 875                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 876         for (; j < max; i++, j++)
 877                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 878 }
 879
 880 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 881 {
 882         int ret = -EBUSY;
 883         u32 timeout = 10000;
 884
 885         do {
 886                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 887                         ret = 0;
 888                         break;
 889                 }
 890                 mdelay(1);
 891         } while (--timeout);
 892
 893         return ret;
 894 }
 895
 896 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 897 {
 898         struct qlcnic_vf_info *vf = trans->vf;
 899         u32 pay_size, hdr_size;
 900         u32 *hdr, *pay;
 901         int ret;
 902         u8 pci_func = trans->func_id;
 903
 904         if (__qlcnic_sriov_issue_bc_post(vf))
 905                 return -EBUSY;
 906
 907         if (type == QLC_BC_COMMAND) {
 908                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 909                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 910                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 911                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 912                                                        trans->curr_req_frag);
 913                 pay_size = (pay_size / sizeof(u32));
 914         } else {
 915                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 916                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 917                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 918                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 919                                                        trans->curr_rsp_frag);
 920                 pay_size = (pay_size / sizeof(u32));
 921         }
 922
 923         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 924                                        pci_func, pay_size);
 925         return ret;
 926 }
 927
 928 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 929                                       struct qlcnic_vf_info *vf, u8 type)
 930 {
 931         bool flag = true;
 932         int err = -EIO;
 933
 934         while (flag) {
 935                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 936                     vf->adapter->need_fw_reset)
 937                         trans->trans_state = QLC_ABORT;
 938
 939                 switch (trans->trans_state) {
 940                 case QLC_INIT:
 941                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 942                         if (qlcnic_sriov_issue_bc_post(trans, type))
 943                                 trans->trans_state = QLC_ABORT;
 944                         break;
 945                 case QLC_WAIT_FOR_CHANNEL_FREE:
 946                         qlcnic_sriov_wait_for_channel_free(trans, type);
 947                         break;
 948                 case QLC_WAIT_FOR_RESP:
 949                         qlcnic_sriov_wait_for_resp(trans);
 950                         break;
 951                 case QLC_END:
 952                         err = 0;
 953                         flag = false;
 954                         break;
 955                 case QLC_ABORT:
 956                         err = -EIO;
 957                         flag = false;
 958                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 959                         break;
 960                 default:
 961                         err = -EIO;
 962                         flag = false;
 963                 }
 964         }
 965         return err;
 966 }
 967
 968 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
 969                                     struct qlcnic_bc_trans *trans, int pci_func)
 970 {
 971         struct qlcnic_vf_info *vf;
 972         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
 973
 974         if (index < 0)
 975                 return -EIO;
 976
 977         vf = &adapter->ahw->sriov->vf_info[index];
 978         trans->vf = vf;
 979         trans->func_id = pci_func;
 980
 981         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
 982                 if (qlcnic_sriov_pf_check(adapter))
 983                         return -EIO;
 984                 if (qlcnic_sriov_vf_check(adapter) &&
 985                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
 986                         return -EIO;
 987         }
 988
 989         mutex_lock(&vf->send_cmd_lock);
 990         vf->send_cmd = trans;
 991         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
 992         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
 993         mutex_unlock(&vf->send_cmd_lock);
 994         return err;
 995 }
 996
 997 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
 998                                           struct qlcnic_bc_trans *trans,
 999                                           struct qlcnic_cmd_args *cmd)
1000 {
1001 #ifdef CONFIG_QLCNIC_SRIOV
1002         if (qlcnic_sriov_pf_check(adapter)) {
1003                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1004                 return;
1005         }
1006 #endif
1007         cmd->rsp.arg[0] |= (0x9 << 25);
1008         return;
1009 }
1010
1011 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1012 {
1013         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1014                                                  trans_work);
1015         struct qlcnic_bc_trans *trans = NULL;
1016         struct qlcnic_adapter *adapter  = vf->adapter;
1017         struct qlcnic_cmd_args cmd;
1018         u8 req;
1019
1020         if (adapter->need_fw_reset)
1021                 return;
1022
1023         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1024                 return;
1025
1026         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1027         trans = list_first_entry(&vf->rcv_act.wait_list,
1028                                  struct qlcnic_bc_trans, list);
1029         adapter = vf->adapter;
1030
1031         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1032                                         QLC_BC_RESPONSE))
1033                 goto cleanup_trans;
1034
1035         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1036         trans->trans_state = QLC_INIT;
1037         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1038
1039 cleanup_trans:
1040         qlcnic_free_mbx_args(&cmd);
1041         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1042         qlcnic_sriov_cleanup_transaction(trans);
1043         if (req)
1044                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1045                                              qlcnic_sriov_process_bc_cmd);
1046 }
1047
1048 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1049                                         struct qlcnic_vf_info *vf)
1050 {
1051         struct qlcnic_bc_trans *trans;
1052         u32 pay_size;
1053
1054         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1055                 return;
1056
1057         trans = vf->send_cmd;
1058
1059         if (trans == NULL)
1060                 goto clear_send;
1061
1062         if (trans->trans_id != hdr->seq_id)
1063                 goto clear_send;
1064
1065         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1066                                                trans->curr_rsp_frag);
1067         qlcnic_sriov_pull_bc_msg(vf->adapter,
1068                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1069                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1070                                  pay_size);
1071         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1072                 goto clear_send;
1073
1074         complete(&trans->resp_cmpl);
1075
1076 clear_send:
1077         clear_bit(QLC_BC_VF_SEND, &vf->state);
1078 }
1079
1080 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1081                                 struct qlcnic_vf_info *vf,
1082                                 struct qlcnic_bc_trans *trans)
1083 {
1084         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1085
1086         t_list->count++;
1087         list_add_tail(&trans->list, &t_list->wait_list);
1088         if (t_list->count == 1)
1089                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1090                                              qlcnic_sriov_process_bc_cmd);
1091         return 0;
1092 }
1093
1094 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1095                                      struct qlcnic_vf_info *vf,
1096                                      struct qlcnic_bc_trans *trans)
1097 {
1098         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1099
1100         spin_lock(&t_list->lock);
1101
1102         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1103
1104         spin_unlock(&t_list->lock);
1105         return 0;
1106 }
1107
1108 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1109                                               struct qlcnic_vf_info *vf,
1110                                               struct qlcnic_bc_hdr *hdr)
1111 {
1112         struct qlcnic_bc_trans *trans = NULL;
1113         struct list_head *node;
1114         u32 pay_size, curr_frag;
1115         u8 found = 0, active = 0;
1116
1117         spin_lock(&vf->rcv_pend.lock);
1118         if (vf->rcv_pend.count > 0) {
1119                 list_for_each(node, &vf->rcv_pend.wait_list) {
1120                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1121                         if (trans->trans_id == hdr->seq_id) {
1122                                 found = 1;
1123                                 break;
1124                         }
1125                 }
1126         }
1127
1128         if (found) {
1129                 curr_frag = trans->curr_req_frag;
1130                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1131                                                        curr_frag);
1132                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1133                                          (u32 *)(trans->req_hdr + curr_frag),
1134                                          (u32 *)(trans->req_pay + curr_frag),
1135                                          pay_size);
1136                 trans->curr_req_frag++;
1137                 if (trans->curr_req_frag >= hdr->num_frags) {
1138                         vf->rcv_pend.count--;
1139                         list_del(&trans->list);
1140                         active = 1;
1141                 }
1142         }
1143         spin_unlock(&vf->rcv_pend.lock);
1144
1145         if (active)
1146                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1147                         qlcnic_sriov_cleanup_transaction(trans);
1148
1149         return;
1150 }
1151
1152 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1153                                        struct qlcnic_bc_hdr *hdr,
1154                                        struct qlcnic_vf_info *vf)
1155 {
1156         struct qlcnic_bc_trans *trans;
1157         struct qlcnic_adapter *adapter = vf->adapter;
1158         struct qlcnic_cmd_args cmd;
1159         u32 pay_size;
1160         int err;
1161         u8 cmd_op;
1162
1163         if (adapter->need_fw_reset)
1164                 return;
1165
1166         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1167             hdr->op_type != QLC_BC_CMD &&
1168             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1169                 return;
1170
1171         if (hdr->frag_num > 1) {
1172                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1173                 return;
1174         }
1175
1176         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1177         cmd_op = hdr->cmd_op;
1178         if (qlcnic_sriov_alloc_bc_trans(&trans))
1179                 return;
1180
1181         if (hdr->op_type == QLC_BC_CMD)
1182                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1183         else
1184                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1185
1186         if (err) {
1187                 qlcnic_sriov_cleanup_transaction(trans);
1188                 return;
1189         }
1190
1191         cmd.op_type = hdr->op_type;
1192         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1193                                         QLC_BC_COMMAND)) {
1194                 qlcnic_free_mbx_args(&cmd);
1195                 qlcnic_sriov_cleanup_transaction(trans);
1196                 return;
1197         }
1198
1199         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1200                                          trans->curr_req_frag);
1201         qlcnic_sriov_pull_bc_msg(vf->adapter,
1202                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1203                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1204                                  pay_size);
1205         trans->func_id = vf->pci_func;
1206         trans->vf = vf;
1207         trans->trans_id = hdr->seq_id;
1208         trans->curr_req_frag++;
1209
1210         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1211                 return;
1212
1213         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1214                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1215                         qlcnic_free_mbx_args(&cmd);
1216                         qlcnic_sriov_cleanup_transaction(trans);
1217                 }
1218         } else {
1219                 spin_lock(&vf->rcv_pend.lock);
1220                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1221                 vf->rcv_pend.count++;
1222                 spin_unlock(&vf->rcv_pend.lock);
1223         }
1224 }
1225
1226 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1227                                           struct qlcnic_vf_info *vf)
1228 {
1229         struct qlcnic_bc_hdr hdr;
1230         u32 *ptr = (u32 *)&hdr;
1231         u8 msg_type, i;
1232
1233         for (i = 2; i < 6; i++)
1234                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1235         msg_type = hdr.msg_type;
1236
1237         switch (msg_type) {
1238         case QLC_BC_COMMAND:
1239                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1240                 break;
1241         case QLC_BC_RESPONSE:
1242                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1243                 break;
1244         }
1245 }
1246
1247 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1248                                           struct qlcnic_vf_info *vf)
1249 {
1250         struct qlcnic_adapter *adapter = vf->adapter;
1251
1252         if (qlcnic_sriov_pf_check(adapter))
1253                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1254         else
1255                 dev_err(&adapter->pdev->dev,
1256                         "Invalid event to VF. VF should not get FLR event\n");
1257 }
1258
1259 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1260 {
1261         struct qlcnic_vf_info *vf;
1262         struct qlcnic_sriov *sriov;
1263         int index;
1264         u8 pci_func;
1265
1266         sriov = adapter->ahw->sriov;
1267         pci_func = qlcnic_sriov_target_func_id(event);
1268         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1269
1270         if (index < 0)
1271                 return;
1272
1273         vf = &sriov->vf_info[index];
1274         vf->pci_func = pci_func;
1275
1276         if (qlcnic_sriov_channel_free_check(event))
1277                 complete(&vf->ch_free_cmpl);
1278
1279         if (qlcnic_sriov_flr_check(event)) {
1280                 qlcnic_sriov_handle_flr_event(sriov, vf);
1281                 return;
1282         }
1283
1284         if (qlcnic_sriov_bc_msg_check(event))
1285                 qlcnic_sriov_handle_msg_event(sriov, vf);
1286 }
1287
1288 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1289 {
1290         struct qlcnic_cmd_args cmd;
1291         int err;
1292
1293         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1294                 return 0;
1295
1296         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1297                 return -ENOMEM;
1298
1299         if (enable)
1300                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1301
1302         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1303
1304         if (err != QLCNIC_RCODE_SUCCESS) {
1305                 dev_err(&adapter->pdev->dev,
1306                         "Failed to %s bc events, err=%d\n",
1307                         (enable ? "enable" : "disable"), err);
1308         }
1309
1310         qlcnic_free_mbx_args(&cmd);
1311         return err;
1312 }
1313
1314 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1315                                      struct qlcnic_bc_trans *trans)
1316 {
1317         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1318         u32 state;
1319
1320         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1321         if (state == QLC_83XX_IDC_DEV_READY) {
1322                 msleep(20);
1323                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1324                 trans->trans_state = QLC_INIT;
1325                 if (++adapter->fw_fail_cnt > max)
1326                         return -EIO;
1327                 else
1328                         return 0;
1329         }
1330
1331         return -EIO;
1332 }
1333
1334 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1335                                   struct qlcnic_cmd_args *cmd)
1336 {
1337         struct qlcnic_hardware_context *ahw = adapter->ahw;
1338         struct qlcnic_mailbox *mbx = ahw->mailbox;
1339         struct device *dev = &adapter->pdev->dev;
1340         struct qlcnic_bc_trans *trans;
1341         int err;
1342         u32 rsp_data, opcode, mbx_err_code, rsp;
1343         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1344         u8 func = ahw->pci_func;
1345
1346         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1347         if (rsp)
1348                 return rsp;
1349
1350         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1351         if (rsp)
1352                 goto cleanup_transaction;
1353
1354 retry:
1355         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1356                 rsp = -EIO;
1357                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1358                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1359                 goto err_out;
1360         }
1361
1362         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1363         if (err) {
1364                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1365                         (cmd->req.arg[0] & 0xffff), func);
1366                 rsp = QLCNIC_RCODE_TIMEOUT;
1367
1368                 /* After adapter reset PF driver may take some time to
1369                  * respond to VF's request. Retry request till maximum retries.
1370                  */
1371                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1372                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1373                         goto retry;
1374
1375                 goto err_out;
1376         }
1377
1378         rsp_data = cmd->rsp.arg[0];
1379         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1380         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1381
1382         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1383             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1384                 rsp = QLCNIC_RCODE_SUCCESS;
1385         } else {
1386                 rsp = mbx_err_code;
1387                 if (!rsp)
1388                         rsp = 1;
1389                 dev_err(dev,
1390                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1391                         opcode, mbx_err_code, func);
1392         }
1393
1394 err_out:
1395         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1396                 ahw->reset_context = 1;
1397                 adapter->need_fw_reset = 1;
1398                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1399         }
1400
1401 cleanup_transaction:
1402         qlcnic_sriov_cleanup_transaction(trans);
1403         return rsp;
1404 }
1405
1406 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1407 {
1408         struct qlcnic_cmd_args cmd;
1409         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1410         int ret;
1411
1412         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1413                 return -ENOMEM;
1414
1415         ret = qlcnic_issue_cmd(adapter, &cmd);
1416         if (ret) {
1417                 dev_err(&adapter->pdev->dev,
1418                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1419                         ret);
1420                 goto out;
1421         }
1422
1423         cmd_op = (cmd.rsp.arg[0] & 0xff);
1424         if (cmd.rsp.arg[0] >> 25 == 2)
1425                 return 2;
1426         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1427                 set_bit(QLC_BC_VF_STATE, &vf->state);
1428         else
1429                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1430
1431 out:
1432         qlcnic_free_mbx_args(&cmd);
1433         return ret;
1434 }
1435
1436 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1437 {
1438         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1439         struct qlcnic_mac_list_s *cur;
1440         struct list_head *head, tmp_list;
1441
1442         INIT_LIST_HEAD(&tmp_list);
1443         head = &adapter->vf_mc_list;
1444         netif_addr_lock_bh(netdev);
1445
1446         while (!list_empty(head)) {
1447                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1448                 list_move(&cur->list, &tmp_list);
1449         }
1450
1451         netif_addr_unlock_bh(netdev);
1452
1453         while (!list_empty(&tmp_list)) {
1454                 cur = list_entry((&tmp_list)->next,
1455                                  struct qlcnic_mac_list_s, list);
1456                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1457                 list_del(&cur->list);
1458                 kfree(cur);
1459         }
1460 }
1461
1462 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1463 {
1464         struct list_head *head = &bc->async_list;
1465         struct qlcnic_async_work_list *entry;
1466
1467         while (!list_empty(head)) {
1468                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1469                                    list);
1470                 cancel_work_sync(&entry->work);
1471                 list_del(&entry->list);
1472                 kfree(entry);
1473         }
1474 }
1475
1476 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1477 {
1478         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1479         u16 vlan;
1480
1481         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1482                 return;
1483
1484         vlan = adapter->ahw->sriov->vlan;
1485         __qlcnic_set_multi(netdev, vlan);
1486 }
1487
1488 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1489 {
1490         struct qlcnic_async_work_list *entry;
1491         struct net_device *netdev;
1492
1493         entry = container_of(work, struct qlcnic_async_work_list, work);
1494         netdev = (struct net_device *)entry->ptr;
1495
1496         qlcnic_sriov_vf_set_multi(netdev);
1497         return;
1498 }
1499
1500 static struct qlcnic_async_work_list *
1501 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1502 {
1503         struct list_head *node;
1504         struct qlcnic_async_work_list *entry = NULL;
1505         u8 empty = 0;
1506
1507         list_for_each(node, &bc->async_list) {
1508                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1509                 if (!work_pending(&entry->work)) {
1510                         empty = 1;
1511                         break;
1512                 }
1513         }
1514
1515         if (!empty) {
1516                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1517                                 GFP_ATOMIC);
1518                 if (entry == NULL)
1519                         return NULL;
1520                 list_add_tail(&entry->list, &bc->async_list);
1521         }
1522
1523         return entry;
1524 }
1525
1526 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1527                                                 work_func_t func, void *data)
1528 {
1529         struct qlcnic_async_work_list *entry = NULL;
1530
1531         entry = qlcnic_sriov_get_free_node_async_work(bc);
1532         if (!entry)
1533                 return;
1534
1535         entry->ptr = data;
1536         INIT_WORK(&entry->work, func);
1537         queue_work(bc->bc_async_wq, &entry->work);
1538 }
1539
1540 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1541 {
1542
1543         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1544         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1545
1546         if (adapter->need_fw_reset)
1547                 return;
1548
1549         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1550                                             netdev);
1551 }
1552
1553 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1554 {
1555         int err;
1556
1557         set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
1558         qlcnic_83xx_enable_mbx_interrupt(adapter);
1559
1560         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1561         if (err)
1562                 return err;
1563
1564         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1565         if (err)
1566                 goto err_out_cleanup_bc_intr;
1567
1568         err = qlcnic_sriov_vf_init_driver(adapter);
1569         if (err)
1570                 goto err_out_term_channel;
1571
1572         return 0;
1573
1574 err_out_term_channel:
1575         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1576
1577 err_out_cleanup_bc_intr:
1578         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1579         return err;
1580 }
1581
1582 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1583 {
1584         struct net_device *netdev = adapter->netdev;
1585
1586         if (netif_running(netdev)) {
1587                 if (!qlcnic_up(adapter, netdev))
1588                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1589         }
1590
1591         netif_device_attach(netdev);
1592 }
1593
1594 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1595 {
1596         struct qlcnic_hardware_context *ahw = adapter->ahw;
1597         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1598         struct net_device *netdev = adapter->netdev;
1599         u8 i, max_ints = ahw->num_msix - 1;
1600
1601         netif_device_detach(netdev);
1602         qlcnic_83xx_detach_mailbox_work(adapter);
1603         qlcnic_83xx_disable_mbx_intr(adapter);
1604
1605         if (netif_running(netdev))
1606                 qlcnic_down(adapter, netdev);
1607
1608         for (i = 0; i < max_ints; i++) {
1609                 intr_tbl[i].id = i;
1610                 intr_tbl[i].enabled = 0;
1611                 intr_tbl[i].src = 0;
1612         }
1613         ahw->reset_context = 0;
1614 }
1615
1616 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1617 {
1618         struct qlcnic_hardware_context *ahw = adapter->ahw;
1619         struct device *dev = &adapter->pdev->dev;
1620         struct qlc_83xx_idc *idc = &ahw->idc;
1621         u8 func = ahw->pci_func;
1622         u32 state;
1623
1624         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1625             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1626                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1627                         qlcnic_sriov_vf_attach(adapter);
1628                         adapter->fw_fail_cnt = 0;
1629                         dev_info(dev,
1630                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1631                                  __func__, func);
1632                 } else {
1633                         dev_err(dev,
1634                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1635                                 __func__, func);
1636                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1637                         dev_info(dev, "Current state 0x%x after FW reset\n",
1638                                  state);
1639                 }
1640         }
1641
1642         return 0;
1643 }
1644
1645 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1646 {
1647         struct qlcnic_hardware_context *ahw = adapter->ahw;
1648         struct qlcnic_mailbox *mbx = ahw->mailbox;
1649         struct device *dev = &adapter->pdev->dev;
1650         struct qlc_83xx_idc *idc = &ahw->idc;
1651         u8 func = ahw->pci_func;
1652         u32 state;
1653
1654         adapter->reset_ctx_cnt++;
1655
1656         /* Skip the context reset and check if FW is hung */
1657         if (adapter->reset_ctx_cnt < 3) {
1658                 adapter->need_fw_reset = 1;
1659                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1660                 dev_info(dev,
1661                          "Resetting context, wait here to check if FW is in failed state\n");
1662                 return 0;
1663         }
1664
1665         /* Check if number of resets exceed the threshold.
1666          * If it exceeds the threshold just fail the VF.
1667          */
1668         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1669                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1670                 adapter->tx_timeo_cnt = 0;
1671                 adapter->fw_fail_cnt = 0;
1672                 adapter->reset_ctx_cnt = 0;
1673                 qlcnic_sriov_vf_detach(adapter);
1674                 dev_err(dev,
1675                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1676                 return -EIO;
1677         }
1678
1679         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1680         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1681                  __func__, adapter->reset_ctx_cnt, func);
1682         set_bit(__QLCNIC_RESETTING, &adapter->state);
1683         adapter->need_fw_reset = 1;
1684         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1685         qlcnic_sriov_vf_detach(adapter);
1686         adapter->need_fw_reset = 0;
1687
1688         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1689                 qlcnic_sriov_vf_attach(adapter);
1690                 adapter->tx_timeo_cnt = 0;
1691                 adapter->reset_ctx_cnt = 0;
1692                 adapter->fw_fail_cnt = 0;
1693                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1694         } else {
1695                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1696                         __func__, func);
1697                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1698                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1699         }
1700
1701         return 0;
1702 }
1703
1704 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1705 {
1706         struct qlcnic_hardware_context *ahw = adapter->ahw;
1707         int ret = 0;
1708
1709         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1710                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1711         else if (ahw->reset_context)
1712                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1713
1714         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1715         return ret;
1716 }
1717
1718 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1719 {
1720         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1721
1722         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1723         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1724                 qlcnic_sriov_vf_detach(adapter);
1725
1726         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1727         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1728         return -EIO;
1729 }
1730
1731 static int
1732 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1733 {
1734         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1735         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1736
1737         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1738         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1739                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1740                 adapter->tx_timeo_cnt = 0;
1741                 adapter->reset_ctx_cnt = 0;
1742                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1743                 qlcnic_sriov_vf_detach(adapter);
1744         }
1745
1746         return 0;
1747 }
1748
1749 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1750 {
1751         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1752         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1753         u8 func = adapter->ahw->pci_func;
1754
1755         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1756                 dev_err(&adapter->pdev->dev,
1757                         "Firmware hang detected by VF 0x%x\n", func);
1758                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1759                 adapter->tx_timeo_cnt = 0;
1760                 adapter->reset_ctx_cnt = 0;
1761                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1762                 qlcnic_sriov_vf_detach(adapter);
1763         }
1764         return 0;
1765 }
1766
1767 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1768 {
1769         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1770         return 0;
1771 }
1772
1773 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1774 {
1775         struct qlcnic_adapter *adapter;
1776         struct qlc_83xx_idc *idc;
1777         int ret = 0;
1778
1779         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1780         idc = &adapter->ahw->idc;
1781         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1782
1783         switch (idc->curr_state) {
1784         case QLC_83XX_IDC_DEV_READY:
1785                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1786                 break;
1787         case QLC_83XX_IDC_DEV_NEED_RESET:
1788         case QLC_83XX_IDC_DEV_INIT:
1789                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1790                 break;
1791         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1792                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1793                 break;
1794         case QLC_83XX_IDC_DEV_FAILED:
1795                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1796                 break;
1797         case QLC_83XX_IDC_DEV_QUISCENT:
1798                 break;
1799         default:
1800                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1801         }
1802
1803         idc->prev_state = idc->curr_state;
1804         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1805                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1806                                      idc->delay);
1807 }
1808
1809 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1810 {
1811         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1812                 msleep(20);
1813
1814         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1815         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1816         cancel_delayed_work_sync(&adapter->fw_work);
1817 }
1818
1819 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1820                                           u16 vid, u8 enable)
1821 {
1822         u16 vlan = sriov->vlan;
1823         u8 allowed = 0;
1824         int i;
1825
1826         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1827                 return -EINVAL;
1828
1829         if (enable) {
1830                 if (vlan)
1831                         return -EINVAL;
1832
1833                 if (sriov->any_vlan) {
1834                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1835                                 if (sriov->allowed_vlans[i] == vid)
1836                                         allowed = 1;
1837                         }
1838
1839                         if (!allowed)
1840                                 return -EINVAL;
1841                 }
1842         } else {
1843                 if (!vlan || vlan != vid)
1844                         return -EINVAL;
1845         }
1846
1847         return 0;
1848 }
1849
1850 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1851                                    u16 vid, u8 enable)
1852 {
1853         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1854         struct qlcnic_cmd_args cmd;
1855         int ret;
1856
1857         if (vid == 0)
1858                 return 0;
1859
1860         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1861         if (ret)
1862                 return ret;
1863
1864         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1865                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1866         if (ret)
1867                 return ret;
1868
1869         cmd.req.arg[1] = (enable & 1) | vid << 16;
1870
1871         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1872         ret = qlcnic_issue_cmd(adapter, &cmd);
1873         if (ret) {
1874                 dev_err(&adapter->pdev->dev,
1875                         "Failed to configure guest VLAN, err=%d\n", ret);
1876         } else {
1877                 qlcnic_free_mac_list(adapter);
1878
1879                 if (enable)
1880                         sriov->vlan = vid;
1881                 else
1882                         sriov->vlan = 0;
1883
1884                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1885         }
1886
1887         qlcnic_free_mbx_args(&cmd);
1888         return ret;
1889 }
1890
1891 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1892 {
1893         struct list_head *head = &adapter->mac_list;
1894         struct qlcnic_mac_list_s *cur;
1895         u16 vlan;
1896
1897         vlan = adapter->ahw->sriov->vlan;
1898
1899         while (!list_empty(head)) {
1900                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1901                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1902                                           vlan, QLCNIC_MAC_DEL);
1903                 list_del(&cur->list);
1904                 kfree(cur);
1905         }
1906 }
1907
1908 int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
1909 {
1910         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1911         struct net_device *netdev = adapter->netdev;
1912         int retval;
1913
1914         netif_device_detach(netdev);
1915         qlcnic_cancel_idc_work(adapter);
1916
1917         if (netif_running(netdev))
1918                 qlcnic_down(adapter, netdev);
1919
1920         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1921         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1922         qlcnic_83xx_disable_mbx_intr(adapter);
1923         cancel_delayed_work_sync(&adapter->idc_aen_work);
1924
1925         retval = pci_save_state(pdev);
1926         if (retval)
1927                 return retval;
1928
1929         return 0;
1930 }
1931
1932 int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
1933 {
1934         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1935         struct net_device *netdev = adapter->netdev;
1936         int err;
1937
1938         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1939         qlcnic_83xx_enable_mbx_interrupt(adapter);
1940         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1941         if (err)
1942                 return err;
1943
1944         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1945         if (!err) {
1946                 if (netif_running(netdev)) {
1947                         err = qlcnic_up(adapter, netdev);
1948                         if (!err)
1949                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1950                 }
1951         }
1952
1953         netif_device_attach(netdev);
1954         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1955                              idc->delay);
1956         return err;
1957 }