1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2010 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/bitops.h>
12 #include <linux/module.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/rtnetlink.h>
18 #include "net_driver.h"
23 #include "mcdi_pcol.h"
25 #define FALCON_SPI_VERIFY_BUF_LEN 16
27 struct efx_mtd_partition {
28 struct list_head node;
37 const struct falcon_spi_device *spi;
41 const char *dev_type_name;
42 const char *type_name;
43 char name[IFNAMSIZ + 20];
47 int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
48 size_t *retlen, u8 *buffer);
49 int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
50 int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
51 size_t *retlen, const u8 *buffer);
52 int (*sync)(struct mtd_info *mtd);
55 #define to_efx_mtd_partition(mtd) \
56 container_of(mtd, struct efx_mtd_partition, mtd)
58 static int falcon_mtd_probe(struct efx_nic *efx);
59 static int siena_mtd_probe(struct efx_nic *efx);
64 falcon_spi_slow_wait(struct efx_mtd_partition *part, bool uninterruptible)
66 const struct falcon_spi_device *spi = part->falcon.spi;
67 struct efx_nic *efx = part->mtd.priv;
71 /* Wait up to 4s for flash/EEPROM to finish a slow operation. */
72 for (i = 0; i < 40; i++) {
73 __set_current_state(uninterruptible ?
74 TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
75 schedule_timeout(HZ / 10);
76 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
77 &status, sizeof(status));
80 if (!(status & SPI_STATUS_NRDY))
82 if (signal_pending(current))
85 pr_err("%s: timed out waiting for %s\n",
86 part->name, part->dev_type_name);
91 falcon_spi_unlock(struct efx_nic *efx, const struct falcon_spi_device *spi)
93 const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
98 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
99 &status, sizeof(status));
103 if (!(status & unlock_mask))
104 return 0; /* already unlocked */
106 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
109 rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
113 status &= ~unlock_mask;
114 rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
115 NULL, sizeof(status));
118 rc = falcon_spi_wait_write(efx, spi);
126 falcon_spi_erase(struct efx_mtd_partition *part, loff_t start, size_t len)
128 const struct falcon_spi_device *spi = part->falcon.spi;
129 struct efx_nic *efx = part->mtd.priv;
130 unsigned pos, block_len;
131 u8 empty[FALCON_SPI_VERIFY_BUF_LEN];
132 u8 buffer[FALCON_SPI_VERIFY_BUF_LEN];
135 if (len != spi->erase_size)
138 if (spi->erase_command == 0)
141 rc = falcon_spi_unlock(efx, spi);
144 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
147 rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
151 rc = falcon_spi_slow_wait(part, false);
153 /* Verify the entire region has been wiped */
154 memset(empty, 0xff, sizeof(empty));
155 for (pos = 0; pos < len; pos += block_len) {
156 block_len = min(len - pos, sizeof(buffer));
157 rc = falcon_spi_read(efx, spi, start + pos, block_len,
161 if (memcmp(empty, buffer, block_len))
164 /* Avoid locking up the system */
166 if (signal_pending(current))
175 static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
177 struct efx_nic *efx = mtd->priv;
180 rc = efx->mtd_ops->erase(mtd, erase->addr, erase->len);
182 erase->state = MTD_ERASE_DONE;
184 erase->state = MTD_ERASE_FAILED;
185 erase->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
187 mtd_erase_callback(erase);
191 static void efx_mtd_sync(struct mtd_info *mtd)
193 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
194 struct efx_nic *efx = mtd->priv;
197 rc = efx->mtd_ops->sync(mtd);
199 pr_err("%s: %s sync failed (%d)\n",
200 part->name, part->dev_type_name, rc);
203 static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
208 rc = mtd_device_unregister(&part->mtd);
214 list_del(&part->node);
217 static void efx_mtd_rename_partition(struct efx_mtd_partition *part)
219 struct efx_nic *efx = part->mtd.priv;
221 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
222 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
223 efx->name, part->type_name, part->mcdi.fw_subtype);
225 snprintf(part->name, sizeof(part->name), "%s %s",
226 efx->name, part->type_name);
229 static int efx_mtd_add(struct efx_nic *efx,
230 struct efx_mtd_partition *parts, size_t n_parts)
232 struct efx_mtd_partition *part;
235 for (i = 0; i < n_parts; i++) {
238 part->mtd.writesize = 1;
240 part->mtd.owner = THIS_MODULE;
241 part->mtd.priv = efx;
242 part->mtd.name = part->name;
243 part->mtd._erase = efx_mtd_erase;
244 part->mtd._read = efx->mtd_ops->read;
245 part->mtd._write = efx->mtd_ops->write;
246 part->mtd._sync = efx_mtd_sync;
248 efx_mtd_rename_partition(part);
250 if (mtd_device_register(&part->mtd, NULL, 0))
253 /* Add to list in order - efx_mtd_remove() depends on this */
254 list_add_tail(&part->node, &efx->mtd_list);
261 efx_mtd_remove_partition(&parts[i]);
262 /* Failure is unlikely here, but probably means we're out of memory */
266 void efx_mtd_remove(struct efx_nic *efx)
268 struct efx_mtd_partition *parts, *part, *next;
270 WARN_ON(efx_dev_registered(efx));
272 if (list_empty(&efx->mtd_list))
275 parts = list_first_entry(&efx->mtd_list, struct efx_mtd_partition,
278 list_for_each_entry_safe(part, next, &efx->mtd_list, node)
279 efx_mtd_remove_partition(part);
284 void efx_mtd_rename(struct efx_nic *efx)
286 struct efx_mtd_partition *part;
290 list_for_each_entry(part, &efx->mtd_list, node)
291 efx_mtd_rename_partition(part);
294 int efx_mtd_probe(struct efx_nic *efx)
296 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
297 return siena_mtd_probe(efx);
299 return falcon_mtd_probe(efx);
302 /* Implementation of MTD operations for Falcon */
304 static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
305 size_t len, size_t *retlen, u8 *buffer)
307 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
308 struct efx_nic *efx = mtd->priv;
309 struct falcon_nic_data *nic_data = efx->nic_data;
312 rc = mutex_lock_interruptible(&nic_data->spi_lock);
315 rc = falcon_spi_read(efx, part->falcon.spi, part->falcon.offset + start,
316 len, retlen, buffer);
317 mutex_unlock(&nic_data->spi_lock);
321 static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
323 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
324 struct efx_nic *efx = mtd->priv;
325 struct falcon_nic_data *nic_data = efx->nic_data;
328 rc = mutex_lock_interruptible(&nic_data->spi_lock);
331 rc = falcon_spi_erase(part, part->falcon.offset + start, len);
332 mutex_unlock(&nic_data->spi_lock);
336 static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
337 size_t len, size_t *retlen, const u8 *buffer)
339 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
340 struct efx_nic *efx = mtd->priv;
341 struct falcon_nic_data *nic_data = efx->nic_data;
344 rc = mutex_lock_interruptible(&nic_data->spi_lock);
347 rc = falcon_spi_write(efx, part->falcon.spi,
348 part->falcon.offset + start, len, retlen, buffer);
349 mutex_unlock(&nic_data->spi_lock);
353 static int falcon_mtd_sync(struct mtd_info *mtd)
355 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
356 struct efx_nic *efx = mtd->priv;
357 struct falcon_nic_data *nic_data = efx->nic_data;
360 mutex_lock(&nic_data->spi_lock);
361 rc = falcon_spi_slow_wait(part, true);
362 mutex_unlock(&nic_data->spi_lock);
366 static const struct efx_mtd_ops falcon_mtd_ops = {
367 .read = falcon_mtd_read,
368 .erase = falcon_mtd_erase,
369 .write = falcon_mtd_write,
370 .sync = falcon_mtd_sync,
373 static int falcon_mtd_probe(struct efx_nic *efx)
375 struct falcon_nic_data *nic_data = efx->nic_data;
376 struct efx_mtd_partition *parts;
377 struct falcon_spi_device *spi;
383 efx->mtd_ops = &falcon_mtd_ops;
385 /* Allocate space for maximum number of partitions */
386 parts = kcalloc(2, sizeof(*parts), GFP_KERNEL);
389 spi = &nic_data->spi_flash;
390 if (falcon_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) {
391 parts[n_parts].falcon.spi = spi;
392 parts[n_parts].falcon.offset = FALCON_FLASH_BOOTCODE_START;
393 parts[n_parts].dev_type_name = "flash";
394 parts[n_parts].type_name = "sfc_flash_bootrom";
395 parts[n_parts].mtd.type = MTD_NORFLASH;
396 parts[n_parts].mtd.flags = MTD_CAP_NORFLASH;
397 parts[n_parts].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
398 parts[n_parts].mtd.erasesize = spi->erase_size;
402 spi = &nic_data->spi_eeprom;
403 if (falcon_spi_present(spi) && spi->size > FALCON_EEPROM_BOOTCONFIG_START) {
404 parts[n_parts].falcon.spi = spi;
405 parts[n_parts].falcon.offset = FALCON_EEPROM_BOOTCONFIG_START;
406 parts[n_parts].dev_type_name = "EEPROM";
407 parts[n_parts].type_name = "sfc_bootconfig";
408 parts[n_parts].mtd.type = MTD_RAM;
409 parts[n_parts].mtd.flags = MTD_CAP_RAM;
410 parts[n_parts].mtd.size =
411 min(spi->size, FALCON_EEPROM_BOOTCONFIG_END) -
412 FALCON_EEPROM_BOOTCONFIG_START;
413 parts[n_parts].mtd.erasesize = spi->erase_size;
417 rc = efx_mtd_add(efx, parts, n_parts);
423 /* Implementation of MTD operations for Siena */
425 static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
426 size_t len, size_t *retlen, u8 *buffer)
428 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
429 struct efx_nic *efx = mtd->priv;
430 loff_t offset = start;
431 loff_t end = min_t(loff_t, start + len, mtd->size);
435 while (offset < end) {
436 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
437 rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
445 *retlen = offset - start;
449 static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
451 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
452 struct efx_nic *efx = mtd->priv;
453 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
454 loff_t end = min_t(loff_t, start + len, mtd->size);
455 size_t chunk = part->mtd.erasesize;
458 if (!part->mcdi.updating) {
459 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
462 part->mcdi.updating = true;
465 /* The MCDI interface can in fact do multiple erase blocks at once;
466 * but erasing may be slow, so we make multiple calls here to avoid
467 * tripping the MCDI RPC timeout. */
468 while (offset < end) {
469 rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
479 static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
480 size_t len, size_t *retlen, const u8 *buffer)
482 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
483 struct efx_nic *efx = mtd->priv;
484 loff_t offset = start;
485 loff_t end = min_t(loff_t, start + len, mtd->size);
489 if (!part->mcdi.updating) {
490 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
493 part->mcdi.updating = true;
496 while (offset < end) {
497 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
498 rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
506 *retlen = offset - start;
510 static int siena_mtd_sync(struct mtd_info *mtd)
512 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
513 struct efx_nic *efx = mtd->priv;
516 if (part->mcdi.updating) {
517 part->mcdi.updating = false;
518 rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
524 static const struct efx_mtd_ops siena_mtd_ops = {
525 .read = siena_mtd_read,
526 .erase = siena_mtd_erase,
527 .write = siena_mtd_write,
528 .sync = siena_mtd_sync,
531 struct siena_nvram_type_info {
536 static const struct siena_nvram_type_info siena_nvram_types[] = {
537 [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
538 [MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
539 [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
540 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
541 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
542 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
543 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
544 [MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
545 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
546 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
547 [MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
548 [MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
549 [MC_CMD_NVRAM_TYPE_FPGA] = { 0, "sfc_fpga" },
552 static int siena_mtd_probe_partition(struct efx_nic *efx,
553 struct efx_mtd_partition *part,
556 const struct siena_nvram_type_info *info;
557 size_t size, erase_size;
561 if (type >= ARRAY_SIZE(siena_nvram_types) ||
562 siena_nvram_types[type].name == NULL)
565 info = &siena_nvram_types[type];
567 if (info->port != efx_port_num(efx))
570 rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
574 return -ENODEV; /* hide it */
576 part->mcdi.nvram_type = type;
577 part->dev_type_name = "Siena NVRAM manager";
578 part->type_name = info->name;
580 part->mtd.type = MTD_NORFLASH;
581 part->mtd.flags = MTD_CAP_NORFLASH;
582 part->mtd.size = size;
583 part->mtd.erasesize = erase_size;
588 static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
589 struct efx_mtd_partition *parts,
592 uint16_t fw_subtype_list[
593 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM];
597 rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list, NULL);
601 for (i = 0; i < n_parts; i++)
602 parts[i].mcdi.fw_subtype =
603 fw_subtype_list[parts[i].mcdi.nvram_type];
608 static int siena_mtd_probe(struct efx_nic *efx)
610 struct efx_mtd_partition *parts;
618 efx->mtd_ops = &siena_mtd_ops;
620 rc = efx_mcdi_nvram_types(efx, &nvram_types);
624 parts = kcalloc(hweight32(nvram_types), sizeof(*parts), GFP_KERNEL);
631 while (nvram_types != 0) {
632 if (nvram_types & 1) {
633 rc = siena_mtd_probe_partition(efx, &parts[n_parts],
637 else if (rc != -ENODEV)
644 rc = siena_mtd_get_fw_subtypes(efx, parts, n_parts);
648 rc = efx_mtd_add(efx, parts, n_parts);