1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
35 /**************************************************************************
39 **************************************************************************/
41 #define EFX_DRIVER_VERSION "3.2"
44 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
47 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
48 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
51 /**************************************************************************
55 **************************************************************************/
57 #define EFX_MAX_CHANNELS 32U
58 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
59 #define EFX_EXTRA_CHANNEL_IOV 0
60 #define EFX_EXTRA_CHANNEL_PTP 1
61 #define EFX_MAX_EXTRA_CHANNELS 2U
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
66 #define EFX_MAX_TX_TC 2
67 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
68 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
69 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
70 #define EFX_TXQ_TYPES 4
71 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
73 /* Maximum possible MTU the driver supports */
74 #define EFX_MAX_MTU (9 * 1024)
76 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
77 * and should be a multiple of the cache line size.
79 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
81 /* If possible, we should ensure cache line alignment at start and end
82 * of every buffer. Otherwise, we just need to ensure 4-byte
83 * alignment of the network header.
86 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
88 #define EFX_RX_BUF_ALIGNMENT 4
91 /* Forward declare Precision Time Protocol (PTP) support structure. */
94 struct efx_self_tests;
97 * struct efx_buffer - A general-purpose DMA buffer
98 * @addr: host base address of the buffer
99 * @dma_addr: DMA base address of the buffer
100 * @len: Buffer length, in bytes
102 * The NIC uses these buffers for its interrupt status registers and
112 * struct efx_special_buffer - DMA buffer entered into buffer table
113 * @buf: Standard &struct efx_buffer
114 * @index: Buffer index within controller;s buffer table
115 * @entries: Number of buffer table entries
117 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
118 * Event and descriptor rings are addressed via one or more buffer
119 * table entries (and so can be physically non-contiguous, although we
120 * currently do not take advantage of that). On Falcon and Siena we
121 * have to take care of allocating and initialising the entries
122 * ourselves. On later hardware this is managed by the firmware and
123 * @index and @entries are left as 0.
125 struct efx_special_buffer {
126 struct efx_buffer buf;
128 unsigned int entries;
132 * struct efx_tx_buffer - buffer state for a TX descriptor
133 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
134 * freed when descriptor completes
135 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
136 * freed when descriptor completes.
137 * @dma_addr: DMA address of the fragment.
138 * @flags: Flags for allocation and DMA mapping type
139 * @len: Length of this fragment.
140 * This field is zero when the queue slot is empty.
141 * @unmap_len: Length of this fragment to unmap
143 struct efx_tx_buffer {
145 const struct sk_buff *skb;
149 unsigned short flags;
151 unsigned short unmap_len;
153 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
154 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
155 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
156 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
159 * struct efx_tx_queue - An Efx TX queue
161 * This is a ring buffer of TX fragments.
162 * Since the TX completion path always executes on the same
163 * CPU and the xmit path can operate on different CPUs,
164 * performance is increased by ensuring that the completion
165 * path and the xmit path operate on different cache lines.
166 * This is particularly important if the xmit path is always
167 * executing on one CPU which is different from the completion
168 * path. There is also a cache line for members which are
169 * read but not written on the fast path.
171 * @efx: The associated Efx NIC
172 * @queue: DMA queue number
173 * @channel: The associated channel
174 * @core_txq: The networking core TX queue structure
175 * @buffer: The software buffer ring
176 * @tsoh_page: Array of pages of TSO header buffers
177 * @txd: The hardware descriptor ring
178 * @ptr_mask: The size of the ring minus 1.
179 * @initialised: Has hardware queue been initialised?
180 * @read_count: Current read pointer.
181 * This is the number of buffers that have been removed from both rings.
182 * @old_write_count: The value of @write_count when last checked.
183 * This is here for performance reasons. The xmit path will
184 * only get the up-to-date value of @write_count if this
185 * variable indicates that the queue is empty. This is to
186 * avoid cache-line ping-pong between the xmit path and the
188 * @insert_count: Current insert pointer
189 * This is the number of buffers that have been added to the
191 * @write_count: Current write pointer
192 * This is the number of buffers that have been added to the
194 * @old_read_count: The value of read_count when last checked.
195 * This is here for performance reasons. The xmit path will
196 * only get the up-to-date value of read_count if this
197 * variable indicates that the queue is full. This is to
198 * avoid cache-line ping-pong between the xmit path and the
200 * @tso_bursts: Number of times TSO xmit invoked by kernel
201 * @tso_long_headers: Number of packets with headers too long for standard
203 * @tso_packets: Number of packets via the TSO xmit path
204 * @pushes: Number of times the TX push feature has been used
205 * @empty_read_count: If the completion path has seen the queue as empty
206 * and the transmission path has not yet checked this, the value of
207 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
209 struct efx_tx_queue {
210 /* Members which don't change on the fast path */
211 struct efx_nic *efx ____cacheline_aligned_in_smp;
213 struct efx_channel *channel;
214 struct netdev_queue *core_txq;
215 struct efx_tx_buffer *buffer;
216 struct efx_buffer *tsoh_page;
217 struct efx_special_buffer txd;
218 unsigned int ptr_mask;
221 /* Members used mainly on the completion path */
222 unsigned int read_count ____cacheline_aligned_in_smp;
223 unsigned int old_write_count;
225 /* Members used only on the xmit path */
226 unsigned int insert_count ____cacheline_aligned_in_smp;
227 unsigned int write_count;
228 unsigned int old_read_count;
229 unsigned int tso_bursts;
230 unsigned int tso_long_headers;
231 unsigned int tso_packets;
234 /* Members shared between paths and sometimes updated */
235 unsigned int empty_read_count ____cacheline_aligned_in_smp;
236 #define EFX_EMPTY_COUNT_VALID 0x80000000
237 atomic_t flush_outstanding;
241 * struct efx_rx_buffer - An Efx RX data buffer
242 * @dma_addr: DMA base address of the buffer
243 * @page: The associated page buffer.
244 * Will be %NULL if the buffer slot is currently free.
245 * @page_offset: If pending: offset in @page of DMA base address.
246 * If completed: offset in @page of Ethernet header.
247 * @len: If pending: length for DMA descriptor.
248 * If completed: received length, excluding hash prefix.
249 * @flags: Flags for buffer and packet state. These are only set on the
250 * first buffer of a scattered packet.
252 struct efx_rx_buffer {
259 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
260 #define EFX_RX_PKT_CSUMMED 0x0002
261 #define EFX_RX_PKT_DISCARD 0x0004
262 #define EFX_RX_PKT_TCP 0x0040
265 * struct efx_rx_page_state - Page-based rx buffer state
267 * Inserted at the start of every page allocated for receive buffers.
268 * Used to facilitate sharing dma mappings between recycled rx buffers
269 * and those passed up to the kernel.
271 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
272 * When refcnt falls to zero, the page is unmapped for dma
273 * @dma_addr: The dma address of this page.
275 struct efx_rx_page_state {
279 unsigned int __pad[0] ____cacheline_aligned;
283 * struct efx_rx_queue - An Efx RX queue
284 * @efx: The associated Efx NIC
285 * @core_index: Index of network core RX queue. Will be >= 0 iff this
286 * is associated with a real RX queue.
287 * @buffer: The software buffer ring
288 * @rxd: The hardware descriptor ring
289 * @ptr_mask: The size of the ring minus 1.
290 * @refill_enabled: Enable refill whenever fill level is low
291 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
292 * @rxq_flush_pending.
293 * @added_count: Number of buffers added to the receive queue.
294 * @notified_count: Number of buffers given to NIC (<= @added_count).
295 * @removed_count: Number of buffers removed from the receive queue.
296 * @scatter_n: Number of buffers used by current packet
297 * @page_ring: The ring to store DMA mapped pages for reuse.
298 * @page_add: Counter to calculate the write pointer for the recycle ring.
299 * @page_remove: Counter to calculate the read pointer for the recycle ring.
300 * @page_recycle_count: The number of pages that have been recycled.
301 * @page_recycle_failed: The number of pages that couldn't be recycled because
302 * the kernel still held a reference to them.
303 * @page_recycle_full: The number of pages that were released because the
304 * recycle ring was full.
305 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
306 * @max_fill: RX descriptor maximum fill level (<= ring size)
307 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
309 * @min_fill: RX descriptor minimum non-zero fill level.
310 * This records the minimum fill level observed when a ring
311 * refill was triggered.
312 * @recycle_count: RX buffer recycle counter.
313 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
315 struct efx_rx_queue {
318 struct efx_rx_buffer *buffer;
319 struct efx_special_buffer rxd;
320 unsigned int ptr_mask;
324 unsigned int added_count;
325 unsigned int notified_count;
326 unsigned int removed_count;
327 unsigned int scatter_n;
328 struct page **page_ring;
329 unsigned int page_add;
330 unsigned int page_remove;
331 unsigned int page_recycle_count;
332 unsigned int page_recycle_failed;
333 unsigned int page_recycle_full;
334 unsigned int page_ptr_mask;
335 unsigned int max_fill;
336 unsigned int fast_fill_trigger;
337 unsigned int min_fill;
338 unsigned int min_overfill;
339 unsigned int recycle_count;
340 struct timer_list slow_fill;
341 unsigned int slow_fill_count;
344 enum efx_rx_alloc_method {
345 RX_ALLOC_METHOD_AUTO = 0,
346 RX_ALLOC_METHOD_SKB = 1,
347 RX_ALLOC_METHOD_PAGE = 2,
351 * struct efx_channel - An Efx channel
353 * A channel comprises an event queue, at least one TX queue, at least
354 * one RX queue, and an associated tasklet for processing the event
357 * @efx: Associated Efx NIC
358 * @channel: Channel instance number
359 * @type: Channel type definition
360 * @eventq_init: Event queue initialised flag
361 * @enabled: Channel enabled indicator
362 * @irq: IRQ number (MSI and MSI-X only)
363 * @irq_moderation: IRQ moderation value (in hardware ticks)
364 * @napi_dev: Net device used with NAPI
365 * @napi_str: NAPI control structure
366 * @eventq: Event queue buffer
367 * @eventq_mask: Event queue pointer mask
368 * @eventq_read_ptr: Event queue read pointer
369 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
370 * @irq_count: Number of IRQs since last adaptive moderation decision
371 * @irq_mod_score: IRQ moderation score
372 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
373 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
374 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
375 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
376 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
377 * @n_rx_overlength: Count of RX_OVERLENGTH errors
378 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
379 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
380 * lack of descriptors
381 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
382 * __efx_rx_packet(), or zero if there is none
383 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
384 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
385 * @rx_queue: RX queue for this channel
386 * @tx_queue: TX queues for this channel
391 const struct efx_channel_type *type;
395 unsigned int irq_moderation;
396 struct net_device *napi_dev;
397 struct napi_struct napi_str;
398 struct efx_special_buffer eventq;
399 unsigned int eventq_mask;
400 unsigned int eventq_read_ptr;
403 unsigned int irq_count;
404 unsigned int irq_mod_score;
405 #ifdef CONFIG_RFS_ACCEL
406 unsigned int rfs_filters_added;
409 unsigned n_rx_tobe_disc;
410 unsigned n_rx_ip_hdr_chksum_err;
411 unsigned n_rx_tcp_udp_chksum_err;
412 unsigned n_rx_mcast_mismatch;
413 unsigned n_rx_frm_trunc;
414 unsigned n_rx_overlength;
415 unsigned n_skbuff_leaks;
416 unsigned int n_rx_nodesc_trunc;
418 unsigned int rx_pkt_n_frags;
419 unsigned int rx_pkt_index;
421 struct efx_rx_queue rx_queue;
422 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
426 * struct efx_msi_context - Context for each MSI
427 * @efx: The associated NIC
428 * @index: Index of the channel/IRQ
429 * @name: Name of the channel/IRQ
431 * Unlike &struct efx_channel, this is never reallocated and is always
432 * safe for the IRQ handler to access.
434 struct efx_msi_context {
437 char name[IFNAMSIZ + 6];
441 * struct efx_channel_type - distinguishes traffic and extra channels
442 * @handle_no_channel: Handle failure to allocate an extra channel
443 * @pre_probe: Set up extra state prior to initialisation
444 * @post_remove: Tear down extra state after finalisation, if allocated.
445 * May be called on channels that have not been probed.
446 * @get_name: Generate the channel's name (used for its IRQ handler)
447 * @copy: Copy the channel state prior to reallocation. May be %NULL if
448 * reallocation is not supported.
449 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
450 * @keep_eventq: Flag for whether event queue should be kept initialised
451 * while the device is stopped
453 struct efx_channel_type {
454 void (*handle_no_channel)(struct efx_nic *);
455 int (*pre_probe)(struct efx_channel *);
456 void (*post_remove)(struct efx_channel *);
457 void (*get_name)(struct efx_channel *, char *buf, size_t len);
458 struct efx_channel *(*copy)(const struct efx_channel *);
459 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
469 #define STRING_TABLE_LOOKUP(val, member) \
470 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
472 extern const char *const efx_loopback_mode_names[];
473 extern const unsigned int efx_loopback_mode_max;
474 #define LOOPBACK_MODE(efx) \
475 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
477 extern const char *const efx_reset_type_names[];
478 extern const unsigned int efx_reset_type_max;
479 #define RESET_TYPE(type) \
480 STRING_TABLE_LOOKUP(type, efx_reset_type)
483 /* Be careful if altering to correct macro below */
484 EFX_INT_MODE_MSIX = 0,
485 EFX_INT_MODE_MSI = 1,
486 EFX_INT_MODE_LEGACY = 2,
487 EFX_INT_MODE_MAX /* Insert any new items before this */
489 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
492 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
493 STATE_READY = 1, /* hardware ready and netdev registered */
494 STATE_DISABLED = 2, /* device disabled due to hardware errors */
495 STATE_RECOVERY = 3, /* device recovering from PCI error */
499 * Alignment of the skb->head which wraps a page-allocated RX buffer
501 * The skb allocated to wrap an rx_buffer can have this alignment. Since
502 * the data is memcpy'd from the rx_buf, it does not need to be equal to
505 #define EFX_PAGE_SKB_ALIGN 2
507 /* Forward declaration */
510 /* Pseudo bit-mask flow control field */
511 #define EFX_FC_RX FLOW_CTRL_RX
512 #define EFX_FC_TX FLOW_CTRL_TX
513 #define EFX_FC_AUTO 4
516 * struct efx_link_state - Current state of the link
518 * @fd: Link is full-duplex
519 * @fc: Actual flow control flags
520 * @speed: Link speed (Mbps)
522 struct efx_link_state {
529 static inline bool efx_link_state_equal(const struct efx_link_state *left,
530 const struct efx_link_state *right)
532 return left->up == right->up && left->fd == right->fd &&
533 left->fc == right->fc && left->speed == right->speed;
537 * struct efx_phy_operations - Efx PHY operations table
538 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
539 * efx->loopback_modes.
540 * @init: Initialise PHY
541 * @fini: Shut down PHY
542 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
543 * @poll: Update @link_state and report whether it changed.
544 * Serialised by the mac_lock.
545 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
546 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
547 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
548 * (only needed where AN bit is set in mmds)
549 * @test_alive: Test that PHY is 'alive' (online)
550 * @test_name: Get the name of a PHY-specific test/result
551 * @run_tests: Run tests and record results as appropriate (offline).
552 * Flags are the ethtool tests flags.
554 struct efx_phy_operations {
555 int (*probe) (struct efx_nic *efx);
556 int (*init) (struct efx_nic *efx);
557 void (*fini) (struct efx_nic *efx);
558 void (*remove) (struct efx_nic *efx);
559 int (*reconfigure) (struct efx_nic *efx);
560 bool (*poll) (struct efx_nic *efx);
561 void (*get_settings) (struct efx_nic *efx,
562 struct ethtool_cmd *ecmd);
563 int (*set_settings) (struct efx_nic *efx,
564 struct ethtool_cmd *ecmd);
565 void (*set_npage_adv) (struct efx_nic *efx, u32);
566 int (*test_alive) (struct efx_nic *efx);
567 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
568 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
569 int (*get_module_eeprom) (struct efx_nic *efx,
570 struct ethtool_eeprom *ee,
572 int (*get_module_info) (struct efx_nic *efx,
573 struct ethtool_modinfo *modinfo);
577 * enum efx_phy_mode - PHY operating mode flags
578 * @PHY_MODE_NORMAL: on and should pass traffic
579 * @PHY_MODE_TX_DISABLED: on with TX disabled
580 * @PHY_MODE_LOW_POWER: set to low power through MDIO
581 * @PHY_MODE_OFF: switched off through external control
582 * @PHY_MODE_SPECIAL: on but will not pass traffic
586 PHY_MODE_TX_DISABLED = 1,
587 PHY_MODE_LOW_POWER = 2,
589 PHY_MODE_SPECIAL = 8,
592 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
594 return !!(mode & ~PHY_MODE_TX_DISABLED);
598 * Efx extended statistics
600 * Not all statistics are provided by all supported MACs. The purpose
601 * is this structure is to contain the raw statistics provided by each
604 struct efx_mac_stats {
622 u64 tx_15xx_to_jumbo;
625 u64 tx_single_collision;
626 u64 tx_multiple_collision;
627 u64 tx_excessive_collision;
629 u64 tx_late_collision;
630 u64 tx_excessive_deferred;
632 u64 tx_mac_src_error;
652 u64 rx_15xx_to_jumbo;
655 u64 rx_bad_64_to_15xx;
656 u64 rx_bad_15xx_to_jumbo;
660 u64 rx_false_carrier;
664 u64 rx_internal_error;
668 /* Number of bits used in a multicast filter hash address */
669 #define EFX_MCAST_HASH_BITS 8
671 /* Number of (single-bit) entries in a multicast filter hash */
672 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
674 /* An Efx multicast filter hash */
675 union efx_multicast_hash {
676 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
677 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
684 * struct efx_nic - an Efx NIC
685 * @name: Device name (net device name or bus id before net device registered)
686 * @pci_dev: The PCI device
687 * @type: Controller type attributes
688 * @legacy_irq: IRQ number
689 * @workqueue: Workqueue for port reconfigures and the HW monitor.
690 * Work items do not hold and must not acquire RTNL.
691 * @workqueue_name: Name of workqueue
692 * @reset_work: Scheduled reset workitem
693 * @membase_phys: Memory BAR value as physical address
694 * @membase: Memory BAR value
695 * @interrupt_mode: Interrupt mode
696 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
697 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
698 * @irq_rx_moderation: IRQ moderation time for RX event queues
699 * @msg_enable: Log message enable flags
700 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
701 * @reset_pending: Bitmask for pending resets
702 * @tx_queue: TX DMA queues
703 * @rx_queue: RX DMA queues
705 * @msi_context: Context for each MSI
706 * @extra_channel_types: Types of extra (non-traffic) channels that
707 * should be allocated for this NIC
708 * @rxq_entries: Size of receive queues requested by user.
709 * @txq_entries: Size of transmit queues requested by user.
710 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
711 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
712 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
713 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
714 * @sram_lim_qw: Qword address limit of SRAM
715 * @next_buffer_table: First available buffer table id
716 * @n_channels: Number of channels in use
717 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
718 * @n_tx_channels: Number of channels used for TX
719 * @rx_dma_len: Current maximum RX DMA length
720 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
721 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
722 * for use in sk_buff::truesize
723 * @rx_hash_key: Toeplitz hash key for RSS
724 * @rx_indir_table: Indirection table for RSS
725 * @rx_scatter: Scatter mode enabled for receives
726 * @int_error_count: Number of internal errors seen recently
727 * @int_error_expire: Time at which error count will be expired
728 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
729 * acknowledge but do nothing else.
730 * @irq_status: Interrupt status buffer
731 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
732 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
733 * @selftest_work: Work item for asynchronous self-test
734 * @mtd_list: List of MTDs attached to the NIC
735 * @nic_data: Hardware dependent state
736 * @mcdi: Management-Controller-to-Driver Interface state
737 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
738 * efx_monitor() and efx_reconfigure_port()
739 * @port_enabled: Port enabled indicator.
740 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
741 * efx_mac_work() with kernel interfaces. Safe to read under any
742 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
743 * be held to modify it.
744 * @port_initialized: Port initialized?
745 * @net_dev: Operating system network device. Consider holding the rtnl lock
746 * @stats_buffer: DMA buffer for statistics
747 * @phy_type: PHY type
748 * @phy_op: PHY interface
749 * @phy_data: PHY private data (including PHY-specific stats)
750 * @mdio: PHY MDIO interface
751 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
752 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
753 * @link_advertising: Autonegotiation advertising flags
754 * @link_state: Current state of the link
755 * @n_link_state_changes: Number of times the link has changed state
756 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
757 * Protected by @mac_lock.
758 * @multicast_hash: Multicast hash table for Falcon-arch.
759 * Protected by @mac_lock.
760 * @wanted_fc: Wanted flow control flags
761 * @fc_disable: When non-zero flow control is disabled. Typically used to
762 * ensure that network back pressure doesn't delay dma queue flushes.
763 * Serialised by the rtnl lock.
764 * @mac_work: Work item for changing MAC promiscuity and multicast hash
765 * @loopback_mode: Loopback status
766 * @loopback_modes: Supported loopback mode bitmask
767 * @loopback_selftest: Offline self-test private state
768 * @filter_lock: Filter table lock
769 * @filter_state: Architecture-dependent filter table state
770 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
771 * indexed by filter ID
772 * @rps_expire_index: Next index to check for expiry in @rps_flow_id
773 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
774 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
775 * Decremented when the efx_flush_rx_queue() is called.
776 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
777 * completed (either success or failure). Not used when MCDI is used to
778 * flush receive queues.
779 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
780 * @vf: Array of &struct efx_vf objects.
781 * @vf_count: Number of VFs intended to be enabled.
782 * @vf_init_count: Number of VFs that have been fully initialised.
783 * @vi_scale: log2 number of vnics per VF.
784 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
785 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
786 * @local_addr_list: List of local addresses. Protected by %local_lock.
787 * @local_page_list: List of DMA addressable pages used to broadcast
788 * %local_addr_list. Protected by %local_lock.
789 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
790 * @peer_work: Work item to broadcast peer addresses to VMs.
791 * @ptp_data: PTP state data
792 * @monitor_work: Hardware monitor workitem
793 * @biu_lock: BIU (bus interface unit) lock
794 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
795 * field is used by efx_test_interrupts() to verify that an
796 * interrupt has occurred.
797 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
798 * @mac_stats: MAC statistics. These include all statistics the MACs
799 * can provide. Generic code converts these into a standard
800 * &struct net_device_stats.
801 * @stats_lock: Statistics update lock. Serialises statistics fetches
802 * and access to @mac_stats.
804 * This is stored in the private area of the &struct net_device.
807 /* The following fields should be written very rarely */
810 struct pci_dev *pci_dev;
811 unsigned int port_num;
812 const struct efx_nic_type *type;
814 bool eeh_disabled_legacy_irq;
815 struct workqueue_struct *workqueue;
816 char workqueue_name[16];
817 struct work_struct reset_work;
818 resource_size_t membase_phys;
819 void __iomem *membase;
821 enum efx_int_mode interrupt_mode;
822 unsigned int timer_quantum_ns;
823 bool irq_rx_adaptive;
824 unsigned int irq_rx_moderation;
827 enum nic_state state;
828 unsigned long reset_pending;
830 struct efx_channel *channel[EFX_MAX_CHANNELS];
831 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
832 const struct efx_channel_type *
833 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
835 unsigned rxq_entries;
836 unsigned txq_entries;
837 unsigned int txq_stop_thresh;
838 unsigned int txq_wake_thresh;
842 unsigned sram_lim_qw;
843 unsigned next_buffer_table;
845 unsigned int max_channels;
847 unsigned n_rx_channels;
849 unsigned tx_channel_offset;
850 unsigned n_tx_channels;
851 unsigned int rx_dma_len;
852 unsigned int rx_buffer_order;
853 unsigned int rx_buffer_truesize;
854 unsigned int rx_page_buf_step;
855 unsigned int rx_bufs_per_page;
856 unsigned int rx_pages_per_batch;
858 u32 rx_indir_table[128];
861 unsigned int_error_count;
862 unsigned long int_error_expire;
864 bool irq_soft_enabled;
865 struct efx_buffer irq_status;
866 unsigned irq_zero_count;
868 struct delayed_work selftest_work;
870 #ifdef CONFIG_SFC_MTD
871 struct list_head mtd_list;
875 struct efx_mcdi_data *mcdi;
877 struct mutex mac_lock;
878 struct work_struct mac_work;
881 bool port_initialized;
882 struct net_device *net_dev;
884 struct efx_buffer stats_buffer;
886 unsigned int phy_type;
887 const struct efx_phy_operations *phy_op;
889 struct mdio_if_info mdio;
890 unsigned int mdio_bus;
891 enum efx_phy_mode phy_mode;
893 u32 link_advertising;
894 struct efx_link_state link_state;
895 unsigned int n_link_state_changes;
898 union efx_multicast_hash multicast_hash;
903 enum efx_loopback_mode loopback_mode;
906 void *loopback_selftest;
908 spinlock_t filter_lock;
910 #ifdef CONFIG_RFS_ACCEL
912 unsigned int rps_expire_index;
915 atomic_t drain_pending;
916 atomic_t rxq_flush_pending;
917 atomic_t rxq_flush_outstanding;
918 wait_queue_head_t flush_wq;
920 #ifdef CONFIG_SFC_SRIOV
921 struct efx_channel *vfdi_channel;
924 unsigned vf_init_count;
926 unsigned vf_buftbl_base;
927 struct efx_buffer vfdi_status;
928 struct list_head local_addr_list;
929 struct list_head local_page_list;
930 struct mutex local_lock;
931 struct work_struct peer_work;
934 struct efx_ptp_data *ptp_data;
936 /* The following fields may be written more often */
938 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
941 unsigned n_rx_nodesc_drop_cnt;
942 struct efx_mac_stats mac_stats;
943 spinlock_t stats_lock;
946 static inline int efx_dev_registered(struct efx_nic *efx)
948 return efx->net_dev->reg_state == NETREG_REGISTERED;
951 static inline unsigned int efx_port_num(struct efx_nic *efx)
953 return efx->port_num;
957 * struct efx_nic_type - Efx device type definition
958 * @mem_map_size: Get memory BAR mapped size
959 * @probe: Probe the controller
960 * @remove: Free resources allocated by probe()
961 * @init: Initialise the controller
962 * @dimension_resources: Dimension controller resources (buffer table,
963 * and VIs once the available interrupt resources are clear)
964 * @fini: Shut down the controller
965 * @monitor: Periodic function for polling link state and hardware monitor
966 * @map_reset_reason: Map ethtool reset reason to a reset method
967 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
968 * @reset: Reset the controller hardware and possibly the PHY. This will
969 * be called while the controller is uninitialised.
970 * @probe_port: Probe the MAC and PHY
971 * @remove_port: Free resources allocated by probe_port()
972 * @handle_global_event: Handle a "global" event (may be %NULL)
973 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
974 * @prepare_flush: Prepare the hardware for flushing the DMA queues
975 * (for Falcon architecture)
976 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
978 * @update_stats: Update statistics not provided by event handling
979 * @start_stats: Start the regular fetching of statistics
980 * @stop_stats: Stop the regular fetching of statistics
981 * @set_id_led: Set state of identifying LED or revert to automatic function
982 * @push_irq_moderation: Apply interrupt moderation value
983 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
984 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
985 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
986 * to the hardware. Serialised by the mac_lock.
987 * @check_mac_fault: Check MAC fault state. True if fault present.
988 * @get_wol: Get WoL configuration from driver state
989 * @set_wol: Push WoL configuration to the NIC
990 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
991 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
992 * expected to reset the NIC.
993 * @test_nvram: Test validity of NVRAM contents
994 * @mcdi_request: Send an MCDI request with the given header and SDU.
995 * The SDU length may be any value from 0 up to the protocol-
996 * defined maximum, but its buffer will be padded to a multiple
998 * @mcdi_poll_response: Test whether an MCDI response is available.
999 * @mcdi_read_response: Read the MCDI response PDU. The offset will
1000 * be a multiple of 4. The length may not be, but the buffer
1001 * will be padded so it is safe to round up.
1002 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
1003 * return an appropriate error code for aborting any current
1004 * request; otherwise return 0.
1005 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
1006 * be separately enabled after this.
1007 * @irq_test_generate: Generate a test IRQ
1008 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1009 * queue must be separately disabled before this.
1010 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
1011 * a pointer to the &struct efx_msi_context for the channel.
1012 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
1013 * is a pointer to the &struct efx_nic.
1014 * @tx_probe: Allocate resources for TX queue
1015 * @tx_init: Initialise TX queue on the NIC
1016 * @tx_remove: Free resources for TX queue
1017 * @tx_write: Write TX descriptors and doorbell
1018 * @rx_push_indir_table: Write RSS indirection table to the NIC
1019 * @rx_probe: Allocate resources for RX queue
1020 * @rx_init: Initialise RX queue on the NIC
1021 * @rx_remove: Free resources for RX queue
1022 * @rx_write: Write RX descriptors and doorbell
1023 * @rx_defer_refill: Generate a refill reminder event
1024 * @ev_probe: Allocate resources for event queue
1025 * @ev_init: Initialise event queue on the NIC
1026 * @ev_fini: Deinitialise event queue on the NIC
1027 * @ev_remove: Free resources for event queue
1028 * @ev_process: Process events for a queue, up to the given NAPI quota
1029 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1030 * @ev_test_generate: Generate a test event
1031 * @filter_table_probe: Probe filter capabilities and set up filter software state
1032 * @filter_table_restore: Restore filters removed from hardware
1033 * @filter_table_remove: Remove filters from hardware and tear down software state
1034 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1035 * @filter_insert: add or replace a filter
1036 * @filter_remove_safe: remove a filter by ID, carefully
1037 * @filter_get_safe: retrieve a filter by ID, carefully
1038 * @filter_clear_rx: remove RX filters by priority
1039 * @filter_count_rx_used: Get the number of filters in use at a given priority
1040 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1041 * @filter_get_rx_ids: Get list of RX filters at a given priority
1042 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
1043 * atomic. The hardware change may be asynchronous but should
1044 * not be delayed for long. It may fail if this can't be done
1046 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1047 * This must check whether the specified table entry is used by RFS
1048 * and that rps_may_expire_flow() returns true for it.
1049 * @revision: Hardware architecture revision
1050 * @txd_ptr_tbl_base: TX descriptor ring base address
1051 * @rxd_ptr_tbl_base: RX descriptor ring base address
1052 * @buf_tbl_base: Buffer table base address
1053 * @evq_ptr_tbl_base: Event queue pointer table base address
1054 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1055 * @max_dma_mask: Maximum possible DMA mask
1056 * @rx_buffer_hash_size: Size of hash at start of RX packet
1057 * @rx_buffer_padding: Size of padding at end of RX packet
1058 * @can_rx_scatter: NIC is able to scatter packet to multiple buffers
1059 * @max_interrupt_mode: Highest capability interrupt mode supported
1060 * from &enum efx_init_mode.
1061 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1062 * @offload_features: net_device feature flags for protocol offload
1063 * features implemented in hardware
1064 * @mcdi_max_ver: Maximum MCDI version supported
1066 struct efx_nic_type {
1067 unsigned int (*mem_map_size)(struct efx_nic *efx);
1068 int (*probe)(struct efx_nic *efx);
1069 void (*remove)(struct efx_nic *efx);
1070 int (*init)(struct efx_nic *efx);
1071 void (*dimension_resources)(struct efx_nic *efx);
1072 void (*fini)(struct efx_nic *efx);
1073 void (*monitor)(struct efx_nic *efx);
1074 enum reset_type (*map_reset_reason)(enum reset_type reason);
1075 int (*map_reset_flags)(u32 *flags);
1076 int (*reset)(struct efx_nic *efx, enum reset_type method);
1077 int (*probe_port)(struct efx_nic *efx);
1078 void (*remove_port)(struct efx_nic *efx);
1079 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
1080 int (*fini_dmaq)(struct efx_nic *efx);
1081 void (*prepare_flush)(struct efx_nic *efx);
1082 void (*finish_flush)(struct efx_nic *efx);
1083 void (*update_stats)(struct efx_nic *efx);
1084 void (*start_stats)(struct efx_nic *efx);
1085 void (*stop_stats)(struct efx_nic *efx);
1086 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
1087 void (*push_irq_moderation)(struct efx_channel *channel);
1088 int (*reconfigure_port)(struct efx_nic *efx);
1089 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
1090 int (*reconfigure_mac)(struct efx_nic *efx);
1091 bool (*check_mac_fault)(struct efx_nic *efx);
1092 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1093 int (*set_wol)(struct efx_nic *efx, u32 type);
1094 void (*resume_wol)(struct efx_nic *efx);
1095 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
1096 int (*test_nvram)(struct efx_nic *efx);
1097 void (*mcdi_request)(struct efx_nic *efx,
1098 const efx_dword_t *hdr, size_t hdr_len,
1099 const efx_dword_t *sdu, size_t sdu_len);
1100 bool (*mcdi_poll_response)(struct efx_nic *efx);
1101 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1102 size_t pdu_offset, size_t pdu_len);
1103 int (*mcdi_poll_reboot)(struct efx_nic *efx);
1104 void (*irq_enable_master)(struct efx_nic *efx);
1105 void (*irq_test_generate)(struct efx_nic *efx);
1106 void (*irq_disable_non_ev)(struct efx_nic *efx);
1107 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id);
1108 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id);
1109 int (*tx_probe)(struct efx_tx_queue *tx_queue);
1110 void (*tx_init)(struct efx_tx_queue *tx_queue);
1111 void (*tx_remove)(struct efx_tx_queue *tx_queue);
1112 void (*tx_write)(struct efx_tx_queue *tx_queue);
1113 void (*rx_push_indir_table)(struct efx_nic *efx);
1114 int (*rx_probe)(struct efx_rx_queue *rx_queue);
1115 void (*rx_init)(struct efx_rx_queue *rx_queue);
1116 void (*rx_remove)(struct efx_rx_queue *rx_queue);
1117 void (*rx_write)(struct efx_rx_queue *rx_queue);
1118 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue);
1119 int (*ev_probe)(struct efx_channel *channel);
1120 void (*ev_init)(struct efx_channel *channel);
1121 void (*ev_fini)(struct efx_channel *channel);
1122 void (*ev_remove)(struct efx_channel *channel);
1123 int (*ev_process)(struct efx_channel *channel, int quota);
1124 void (*ev_read_ack)(struct efx_channel *channel);
1125 void (*ev_test_generate)(struct efx_channel *channel);
1126 int (*filter_table_probe)(struct efx_nic *efx);
1127 void (*filter_table_restore)(struct efx_nic *efx);
1128 void (*filter_table_remove)(struct efx_nic *efx);
1129 void (*filter_update_rx_scatter)(struct efx_nic *efx);
1130 s32 (*filter_insert)(struct efx_nic *efx,
1131 struct efx_filter_spec *spec, bool replace);
1132 int (*filter_remove_safe)(struct efx_nic *efx,
1133 enum efx_filter_priority priority,
1135 int (*filter_get_safe)(struct efx_nic *efx,
1136 enum efx_filter_priority priority,
1137 u32 filter_id, struct efx_filter_spec *);
1138 void (*filter_clear_rx)(struct efx_nic *efx,
1139 enum efx_filter_priority priority);
1140 u32 (*filter_count_rx_used)(struct efx_nic *efx,
1141 enum efx_filter_priority priority);
1142 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx);
1143 s32 (*filter_get_rx_ids)(struct efx_nic *efx,
1144 enum efx_filter_priority priority,
1145 u32 *buf, u32 size);
1146 #ifdef CONFIG_RFS_ACCEL
1147 s32 (*filter_rfs_insert)(struct efx_nic *efx,
1148 struct efx_filter_spec *spec);
1149 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id,
1150 unsigned int index);
1154 unsigned int txd_ptr_tbl_base;
1155 unsigned int rxd_ptr_tbl_base;
1156 unsigned int buf_tbl_base;
1157 unsigned int evq_ptr_tbl_base;
1158 unsigned int evq_rptr_tbl_base;
1160 unsigned int rx_buffer_hash_size;
1161 unsigned int rx_buffer_padding;
1162 bool can_rx_scatter;
1163 unsigned int max_interrupt_mode;
1164 unsigned int timer_period_max;
1165 netdev_features_t offload_features;
1167 unsigned int max_rx_ip_filters;
1170 /**************************************************************************
1172 * Prototypes and inline functions
1174 *************************************************************************/
1176 static inline struct efx_channel *
1177 efx_get_channel(struct efx_nic *efx, unsigned index)
1179 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
1180 return efx->channel[index];
1183 /* Iterate over all used channels */
1184 #define efx_for_each_channel(_channel, _efx) \
1185 for (_channel = (_efx)->channel[0]; \
1187 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1188 (_efx)->channel[_channel->channel + 1] : NULL)
1190 /* Iterate over all used channels in reverse */
1191 #define efx_for_each_channel_rev(_channel, _efx) \
1192 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1194 _channel = _channel->channel ? \
1195 (_efx)->channel[_channel->channel - 1] : NULL)
1197 static inline struct efx_tx_queue *
1198 efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1200 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1201 type >= EFX_TXQ_TYPES);
1202 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1205 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1207 return channel->channel - channel->efx->tx_channel_offset <
1208 channel->efx->n_tx_channels;
1211 static inline struct efx_tx_queue *
1212 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1214 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1215 type >= EFX_TXQ_TYPES);
1216 return &channel->tx_queue[type];
1219 static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1221 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1222 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1225 /* Iterate over all TX queues belonging to a channel */
1226 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1227 if (!efx_channel_has_tx_queues(_channel)) \
1230 for (_tx_queue = (_channel)->tx_queue; \
1231 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1232 efx_tx_queue_used(_tx_queue); \
1235 /* Iterate over all possible TX queues belonging to a channel */
1236 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1237 if (!efx_channel_has_tx_queues(_channel)) \
1240 for (_tx_queue = (_channel)->tx_queue; \
1241 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1244 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1246 return channel->rx_queue.core_index >= 0;
1249 static inline struct efx_rx_queue *
1250 efx_channel_get_rx_queue(struct efx_channel *channel)
1252 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1253 return &channel->rx_queue;
1256 /* Iterate over all RX queues belonging to a channel */
1257 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1258 if (!efx_channel_has_rx_queue(_channel)) \
1261 for (_rx_queue = &(_channel)->rx_queue; \
1265 static inline struct efx_channel *
1266 efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1268 return container_of(rx_queue, struct efx_channel, rx_queue);
1271 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1273 return efx_rx_queue_channel(rx_queue)->channel;
1276 /* Returns a pointer to the specified receive buffer in the RX
1279 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1282 return &rx_queue->buffer[index];
1287 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1289 * This calculates the maximum frame length that will be used for a
1290 * given MTU. The frame length will be equal to the MTU plus a
1291 * constant amount of header space and padding. This is the quantity
1292 * that the net driver will program into the MAC as the maximum frame
1295 * The 10G MAC requires 8-byte alignment on the frame
1296 * length, so we round up to the nearest 8.
1298 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1299 * XGMII cycle). If the frame length reaches the maximum value in the
1300 * same cycle, the XMAC can miss the IPG altogether. We work around
1301 * this by adding a further 16 bytes.
1303 #define EFX_MAX_FRAME_LEN(mtu) \
1304 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1306 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1308 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1310 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1312 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1315 #endif /* EFX_NET_DRIVER_H */