1 /*******************************************************************************
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 The full GNU General Public License is included in this distribution in
16 the file called "COPYING".
18 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
19 *******************************************************************************/
21 #include <linux/etherdevice.h>
22 #include <linux/ethtool.h>
23 #include <linux/interrupt.h>
24 #include <linux/mii.h>
25 #include <linux/phy.h>
26 #include <linux/net_tstamp.h>
30 #include "dwmac_dma.h"
32 #define REG_SPACE_SIZE 0x1060
33 #define MAC100_ETHTOOL_NAME "st_mac100"
34 #define GMAC_ETHTOOL_NAME "st_gmac"
37 char stat_string[ETH_GSTRING_LEN];
42 #define STMMAC_STAT(m) \
43 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \
44 offsetof(struct stmmac_priv, xstats.m)}
46 static const struct stmmac_stats stmmac_gstrings_stats[] = {
48 STMMAC_STAT(tx_underflow),
49 STMMAC_STAT(tx_carrier),
50 STMMAC_STAT(tx_losscarrier),
51 STMMAC_STAT(vlan_tag),
52 STMMAC_STAT(tx_deferred),
54 STMMAC_STAT(tx_jabber),
55 STMMAC_STAT(tx_frame_flushed),
56 STMMAC_STAT(tx_payload_error),
57 STMMAC_STAT(tx_ip_header_error),
60 STMMAC_STAT(sa_filter_fail),
61 STMMAC_STAT(overflow_error),
62 STMMAC_STAT(ipc_csum_error),
63 STMMAC_STAT(rx_collision),
64 STMMAC_STAT(rx_crc_errors),
65 STMMAC_STAT(dribbling_bit),
66 STMMAC_STAT(rx_length),
68 STMMAC_STAT(rx_multicast),
69 STMMAC_STAT(rx_gmac_overflow),
70 STMMAC_STAT(rx_watchdog),
71 STMMAC_STAT(da_rx_filter_fail),
72 STMMAC_STAT(sa_rx_filter_fail),
73 STMMAC_STAT(rx_missed_cntr),
74 STMMAC_STAT(rx_overflow_cntr),
76 /* Tx/Rx IRQ error info */
77 STMMAC_STAT(tx_undeflow_irq),
78 STMMAC_STAT(tx_process_stopped_irq),
79 STMMAC_STAT(tx_jabber_irq),
80 STMMAC_STAT(rx_overflow_irq),
81 STMMAC_STAT(rx_buf_unav_irq),
82 STMMAC_STAT(rx_process_stopped_irq),
83 STMMAC_STAT(rx_watchdog_irq),
84 STMMAC_STAT(tx_early_irq),
85 STMMAC_STAT(fatal_bus_error_irq),
86 /* Tx/Rx IRQ Events */
87 STMMAC_STAT(rx_early_irq),
88 STMMAC_STAT(threshold),
89 STMMAC_STAT(tx_pkt_n),
90 STMMAC_STAT(rx_pkt_n),
91 STMMAC_STAT(normal_irq_n),
92 STMMAC_STAT(rx_normal_irq_n),
93 STMMAC_STAT(napi_poll),
94 STMMAC_STAT(tx_normal_irq_n),
95 STMMAC_STAT(tx_clean),
96 STMMAC_STAT(tx_set_ic_bit),
97 STMMAC_STAT(irq_receive_pmt_irq_n),
99 STMMAC_STAT(mmc_tx_irq_n),
100 STMMAC_STAT(mmc_rx_irq_n),
101 STMMAC_STAT(mmc_rx_csum_offload_irq_n),
103 STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
104 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
105 STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
106 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
107 STMMAC_STAT(phy_eee_wakeup_error_n),
108 /* Extended RDES status */
109 STMMAC_STAT(ip_hdr_err),
110 STMMAC_STAT(ip_payload_err),
111 STMMAC_STAT(ip_csum_bypassed),
112 STMMAC_STAT(ipv4_pkt_rcvd),
113 STMMAC_STAT(ipv6_pkt_rcvd),
114 STMMAC_STAT(no_ptp_rx_msg_type_ext),
115 STMMAC_STAT(ptp_rx_msg_type_sync),
116 STMMAC_STAT(ptp_rx_msg_type_follow_up),
117 STMMAC_STAT(ptp_rx_msg_type_delay_req),
118 STMMAC_STAT(ptp_rx_msg_type_delay_resp),
119 STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
120 STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
121 STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
122 STMMAC_STAT(ptp_rx_msg_type_announce),
123 STMMAC_STAT(ptp_rx_msg_type_management),
124 STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
125 STMMAC_STAT(ptp_frame_type),
126 STMMAC_STAT(ptp_ver),
127 STMMAC_STAT(timestamp_dropped),
128 STMMAC_STAT(av_pkt_rcvd),
129 STMMAC_STAT(av_tagged_pkt_rcvd),
130 STMMAC_STAT(vlan_tag_priority_val),
131 STMMAC_STAT(l3_filter_match),
132 STMMAC_STAT(l4_filter_match),
133 STMMAC_STAT(l3_l4_filter_no_match),
135 STMMAC_STAT(irq_pcs_ane_n),
136 STMMAC_STAT(irq_pcs_link_n),
137 STMMAC_STAT(irq_rgmii_n),
139 STMMAC_STAT(mtl_tx_status_fifo_full),
140 STMMAC_STAT(mtl_tx_fifo_not_empty),
141 STMMAC_STAT(mmtl_fifo_ctrl),
142 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
143 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
144 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
145 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
146 STMMAC_STAT(mac_tx_in_pause),
147 STMMAC_STAT(mac_tx_frame_ctrl_xfer),
148 STMMAC_STAT(mac_tx_frame_ctrl_idle),
149 STMMAC_STAT(mac_tx_frame_ctrl_wait),
150 STMMAC_STAT(mac_tx_frame_ctrl_pause),
151 STMMAC_STAT(mac_gmii_tx_proto_engine),
152 STMMAC_STAT(mtl_rx_fifo_fill_level_full),
153 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
154 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
155 STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
156 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
157 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
158 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
159 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
160 STMMAC_STAT(mtl_rx_fifo_ctrl_active),
161 STMMAC_STAT(mac_rx_frame_ctrl_fifo),
162 STMMAC_STAT(mac_gmii_rx_proto_engine),
164 STMMAC_STAT(tx_tso_frames),
165 STMMAC_STAT(tx_tso_nfrags),
167 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
169 /* HW MAC Management counters (if supported) */
170 #define STMMAC_MMC_STAT(m) \
171 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \
172 offsetof(struct stmmac_priv, mmc.m)}
174 static const struct stmmac_stats stmmac_mmc[] = {
175 STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
176 STMMAC_MMC_STAT(mmc_tx_framecount_gb),
177 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
178 STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
179 STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
180 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
181 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
182 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
183 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
184 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
185 STMMAC_MMC_STAT(mmc_tx_unicast_gb),
186 STMMAC_MMC_STAT(mmc_tx_multicast_gb),
187 STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
188 STMMAC_MMC_STAT(mmc_tx_underflow_error),
189 STMMAC_MMC_STAT(mmc_tx_singlecol_g),
190 STMMAC_MMC_STAT(mmc_tx_multicol_g),
191 STMMAC_MMC_STAT(mmc_tx_deferred),
192 STMMAC_MMC_STAT(mmc_tx_latecol),
193 STMMAC_MMC_STAT(mmc_tx_exesscol),
194 STMMAC_MMC_STAT(mmc_tx_carrier_error),
195 STMMAC_MMC_STAT(mmc_tx_octetcount_g),
196 STMMAC_MMC_STAT(mmc_tx_framecount_g),
197 STMMAC_MMC_STAT(mmc_tx_excessdef),
198 STMMAC_MMC_STAT(mmc_tx_pause_frame),
199 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
200 STMMAC_MMC_STAT(mmc_rx_framecount_gb),
201 STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
202 STMMAC_MMC_STAT(mmc_rx_octetcount_g),
203 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
204 STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
205 STMMAC_MMC_STAT(mmc_rx_crc_error),
206 STMMAC_MMC_STAT(mmc_rx_align_error),
207 STMMAC_MMC_STAT(mmc_rx_run_error),
208 STMMAC_MMC_STAT(mmc_rx_jabber_error),
209 STMMAC_MMC_STAT(mmc_rx_undersize_g),
210 STMMAC_MMC_STAT(mmc_rx_oversize_g),
211 STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
212 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
213 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
214 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
215 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
216 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
217 STMMAC_MMC_STAT(mmc_rx_unicast_g),
218 STMMAC_MMC_STAT(mmc_rx_length_error),
219 STMMAC_MMC_STAT(mmc_rx_autofrangetype),
220 STMMAC_MMC_STAT(mmc_rx_pause_frames),
221 STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
222 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
223 STMMAC_MMC_STAT(mmc_rx_watchdog_error),
224 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
225 STMMAC_MMC_STAT(mmc_rx_ipc_intr),
226 STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
227 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
228 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
229 STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
230 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
231 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
232 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
233 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
234 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
235 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
236 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
237 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
238 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
239 STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
240 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
241 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
242 STMMAC_MMC_STAT(mmc_rx_udp_gd),
243 STMMAC_MMC_STAT(mmc_rx_udp_err),
244 STMMAC_MMC_STAT(mmc_rx_tcp_gd),
245 STMMAC_MMC_STAT(mmc_rx_tcp_err),
246 STMMAC_MMC_STAT(mmc_rx_icmp_gd),
247 STMMAC_MMC_STAT(mmc_rx_icmp_err),
248 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
249 STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
250 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
251 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
252 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
253 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
255 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
257 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
258 struct ethtool_drvinfo *info)
260 struct stmmac_priv *priv = netdev_priv(dev);
262 if (priv->plat->has_gmac || priv->plat->has_gmac4)
263 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
265 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
266 sizeof(info->driver));
268 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
271 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
272 struct ethtool_link_ksettings *cmd)
274 struct stmmac_priv *priv = netdev_priv(dev);
275 struct phy_device *phy = dev->phydev;
277 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
278 priv->hw->pcs & STMMAC_PCS_SGMII) {
279 struct rgmii_adv adv;
280 u32 supported, advertising, lp_advertising;
282 if (!priv->xstats.pcs_link) {
283 cmd->base.speed = SPEED_UNKNOWN;
284 cmd->base.duplex = DUPLEX_UNKNOWN;
287 cmd->base.duplex = priv->xstats.pcs_duplex;
289 cmd->base.speed = priv->xstats.pcs_speed;
291 /* Get and convert ADV/LP_ADV from the HW AN registers */
292 if (!priv->hw->mac->pcs_get_adv_lp)
293 return -EOPNOTSUPP; /* should never happen indeed */
295 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv);
297 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
299 ethtool_convert_link_mode_to_legacy_u32(
300 &supported, cmd->link_modes.supported);
301 ethtool_convert_link_mode_to_legacy_u32(
302 &advertising, cmd->link_modes.advertising);
303 ethtool_convert_link_mode_to_legacy_u32(
304 &lp_advertising, cmd->link_modes.lp_advertising);
306 if (adv.pause & STMMAC_PCS_PAUSE)
307 advertising |= ADVERTISED_Pause;
308 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
309 advertising |= ADVERTISED_Asym_Pause;
310 if (adv.lp_pause & STMMAC_PCS_PAUSE)
311 lp_advertising |= ADVERTISED_Pause;
312 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
313 lp_advertising |= ADVERTISED_Asym_Pause;
315 /* Reg49[3] always set because ANE is always supported */
316 cmd->base.autoneg = ADVERTISED_Autoneg;
317 supported |= SUPPORTED_Autoneg;
318 advertising |= ADVERTISED_Autoneg;
319 lp_advertising |= ADVERTISED_Autoneg;
322 supported |= (SUPPORTED_1000baseT_Full |
323 SUPPORTED_100baseT_Full |
324 SUPPORTED_10baseT_Full);
325 advertising |= (ADVERTISED_1000baseT_Full |
326 ADVERTISED_100baseT_Full |
327 ADVERTISED_10baseT_Full);
329 supported |= (SUPPORTED_1000baseT_Half |
330 SUPPORTED_100baseT_Half |
331 SUPPORTED_10baseT_Half);
332 advertising |= (ADVERTISED_1000baseT_Half |
333 ADVERTISED_100baseT_Half |
334 ADVERTISED_10baseT_Half);
337 lp_advertising |= (ADVERTISED_1000baseT_Full |
338 ADVERTISED_100baseT_Full |
339 ADVERTISED_10baseT_Full);
341 lp_advertising |= (ADVERTISED_1000baseT_Half |
342 ADVERTISED_100baseT_Half |
343 ADVERTISED_10baseT_Half);
344 cmd->base.port = PORT_OTHER;
346 ethtool_convert_legacy_u32_to_link_mode(
347 cmd->link_modes.supported, supported);
348 ethtool_convert_legacy_u32_to_link_mode(
349 cmd->link_modes.advertising, advertising);
350 ethtool_convert_legacy_u32_to_link_mode(
351 cmd->link_modes.lp_advertising, lp_advertising);
357 pr_err("%s: %s: PHY is not registered\n",
358 __func__, dev->name);
361 if (!netif_running(dev)) {
362 pr_err("%s: interface is disabled: we cannot track "
363 "link speed / duplex setting\n", dev->name);
366 phy_ethtool_ksettings_get(phy, cmd);
371 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
372 const struct ethtool_link_ksettings *cmd)
374 struct stmmac_priv *priv = netdev_priv(dev);
375 struct phy_device *phy = dev->phydev;
378 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
379 priv->hw->pcs & STMMAC_PCS_SGMII) {
380 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
382 /* Only support ANE */
383 if (cmd->base.autoneg != AUTONEG_ENABLE)
386 mask &= (ADVERTISED_1000baseT_Half |
387 ADVERTISED_1000baseT_Full |
388 ADVERTISED_100baseT_Half |
389 ADVERTISED_100baseT_Full |
390 ADVERTISED_10baseT_Half |
391 ADVERTISED_10baseT_Full);
393 spin_lock(&priv->lock);
395 if (priv->hw->mac->pcs_ctrl_ane)
396 priv->hw->mac->pcs_ctrl_ane(priv->ioaddr, 1,
399 spin_unlock(&priv->lock);
404 rc = phy_ethtool_ksettings_set(phy, cmd);
409 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
411 struct stmmac_priv *priv = netdev_priv(dev);
412 return priv->msg_enable;
415 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
417 struct stmmac_priv *priv = netdev_priv(dev);
418 priv->msg_enable = level;
422 static int stmmac_check_if_running(struct net_device *dev)
424 if (!netif_running(dev))
429 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
431 return REG_SPACE_SIZE;
434 static void stmmac_ethtool_gregs(struct net_device *dev,
435 struct ethtool_regs *regs, void *space)
437 u32 *reg_space = (u32 *) space;
439 struct stmmac_priv *priv = netdev_priv(dev);
441 memset(reg_space, 0x0, REG_SPACE_SIZE);
443 priv->hw->mac->dump_regs(priv->hw, reg_space);
444 priv->hw->dma->dump_regs(priv->ioaddr, reg_space);
448 stmmac_get_pauseparam(struct net_device *netdev,
449 struct ethtool_pauseparam *pause)
451 struct stmmac_priv *priv = netdev_priv(netdev);
456 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) {
457 struct rgmii_adv adv_lp;
460 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp);
464 if (!(netdev->phydev->supported & SUPPORTED_Pause) ||
465 !(netdev->phydev->supported & SUPPORTED_Asym_Pause))
469 pause->autoneg = netdev->phydev->autoneg;
471 if (priv->flow_ctrl & FLOW_RX)
473 if (priv->flow_ctrl & FLOW_TX)
479 stmmac_set_pauseparam(struct net_device *netdev,
480 struct ethtool_pauseparam *pause)
482 struct stmmac_priv *priv = netdev_priv(netdev);
483 u32 tx_cnt = priv->plat->tx_queues_to_use;
484 struct phy_device *phy = netdev->phydev;
485 int new_pause = FLOW_OFF;
487 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) {
488 struct rgmii_adv adv_lp;
491 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp);
495 if (!(phy->supported & SUPPORTED_Pause) ||
496 !(phy->supported & SUPPORTED_Asym_Pause))
501 new_pause |= FLOW_RX;
503 new_pause |= FLOW_TX;
505 priv->flow_ctrl = new_pause;
506 phy->autoneg = pause->autoneg;
509 if (netif_running(netdev))
510 return phy_start_aneg(phy);
513 priv->hw->mac->flow_ctrl(priv->hw, phy->duplex, priv->flow_ctrl,
514 priv->pause, tx_cnt);
518 static void stmmac_get_ethtool_stats(struct net_device *dev,
519 struct ethtool_stats *dummy, u64 *data)
521 struct stmmac_priv *priv = netdev_priv(dev);
522 u32 rx_queues_count = priv->plat->rx_queues_to_use;
523 u32 tx_queues_count = priv->plat->tx_queues_to_use;
526 /* Update the DMA HW counters for dwmac10/100 */
527 if (priv->hw->dma->dma_diagnostic_fr)
528 priv->hw->dma->dma_diagnostic_fr(&dev->stats,
529 (void *) &priv->xstats,
532 /* If supported, for new GMAC chips expose the MMC counters */
533 if (priv->dma_cap.rmon) {
534 dwmac_mmc_read(priv->mmcaddr, &priv->mmc);
536 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
538 p = (char *)priv + stmmac_mmc[i].stat_offset;
540 data[j++] = (stmmac_mmc[i].sizeof_stat ==
541 sizeof(u64)) ? (*(u64 *)p) :
545 if (priv->eee_enabled) {
546 int val = phy_get_eee_err(dev->phydev);
548 priv->xstats.phy_eee_wakeup_error_n = val;
551 if ((priv->hw->mac->debug) &&
552 (priv->synopsys_id >= DWMAC_CORE_3_50))
553 priv->hw->mac->debug(priv->ioaddr,
554 (void *)&priv->xstats,
555 rx_queues_count, tx_queues_count);
557 for (i = 0; i < STMMAC_STATS_LEN; i++) {
558 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
559 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
560 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
564 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
566 struct stmmac_priv *priv = netdev_priv(netdev);
571 len = STMMAC_STATS_LEN;
573 if (priv->dma_cap.rmon)
574 len += STMMAC_MMC_STATS_LEN;
582 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
586 struct stmmac_priv *priv = netdev_priv(dev);
590 if (priv->dma_cap.rmon)
591 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
592 memcpy(p, stmmac_mmc[i].stat_string,
594 p += ETH_GSTRING_LEN;
596 for (i = 0; i < STMMAC_STATS_LEN; i++) {
597 memcpy(p, stmmac_gstrings_stats[i].stat_string,
599 p += ETH_GSTRING_LEN;
608 /* Currently only support WOL through Magic packet. */
609 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
611 struct stmmac_priv *priv = netdev_priv(dev);
613 spin_lock_irq(&priv->lock);
614 if (device_can_wakeup(priv->device)) {
615 wol->supported = WAKE_MAGIC | WAKE_UCAST;
616 wol->wolopts = priv->wolopts;
618 spin_unlock_irq(&priv->lock);
621 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
623 struct stmmac_priv *priv = netdev_priv(dev);
624 u32 support = WAKE_MAGIC | WAKE_UCAST;
626 /* By default almost all GMAC devices support the WoL via
627 * magic frame but we can disable it if the HW capability
628 * register shows no support for pmt_magic_frame. */
629 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
630 wol->wolopts &= ~WAKE_MAGIC;
632 if (!device_can_wakeup(priv->device))
635 if (wol->wolopts & ~support)
639 pr_info("stmmac: wakeup enable\n");
640 device_set_wakeup_enable(priv->device, 1);
641 enable_irq_wake(priv->wol_irq);
643 device_set_wakeup_enable(priv->device, 0);
644 disable_irq_wake(priv->wol_irq);
647 spin_lock_irq(&priv->lock);
648 priv->wolopts = wol->wolopts;
649 spin_unlock_irq(&priv->lock);
654 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
655 struct ethtool_eee *edata)
657 struct stmmac_priv *priv = netdev_priv(dev);
659 if (!priv->dma_cap.eee)
662 edata->eee_enabled = priv->eee_enabled;
663 edata->eee_active = priv->eee_active;
664 edata->tx_lpi_timer = priv->tx_lpi_timer;
666 return phy_ethtool_get_eee(dev->phydev, edata);
669 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
670 struct ethtool_eee *edata)
672 struct stmmac_priv *priv = netdev_priv(dev);
674 priv->eee_enabled = edata->eee_enabled;
676 if (!priv->eee_enabled)
677 stmmac_disable_eee_mode(priv);
679 /* We are asking for enabling the EEE but it is safe
680 * to verify all by invoking the eee_init function.
681 * In case of failure it will return an error.
683 priv->eee_enabled = stmmac_eee_init(priv);
684 if (!priv->eee_enabled)
687 /* Do not change tx_lpi_timer in case of failure */
688 priv->tx_lpi_timer = edata->tx_lpi_timer;
691 return phy_ethtool_set_eee(dev->phydev, edata);
694 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
696 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
701 return (usec * (clk / 1000000)) / 256;
704 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
706 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
711 return (riwt * 256) / (clk / 1000000);
714 static int stmmac_get_coalesce(struct net_device *dev,
715 struct ethtool_coalesce *ec)
717 struct stmmac_priv *priv = netdev_priv(dev);
719 ec->tx_coalesce_usecs = priv->tx_coal_timer;
720 ec->tx_max_coalesced_frames = priv->tx_coal_frames;
723 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
728 static int stmmac_set_coalesce(struct net_device *dev,
729 struct ethtool_coalesce *ec)
731 struct stmmac_priv *priv = netdev_priv(dev);
732 u32 rx_cnt = priv->plat->rx_queues_to_use;
733 unsigned int rx_riwt;
735 /* Check not supported parameters */
736 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) ||
737 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) ||
738 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) ||
739 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) ||
740 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) ||
741 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) ||
742 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) ||
743 (ec->rx_max_coalesced_frames_high) ||
744 (ec->tx_max_coalesced_frames_irq) ||
745 (ec->stats_block_coalesce_usecs) ||
746 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval))
749 if (ec->rx_coalesce_usecs == 0)
752 if ((ec->tx_coalesce_usecs == 0) &&
753 (ec->tx_max_coalesced_frames == 0))
756 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
757 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
760 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
762 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
764 else if (!priv->use_riwt)
767 /* Only copy relevant parameters, ignore all others. */
768 priv->tx_coal_frames = ec->tx_max_coalesced_frames;
769 priv->tx_coal_timer = ec->tx_coalesce_usecs;
770 priv->rx_riwt = rx_riwt;
771 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt, rx_cnt);
776 static int stmmac_get_ts_info(struct net_device *dev,
777 struct ethtool_ts_info *info)
779 struct stmmac_priv *priv = netdev_priv(dev);
781 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
783 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
784 SOF_TIMESTAMPING_TX_HARDWARE |
785 SOF_TIMESTAMPING_RX_SOFTWARE |
786 SOF_TIMESTAMPING_RX_HARDWARE |
787 SOF_TIMESTAMPING_SOFTWARE |
788 SOF_TIMESTAMPING_RAW_HARDWARE;
791 info->phc_index = ptp_clock_index(priv->ptp_clock);
793 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
795 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
796 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
797 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
798 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
799 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
800 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
801 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
802 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
803 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
804 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
805 (1 << HWTSTAMP_FILTER_ALL));
808 return ethtool_op_get_ts_info(dev, info);
811 static int stmmac_get_tunable(struct net_device *dev,
812 const struct ethtool_tunable *tuna, void *data)
814 struct stmmac_priv *priv = netdev_priv(dev);
818 case ETHTOOL_RX_COPYBREAK:
819 *(u32 *)data = priv->rx_copybreak;
829 static int stmmac_set_tunable(struct net_device *dev,
830 const struct ethtool_tunable *tuna,
833 struct stmmac_priv *priv = netdev_priv(dev);
837 case ETHTOOL_RX_COPYBREAK:
838 priv->rx_copybreak = *(u32 *)data;
848 static const struct ethtool_ops stmmac_ethtool_ops = {
849 .begin = stmmac_check_if_running,
850 .get_drvinfo = stmmac_ethtool_getdrvinfo,
851 .get_msglevel = stmmac_ethtool_getmsglevel,
852 .set_msglevel = stmmac_ethtool_setmsglevel,
853 .get_regs = stmmac_ethtool_gregs,
854 .get_regs_len = stmmac_ethtool_get_regs_len,
855 .get_link = ethtool_op_get_link,
856 .nway_reset = phy_ethtool_nway_reset,
857 .get_pauseparam = stmmac_get_pauseparam,
858 .set_pauseparam = stmmac_set_pauseparam,
859 .get_ethtool_stats = stmmac_get_ethtool_stats,
860 .get_strings = stmmac_get_strings,
861 .get_wol = stmmac_get_wol,
862 .set_wol = stmmac_set_wol,
863 .get_eee = stmmac_ethtool_op_get_eee,
864 .set_eee = stmmac_ethtool_op_set_eee,
865 .get_sset_count = stmmac_get_sset_count,
866 .get_ts_info = stmmac_get_ts_info,
867 .get_coalesce = stmmac_get_coalesce,
868 .set_coalesce = stmmac_set_coalesce,
869 .get_tunable = stmmac_get_tunable,
870 .set_tunable = stmmac_set_tunable,
871 .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
872 .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
875 void stmmac_set_ethtool_ops(struct net_device *netdev)
877 netdev->ethtool_ops = &stmmac_ethtool_ops;