drivers/net/irda/nsc-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      nsc-ircc.c
   4  * Version:       1.0
   5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
   6  * Status:        Stable.
   7  * Author:        Dag Brattli <dagb@cs.uit.no>
   8  * Created at:    Sat Nov  7 21:43:15 1998
   9  * Modified at:   Wed Mar  1 11:29:34 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
  14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
  15  *     Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
  16  *     All Rights Reserved
  17  *
  18  *     This program is free software; you can redistribute it and/or
  19  *     modify it under the terms of the GNU General Public License as
  20  *     published by the Free Software Foundation; either version 2 of
  21  *     the License, or (at your option) any later version.
  22  *
  23  *     Neither Dag Brattli nor University of Tromsø admit liability nor
  24  *     provide warranty for any of this software. This material is
  25  *     provided "AS-IS" and at no charge.
  26  *
  27  *     Notice that all functions that needs to access the chip in _any_
  28  *     way, must save BSR register on entry, and restore it on exit.
  29  *     It is _very_ important to follow this policy!
  30  *
  31  *         __u8 bank;
  32  *
  33  *         bank = inb(iobase+BSR);
  34  *
  35  *         do_your_stuff_here();
  36  *
  37  *         outb(bank, iobase+BSR);
  38  *
  39  *    If you find bugs in this file, its very likely that the same bug
  40  *    will also be in w83977af_ir.c since the implementations are quite
  41  *    similar.
  42  *
  43  ********************************************************************/
  44
  45 #include <linux/module.h>
  46 #include <linux/gfp.h>
  47
  48 #include <linux/kernel.h>
  49 #include <linux/types.h>
  50 #include <linux/skbuff.h>
  51 #include <linux/netdevice.h>
  52 #include <linux/ioport.h>
  53 #include <linux/delay.h>
  54 #include <linux/init.h>
  55 #include <linux/interrupt.h>
  56 #include <linux/rtnetlink.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/pnp.h>
  59 #include <linux/platform_device.h>
  60
  61 #include <asm/io.h>
  62 #include <asm/dma.h>
  63 #include <asm/byteorder.h>
  64
  65 #include <net/irda/wrapper.h>
  66 #include <net/irda/irda.h>
  67 #include <net/irda/irda_device.h>
  68
  69 #include "nsc-ircc.h"
  70
  71 #define CHIP_IO_EXTENT 8
  72 #define BROKEN_DONGLE_ID
  73
  74 static char *driver_name = "nsc-ircc";
  75
  76 /* Power Management */
  77 #define NSC_IRCC_DRIVER_NAME                  "nsc-ircc"
  78 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
  79 static int nsc_ircc_resume(struct platform_device *dev);
  80
  81 static struct platform_driver nsc_ircc_driver = {
  82         .suspend        = nsc_ircc_suspend,
  83         .resume         = nsc_ircc_resume,
  84         .driver         = {
  85                 .name   = NSC_IRCC_DRIVER_NAME,
  86         },
  87 };
  88
  89 /* Module parameters */
  90 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  91 static int dongle_id;
  92
  93 /* Use BIOS settions by default, but user may supply module parameters */
  94 static unsigned int io[]  = { ~0, ~0, ~0, ~0, ~0 };
  95 static unsigned int irq[] = {  0,  0,  0,  0,  0 };
  96 static unsigned int dma[] = {  0,  0,  0,  0,  0 };
  97
  98 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
  99 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
 100 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
 101 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
 102 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
 103 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
 104 #ifdef CONFIG_PNP
 105 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
 106 #endif
 107
 108 /* These are the known NSC chips */
 109 static nsc_chip_t chips[] = {
 110 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
 111         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
 112           nsc_ircc_probe_108, nsc_ircc_init_108 },
 113         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
 114           nsc_ircc_probe_338, nsc_ircc_init_338 },
 115         /* Contributed by Steffen Pingel - IBM X40 */
 116         { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
 117           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 118         /* Contributed by Jan Frey - IBM A30/A31 */
 119         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
 120           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 121         /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
 122         { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
 123           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 124         /* IBM ThinkPads using PC8394T (T43/R52/?) */
 125         { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
 126           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 127         { NULL }
 128 };
 129
 130 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
 131
 132 static char *dongle_types[] = {
 133         "Differential serial interface",
 134         "Differential serial interface",
 135         "Reserved",
 136         "Reserved",
 137         "Sharp RY5HD01",
 138         "Reserved",
 139         "Single-ended serial interface",
 140         "Consumer-IR only",
 141         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
 142         "IBM31T1100 or Temic TFDS6000/TFDS6500",
 143         "Reserved",
 144         "Reserved",
 145         "HP HSDL-1100/HSDL-2100",
 146         "HP HSDL-1100/HSDL-2100",
 147         "Supports SIR Mode only",
 148         "No dongle connected",
 149 };
 150
 151 /* PNP probing */
 152 static chipio_t pnp_info;
 153 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
 154         { .id = "NSC6001", .driver_data = 0 },
 155         { .id = "HWPC224", .driver_data = 0 },
 156         { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 },
 157         { }
 158 };
 159
 160 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
 161
 162 static struct pnp_driver nsc_ircc_pnp_driver = {
 163 #ifdef CONFIG_PNP
 164         .name = "nsc-ircc",
 165         .id_table = nsc_ircc_pnp_table,
 166         .probe = nsc_ircc_pnp_probe,
 167 #endif
 168 };
 169
 170 /* Some prototypes */
 171 static int  nsc_ircc_open(chipio_t *info);
 172 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
 173 static int  nsc_ircc_setup(chipio_t *info);
 174 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
 175 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
 176 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
 177 static netdev_tx_t  nsc_ircc_hard_xmit_sir(struct sk_buff *skb,
 178                                                  struct net_device *dev);
 179 static netdev_tx_t  nsc_ircc_hard_xmit_fir(struct sk_buff *skb,
 180                                                  struct net_device *dev);
 181 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
 182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
 183 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
 184 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
 185 static int  nsc_ircc_read_dongle_id (int iobase);
 186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
 187
 188 static int  nsc_ircc_net_open(struct net_device *dev);
 189 static int  nsc_ircc_net_close(struct net_device *dev);
 190 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 191
 192 /* Globals */
 193 static int pnp_registered;
 194 static int pnp_succeeded;
 195
 196 /*
 197  * Function nsc_ircc_init ()
 198  *
 199  *    Initialize chip. Just try to find out how many chips we are dealing with
 200  *    and where they are
 201  */
 202 static int __init nsc_ircc_init(void)
 203 {
 204         chipio_t info;
 205         nsc_chip_t *chip;
 206         int ret;
 207         int cfg_base;
 208         int cfg, id;
 209         int reg;
 210         int i = 0;
 211
 212         ret = platform_driver_register(&nsc_ircc_driver);
 213         if (ret) {
 214                 net_err_ratelimited("%s, Can't register driver!\n",
 215                                     driver_name);
 216                 return ret;
 217         }
 218
 219         /* Register with PnP subsystem to detect disable ports */
 220         ret = pnp_register_driver(&nsc_ircc_pnp_driver);
 221
 222         if (!ret)
 223                 pnp_registered = 1;
 224
 225         ret = -ENODEV;
 226
 227         /* Probe for all the NSC chipsets we know about */
 228         for (chip = chips; chip->name ; chip++) {
 229                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__,
 230                            chip->name);
 231
 232                 /* Try all config registers for this chip */
 233                 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
 234                         cfg_base = chip->cfg[cfg];
 235                         if (!cfg_base)
 236                                 continue;
 237
 238                         /* Read index register */
 239                         reg = inb(cfg_base);
 240                         if (reg == 0xff) {
 241                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base);
 242                                 continue;
 243                         }
 244
 245                         /* Read chip identification register */
 246                         outb(chip->cid_index, cfg_base);
 247                         id = inb(cfg_base+1);
 248                         if ((id & chip->cid_mask) == chip->cid_value) {
 249                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
 250                                            __func__, chip->name, id & ~chip->cid_mask);
 251
 252                                 /*
 253                                  * If we found a correct PnP setting,
 254                                  * we first try it.
 255                                  */
 256                                 if (pnp_succeeded) {
 257                                         memset(&info, 0, sizeof(chipio_t));
 258                                         info.cfg_base = cfg_base;
 259                                         info.fir_base = pnp_info.fir_base;
 260                                         info.dma = pnp_info.dma;
 261                                         info.irq = pnp_info.irq;
 262
 263                                         if (info.fir_base < 0x2000) {
 264                                                 net_info_ratelimited("%s, chip->init\n",
 265                                                                      driver_name);
 266                                                 chip->init(chip, &info);
 267                                         } else
 268                                                 chip->probe(chip, &info);
 269
 270                                         if (nsc_ircc_open(&info) >= 0)
 271                                                 ret = 0;
 272                                 }
 273
 274                                 /*
 275                                  * Opening based on PnP values failed.
 276                                  * Let's fallback to user values, or probe
 277                                  * the chip.
 278                                  */
 279                                 if (ret) {
 280                                         IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
 281                                         memset(&info, 0, sizeof(chipio_t));
 282                                         info.cfg_base = cfg_base;
 283                                         info.fir_base = io[i];
 284                                         info.dma = dma[i];
 285                                         info.irq = irq[i];
 286
 287                                         /*
 288                                          * If the user supplies the base address, then
 289                                          * we init the chip, if not we probe the values
 290                                          * set by the BIOS
 291                                          */
 292                                         if (io[i] < 0x2000) {
 293                                                 chip->init(chip, &info);
 294                                         } else
 295                                                 chip->probe(chip, &info);
 296
 297                                         if (nsc_ircc_open(&info) >= 0)
 298                                                 ret = 0;
 299                                 }
 300                                 i++;
 301                         } else {
 302                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id);
 303                         }
 304                 }
 305         }
 306
 307         if (ret) {
 308                 platform_driver_unregister(&nsc_ircc_driver);
 309                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
 310                 pnp_registered = 0;
 311         }
 312
 313         return ret;
 314 }
 315
 316 /*
 317  * Function nsc_ircc_cleanup ()
 318  *
 319  *    Close all configured chips
 320  *
 321  */
 322 static void __exit nsc_ircc_cleanup(void)
 323 {
 324         int i;
 325
 326         for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
 327                 if (dev_self[i])
 328                         nsc_ircc_close(dev_self[i]);
 329         }
 330
 331         platform_driver_unregister(&nsc_ircc_driver);
 332
 333         if (pnp_registered)
 334                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
 335
 336         pnp_registered = 0;
 337 }
 338
 339 static const struct net_device_ops nsc_ircc_sir_ops = {
 340         .ndo_open       = nsc_ircc_net_open,
 341         .ndo_stop       = nsc_ircc_net_close,
 342         .ndo_start_xmit = nsc_ircc_hard_xmit_sir,
 343         .ndo_do_ioctl   = nsc_ircc_net_ioctl,
 344 };
 345
 346 static const struct net_device_ops nsc_ircc_fir_ops = {
 347         .ndo_open       = nsc_ircc_net_open,
 348         .ndo_stop       = nsc_ircc_net_close,
 349         .ndo_start_xmit = nsc_ircc_hard_xmit_fir,
 350         .ndo_do_ioctl   = nsc_ircc_net_ioctl,
 351 };
 352
 353 /*
 354  * Function nsc_ircc_open (iobase, irq)
 355  *
 356  *    Open driver instance
 357  *
 358  */
 359 static int __init nsc_ircc_open(chipio_t *info)
 360 {
 361         struct net_device *dev;
 362         struct nsc_ircc_cb *self;
 363         void *ret;
 364         int err, chip_index;
 365
 366         IRDA_DEBUG(2, "%s()\n", __func__);
 367
 368
 369         for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
 370                 if (!dev_self[chip_index])
 371                         break;
 372         }
 373
 374         if (chip_index == ARRAY_SIZE(dev_self)) {
 375                 net_err_ratelimited("%s(), maximum number of supported chips reached!\n",
 376                                     __func__);
 377                 return -ENOMEM;
 378         }
 379
 380         net_info_ratelimited("%s, Found chip at base=0x%03x\n",
 381                              driver_name, info->cfg_base);
 382
 383         if ((nsc_ircc_setup(info)) == -1)
 384                 return -1;
 385
 386         net_info_ratelimited("%s, driver loaded (Dag Brattli)\n", driver_name);
 387
 388         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
 389         if (dev == NULL) {
 390                 net_err_ratelimited("%s(), can't allocate memory for control block!\n",
 391                                     __func__);
 392                 return -ENOMEM;
 393         }
 394
 395         self = netdev_priv(dev);
 396         self->netdev = dev;
 397         spin_lock_init(&self->lock);
 398
 399         /* Need to store self somewhere */
 400         dev_self[chip_index] = self;
 401         self->index = chip_index;
 402
 403         /* Initialize IO */
 404         self->io.cfg_base  = info->cfg_base;
 405         self->io.fir_base  = info->fir_base;
 406         self->io.irq       = info->irq;
 407         self->io.fir_ext   = CHIP_IO_EXTENT;
 408         self->io.dma       = info->dma;
 409         self->io.fifo_size = 32;
 410
 411         /* Reserve the ioports that we need */
 412         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
 413         if (!ret) {
 414                 net_warn_ratelimited("%s(), can't get iobase of 0x%03x\n",
 415                                      __func__, self->io.fir_base);
 416                 err = -ENODEV;
 417                 goto out1;
 418         }
 419
 420         /* Initialize QoS for this device */
 421         irda_init_max_qos_capabilies(&self->qos);
 422
 423         /* The only value we must override it the baudrate */
 424         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 425                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
 426
 427         self->qos.min_turn_time.bits = qos_mtt_bits;
 428         irda_qos_bits_to_value(&self->qos);
 429
 430         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 431         self->rx_buff.truesize = 14384;
 432         self->tx_buff.truesize = 14384;
 433
 434         /* Allocate memory if needed */
 435         self->rx_buff.head =
 436                 dma_zalloc_coherent(NULL, self->rx_buff.truesize,
 437                                     &self->rx_buff_dma, GFP_KERNEL);
 438         if (self->rx_buff.head == NULL) {
 439                 err = -ENOMEM;
 440                 goto out2;
 441
 442         }
 443
 444         self->tx_buff.head =
 445                 dma_zalloc_coherent(NULL, self->tx_buff.truesize,
 446                                     &self->tx_buff_dma, GFP_KERNEL);
 447         if (self->tx_buff.head == NULL) {
 448                 err = -ENOMEM;
 449                 goto out3;
 450         }
 451
 452         self->rx_buff.in_frame = FALSE;
 453         self->rx_buff.state = OUTSIDE_FRAME;
 454         self->tx_buff.data = self->tx_buff.head;
 455         self->rx_buff.data = self->rx_buff.head;
 456
 457         /* Reset Tx queue info */
 458         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 459         self->tx_fifo.tail = self->tx_buff.head;
 460
 461         /* Override the network functions we need to use */
 462         dev->netdev_ops = &nsc_ircc_sir_ops;
 463
 464         err = register_netdev(dev);
 465         if (err) {
 466                 net_err_ratelimited("%s(), register_netdev() failed!\n",
 467                                     __func__);
 468                 goto out4;
 469         }
 470         net_info_ratelimited("IrDA: Registered device %s\n", dev->name);
 471
 472         /* Check if user has supplied a valid dongle id or not */
 473         if ((dongle_id <= 0) ||
 474             (dongle_id >= ARRAY_SIZE(dongle_types))) {
 475                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
 476
 477                 net_info_ratelimited("%s, Found dongle: %s\n",
 478                                      driver_name, dongle_types[dongle_id]);
 479         } else {
 480                 net_info_ratelimited("%s, Using dongle: %s\n",
 481                                      driver_name, dongle_types[dongle_id]);
 482         }
 483
 484         self->io.dongle_id = dongle_id;
 485         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
 486
 487         self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
 488                                                       self->index, NULL, 0);
 489         if (IS_ERR(self->pldev)) {
 490                 err = PTR_ERR(self->pldev);
 491                 goto out5;
 492         }
 493         platform_set_drvdata(self->pldev, self);
 494
 495         return chip_index;
 496
 497  out5:
 498         unregister_netdev(dev);
 499  out4:
 500         dma_free_coherent(NULL, self->tx_buff.truesize,
 501                           self->tx_buff.head, self->tx_buff_dma);
 502  out3:
 503         dma_free_coherent(NULL, self->rx_buff.truesize,
 504                           self->rx_buff.head, self->rx_buff_dma);
 505  out2:
 506         release_region(self->io.fir_base, self->io.fir_ext);
 507  out1:
 508         free_netdev(dev);
 509         dev_self[chip_index] = NULL;
 510         return err;
 511 }
 512
 513 /*
 514  * Function nsc_ircc_close (self)
 515  *
 516  *    Close driver instance
 517  *
 518  */
 519 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
 520 {
 521         int iobase;
 522
 523         IRDA_DEBUG(4, "%s()\n", __func__);
 524
 525         IRDA_ASSERT(self != NULL, return -1;);
 526
 527         iobase = self->io.fir_base;
 528
 529         platform_device_unregister(self->pldev);
 530
 531         /* Remove netdevice */
 532         unregister_netdev(self->netdev);
 533
 534         /* Release the PORT that this driver is using */
 535         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
 536                    __func__, self->io.fir_base);
 537         release_region(self->io.fir_base, self->io.fir_ext);
 538
 539         if (self->tx_buff.head)
 540                 dma_free_coherent(NULL, self->tx_buff.truesize,
 541                                   self->tx_buff.head, self->tx_buff_dma);
 542
 543         if (self->rx_buff.head)
 544                 dma_free_coherent(NULL, self->rx_buff.truesize,
 545                                   self->rx_buff.head, self->rx_buff_dma);
 546
 547         dev_self[self->index] = NULL;
 548         free_netdev(self->netdev);
 549
 550         return 0;
 551 }
 552
 553 /*
 554  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
 555  *
 556  *    Initialize the NSC '108 chip
 557  *
 558  */
 559 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
 560 {
 561         int cfg_base = info->cfg_base;
 562         __u8 temp=0;
 563
 564         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
 565         outb(0x00, cfg_base+1); /* Disable device */
 566
 567         /* Base Address and Interrupt Control Register (BAIC) */
 568         outb(CFG_108_BAIC, cfg_base);
 569         switch (info->fir_base) {
 570         case 0x3e8: outb(0x14, cfg_base+1); break;
 571         case 0x2e8: outb(0x15, cfg_base+1); break;
 572         case 0x3f8: outb(0x16, cfg_base+1); break;
 573         case 0x2f8: outb(0x17, cfg_base+1); break;
 574         default: net_err_ratelimited("%s(), invalid base_address\n", __func__);
 575         }
 576
 577         /* Control Signal Routing Register (CSRT) */
 578         switch (info->irq) {
 579         case 3:  temp = 0x01; break;
 580         case 4:  temp = 0x02; break;
 581         case 5:  temp = 0x03; break;
 582         case 7:  temp = 0x04; break;
 583         case 9:  temp = 0x05; break;
 584         case 11: temp = 0x06; break;
 585         case 15: temp = 0x07; break;
 586         default: net_err_ratelimited("%s(), invalid irq\n", __func__);
 587         }
 588         outb(CFG_108_CSRT, cfg_base);
 589
 590         switch (info->dma) {
 591         case 0: outb(0x08+temp, cfg_base+1); break;
 592         case 1: outb(0x10+temp, cfg_base+1); break;
 593         case 3: outb(0x18+temp, cfg_base+1); break;
 594         default: net_err_ratelimited("%s(), invalid dma\n", __func__);
 595         }
 596
 597         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
 598         outb(0x03, cfg_base+1); /* Enable device */
 599
 600         return 0;
 601 }
 602
 603 /*
 604  * Function nsc_ircc_probe_108 (chip, info)
 605  *
 606  *
 607  *
 608  */
 609 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
 610 {
 611         int cfg_base = info->cfg_base;
 612         int reg;
 613
 614         /* Read address and interrupt control register (BAIC) */
 615         outb(CFG_108_BAIC, cfg_base);
 616         reg = inb(cfg_base+1);
 617
 618         switch (reg & 0x03) {
 619         case 0:
 620                 info->fir_base = 0x3e8;
 621                 break;
 622         case 1:
 623                 info->fir_base = 0x2e8;
 624                 break;
 625         case 2:
 626                 info->fir_base = 0x3f8;
 627                 break;
 628         case 3:
 629                 info->fir_base = 0x2f8;
 630                 break;
 631         }
 632         info->sir_base = info->fir_base;
 633         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__,
 634                    info->fir_base);
 635
 636         /* Read control signals routing register (CSRT) */
 637         outb(CFG_108_CSRT, cfg_base);
 638         reg = inb(cfg_base+1);
 639
 640         switch (reg & 0x07) {
 641         case 0:
 642                 info->irq = -1;
 643                 break;
 644         case 1:
 645                 info->irq = 3;
 646                 break;
 647         case 2:
 648                 info->irq = 4;
 649                 break;
 650         case 3:
 651                 info->irq = 5;
 652                 break;
 653         case 4:
 654                 info->irq = 7;
 655                 break;
 656         case 5:
 657                 info->irq = 9;
 658                 break;
 659         case 6:
 660                 info->irq = 11;
 661                 break;
 662         case 7:
 663                 info->irq = 15;
 664                 break;
 665         }
 666         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
 667
 668         /* Currently we only read Rx DMA but it will also be used for Tx */
 669         switch ((reg >> 3) & 0x03) {
 670         case 0:
 671                 info->dma = -1;
 672                 break;
 673         case 1:
 674                 info->dma = 0;
 675                 break;
 676         case 2:
 677                 info->dma = 1;
 678                 break;
 679         case 3:
 680                 info->dma = 3;
 681                 break;
 682         }
 683         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
 684
 685         /* Read mode control register (MCTL) */
 686         outb(CFG_108_MCTL, cfg_base);
 687         reg = inb(cfg_base+1);
 688
 689         info->enabled = reg & 0x01;
 690         info->suspended = !((reg >> 1) & 0x01);
 691
 692         return 0;
 693 }
 694
 695 /*
 696  * Function nsc_ircc_init_338 (chip, info)
 697  *
 698  *    Initialize the NSC '338 chip. Remember that the 87338 needs two
 699  *    consecutive writes to the data registers while CPU interrupts are
 700  *    disabled. The 97338 does not require this, but shouldn't be any
 701  *    harm if we do it anyway.
 702  */
 703 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
 704 {
 705         /* No init yet */
 706
 707         return 0;
 708 }
 709
 710 /*
 711  * Function nsc_ircc_probe_338 (chip, info)
 712  *
 713  *
 714  *
 715  */
 716 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
 717 {
 718         int cfg_base = info->cfg_base;
 719         int reg, com = 0;
 720         int pnp;
 721
 722         /* Read function enable register (FER) */
 723         outb(CFG_338_FER, cfg_base);
 724         reg = inb(cfg_base+1);
 725
 726         info->enabled = (reg >> 2) & 0x01;
 727
 728         /* Check if we are in Legacy or PnP mode */
 729         outb(CFG_338_PNP0, cfg_base);
 730         reg = inb(cfg_base+1);
 731
 732         pnp = (reg >> 3) & 0x01;
 733         if (pnp) {
 734                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
 735                 outb(0x46, cfg_base);
 736                 reg = (inb(cfg_base+1) & 0xfe) << 2;
 737
 738                 outb(0x47, cfg_base);
 739                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
 740
 741                 info->fir_base = reg;
 742         } else {
 743                 /* Read function address register (FAR) */
 744                 outb(CFG_338_FAR, cfg_base);
 745                 reg = inb(cfg_base+1);
 746
 747                 switch ((reg >> 4) & 0x03) {
 748                 case 0:
 749                         info->fir_base = 0x3f8;
 750                         break;
 751                 case 1:
 752                         info->fir_base = 0x2f8;
 753                         break;
 754                 case 2:
 755                         com = 3;
 756                         break;
 757                 case 3:
 758                         com = 4;
 759                         break;
 760                 }
 761
 762                 if (com) {
 763                         switch ((reg >> 6) & 0x03) {
 764                         case 0:
 765                                 if (com == 3)
 766                                         info->fir_base = 0x3e8;
 767                                 else
 768                                         info->fir_base = 0x2e8;
 769                                 break;
 770                         case 1:
 771                                 if (com == 3)
 772                                         info->fir_base = 0x338;
 773                                 else
 774                                         info->fir_base = 0x238;
 775                                 break;
 776                         case 2:
 777                                 if (com == 3)
 778                                         info->fir_base = 0x2e8;
 779                                 else
 780                                         info->fir_base = 0x2e0;
 781                                 break;
 782                         case 3:
 783                                 if (com == 3)
 784                                         info->fir_base = 0x220;
 785                                 else
 786                                         info->fir_base = 0x228;
 787                                 break;
 788                         }
 789                 }
 790         }
 791         info->sir_base = info->fir_base;
 792
 793         /* Read PnP register 1 (PNP1) */
 794         outb(CFG_338_PNP1, cfg_base);
 795         reg = inb(cfg_base+1);
 796
 797         info->irq = reg >> 4;
 798
 799         /* Read PnP register 3 (PNP3) */
 800         outb(CFG_338_PNP3, cfg_base);
 801         reg = inb(cfg_base+1);
 802
 803         info->dma = (reg & 0x07) - 1;
 804
 805         /* Read power and test register (PTR) */
 806         outb(CFG_338_PTR, cfg_base);
 807         reg = inb(cfg_base+1);
 808
 809         info->suspended = reg & 0x01;
 810
 811         return 0;
 812 }
 813
 814
 815 /*
 816  * Function nsc_ircc_init_39x (chip, info)
 817  *
 818  *    Now that we know it's a '39x (see probe below), we need to
 819  *    configure it so we can use it.
 820  *
 821  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
 822  * the configuration of the different functionality (serial, parallel,
 823  * floppy...) are each in a different bank (Logical Device Number).
 824  * The base address, irq and dma configuration registers are common
 825  * to all functionalities (index 0x30 to 0x7F).
 826  * There is only one configuration register specific to the
 827  * serial port, CFG_39X_SPC.
 828  * JeanII
 829  *
 830  * Note : this code was written by Jan Frey <janfrey@web.de>
 831  */
 832 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
 833 {
 834         int cfg_base = info->cfg_base;
 835         int enabled;
 836
 837         /* User is sure about his config... accept it. */
 838         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
 839                    "io=0x%04x, irq=%d, dma=%d\n",
 840                    __func__, info->fir_base, info->irq, info->dma);
 841
 842         /* Access bank for SP2 */
 843         outb(CFG_39X_LDN, cfg_base);
 844         outb(0x02, cfg_base+1);
 845
 846         /* Configure SP2 */
 847
 848         /* We want to enable the device if not enabled */
 849         outb(CFG_39X_ACT, cfg_base);
 850         enabled = inb(cfg_base+1) & 0x01;
 851
 852         if (!enabled) {
 853                 /* Enable the device */
 854                 outb(CFG_39X_SIOCF1, cfg_base);
 855                 outb(0x01, cfg_base+1);
 856                 /* May want to update info->enabled. Jean II */
 857         }
 858
 859         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 860          * power mode (wake up from sleep mode) (bit 1) */
 861         outb(CFG_39X_SPC, cfg_base);
 862         outb(0x82, cfg_base+1);
 863
 864         return 0;
 865 }
 866
 867 /*
 868  * Function nsc_ircc_probe_39x (chip, info)
 869  *
 870  *    Test if we really have a '39x chip at the given address
 871  *
 872  * Note : this code was written by Jan Frey <janfrey@web.de>
 873  */
 874 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
 875 {
 876         int cfg_base = info->cfg_base;
 877         int reg1, reg2, irq, irqt, dma1, dma2;
 878         int enabled, susp;
 879
 880         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
 881                    __func__, cfg_base);
 882
 883         /* This function should be executed with irq off to avoid
 884          * another driver messing with the Super I/O bank - Jean II */
 885
 886         /* Access bank for SP2 */
 887         outb(CFG_39X_LDN, cfg_base);
 888         outb(0x02, cfg_base+1);
 889
 890         /* Read infos about SP2 ; store in info struct */
 891         outb(CFG_39X_BASEH, cfg_base);
 892         reg1 = inb(cfg_base+1);
 893         outb(CFG_39X_BASEL, cfg_base);
 894         reg2 = inb(cfg_base+1);
 895         info->fir_base = (reg1 << 8) | reg2;
 896
 897         outb(CFG_39X_IRQNUM, cfg_base);
 898         irq = inb(cfg_base+1);
 899         outb(CFG_39X_IRQSEL, cfg_base);
 900         irqt = inb(cfg_base+1);
 901         info->irq = irq;
 902
 903         outb(CFG_39X_DMA0, cfg_base);
 904         dma1 = inb(cfg_base+1);
 905         outb(CFG_39X_DMA1, cfg_base);
 906         dma2 = inb(cfg_base+1);
 907         info->dma = dma1 -1;
 908
 909         outb(CFG_39X_ACT, cfg_base);
 910         info->enabled = enabled = inb(cfg_base+1) & 0x01;
 911
 912         outb(CFG_39X_SPC, cfg_base);
 913         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
 914
 915         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
 916
 917         /* Configure SP2 */
 918
 919         /* We want to enable the device if not enabled */
 920         outb(CFG_39X_ACT, cfg_base);
 921         enabled = inb(cfg_base+1) & 0x01;
 922
 923         if (!enabled) {
 924                 /* Enable the device */
 925                 outb(CFG_39X_SIOCF1, cfg_base);
 926                 outb(0x01, cfg_base+1);
 927                 /* May want to update info->enabled. Jean II */
 928         }
 929
 930         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 931          * power mode (wake up from sleep mode) (bit 1) */
 932         outb(CFG_39X_SPC, cfg_base);
 933         outb(0x82, cfg_base+1);
 934
 935         return 0;
 936 }
 937
 938 #ifdef CONFIG_PNP
 939 /* PNP probing */
 940 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
 941 {
 942         memset(&pnp_info, 0, sizeof(chipio_t));
 943         pnp_info.irq = -1;
 944         pnp_info.dma = -1;
 945         pnp_succeeded = 1;
 946
 947         if (id->driver_data & NSC_FORCE_DONGLE_TYPE9)
 948                 dongle_id = 0x9;
 949
 950         /* There doesn't seem to be any way of getting the cfg_base.
 951          * On my box, cfg_base is in the PnP descriptor of the
 952          * motherboard. Oh well... Jean II */
 953
 954         if (pnp_port_valid(dev, 0) &&
 955                 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
 956                 pnp_info.fir_base = pnp_port_start(dev, 0);
 957
 958         if (pnp_irq_valid(dev, 0) &&
 959                 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
 960                 pnp_info.irq = pnp_irq(dev, 0);
 961
 962         if (pnp_dma_valid(dev, 0) &&
 963                 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
 964                 pnp_info.dma = pnp_dma(dev, 0);
 965
 966         IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
 967                    __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
 968
 969         if((pnp_info.fir_base == 0) ||
 970            (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
 971                 /* Returning an error will disable the device. Yuck ! */
 972                 //return -EINVAL;
 973                 pnp_succeeded = 0;
 974         }
 975
 976         return 0;
 977 }
 978 #endif
 979
 980 /*
 981  * Function nsc_ircc_setup (info)
 982  *
 983  *    Returns non-negative on success.
 984  *
 985  */
 986 static int nsc_ircc_setup(chipio_t *info)
 987 {
 988         int version;
 989         int iobase = info->fir_base;
 990
 991         /* Read the Module ID */
 992         switch_bank(iobase, BANK3);
 993         version = inb(iobase+MID);
 994
 995         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
 996                    __func__, driver_name, version);
 997
 998         /* Should be 0x2? */
 999         if (0x20 != (version & 0xf0)) {
1000                 net_err_ratelimited("%s, Wrong chip version %02x\n",
1001                                     driver_name, version);
1002                 return -1;
1003         }
1004
1005         /* Switch to advanced mode */
1006         switch_bank(iobase, BANK2);
1007         outb(ECR1_EXT_SL, iobase+ECR1);
1008         switch_bank(iobase, BANK0);
1009
1010         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
1011         switch_bank(iobase, BANK0);
1012         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1013
1014         outb(0x03, iobase+LCR);         /* 8 bit word length */
1015         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
1016
1017         /* Set FIFO size to 32 */
1018         switch_bank(iobase, BANK2);
1019         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1020
1021         /* IRCR2: FEND_MD is not set */
1022         switch_bank(iobase, BANK5);
1023         outb(0x02, iobase+4);
1024
1025         /* Make sure that some defaults are OK */
1026         switch_bank(iobase, BANK6);
1027         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1028         outb(0x0a, iobase+1); /* Set MIR pulse width */
1029         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1030         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1031
1032         /* Enable receive interrupts */
1033         switch_bank(iobase, BANK0);
1034         outb(IER_RXHDL_IE, iobase+IER);
1035
1036         return 0;
1037 }
1038
1039 /*
1040  * Function nsc_ircc_read_dongle_id (void)
1041  *
1042  * Try to read dongle identification. This procedure needs to be executed
1043  * once after power-on/reset. It also needs to be used whenever you suspect
1044  * that the user may have plugged/unplugged the IrDA Dongle.
1045  */
1046 static int nsc_ircc_read_dongle_id (int iobase)
1047 {
1048         int dongle_id;
1049         __u8 bank;
1050
1051         bank = inb(iobase+BSR);
1052
1053         /* Select Bank 7 */
1054         switch_bank(iobase, BANK7);
1055
1056         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1057         outb(0x00, iobase+7);
1058
1059         /* ID0, 1, and 2 are pulled up/down very slowly */
1060         udelay(50);
1061
1062         /* IRCFG1: read the ID bits */
1063         dongle_id = inb(iobase+4) & 0x0f;
1064
1065 #ifdef BROKEN_DONGLE_ID
1066         if (dongle_id == 0x0a)
1067                 dongle_id = 0x09;
1068 #endif
1069         /* Go back to  bank 0 before returning */
1070         switch_bank(iobase, BANK0);
1071
1072         outb(bank, iobase+BSR);
1073
1074         return dongle_id;
1075 }
1076
1077 /*
1078  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1079  *
1080  *     This function initializes the dongle for the transceiver that is
1081  *     used. This procedure needs to be executed once after
1082  *     power-on/reset. It also needs to be used whenever you suspect that
1083  *     the dongle is changed.
1084  */
1085 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1086 {
1087         int bank;
1088
1089         /* Save current bank */
1090         bank = inb(iobase+BSR);
1091
1092         /* Select Bank 7 */
1093         switch_bank(iobase, BANK7);
1094
1095         /* IRCFG4: set according to dongle_id */
1096         switch (dongle_id) {
1097         case 0x00: /* same as */
1098         case 0x01: /* Differential serial interface */
1099                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1100                            __func__, dongle_types[dongle_id]);
1101                 break;
1102         case 0x02: /* same as */
1103         case 0x03: /* Reserved */
1104                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1105                            __func__, dongle_types[dongle_id]);
1106                 break;
1107         case 0x04: /* Sharp RY5HD01 */
1108                 break;
1109         case 0x05: /* Reserved, but this is what the Thinkpad reports */
1110                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1111                            __func__, dongle_types[dongle_id]);
1112                 break;
1113         case 0x06: /* Single-ended serial interface */
1114                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1115                            __func__, dongle_types[dongle_id]);
1116                 break;
1117         case 0x07: /* Consumer-IR only */
1118                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1119                            __func__, dongle_types[dongle_id]);
1120                 break;
1121         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1122                 IRDA_DEBUG(0, "%s(), %s\n",
1123                            __func__, dongle_types[dongle_id]);
1124                 break;
1125         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1126                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1127                 break;
1128         case 0x0A: /* same as */
1129         case 0x0B: /* Reserved */
1130                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1131                            __func__, dongle_types[dongle_id]);
1132                 break;
1133         case 0x0C: /* same as */
1134         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1135                 /*
1136                  * Set irsl0 as input, irsl[1-2] as output, and separate
1137                  * inputs are used for SIR and MIR/FIR
1138                  */
1139                 outb(0x48, iobase+7);
1140                 break;
1141         case 0x0E: /* Supports SIR Mode only */
1142                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1143                 break;
1144         case 0x0F: /* No dongle connected */
1145                 IRDA_DEBUG(0, "%s(), %s\n",
1146                            __func__, dongle_types[dongle_id]);
1147
1148                 switch_bank(iobase, BANK0);
1149                 outb(0x62, iobase+MCR);
1150                 break;
1151         default:
1152                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1153                            __func__, dongle_id);
1154         }
1155
1156         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1157         outb(0x00, iobase+4);
1158
1159         /* Restore bank register */
1160         outb(bank, iobase+BSR);
1161
1162 } /* set_up_dongle_interface */
1163
1164 /*
1165  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1166  *
1167  *    Change speed of the attach dongle
1168  *
1169  */
1170 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1171 {
1172         __u8 bank;
1173
1174         /* Save current bank */
1175         bank = inb(iobase+BSR);
1176
1177         /* Select Bank 7 */
1178         switch_bank(iobase, BANK7);
1179
1180         /* IRCFG1: set according to dongle_id */
1181         switch (dongle_id) {
1182         case 0x00: /* same as */
1183         case 0x01: /* Differential serial interface */
1184                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1185                            __func__, dongle_types[dongle_id]);
1186                 break;
1187         case 0x02: /* same as */
1188         case 0x03: /* Reserved */
1189                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1190                            __func__, dongle_types[dongle_id]);
1191                 break;
1192         case 0x04: /* Sharp RY5HD01 */
1193                 break;
1194         case 0x05: /* Reserved */
1195                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1196                            __func__, dongle_types[dongle_id]);
1197                 break;
1198         case 0x06: /* Single-ended serial interface */
1199                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1200                            __func__, dongle_types[dongle_id]);
1201                 break;
1202         case 0x07: /* Consumer-IR only */
1203                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1204                            __func__, dongle_types[dongle_id]);
1205                 break;
1206         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1207                 IRDA_DEBUG(0, "%s(), %s\n",
1208                            __func__, dongle_types[dongle_id]);
1209                 outb(0x00, iobase+4);
1210                 if (speed > 115200)
1211                         outb(0x01, iobase+4);
1212                 break;
1213         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1214                 outb(0x01, iobase+4);
1215
1216                 if (speed == 4000000) {
1217                         /* There was a cli() there, but we now are already
1218                          * under spin_lock_irqsave() - JeanII */
1219                         outb(0x81, iobase+4);
1220                         outb(0x80, iobase+4);
1221                 } else
1222                         outb(0x00, iobase+4);
1223                 break;
1224         case 0x0A: /* same as */
1225         case 0x0B: /* Reserved */
1226                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1227                            __func__, dongle_types[dongle_id]);
1228                 break;
1229         case 0x0C: /* same as */
1230         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1231                 break;
1232         case 0x0E: /* Supports SIR Mode only */
1233                 break;
1234         case 0x0F: /* No dongle connected */
1235                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1236                            __func__, dongle_types[dongle_id]);
1237
1238                 switch_bank(iobase, BANK0);
1239                 outb(0x62, iobase+MCR);
1240                 break;
1241         default:
1242                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__);
1243         }
1244         /* Restore bank register */
1245         outb(bank, iobase+BSR);
1246 }
1247
1248 /*
1249  * Function nsc_ircc_change_speed (self, baud)
1250  *
1251  *    Change the speed of the device
1252  *
1253  * This function *must* be called with irq off and spin-lock.
1254  */
1255 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1256 {
1257         struct net_device *dev = self->netdev;
1258         __u8 mcr = MCR_SIR;
1259         int iobase;
1260         __u8 bank;
1261         __u8 ier;                  /* Interrupt enable register */
1262
1263         IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed);
1264
1265         IRDA_ASSERT(self != NULL, return 0;);
1266
1267         iobase = self->io.fir_base;
1268
1269         /* Update accounting for new speed */
1270         self->io.speed = speed;
1271
1272         /* Save current bank */
1273         bank = inb(iobase+BSR);
1274
1275         /* Disable interrupts */
1276         switch_bank(iobase, BANK0);
1277         outb(0, iobase+IER);
1278
1279         /* Select Bank 2 */
1280         switch_bank(iobase, BANK2);
1281
1282         outb(0x00, iobase+BGDH);
1283         switch (speed) {
1284         case 9600:   outb(0x0c, iobase+BGDL); break;
1285         case 19200:  outb(0x06, iobase+BGDL); break;
1286         case 38400:  outb(0x03, iobase+BGDL); break;
1287         case 57600:  outb(0x02, iobase+BGDL); break;
1288         case 115200: outb(0x01, iobase+BGDL); break;
1289         case 576000:
1290                 switch_bank(iobase, BANK5);
1291
1292                 /* IRCR2: MDRS is set */
1293                 outb(inb(iobase+4) | 0x04, iobase+4);
1294
1295                 mcr = MCR_MIR;
1296                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__);
1297                 break;
1298         case 1152000:
1299                 mcr = MCR_MIR;
1300                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__);
1301                 break;
1302         case 4000000:
1303                 mcr = MCR_FIR;
1304                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__);
1305                 break;
1306         default:
1307                 mcr = MCR_FIR;
1308                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1309                            __func__, speed);
1310                 break;
1311         }
1312
1313         /* Set appropriate speed mode */
1314         switch_bank(iobase, BANK0);
1315         outb(mcr | MCR_TX_DFR, iobase+MCR);
1316
1317         /* Give some hits to the transceiver */
1318         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1319
1320         /* Set FIFO threshold to TX17, RX16 */
1321         switch_bank(iobase, BANK0);
1322         outb(0x00, iobase+FCR);
1323         outb(FCR_FIFO_EN, iobase+FCR);
1324         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1325              FCR_TXTH|     /* Set Tx FIFO threshold */
1326              FCR_TXSR|     /* Reset Tx FIFO */
1327              FCR_RXSR|     /* Reset Rx FIFO */
1328              FCR_FIFO_EN,  /* Enable FIFOs */
1329              iobase+FCR);
1330
1331         /* Set FIFO size to 32 */
1332         switch_bank(iobase, BANK2);
1333         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1334
1335         /* Enable some interrupts so we can receive frames */
1336         switch_bank(iobase, BANK0);
1337         if (speed > 115200) {
1338                 /* Install FIR xmit handler */
1339                 dev->netdev_ops = &nsc_ircc_fir_ops;
1340                 ier = IER_SFIF_IE;
1341                 nsc_ircc_dma_receive(self);
1342         } else {
1343                 /* Install SIR xmit handler */
1344                 dev->netdev_ops = &nsc_ircc_sir_ops;
1345                 ier = IER_RXHDL_IE;
1346         }
1347         /* Set our current interrupt mask */
1348         outb(ier, iobase+IER);
1349
1350         /* Restore BSR */
1351         outb(bank, iobase+BSR);
1352
1353         /* Make sure interrupt handlers keep the proper interrupt mask */
1354         return ier;
1355 }
1356
1357 /*
1358  * Function nsc_ircc_hard_xmit (skb, dev)
1359  *
1360  *    Transmit the frame!
1361  *
1362  */
1363 static netdev_tx_t nsc_ircc_hard_xmit_sir(struct sk_buff *skb,
1364                                                 struct net_device *dev)
1365 {
1366         struct nsc_ircc_cb *self;
1367         unsigned long flags;
1368         int iobase;
1369         __s32 speed;
1370         __u8 bank;
1371
1372         self = netdev_priv(dev);
1373
1374         IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
1375
1376         iobase = self->io.fir_base;
1377
1378         netif_stop_queue(dev);
1379
1380         /* Make sure tests *& speed change are atomic */
1381         spin_lock_irqsave(&self->lock, flags);
1382
1383         /* Check if we need to change the speed */
1384         speed = irda_get_next_speed(skb);
1385         if ((speed != self->io.speed) && (speed != -1)) {
1386                 /* Check for empty frame. */
1387                 if (!skb->len) {
1388                         /* If we just sent a frame, we get called before
1389                          * the last bytes get out (because of the SIR FIFO).
1390                          * If this is the case, let interrupt handler change
1391                          * the speed itself... Jean II */
1392                         if (self->io.direction == IO_RECV) {
1393                                 nsc_ircc_change_speed(self, speed);
1394                                 /* TODO : For SIR->SIR, the next packet
1395                                  * may get corrupted - Jean II */
1396                                 netif_wake_queue(dev);
1397                         } else {
1398                                 self->new_speed = speed;
1399                                 /* Queue will be restarted after speed change
1400                                  * to make sure packets gets through the
1401                                  * proper xmit handler - Jean II */
1402                         }
1403                         dev->trans_start = jiffies;
1404                         spin_unlock_irqrestore(&self->lock, flags);
1405                         dev_kfree_skb(skb);
1406                         return NETDEV_TX_OK;
1407                 } else
1408                         self->new_speed = speed;
1409         }
1410
1411         /* Save current bank */
1412         bank = inb(iobase+BSR);
1413
1414         self->tx_buff.data = self->tx_buff.head;
1415
1416         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1417                                            self->tx_buff.truesize);
1418
1419         dev->stats.tx_bytes += self->tx_buff.len;
1420
1421         /* Add interrupt on tx low level (will fire immediately) */
1422         switch_bank(iobase, BANK0);
1423         outb(IER_TXLDL_IE, iobase+IER);
1424
1425         /* Restore bank register */
1426         outb(bank, iobase+BSR);
1427
1428         dev->trans_start = jiffies;
1429         spin_unlock_irqrestore(&self->lock, flags);
1430
1431         dev_kfree_skb(skb);
1432
1433         return NETDEV_TX_OK;
1434 }
1435
1436 static netdev_tx_t nsc_ircc_hard_xmit_fir(struct sk_buff *skb,
1437                                                 struct net_device *dev)
1438 {
1439         struct nsc_ircc_cb *self;
1440         unsigned long flags;
1441         int iobase;
1442         __s32 speed;
1443         __u8 bank;
1444         int mtt, diff;
1445
1446         self = netdev_priv(dev);
1447         iobase = self->io.fir_base;
1448
1449         netif_stop_queue(dev);
1450
1451         /* Make sure tests *& speed change are atomic */
1452         spin_lock_irqsave(&self->lock, flags);
1453
1454         /* Check if we need to change the speed */
1455         speed = irda_get_next_speed(skb);
1456         if ((speed != self->io.speed) && (speed != -1)) {
1457                 /* Check for empty frame. */
1458                 if (!skb->len) {
1459                         /* If we are currently transmitting, defer to
1460                          * interrupt handler. - Jean II */
1461                         if(self->tx_fifo.len == 0) {
1462                                 nsc_ircc_change_speed(self, speed);
1463                                 netif_wake_queue(dev);
1464                         } else {
1465                                 self->new_speed = speed;
1466                                 /* Keep queue stopped :
1467                                  * the speed change operation may change the
1468                                  * xmit handler, and we want to make sure
1469                                  * the next packet get through the proper
1470                                  * Tx path, so block the Tx queue until
1471                                  * the speed change has been done.
1472                                  * Jean II */
1473                         }
1474                         dev->trans_start = jiffies;
1475                         spin_unlock_irqrestore(&self->lock, flags);
1476                         dev_kfree_skb(skb);
1477                         return NETDEV_TX_OK;
1478                 } else {
1479                         /* Change speed after current frame */
1480                         self->new_speed = speed;
1481                 }
1482         }
1483
1484         /* Save current bank */
1485         bank = inb(iobase+BSR);
1486
1487         /* Register and copy this frame to DMA memory */
1488         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1489         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1490         self->tx_fifo.tail += skb->len;
1491
1492         dev->stats.tx_bytes += skb->len;
1493
1494         skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1495                       skb->len);
1496         self->tx_fifo.len++;
1497         self->tx_fifo.free++;
1498
1499         /* Start transmit only if there is currently no transmit going on */
1500         if (self->tx_fifo.len == 1) {
1501                 /* Check if we must wait the min turn time or not */
1502                 mtt = irda_get_mtt(skb);
1503                 if (mtt) {
1504                         /* Check how much time we have used already */
1505                         do_gettimeofday(&self->now);
1506                         diff = self->now.tv_usec - self->stamp.tv_usec;
1507                         if (diff < 0)
1508                                 diff += 1000000;
1509
1510                         /* Check if the mtt is larger than the time we have
1511                          * already used by all the protocol processing
1512                          */
1513                         if (mtt > diff) {
1514                                 mtt -= diff;
1515
1516                                 /*
1517                                  * Use timer if delay larger than 125 us, and
1518                                  * use udelay for smaller values which should
1519                                  * be acceptable
1520                                  */
1521                                 if (mtt > 125) {
1522                                         /* Adjust for timer resolution */
1523                                         mtt = mtt / 125;
1524
1525                                         /* Setup timer */
1526                                         switch_bank(iobase, BANK4);
1527                                         outb(mtt & 0xff, iobase+TMRL);
1528                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1529
1530                                         /* Start timer */
1531                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1532                                         self->io.direction = IO_XMIT;
1533
1534                                         /* Enable timer interrupt */
1535                                         switch_bank(iobase, BANK0);
1536                                         outb(IER_TMR_IE, iobase+IER);
1537
1538                                         /* Timer will take care of the rest */
1539                                         goto out;
1540                                 } else
1541                                         udelay(mtt);
1542                         }
1543                 }
1544                 /* Enable DMA interrupt */
1545                 switch_bank(iobase, BANK0);
1546                 outb(IER_DMA_IE, iobase+IER);
1547
1548                 /* Transmit frame */
1549                 nsc_ircc_dma_xmit(self, iobase);
1550         }
1551  out:
1552         /* Not busy transmitting anymore if window is not full,
1553          * and if we don't need to change speed */
1554         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1555                 netif_wake_queue(self->netdev);
1556
1557         /* Restore bank register */
1558         outb(bank, iobase+BSR);
1559
1560         dev->trans_start = jiffies;
1561         spin_unlock_irqrestore(&self->lock, flags);
1562         dev_kfree_skb(skb);
1563
1564         return NETDEV_TX_OK;
1565 }
1566
1567 /*
1568  * Function nsc_ircc_dma_xmit (self, iobase)
1569  *
1570  *    Transmit data using DMA
1571  *
1572  */
1573 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1574 {
1575         int bsr;
1576
1577         /* Save current bank */
1578         bsr = inb(iobase+BSR);
1579
1580         /* Disable DMA */
1581         switch_bank(iobase, BANK0);
1582         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1583
1584         self->io.direction = IO_XMIT;
1585
1586         /* Choose transmit DMA channel  */
1587         switch_bank(iobase, BANK2);
1588         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1589
1590         irda_setup_dma(self->io.dma,
1591                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1592                         self->tx_buff.head) + self->tx_buff_dma,
1593                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1594                        DMA_TX_MODE);
1595
1596         /* Enable DMA and SIR interaction pulse */
1597         switch_bank(iobase, BANK0);
1598         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1599
1600         /* Restore bank register */
1601         outb(bsr, iobase+BSR);
1602 }
1603
1604 /*
1605  * Function nsc_ircc_pio_xmit (self, iobase)
1606  *
1607  *    Transmit data using PIO. Returns the number of bytes that actually
1608  *    got transferred
1609  *
1610  */
1611 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1612 {
1613         int actual = 0;
1614         __u8 bank;
1615
1616         IRDA_DEBUG(4, "%s()\n", __func__);
1617
1618         /* Save current bank */
1619         bank = inb(iobase+BSR);
1620
1621         switch_bank(iobase, BANK0);
1622         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1623                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1624                            __func__);
1625
1626                 /* FIFO may still be filled to the Tx interrupt threshold */
1627                 fifo_size -= 17;
1628         }
1629
1630         /* Fill FIFO with current frame */
1631         while ((fifo_size-- > 0) && (actual < len)) {
1632                 /* Transmit next byte */
1633                 outb(buf[actual++], iobase+TXD);
1634         }
1635
1636         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1637                    __func__, fifo_size, actual, len);
1638
1639         /* Restore bank */
1640         outb(bank, iobase+BSR);
1641
1642         return actual;
1643 }
1644
1645 /*
1646  * Function nsc_ircc_dma_xmit_complete (self)
1647  *
1648  *    The transfer of a frame in finished. This function will only be called
1649  *    by the interrupt handler
1650  *
1651  */
1652 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1653 {
1654         int iobase;
1655         __u8 bank;
1656         int ret = TRUE;
1657
1658         IRDA_DEBUG(2, "%s()\n", __func__);
1659
1660         iobase = self->io.fir_base;
1661
1662         /* Save current bank */
1663         bank = inb(iobase+BSR);
1664
1665         /* Disable DMA */
1666         switch_bank(iobase, BANK0);
1667         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1668
1669         /* Check for underrun! */
1670         if (inb(iobase+ASCR) & ASCR_TXUR) {
1671                 self->netdev->stats.tx_errors++;
1672                 self->netdev->stats.tx_fifo_errors++;
1673
1674                 /* Clear bit, by writing 1 into it */
1675                 outb(ASCR_TXUR, iobase+ASCR);
1676         } else {
1677                 self->netdev->stats.tx_packets++;
1678         }
1679
1680         /* Finished with this frame, so prepare for next */
1681         self->tx_fifo.ptr++;
1682         self->tx_fifo.len--;
1683
1684         /* Any frames to be sent back-to-back? */
1685         if (self->tx_fifo.len) {
1686                 nsc_ircc_dma_xmit(self, iobase);
1687
1688                 /* Not finished yet! */
1689                 ret = FALSE;
1690         } else {
1691                 /* Reset Tx FIFO info */
1692                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1693                 self->tx_fifo.tail = self->tx_buff.head;
1694         }
1695
1696         /* Make sure we have room for more frames and
1697          * that we don't need to change speed */
1698         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1699                 /* Not busy transmitting anymore */
1700                 /* Tell the network layer, that we can accept more frames */
1701                 netif_wake_queue(self->netdev);
1702         }
1703
1704         /* Restore bank */
1705         outb(bank, iobase+BSR);
1706
1707         return ret;
1708 }
1709
1710 /*
1711  * Function nsc_ircc_dma_receive (self)
1712  *
1713  *    Get ready for receiving a frame. The device will initiate a DMA
1714  *    if it starts to receive a frame.
1715  *
1716  */
1717 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1718 {
1719         int iobase;
1720         __u8 bsr;
1721
1722         iobase = self->io.fir_base;
1723
1724         /* Reset Tx FIFO info */
1725         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1726         self->tx_fifo.tail = self->tx_buff.head;
1727
1728         /* Save current bank */
1729         bsr = inb(iobase+BSR);
1730
1731         /* Disable DMA */
1732         switch_bank(iobase, BANK0);
1733         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1734
1735         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1736         switch_bank(iobase, BANK2);
1737         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1738
1739         self->io.direction = IO_RECV;
1740         self->rx_buff.data = self->rx_buff.head;
1741
1742         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1743         switch_bank(iobase, BANK0);
1744         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1745
1746         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1747         self->st_fifo.tail = self->st_fifo.head = 0;
1748
1749         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1750                        DMA_RX_MODE);
1751
1752         /* Enable DMA */
1753         switch_bank(iobase, BANK0);
1754         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1755
1756         /* Restore bank register */
1757         outb(bsr, iobase+BSR);
1758
1759         return 0;
1760 }
1761
1762 /*
1763  * Function nsc_ircc_dma_receive_complete (self)
1764  *
1765  *    Finished with receiving frames
1766  *
1767  *
1768  */
1769 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1770 {
1771         struct st_fifo *st_fifo;
1772         struct sk_buff *skb;
1773         __u8 status;
1774         __u8 bank;
1775         int len;
1776
1777         st_fifo = &self->st_fifo;
1778
1779         /* Save current bank */
1780         bank = inb(iobase+BSR);
1781
1782         /* Read all entries in status FIFO */
1783         switch_bank(iobase, BANK5);
1784         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1785                 /* We must empty the status FIFO no matter what */
1786                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1787
1788                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1789                         IRDA_DEBUG(0, "%s(), window is full!\n", __func__);
1790                         continue;
1791                 }
1792
1793                 st_fifo->entries[st_fifo->tail].status = status;
1794                 st_fifo->entries[st_fifo->tail].len = len;
1795                 st_fifo->pending_bytes += len;
1796                 st_fifo->tail++;
1797                 st_fifo->len++;
1798         }
1799         /* Try to process all entries in status FIFO */
1800         while (st_fifo->len > 0) {
1801                 /* Get first entry */
1802                 status = st_fifo->entries[st_fifo->head].status;
1803                 len    = st_fifo->entries[st_fifo->head].len;
1804                 st_fifo->pending_bytes -= len;
1805                 st_fifo->head++;
1806                 st_fifo->len--;
1807
1808                 /* Check for errors */
1809                 if (status & FRM_ST_ERR_MSK) {
1810                         if (status & FRM_ST_LOST_FR) {
1811                                 /* Add number of lost frames to stats */
1812                                 self->netdev->stats.rx_errors += len;
1813                         } else {
1814                                 /* Skip frame */
1815                                 self->netdev->stats.rx_errors++;
1816
1817                                 self->rx_buff.data += len;
1818
1819                                 if (status & FRM_ST_MAX_LEN)
1820                                         self->netdev->stats.rx_length_errors++;
1821
1822                                 if (status & FRM_ST_PHY_ERR)
1823                                         self->netdev->stats.rx_frame_errors++;
1824
1825                                 if (status & FRM_ST_BAD_CRC)
1826                                         self->netdev->stats.rx_crc_errors++;
1827                         }
1828                         /* The errors below can be reported in both cases */
1829                         if (status & FRM_ST_OVR1)
1830                                 self->netdev->stats.rx_fifo_errors++;
1831
1832                         if (status & FRM_ST_OVR2)
1833                                 self->netdev->stats.rx_fifo_errors++;
1834                 } else {
1835                         /*
1836                          * First we must make sure that the frame we
1837                          * want to deliver is all in main memory. If we
1838                          * cannot tell, then we check if the Rx FIFO is
1839                          * empty. If not then we will have to take a nap
1840                          * and try again later.
1841                          */
1842                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1843                                 switch_bank(iobase, BANK0);
1844                                 if (inb(iobase+LSR) & LSR_RXDA) {
1845                                         /* Put this entry back in fifo */
1846                                         st_fifo->head--;
1847                                         st_fifo->len++;
1848                                         st_fifo->pending_bytes += len;
1849                                         st_fifo->entries[st_fifo->head].status = status;
1850                                         st_fifo->entries[st_fifo->head].len = len;
1851                                         /*
1852                                          * DMA not finished yet, so try again
1853                                          * later, set timer value, resolution
1854                                          * 125 us
1855                                          */
1856                                         switch_bank(iobase, BANK4);
1857                                         outb(0x02, iobase+TMRL); /* x 125 us */
1858                                         outb(0x00, iobase+TMRH);
1859
1860                                         /* Start timer */
1861                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1862
1863                                         /* Restore bank register */
1864                                         outb(bank, iobase+BSR);
1865
1866                                         return FALSE; /* I'll be back! */
1867                                 }
1868                         }
1869
1870                         /*
1871                          * Remember the time we received this frame, so we can
1872                          * reduce the min turn time a bit since we will know
1873                          * how much time we have used for protocol processing
1874                          */
1875                         do_gettimeofday(&self->stamp);
1876
1877                         skb = dev_alloc_skb(len+1);
1878                         if (skb == NULL)  {
1879                                 self->netdev->stats.rx_dropped++;
1880
1881                                 /* Restore bank register */
1882                                 outb(bank, iobase+BSR);
1883
1884                                 return FALSE;
1885                         }
1886
1887                         /* Make sure IP header gets aligned */
1888                         skb_reserve(skb, 1);
1889
1890                         /* Copy frame without CRC */
1891                         if (self->io.speed < 4000000) {
1892                                 skb_put(skb, len-2);
1893                                 skb_copy_to_linear_data(skb,
1894                                                         self->rx_buff.data,
1895                                                         len - 2);
1896                         } else {
1897                                 skb_put(skb, len-4);
1898                                 skb_copy_to_linear_data(skb,
1899                                                         self->rx_buff.data,
1900                                                         len - 4);
1901                         }
1902
1903                         /* Move to next frame */
1904                         self->rx_buff.data += len;
1905                         self->netdev->stats.rx_bytes += len;
1906                         self->netdev->stats.rx_packets++;
1907
1908                         skb->dev = self->netdev;
1909                         skb_reset_mac_header(skb);
1910                         skb->protocol = htons(ETH_P_IRDA);
1911                         netif_rx(skb);
1912                 }
1913         }
1914         /* Restore bank register */
1915         outb(bank, iobase+BSR);
1916
1917         return TRUE;
1918 }
1919
1920 /*
1921  * Function nsc_ircc_pio_receive (self)
1922  *
1923  *    Receive all data in receiver FIFO
1924  *
1925  */
1926 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1927 {
1928         __u8 byte;
1929         int iobase;
1930
1931         iobase = self->io.fir_base;
1932
1933         /*  Receive all characters in Rx FIFO */
1934         do {
1935                 byte = inb(iobase+RXD);
1936                 async_unwrap_char(self->netdev, &self->netdev->stats,
1937                                   &self->rx_buff, byte);
1938         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1939 }
1940
1941 /*
1942  * Function nsc_ircc_sir_interrupt (self, eir)
1943  *
1944  *    Handle SIR interrupt
1945  *
1946  */
1947 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1948 {
1949         int actual;
1950
1951         /* Check if transmit FIFO is low on data */
1952         if (eir & EIR_TXLDL_EV) {
1953                 /* Write data left in transmit buffer */
1954                 actual = nsc_ircc_pio_write(self->io.fir_base,
1955                                            self->tx_buff.data,
1956                                            self->tx_buff.len,
1957                                            self->io.fifo_size);
1958                 self->tx_buff.data += actual;
1959                 self->tx_buff.len  -= actual;
1960
1961                 self->io.direction = IO_XMIT;
1962
1963                 /* Check if finished */
1964                 if (self->tx_buff.len > 0)
1965                         self->ier = IER_TXLDL_IE;
1966                 else {
1967
1968                         self->netdev->stats.tx_packets++;
1969                         netif_wake_queue(self->netdev);
1970                         self->ier = IER_TXEMP_IE;
1971                 }
1972
1973         }
1974         /* Check if transmission has completed */
1975         if (eir & EIR_TXEMP_EV) {
1976                 /* Turn around and get ready to receive some data */
1977                 self->io.direction = IO_RECV;
1978                 self->ier = IER_RXHDL_IE;
1979                 /* Check if we need to change the speed?
1980                  * Need to be after self->io.direction to avoid race with
1981                  * nsc_ircc_hard_xmit_sir() - Jean II */
1982                 if (self->new_speed) {
1983                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__);
1984                         self->ier = nsc_ircc_change_speed(self,
1985                                                           self->new_speed);
1986                         self->new_speed = 0;
1987                         netif_wake_queue(self->netdev);
1988
1989                         /* Check if we are going to FIR */
1990                         if (self->io.speed > 115200) {
1991                                 /* No need to do anymore SIR stuff */
1992                                 return;
1993                         }
1994                 }
1995         }
1996
1997         /* Rx FIFO threshold or timeout */
1998         if (eir & EIR_RXHDL_EV) {
1999                 nsc_ircc_pio_receive(self);
2000
2001                 /* Keep receiving */
2002                 self->ier = IER_RXHDL_IE;
2003         }
2004 }
2005
2006 /*
2007  * Function nsc_ircc_fir_interrupt (self, eir)
2008  *
2009  *    Handle MIR/FIR interrupt
2010  *
2011  */
2012 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
2013                                    int eir)
2014 {
2015         __u8 bank;
2016
2017         bank = inb(iobase+BSR);
2018
2019         /* Status FIFO event*/
2020         if (eir & EIR_SFIF_EV) {
2021                 /* Check if DMA has finished */
2022                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2023                         /* Wait for next status FIFO interrupt */
2024                         self->ier = IER_SFIF_IE;
2025                 } else {
2026                         self->ier = IER_SFIF_IE | IER_TMR_IE;
2027                 }
2028         } else if (eir & EIR_TMR_EV) { /* Timer finished */
2029                 /* Disable timer */
2030                 switch_bank(iobase, BANK4);
2031                 outb(0, iobase+IRCR1);
2032
2033                 /* Clear timer event */
2034                 switch_bank(iobase, BANK0);
2035                 outb(ASCR_CTE, iobase+ASCR);
2036
2037                 /* Check if this is a Tx timer interrupt */
2038                 if (self->io.direction == IO_XMIT) {
2039                         nsc_ircc_dma_xmit(self, iobase);
2040
2041                         /* Interrupt on DMA */
2042                         self->ier = IER_DMA_IE;
2043                 } else {
2044                         /* Check (again) if DMA has finished */
2045                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
2046                                 self->ier = IER_SFIF_IE;
2047                         } else {
2048                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
2049                         }
2050                 }
2051         } else if (eir & EIR_DMA_EV) {
2052                 /* Finished with all transmissions? */
2053                 if (nsc_ircc_dma_xmit_complete(self)) {
2054                         if(self->new_speed != 0) {
2055                                 /* As we stop the Tx queue, the speed change
2056                                  * need to be done when the Tx fifo is
2057                                  * empty. Ask for a Tx done interrupt */
2058                                 self->ier = IER_TXEMP_IE;
2059                         } else {
2060                                 /* Check if there are more frames to be
2061                                  * transmitted */
2062                                 if (irda_device_txqueue_empty(self->netdev)) {
2063                                         /* Prepare for receive */
2064                                         nsc_ircc_dma_receive(self);
2065                                         self->ier = IER_SFIF_IE;
2066                                 } else
2067                                         net_warn_ratelimited("%s(), potential Tx queue lockup !\n",
2068                                                              __func__);
2069                         }
2070                 } else {
2071                         /*  Not finished yet, so interrupt on DMA again */
2072                         self->ier = IER_DMA_IE;
2073                 }
2074         } else if (eir & EIR_TXEMP_EV) {
2075                 /* The Tx FIFO has totally drained out, so now we can change
2076                  * the speed... - Jean II */
2077                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2078                 self->new_speed = 0;
2079                 netif_wake_queue(self->netdev);
2080                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2081         }
2082
2083         outb(bank, iobase+BSR);
2084 }
2085
2086 /*
2087  * Function nsc_ircc_interrupt (irq, dev_id, regs)
2088  *
2089  *    An interrupt from the chip has arrived. Time to do some work
2090  *
2091  */
2092 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2093 {
2094         struct net_device *dev = dev_id;
2095         struct nsc_ircc_cb *self;
2096         __u8 bsr, eir;
2097         int iobase;
2098
2099         self = netdev_priv(dev);
2100
2101         spin_lock(&self->lock);
2102
2103         iobase = self->io.fir_base;
2104
2105         bsr = inb(iobase+BSR);  /* Save current bank */
2106
2107         switch_bank(iobase, BANK0);
2108         self->ier = inb(iobase+IER);
2109         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2110
2111         outb(0, iobase+IER); /* Disable interrupts */
2112
2113         if (eir) {
2114                 /* Dispatch interrupt handler for the current speed */
2115                 if (self->io.speed > 115200)
2116                         nsc_ircc_fir_interrupt(self, iobase, eir);
2117                 else
2118                         nsc_ircc_sir_interrupt(self, eir);
2119         }
2120
2121         outb(self->ier, iobase+IER); /* Restore interrupts */
2122         outb(bsr, iobase+BSR);       /* Restore bank register */
2123
2124         spin_unlock(&self->lock);
2125         return IRQ_RETVAL(eir);
2126 }
2127
2128 /*
2129  * Function nsc_ircc_is_receiving (self)
2130  *
2131  *    Return TRUE is we are currently receiving a frame
2132  *
2133  */
2134 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2135 {
2136         unsigned long flags;
2137         int status = FALSE;
2138         int iobase;
2139         __u8 bank;
2140
2141         IRDA_ASSERT(self != NULL, return FALSE;);
2142
2143         spin_lock_irqsave(&self->lock, flags);
2144
2145         if (self->io.speed > 115200) {
2146                 iobase = self->io.fir_base;
2147
2148                 /* Check if rx FIFO is not empty */
2149                 bank = inb(iobase+BSR);
2150                 switch_bank(iobase, BANK2);
2151                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2152                         /* We are receiving something */
2153                         status =  TRUE;
2154                 }
2155                 outb(bank, iobase+BSR);
2156         } else
2157                 status = (self->rx_buff.state != OUTSIDE_FRAME);
2158
2159         spin_unlock_irqrestore(&self->lock, flags);
2160
2161         return status;
2162 }
2163
2164 /*
2165  * Function nsc_ircc_net_open (dev)
2166  *
2167  *    Start the device
2168  *
2169  */
2170 static int nsc_ircc_net_open(struct net_device *dev)
2171 {
2172         struct nsc_ircc_cb *self;
2173         int iobase;
2174         char hwname[32];
2175         __u8 bank;
2176
2177         IRDA_DEBUG(4, "%s()\n", __func__);
2178
2179         IRDA_ASSERT(dev != NULL, return -1;);
2180         self = netdev_priv(dev);
2181
2182         IRDA_ASSERT(self != NULL, return 0;);
2183
2184         iobase = self->io.fir_base;
2185
2186         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2187                 net_warn_ratelimited("%s, unable to allocate irq=%d\n",
2188                                      driver_name, self->io.irq);
2189                 return -EAGAIN;
2190         }
2191         /*
2192          * Always allocate the DMA channel after the IRQ, and clean up on
2193          * failure.
2194          */
2195         if (request_dma(self->io.dma, dev->name)) {
2196                 net_warn_ratelimited("%s, unable to allocate dma=%d\n",
2197                                      driver_name, self->io.dma);
2198                 free_irq(self->io.irq, dev);
2199                 return -EAGAIN;
2200         }
2201
2202         /* Save current bank */
2203         bank = inb(iobase+BSR);
2204
2205         /* turn on interrupts */
2206         switch_bank(iobase, BANK0);
2207         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2208
2209         /* Restore bank register */
2210         outb(bank, iobase+BSR);
2211
2212         /* Ready to play! */
2213         netif_start_queue(dev);
2214
2215         /* Give self a hardware name */
2216         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2217
2218         /*
2219          * Open new IrLAP layer instance, now that everything should be
2220          * initialized properly
2221          */
2222         self->irlap = irlap_open(dev, &self->qos, hwname);
2223
2224         return 0;
2225 }
2226
2227 /*
2228  * Function nsc_ircc_net_close (dev)
2229  *
2230  *    Stop the device
2231  *
2232  */
2233 static int nsc_ircc_net_close(struct net_device *dev)
2234 {
2235         struct nsc_ircc_cb *self;
2236         int iobase;
2237         __u8 bank;
2238
2239         IRDA_DEBUG(4, "%s()\n", __func__);
2240
2241         IRDA_ASSERT(dev != NULL, return -1;);
2242
2243         self = netdev_priv(dev);
2244         IRDA_ASSERT(self != NULL, return 0;);
2245
2246         /* Stop device */
2247         netif_stop_queue(dev);
2248
2249         /* Stop and remove instance of IrLAP */
2250         if (self->irlap)
2251                 irlap_close(self->irlap);
2252         self->irlap = NULL;
2253
2254         iobase = self->io.fir_base;
2255
2256         disable_dma(self->io.dma);
2257
2258         /* Save current bank */
2259         bank = inb(iobase+BSR);
2260
2261         /* Disable interrupts */
2262         switch_bank(iobase, BANK0);
2263         outb(0, iobase+IER);
2264
2265         free_irq(self->io.irq, dev);
2266         free_dma(self->io.dma);
2267
2268         /* Restore bank register */
2269         outb(bank, iobase+BSR);
2270
2271         return 0;
2272 }
2273
2274 /*
2275  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2276  *
2277  *    Process IOCTL commands for this device
2278  *
2279  */
2280 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2281 {
2282         struct if_irda_req *irq = (struct if_irda_req *) rq;
2283         struct nsc_ircc_cb *self;
2284         unsigned long flags;
2285         int ret = 0;
2286
2287         IRDA_ASSERT(dev != NULL, return -1;);
2288
2289         self = netdev_priv(dev);
2290
2291         IRDA_ASSERT(self != NULL, return -1;);
2292
2293         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd);
2294
2295         switch (cmd) {
2296         case SIOCSBANDWIDTH: /* Set bandwidth */
2297                 if (!capable(CAP_NET_ADMIN)) {
2298                         ret = -EPERM;
2299                         break;
2300                 }
2301                 spin_lock_irqsave(&self->lock, flags);
2302                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2303                 spin_unlock_irqrestore(&self->lock, flags);
2304                 break;
2305         case SIOCSMEDIABUSY: /* Set media busy */
2306                 if (!capable(CAP_NET_ADMIN)) {
2307                         ret = -EPERM;
2308                         break;
2309                 }
2310                 irda_device_set_media_busy(self->netdev, TRUE);
2311                 break;
2312         case SIOCGRECEIVING: /* Check if we are receiving right now */
2313                 /* This is already protected */
2314                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2315                 break;
2316         default:
2317                 ret = -EOPNOTSUPP;
2318         }
2319         return ret;
2320 }
2321
2322 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2323 {
2324         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2325         int bank;
2326         unsigned long flags;
2327         int iobase = self->io.fir_base;
2328
2329         if (self->io.suspended)
2330                 return 0;
2331
2332         IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2333
2334         rtnl_lock();
2335         if (netif_running(self->netdev)) {
2336                 netif_device_detach(self->netdev);
2337                 spin_lock_irqsave(&self->lock, flags);
2338                 /* Save current bank */
2339                 bank = inb(iobase+BSR);
2340
2341                 /* Disable interrupts */
2342                 switch_bank(iobase, BANK0);
2343                 outb(0, iobase+IER);
2344
2345                 /* Restore bank register */
2346                 outb(bank, iobase+BSR);
2347
2348                 spin_unlock_irqrestore(&self->lock, flags);
2349                 free_irq(self->io.irq, self->netdev);
2350                 disable_dma(self->io.dma);
2351         }
2352         self->io.suspended = 1;
2353         rtnl_unlock();
2354
2355         return 0;
2356 }
2357
2358 static int nsc_ircc_resume(struct platform_device *dev)
2359 {
2360         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2361         unsigned long flags;
2362
2363         if (!self->io.suspended)
2364                 return 0;
2365
2366         IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2367
2368         rtnl_lock();
2369         nsc_ircc_setup(&self->io);
2370         nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2371
2372         if (netif_running(self->netdev)) {
2373                 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2374                                 self->netdev->name, self->netdev)) {
2375                         net_warn_ratelimited("%s, unable to allocate irq=%d\n",
2376                                              driver_name, self->io.irq);
2377
2378                         /*
2379                          * Don't fail resume process, just kill this
2380                          * network interface
2381                          */
2382                         unregister_netdevice(self->netdev);
2383                 } else {
2384                         spin_lock_irqsave(&self->lock, flags);
2385                         nsc_ircc_change_speed(self, self->io.speed);
2386                         spin_unlock_irqrestore(&self->lock, flags);
2387                         netif_device_attach(self->netdev);
2388                 }
2389
2390         } else {
2391                 spin_lock_irqsave(&self->lock, flags);
2392                 nsc_ircc_change_speed(self, 9600);
2393                 spin_unlock_irqrestore(&self->lock, flags);
2394         }
2395         self->io.suspended = 0;
2396         rtnl_unlock();
2397
2398         return 0;
2399 }
2400
2401 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2402 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2403 MODULE_LICENSE("GPL");
2404
2405
2406 module_param(qos_mtt_bits, int, 0);
2407 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2408 module_param_array(io, int, NULL, 0);
2409 MODULE_PARM_DESC(io, "Base I/O addresses");
2410 module_param_array(irq, int, NULL, 0);
2411 MODULE_PARM_DESC(irq, "IRQ lines");
2412 module_param_array(dma, int, NULL, 0);
2413 MODULE_PARM_DESC(dma, "DMA channels");
2414 module_param(dongle_id, int, 0);
2415 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2416
2417 module_init(nsc_ircc_init);
2418 module_exit(nsc_ircc_cleanup);
2419