1 /********************************************************************
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
8 Copyright (c) 1998-2003 VIA Technologies, Inc.
10 This program is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free Software
12 Foundation; either version 2, or (at your option) any later version.
14 This program is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17 See the GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, see <http://www.gnu.org/licenses/>.
22 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
23 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
25 jul/09/2002 : only implement two kind of dongle currently.
26 Oct/02/2002 : work on VT8231 and VT8233 .
27 Aug/06/2003 : change driver format to pci driver .
29 2004-02-16: <sda@bdit.de>
30 - Removed unneeded 'legacy' pci stuff.
31 - Make sure SIR mode is set (hw_init()) before calling mode-dependent stuff.
32 - On speed change from core, don't send SIR frame with new speed.
33 Use current speed and change speeds later.
34 - Make module-param dongle_id actually work.
35 - New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
36 Tested with home-grown PCB on EPIA boards.
39 ********************************************************************/
40 #include <linux/module.h>
41 #include <linux/kernel.h>
42 #include <linux/types.h>
43 #include <linux/skbuff.h>
44 #include <linux/netdevice.h>
45 #include <linux/ioport.h>
46 #include <linux/delay.h>
47 #include <linux/init.h>
48 #include <linux/interrupt.h>
49 #include <linux/rtnetlink.h>
50 #include <linux/pci.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/gfp.h>
56 #include <asm/byteorder.h>
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda.h>
62 #include <net/irda/irda_device.h>
66 #define VIA_MODULE_NAME "via-ircc"
67 #define CHIP_IO_EXTENT 0x40
69 static char *driver_name = VIA_MODULE_NAME;
71 /* Module parameters */
72 static int qos_mtt_bits = 0x07; /* 1 ms or more */
73 static int dongle_id = 0; /* default: probe */
75 /* We can't guess the type of connected dongle, user *must* supply it. */
76 module_param(dongle_id, int, 0);
79 static int via_ircc_open(struct pci_dev *pdev, chipio_t *info,
81 static int via_ircc_dma_receive(struct via_ircc_cb *self);
82 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
84 static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
85 struct net_device *dev);
86 static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
87 struct net_device *dev);
88 static void via_hw_init(struct via_ircc_cb *self);
89 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
90 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id);
91 static int via_ircc_is_receiving(struct via_ircc_cb *self);
92 static int via_ircc_read_dongle_id(int iobase);
94 static int via_ircc_net_open(struct net_device *dev);
95 static int via_ircc_net_close(struct net_device *dev);
96 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
98 static void via_ircc_change_dongle_speed(int iobase, int speed,
100 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
101 static void hwreset(struct via_ircc_cb *self);
102 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
103 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
104 static int via_init_one(struct pci_dev *pcidev, const struct pci_device_id *id);
105 static void via_remove_one(struct pci_dev *pdev);
107 /* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
108 static void iodelay(int udelay)
113 for (i = 0; i < udelay; i++) {
118 static const struct pci_device_id via_pci_tbl[] = {
119 { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
120 { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
121 { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
122 { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
123 { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
127 MODULE_DEVICE_TABLE(pci,via_pci_tbl);
130 static struct pci_driver via_driver = {
131 .name = VIA_MODULE_NAME,
132 .id_table = via_pci_tbl,
133 .probe = via_init_one,
134 .remove = via_remove_one,
139 * Function via_ircc_init ()
141 * Initialize chip. Just find out chip type and resource.
143 static int __init via_ircc_init(void)
147 IRDA_DEBUG(3, "%s()\n", __func__);
149 rc = pci_register_driver(&via_driver);
151 IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
158 static int via_init_one(struct pci_dev *pcidev, const struct pci_device_id *id)
161 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
162 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
165 IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __func__, id->device);
167 rc = pci_enable_device (pcidev);
169 IRDA_DEBUG(0, "%s(): error rc = %d\n", __func__, rc);
173 // South Bridge exist
174 if ( ReadLPCReg(0x20) != 0x3C )
179 if (Chipset==0x3076) {
180 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __func__);
182 WriteLPCReg(7,0x0c );
183 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
184 if((temp&0x01)==1) { // BIOS close or no FIR
185 WriteLPCReg(0x1d, 0x82 );
186 WriteLPCReg(0x23,0x18);
187 temp=ReadLPCReg(0xF0);
189 temp=(ReadLPCReg(0x74)&0x03); //DMA
191 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
194 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
198 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
199 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
200 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
201 FirIOBase=FirIOBase ;
202 info.fir_base=FirIOBase;
206 pci_read_config_byte(pcidev,0x40,&bTmp);
207 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
208 pci_read_config_byte(pcidev,0x42,&bTmp);
209 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
210 pci_write_config_byte(pcidev,0x5a,0xc0);
211 WriteLPCReg(0x28, 0x70 );
212 rc = via_ircc_open(pcidev, &info, 0x3076);
214 rc = -ENODEV; //IR not turn on
215 } else { //Not VT1211
216 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __func__);
218 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
219 if((bTmp&0x01)==1) { // BIOS enable FIR
220 //Enable Double DMA clock
221 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
222 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
223 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
224 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
225 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
226 pci_write_config_byte(pcidev,0x44,0x4e);
227 //---------- read configuration from Function0 of south bridge
229 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
230 FirDRQ0 = (bTmp1 & 0x30) >> 4;
231 pci_read_config_byte(pcidev,0x44,&bTmp1);
232 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
234 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
235 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
238 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
239 FirIRQ = bTmp1 & 0x0f;
241 pci_read_config_byte(pcidev,0x69,&bTmp);
242 FirIOBase = bTmp << 8;//hight byte
243 pci_read_config_byte(pcidev,0x68,&bTmp);
244 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
245 //-------------------------
246 info.fir_base=FirIOBase;
250 rc = via_ircc_open(pcidev, &info, 0x3096);
252 rc = -ENODEV; //IR not turn on !!!!!
255 IRDA_DEBUG(2, "%s(): End - rc = %d\n", __func__, rc);
259 static void __exit via_ircc_cleanup(void)
261 IRDA_DEBUG(3, "%s()\n", __func__);
263 /* Cleanup all instances of the driver */
264 pci_unregister_driver (&via_driver);
267 static const struct net_device_ops via_ircc_sir_ops = {
268 .ndo_start_xmit = via_ircc_hard_xmit_sir,
269 .ndo_open = via_ircc_net_open,
270 .ndo_stop = via_ircc_net_close,
271 .ndo_do_ioctl = via_ircc_net_ioctl,
273 static const struct net_device_ops via_ircc_fir_ops = {
274 .ndo_start_xmit = via_ircc_hard_xmit_fir,
275 .ndo_open = via_ircc_net_open,
276 .ndo_stop = via_ircc_net_close,
277 .ndo_do_ioctl = via_ircc_net_ioctl,
281 * Function via_ircc_open(pdev, iobase, irq)
283 * Open driver instance
286 static int via_ircc_open(struct pci_dev *pdev, chipio_t *info, unsigned int id)
288 struct net_device *dev;
289 struct via_ircc_cb *self;
292 IRDA_DEBUG(3, "%s()\n", __func__);
294 /* Allocate new instance of the driver */
295 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
299 self = netdev_priv(dev);
301 spin_lock_init(&self->lock);
303 pci_set_drvdata(pdev, self);
305 /* Initialize Resource */
306 self->io.cfg_base = info->cfg_base;
307 self->io.fir_base = info->fir_base;
308 self->io.irq = info->irq;
309 self->io.fir_ext = CHIP_IO_EXTENT;
310 self->io.dma = info->dma;
311 self->io.dma2 = info->dma2;
312 self->io.fifo_size = 32;
314 self->st_fifo.len = 0;
315 self->RxDataReady = 0;
317 /* Reserve the ioports that we need */
318 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
319 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
320 __func__, self->io.fir_base);
325 /* Initialize QoS for this device */
326 irda_init_max_qos_capabilies(&self->qos);
328 /* Check if user has supplied the dongle id or not */
330 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
331 self->io.dongle_id = dongle_id;
333 /* The only value we must override it the baudrate */
334 /* Maximum speeds and capabilities are dongle-dependent. */
335 switch( self->io.dongle_id ){
337 self->qos.baud_rate.bits =
338 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
339 IR_576000 | IR_1152000 | (IR_4000000 << 8);
342 self->qos.baud_rate.bits =
343 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
347 /* Following was used for testing:
349 * self->qos.baud_rate.bits = IR_9600;
351 * Is is no good, as it prohibits (error-prone) speed-changes.
354 self->qos.min_turn_time.bits = qos_mtt_bits;
355 irda_qos_bits_to_value(&self->qos);
357 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
358 self->rx_buff.truesize = 14384 + 2048;
359 self->tx_buff.truesize = 14384 + 2048;
361 /* Allocate memory if needed */
363 dma_zalloc_coherent(&pdev->dev, self->rx_buff.truesize,
364 &self->rx_buff_dma, GFP_KERNEL);
365 if (self->rx_buff.head == NULL) {
371 dma_zalloc_coherent(&pdev->dev, self->tx_buff.truesize,
372 &self->tx_buff_dma, GFP_KERNEL);
373 if (self->tx_buff.head == NULL) {
378 self->rx_buff.in_frame = FALSE;
379 self->rx_buff.state = OUTSIDE_FRAME;
380 self->tx_buff.data = self->tx_buff.head;
381 self->rx_buff.data = self->rx_buff.head;
383 /* Reset Tx queue info */
384 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
385 self->tx_fifo.tail = self->tx_buff.head;
387 /* Override the network functions we need to use */
388 dev->netdev_ops = &via_ircc_sir_ops;
390 err = register_netdev(dev);
394 IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
396 /* Initialise the hardware..
398 self->io.speed = 9600;
402 dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
403 self->tx_buff.head, self->tx_buff_dma);
405 dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
406 self->rx_buff.head, self->rx_buff_dma);
408 release_region(self->io.fir_base, self->io.fir_ext);
415 * Function via_remove_one(pdev)
417 * Close driver instance
420 static void via_remove_one(struct pci_dev *pdev)
422 struct via_ircc_cb *self = pci_get_drvdata(pdev);
425 IRDA_DEBUG(3, "%s()\n", __func__);
427 iobase = self->io.fir_base;
429 ResetChip(iobase, 5); //hardware reset.
430 /* Remove netdevice */
431 unregister_netdev(self->netdev);
433 /* Release the PORT that this driver is using */
434 IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
435 __func__, self->io.fir_base);
436 release_region(self->io.fir_base, self->io.fir_ext);
437 if (self->tx_buff.head)
438 dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
439 self->tx_buff.head, self->tx_buff_dma);
440 if (self->rx_buff.head)
441 dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
442 self->rx_buff.head, self->rx_buff_dma);
444 free_netdev(self->netdev);
446 pci_disable_device(pdev);
450 * Function via_hw_init(self)
452 * Returns non-negative on success.
454 * Formerly via_ircc_setup
456 static void via_hw_init(struct via_ircc_cb *self)
458 int iobase = self->io.fir_base;
460 IRDA_DEBUG(3, "%s()\n", __func__);
462 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
464 EnRXFIFOReadyInt(iobase, OFF);
465 EnRXFIFOHalfLevelInt(iobase, OFF);
466 EnTXFIFOHalfLevelInt(iobase, OFF);
467 EnTXFIFOUnderrunEOMInt(iobase, ON);
468 EnTXFIFOReadyInt(iobase, OFF);
469 InvertTX(iobase, OFF);
470 InvertRX(iobase, OFF);
472 if (ReadLPCReg(0x20) == 0x3c)
473 WriteLPCReg(0xF0, 0); // for VT1211
475 EnRXSpecInt(iobase, ON);
477 /* The following is basically hwreset */
478 /* If this is the case, why not just call hwreset() ? Jean II */
479 ResetChip(iobase, 5);
480 EnableDMA(iobase, OFF);
481 EnableTX(iobase, OFF);
482 EnableRX(iobase, OFF);
483 EnRXDMA(iobase, OFF);
484 EnTXDMA(iobase, OFF);
485 RXStart(iobase, OFF);
486 TXStart(iobase, OFF);
489 SIRFilter(iobase, ON);
493 WriteReg(iobase, I_ST_CT_0, 0x00);
494 SetBaudRate(iobase, 9600);
495 SetPulseWidth(iobase, 12);
496 SetSendPreambleCount(iobase, 0);
498 self->io.speed = 9600;
499 self->st_fifo.len = 0;
501 via_ircc_change_dongle_speed(iobase, self->io.speed,
504 WriteReg(iobase, I_ST_CT_0, 0x80);
508 * Function via_ircc_read_dongle_id (void)
511 static int via_ircc_read_dongle_id(int iobase)
513 IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
514 return 9; /* Default to IBM */
518 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
519 * Change speed of the attach dongle
520 * only implement two type of dongle currently.
522 static void via_ircc_change_dongle_speed(int iobase, int speed,
527 /* speed is unused, as we use IsSIROn()/IsMIROn() */
530 IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
531 __func__, speed, iobase, dongle_id);
535 /* Note: The dongle_id's listed here are derived from
538 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
539 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
540 InvertTX(iobase, OFF);
541 InvertRX(iobase, OFF);
543 EnRX2(iobase, ON); //sir to rx2
544 EnGPIOtoRX2(iobase, OFF);
546 if (IsSIROn(iobase)) { //sir
548 SlowIRRXLowActive(iobase, ON);
550 SlowIRRXLowActive(iobase, OFF);
552 if (IsMIROn(iobase)) { //mir
554 SlowIRRXLowActive(iobase, OFF);
557 if (IsFIROn(iobase)) { //fir
559 SlowIRRXLowActive(iobase, OFF);
566 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
567 UseOneRX(iobase, ON); //use ONE RX....RX1
568 InvertTX(iobase, OFF);
569 InvertRX(iobase, OFF); // invert RX pin
572 EnGPIOtoRX2(iobase, OFF);
573 if (IsSIROn(iobase)) { //sir
575 SlowIRRXLowActive(iobase, ON);
578 SlowIRRXLowActive(iobase, OFF);
580 if (IsMIROn(iobase)) { //mir
582 SlowIRRXLowActive(iobase, OFF);
585 SlowIRRXLowActive(iobase, ON);
587 if (IsFIROn(iobase)) { //fir
589 SlowIRRXLowActive(iobase, OFF);
594 SlowIRRXLowActive(iobase, ON);
597 WriteTX(iobase, OFF);
603 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
604 InvertTX(iobase, OFF);
605 InvertRX(iobase, OFF);
606 SlowIRRXLowActive(iobase, OFF);
607 if (IsSIROn(iobase)) { //sir
608 EnGPIOtoRX2(iobase, OFF);
609 WriteGIO(iobase, OFF);
610 EnRX2(iobase, OFF); //sir to rx2
612 EnGPIOtoRX2(iobase, OFF);
613 WriteGIO(iobase, OFF);
614 EnRX2(iobase, OFF); //fir to rx
618 case 0x11: /* Temic TFDS4500 */
620 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __func__);
622 UseOneRX(iobase, ON); //use ONE RX....RX1
623 InvertTX(iobase, OFF);
624 InvertRX(iobase, ON); // invert RX pin
626 EnRX2(iobase, ON); //sir to rx2
627 EnGPIOtoRX2(iobase, OFF);
629 if( IsSIROn(iobase) ){ //sir
632 SlowIRRXLowActive(iobase, ON);
635 SlowIRRXLowActive(iobase, OFF);
638 IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __func__);
642 case 0x0ff: /* Vishay */
645 else if (IsMIROn(iobase))
647 else if (IsFIROn(iobase))
649 else if (IsVFIROn(iobase))
651 SI_SetMode(iobase, mode);
655 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
656 __func__, dongle_id);
661 * Function via_ircc_change_speed (self, baud)
663 * Change the speed of the device
666 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
668 struct net_device *dev = self->netdev;
672 iobase = self->io.fir_base;
673 /* Update accounting for new speed */
674 self->io.speed = speed;
675 IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __func__, speed);
677 WriteReg(iobase, I_ST_CT_0, 0x0);
679 /* Controller mode sellection */
687 value = (115200/speed)-1;
692 /* FIXME: this can't be right, as it's the same as 115200,
693 * and 576000 is MIR, not SIR. */
706 SetPulseWidth(iobase, 0);
707 SetSendPreambleCount(iobase, 14);
721 /* Set baudrate to 0x19[2..7] */
722 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
724 WriteReg(iobase, I_CF_H_1, bTmp);
726 /* Some dongles may need to be informed about speed changes. */
727 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
729 /* Set FIFO size to 64 */
733 WriteReg(iobase, I_ST_CT_0, 0x80);
735 // EnTXFIFOHalfLevelInt(iobase,ON);
737 /* Enable some interrupts so we can receive frames */
738 //EnAllInt(iobase,ON);
740 if (IsSIROn(iobase)) {
741 SIRFilter(iobase, ON);
742 SIRRecvAny(iobase, ON);
744 SIRFilter(iobase, OFF);
745 SIRRecvAny(iobase, OFF);
748 if (speed > 115200) {
749 /* Install FIR xmit handler */
750 dev->netdev_ops = &via_ircc_fir_ops;
751 via_ircc_dma_receive(self);
753 /* Install SIR xmit handler */
754 dev->netdev_ops = &via_ircc_sir_ops;
756 netif_wake_queue(dev);
760 * Function via_ircc_hard_xmit (skb, dev)
762 * Transmit the frame!
765 static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
766 struct net_device *dev)
768 struct via_ircc_cb *self;
773 self = netdev_priv(dev);
774 IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
775 iobase = self->io.fir_base;
777 netif_stop_queue(dev);
778 /* Check if we need to change the speed */
779 speed = irda_get_next_speed(skb);
780 if ((speed != self->io.speed) && (speed != -1)) {
781 /* Check for empty frame */
783 via_ircc_change_speed(self, speed);
784 dev->trans_start = jiffies;
788 self->new_speed = speed;
792 SIRFilter(iobase, ON);
796 WriteReg(iobase, I_ST_CT_0, 0x00);
798 spin_lock_irqsave(&self->lock, flags);
799 self->tx_buff.data = self->tx_buff.head;
801 async_wrap_skb(skb, self->tx_buff.data,
802 self->tx_buff.truesize);
804 dev->stats.tx_bytes += self->tx_buff.len;
805 /* Send this frame with old speed */
806 SetBaudRate(iobase, self->io.speed);
807 SetPulseWidth(iobase, 12);
808 SetSendPreambleCount(iobase, 0);
809 WriteReg(iobase, I_ST_CT_0, 0x80);
811 EnableTX(iobase, ON);
812 EnableRX(iobase, OFF);
814 ResetChip(iobase, 0);
815 ResetChip(iobase, 1);
816 ResetChip(iobase, 2);
817 ResetChip(iobase, 3);
818 ResetChip(iobase, 4);
820 EnAllInt(iobase, ON);
822 EnRXDMA(iobase, OFF);
824 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
827 SetSendByte(iobase, self->tx_buff.len);
828 RXStart(iobase, OFF);
831 dev->trans_start = jiffies;
832 spin_unlock_irqrestore(&self->lock, flags);
837 static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
838 struct net_device *dev)
840 struct via_ircc_cb *self;
845 self = netdev_priv(dev);
846 iobase = self->io.fir_base;
848 if (self->st_fifo.len)
850 if (self->chip_id == 0x3076)
854 netif_stop_queue(dev);
855 speed = irda_get_next_speed(skb);
856 if ((speed != self->io.speed) && (speed != -1)) {
858 via_ircc_change_speed(self, speed);
859 dev->trans_start = jiffies;
863 self->new_speed = speed;
865 spin_lock_irqsave(&self->lock, flags);
866 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
867 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
869 self->tx_fifo.tail += skb->len;
870 dev->stats.tx_bytes += skb->len;
871 skb_copy_from_linear_data(skb,
872 self->tx_fifo.queue[self->tx_fifo.free].start, skb->len);
874 self->tx_fifo.free++;
875 //F01 if (self->tx_fifo.len == 1) {
876 via_ircc_dma_xmit(self, iobase);
878 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
879 dev->trans_start = jiffies;
881 spin_unlock_irqrestore(&self->lock, flags);
886 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
888 EnTXDMA(iobase, OFF);
889 self->io.direction = IO_XMIT;
891 EnableTX(iobase, ON);
892 EnableRX(iobase, OFF);
893 ResetChip(iobase, 0);
894 ResetChip(iobase, 1);
895 ResetChip(iobase, 2);
896 ResetChip(iobase, 3);
897 ResetChip(iobase, 4);
898 EnAllInt(iobase, ON);
900 EnRXDMA(iobase, OFF);
901 irda_setup_dma(self->io.dma,
902 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
903 self->tx_buff.head) + self->tx_buff_dma,
904 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
905 IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
906 __func__, self->tx_fifo.ptr,
907 self->tx_fifo.queue[self->tx_fifo.ptr].len,
910 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
911 RXStart(iobase, OFF);
918 * Function via_ircc_dma_xmit_complete (self)
920 * The transfer of a frame in finished. This function will only be called
921 * by the interrupt handler
924 static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
929 IRDA_DEBUG(3, "%s()\n", __func__);
931 iobase = self->io.fir_base;
933 // DisableDmaChannel(self->io.dma);
934 /* Check for underrun! */
935 /* Clear bit, by writing 1 into it */
936 Tx_status = GetTXStatus(iobase);
937 if (Tx_status & 0x08) {
938 self->netdev->stats.tx_errors++;
939 self->netdev->stats.tx_fifo_errors++;
941 /* how to clear underrun? */
943 self->netdev->stats.tx_packets++;
944 ResetChip(iobase, 3);
945 ResetChip(iobase, 4);
947 /* Check if we need to change the speed */
948 if (self->new_speed) {
949 via_ircc_change_speed(self, self->new_speed);
953 /* Finished with this frame, so prepare for next */
954 if (IsFIROn(iobase)) {
955 if (self->tx_fifo.len) {
961 "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
963 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
965 // Any frames to be sent back-to-back?
966 if (self->tx_fifo.len) {
968 via_ircc_dma_xmit(self, iobase);
972 // Reset Tx FIFO info
973 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
974 self->tx_fifo.tail = self->tx_buff.head;
977 // Make sure we have room for more frames
978 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
979 // Not busy transmitting anymore
980 // Tell the network layer, that we can accept more frames
981 netif_wake_queue(self->netdev);
987 * Function via_ircc_dma_receive (self)
989 * Set configuration for receive a frame.
992 static int via_ircc_dma_receive(struct via_ircc_cb *self)
996 iobase = self->io.fir_base;
998 IRDA_DEBUG(3, "%s()\n", __func__);
1000 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1001 self->tx_fifo.tail = self->tx_buff.head;
1002 self->RxDataReady = 0;
1003 self->io.direction = IO_RECV;
1004 self->rx_buff.data = self->rx_buff.head;
1005 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1006 self->st_fifo.tail = self->st_fifo.head = 0;
1009 EnableTX(iobase, OFF);
1010 EnableRX(iobase, ON);
1012 ResetChip(iobase, 0);
1013 ResetChip(iobase, 1);
1014 ResetChip(iobase, 2);
1015 ResetChip(iobase, 3);
1016 ResetChip(iobase, 4);
1018 EnAllInt(iobase, ON);
1019 EnTXDMA(iobase, OFF);
1020 EnRXDMA(iobase, ON);
1021 irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1022 self->rx_buff.truesize, DMA_RX_MODE);
1023 TXStart(iobase, OFF);
1024 RXStart(iobase, ON);
1030 * Function via_ircc_dma_receive_complete (self)
1032 * Controller Finished with receiving frames,
1033 * and this routine is call by ISR
1036 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1039 struct st_fifo *st_fifo;
1040 struct sk_buff *skb;
1044 iobase = self->io.fir_base;
1045 st_fifo = &self->st_fifo;
1047 if (self->io.speed < 4000000) { //Speed below FIR
1048 len = GetRecvByte(iobase, self);
1049 skb = dev_alloc_skb(len + 1);
1052 // Make sure IP header gets aligned
1053 skb_reserve(skb, 1);
1054 skb_put(skb, len - 2);
1055 if (self->chip_id == 0x3076) {
1056 for (i = 0; i < len - 2; i++)
1057 skb->data[i] = self->rx_buff.data[i * 2];
1059 if (self->chip_id == 0x3096) {
1060 for (i = 0; i < len - 2; i++)
1062 self->rx_buff.data[i];
1065 // Move to next frame
1066 self->rx_buff.data += len;
1067 self->netdev->stats.rx_bytes += len;
1068 self->netdev->stats.rx_packets++;
1069 skb->dev = self->netdev;
1070 skb_reset_mac_header(skb);
1071 skb->protocol = htons(ETH_P_IRDA);
1077 len = GetRecvByte(iobase, self);
1079 return TRUE; //interrupt only, data maybe move by RxT
1080 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1081 IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1082 __func__, len, RxCurCount(iobase, self),
1087 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1089 st_fifo->len, len - 4, RxCurCount(iobase, self));
1091 st_fifo->entries[st_fifo->tail].status = status;
1092 st_fifo->entries[st_fifo->tail].len = len;
1093 st_fifo->pending_bytes += len;
1096 if (st_fifo->tail > MAX_RX_WINDOW)
1098 self->RxDataReady = 0;
1100 // It maybe have MAX_RX_WINDOW package receive by
1101 // receive_complete before Timer IRQ
1103 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1109 EnableRX(iobase, OFF);
1110 EnRXDMA(iobase, OFF);
1111 RXStart(iobase, OFF);
1113 // Put this entry back in fifo
1114 if (st_fifo->head > MAX_RX_WINDOW)
1116 status = st_fifo->entries[st_fifo->head].status;
1117 len = st_fifo->entries[st_fifo->head].len;
1121 skb = dev_alloc_skb(len + 1 - 4);
1123 * if frame size, data ptr, or skb ptr are wrong, then get next
1126 if ((skb == NULL) || (skb->data == NULL) ||
1127 (self->rx_buff.data == NULL) || (len < 6)) {
1128 self->netdev->stats.rx_dropped++;
1132 skb_reserve(skb, 1);
1133 skb_put(skb, len - 4);
1135 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1136 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __func__,
1137 len - 4, self->rx_buff.data);
1139 // Move to next frame
1140 self->rx_buff.data += len;
1141 self->netdev->stats.rx_bytes += len;
1142 self->netdev->stats.rx_packets++;
1143 skb->dev = self->netdev;
1144 skb_reset_mac_header(skb);
1145 skb->protocol = htons(ETH_P_IRDA);
1155 * if frame is received , but no INT ,then use this routine to upload frame.
1157 static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1159 struct sk_buff *skb;
1161 struct st_fifo *st_fifo;
1162 st_fifo = &self->st_fifo;
1164 len = GetRecvByte(iobase, self);
1166 IRDA_DEBUG(2, "%s(): len=%x\n", __func__, len);
1168 if ((len - 4) < 2) {
1169 self->netdev->stats.rx_dropped++;
1173 skb = dev_alloc_skb(len + 1);
1175 self->netdev->stats.rx_dropped++;
1178 skb_reserve(skb, 1);
1179 skb_put(skb, len - 4 + 1);
1180 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4 + 1);
1183 if (st_fifo->tail > MAX_RX_WINDOW)
1185 // Move to next frame
1186 self->rx_buff.data += len;
1187 self->netdev->stats.rx_bytes += len;
1188 self->netdev->stats.rx_packets++;
1189 skb->dev = self->netdev;
1190 skb_reset_mac_header(skb);
1191 skb->protocol = htons(ETH_P_IRDA);
1193 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1194 RXStart(iobase, ON);
1196 EnableRX(iobase, OFF);
1197 EnRXDMA(iobase, OFF);
1198 RXStart(iobase, OFF);
1204 * Implement back to back receive , use this routine to upload data.
1207 static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1209 struct st_fifo *st_fifo;
1210 struct sk_buff *skb;
1214 st_fifo = &self->st_fifo;
1216 if (CkRxRecv(iobase, self)) {
1217 // if still receiving ,then return ,don't upload frame
1218 self->RetryCount = 0;
1219 SetTimer(iobase, 20);
1220 self->RxDataReady++;
1225 if ((self->RetryCount >= 1) ||
1226 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize) ||
1227 (st_fifo->len >= (MAX_RX_WINDOW))) {
1228 while (st_fifo->len > 0) { //upload frame
1229 // Put this entry back in fifo
1230 if (st_fifo->head > MAX_RX_WINDOW)
1232 status = st_fifo->entries[st_fifo->head].status;
1233 len = st_fifo->entries[st_fifo->head].len;
1237 skb = dev_alloc_skb(len + 1 - 4);
1239 * if frame size, data ptr, or skb ptr are wrong,
1240 * then get next entry.
1242 if ((skb == NULL) || (skb->data == NULL) ||
1243 (self->rx_buff.data == NULL) || (len < 6)) {
1244 self->netdev->stats.rx_dropped++;
1247 skb_reserve(skb, 1);
1248 skb_put(skb, len - 4);
1249 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1251 IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __func__,
1252 len - 4, st_fifo->head);
1254 // Move to next frame
1255 self->rx_buff.data += len;
1256 self->netdev->stats.rx_bytes += len;
1257 self->netdev->stats.rx_packets++;
1258 skb->dev = self->netdev;
1259 skb_reset_mac_header(skb);
1260 skb->protocol = htons(ETH_P_IRDA);
1263 self->RetryCount = 0;
1266 "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1268 GetHostStatus(iobase), GetRXStatus(iobase));
1271 * if frame is receive complete at this routine ,then upload
1274 if ((GetRXStatus(iobase) & 0x10) &&
1275 (RxCurCount(iobase, self) != self->RxLastCount)) {
1276 upload_rxdata(self, iobase);
1277 if (irda_device_txqueue_empty(self->netdev))
1278 via_ircc_dma_receive(self);
1280 } // timer detect complete
1282 SetTimer(iobase, 4);
1290 * Function via_ircc_interrupt (irq, dev_id)
1292 * An interrupt from the chip has arrived. Time to do some work
1295 static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id)
1297 struct net_device *dev = dev_id;
1298 struct via_ircc_cb *self = netdev_priv(dev);
1300 u8 iHostIntType, iRxIntType, iTxIntType;
1302 iobase = self->io.fir_base;
1303 spin_lock(&self->lock);
1304 iHostIntType = GetHostStatus(iobase);
1306 IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
1307 __func__, iHostIntType,
1308 (iHostIntType & 0x40) ? "Timer" : "",
1309 (iHostIntType & 0x20) ? "Tx" : "",
1310 (iHostIntType & 0x10) ? "Rx" : "",
1311 (iHostIntType & 0x0e) >> 1);
1313 if ((iHostIntType & 0x40) != 0) { //Timer Event
1314 self->EventFlag.TimeOut++;
1315 ClearTimerInt(iobase, 1);
1316 if (self->io.direction == IO_XMIT) {
1317 via_ircc_dma_xmit(self, iobase);
1319 if (self->io.direction == IO_RECV) {
1321 * frame ready hold too long, must reset.
1323 if (self->RxDataReady > 30) {
1325 if (irda_device_txqueue_empty(self->netdev)) {
1326 via_ircc_dma_receive(self);
1328 } else { // call this to upload frame.
1329 RxTimerHandler(self, iobase);
1333 if ((iHostIntType & 0x20) != 0) { //Tx Event
1334 iTxIntType = GetTXStatus(iobase);
1336 IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
1337 __func__, iTxIntType,
1338 (iTxIntType & 0x08) ? "FIFO underr." : "",
1339 (iTxIntType & 0x04) ? "EOM" : "",
1340 (iTxIntType & 0x02) ? "FIFO ready" : "",
1341 (iTxIntType & 0x01) ? "Early EOM" : "");
1343 if (iTxIntType & 0x4) {
1344 self->EventFlag.EOMessage++; // read and will auto clean
1345 if (via_ircc_dma_xmit_complete(self)) {
1346 if (irda_device_txqueue_empty
1348 via_ircc_dma_receive(self);
1351 self->EventFlag.Unknown++;
1355 //----------------------------------------
1356 if ((iHostIntType & 0x10) != 0) { //Rx Event
1357 /* Check if DMA has finished */
1358 iRxIntType = GetRXStatus(iobase);
1360 IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
1361 __func__, iRxIntType,
1362 (iRxIntType & 0x80) ? "PHY err." : "",
1363 (iRxIntType & 0x40) ? "CRC err" : "",
1364 (iRxIntType & 0x20) ? "FIFO overr." : "",
1365 (iRxIntType & 0x10) ? "EOF" : "",
1366 (iRxIntType & 0x08) ? "RxData" : "",
1367 (iRxIntType & 0x02) ? "RxMaxLen" : "",
1368 (iRxIntType & 0x01) ? "SIR bad" : "");
1370 IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __func__);
1372 if (iRxIntType & 0x10) {
1373 if (via_ircc_dma_receive_complete(self, iobase)) {
1374 //F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1375 via_ircc_dma_receive(self);
1379 IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1380 __func__, iRxIntType, iHostIntType,
1381 RxCurCount(iobase, self),
1384 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1385 ResetChip(iobase, 0);
1386 ResetChip(iobase, 1);
1387 } else { //PHY,CRC ERR
1389 if (iRxIntType != 0x08)
1390 hwreset(self); //F01
1392 via_ircc_dma_receive(self);
1396 spin_unlock(&self->lock);
1397 return IRQ_RETVAL(iHostIntType);
1400 static void hwreset(struct via_ircc_cb *self)
1403 iobase = self->io.fir_base;
1405 IRDA_DEBUG(3, "%s()\n", __func__);
1407 ResetChip(iobase, 5);
1408 EnableDMA(iobase, OFF);
1409 EnableTX(iobase, OFF);
1410 EnableRX(iobase, OFF);
1411 EnRXDMA(iobase, OFF);
1412 EnTXDMA(iobase, OFF);
1413 RXStart(iobase, OFF);
1414 TXStart(iobase, OFF);
1417 SIRFilter(iobase, ON);
1421 WriteReg(iobase, I_ST_CT_0, 0x00);
1422 SetBaudRate(iobase, 9600);
1423 SetPulseWidth(iobase, 12);
1424 SetSendPreambleCount(iobase, 0);
1425 WriteReg(iobase, I_ST_CT_0, 0x80);
1427 /* Restore speed. */
1428 via_ircc_change_speed(self, self->io.speed);
1430 self->st_fifo.len = 0;
1434 * Function via_ircc_is_receiving (self)
1436 * Return TRUE is we are currently receiving a frame
1439 static int via_ircc_is_receiving(struct via_ircc_cb *self)
1444 IRDA_ASSERT(self != NULL, return FALSE;);
1446 iobase = self->io.fir_base;
1447 if (CkRxRecv(iobase, self))
1450 IRDA_DEBUG(2, "%s(): status=%x....\n", __func__, status);
1457 * Function via_ircc_net_open (dev)
1462 static int via_ircc_net_open(struct net_device *dev)
1464 struct via_ircc_cb *self;
1468 IRDA_DEBUG(3, "%s()\n", __func__);
1470 IRDA_ASSERT(dev != NULL, return -1;);
1471 self = netdev_priv(dev);
1472 dev->stats.rx_packets = 0;
1473 IRDA_ASSERT(self != NULL, return 0;);
1474 iobase = self->io.fir_base;
1475 if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1476 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
1481 * Always allocate the DMA channel after the IRQ, and clean up on
1484 if (request_dma(self->io.dma, dev->name)) {
1485 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
1487 free_irq(self->io.irq, dev);
1490 if (self->io.dma2 != self->io.dma) {
1491 if (request_dma(self->io.dma2, dev->name)) {
1492 IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1493 driver_name, self->io.dma2);
1494 free_irq(self->io.irq, dev);
1495 free_dma(self->io.dma);
1501 /* turn on interrupts */
1502 EnAllInt(iobase, ON);
1503 EnInternalLoop(iobase, OFF);
1504 EnExternalLoop(iobase, OFF);
1507 via_ircc_dma_receive(self);
1509 /* Ready to play! */
1510 netif_start_queue(dev);
1513 * Open new IrLAP layer instance, now that everything should be
1514 * initialized properly
1516 sprintf(hwname, "VIA @ 0x%x", iobase);
1517 self->irlap = irlap_open(dev, &self->qos, hwname);
1519 self->RxLastCount = 0;
1525 * Function via_ircc_net_close (dev)
1530 static int via_ircc_net_close(struct net_device *dev)
1532 struct via_ircc_cb *self;
1535 IRDA_DEBUG(3, "%s()\n", __func__);
1537 IRDA_ASSERT(dev != NULL, return -1;);
1538 self = netdev_priv(dev);
1539 IRDA_ASSERT(self != NULL, return 0;);
1542 netif_stop_queue(dev);
1543 /* Stop and remove instance of IrLAP */
1545 irlap_close(self->irlap);
1547 iobase = self->io.fir_base;
1548 EnTXDMA(iobase, OFF);
1549 EnRXDMA(iobase, OFF);
1550 DisableDmaChannel(self->io.dma);
1552 /* Disable interrupts */
1553 EnAllInt(iobase, OFF);
1554 free_irq(self->io.irq, dev);
1555 free_dma(self->io.dma);
1556 if (self->io.dma2 != self->io.dma)
1557 free_dma(self->io.dma2);
1563 * Function via_ircc_net_ioctl (dev, rq, cmd)
1565 * Process IOCTL commands for this device
1568 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1571 struct if_irda_req *irq = (struct if_irda_req *) rq;
1572 struct via_ircc_cb *self;
1573 unsigned long flags;
1576 IRDA_ASSERT(dev != NULL, return -1;);
1577 self = netdev_priv(dev);
1578 IRDA_ASSERT(self != NULL, return -1;);
1579 IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name,
1581 /* Disable interrupts & save flags */
1582 spin_lock_irqsave(&self->lock, flags);
1584 case SIOCSBANDWIDTH: /* Set bandwidth */
1585 if (!capable(CAP_NET_ADMIN)) {
1589 via_ircc_change_speed(self, irq->ifr_baudrate);
1591 case SIOCSMEDIABUSY: /* Set media busy */
1592 if (!capable(CAP_NET_ADMIN)) {
1596 irda_device_set_media_busy(self->netdev, TRUE);
1598 case SIOCGRECEIVING: /* Check if we are receiving right now */
1599 irq->ifr_receiving = via_ircc_is_receiving(self);
1605 spin_unlock_irqrestore(&self->lock, flags);
1609 MODULE_AUTHOR("VIA Technologies,inc");
1610 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1611 MODULE_LICENSE("GPL");
1613 module_init(via_ircc_init);
1614 module_exit(via_ircc_cleanup);